annotate src/hotspot/cpu/arm/relocInfo_arm.cpp @ 50360:2aa32bb6f3dc

8202134: Non-PCH build for arm32 fails Reviewed-by: stefank
author shade
date Mon, 23 Apr 2018 12:16:09 +0200
parents 77fb0be7d19f
children 83aec1d357d4
rev   line source
bobv@42664 1 /*
bobv@42664 2 * Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
bobv@42664 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
bobv@42664 4 *
bobv@42664 5 * This code is free software; you can redistribute it and/or modify it
bobv@42664 6 * under the terms of the GNU General Public License version 2 only, as
bobv@42664 7 * published by the Free Software Foundation.
bobv@42664 8 *
bobv@42664 9 * This code is distributed in the hope that it will be useful, but WITHOUT
bobv@42664 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
bobv@42664 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
bobv@42664 12 * version 2 for more details (a copy is included in the LICENSE file that
bobv@42664 13 * accompanied this code).
bobv@42664 14 *
bobv@42664 15 * You should have received a copy of the GNU General Public License version
bobv@42664 16 * 2 along with this work; if not, write to the Free Software Foundation,
bobv@42664 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
bobv@42664 18 *
bobv@42664 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
bobv@42664 20 * or visit www.oracle.com if you need additional information or have any
bobv@42664 21 * questions.
bobv@42664 22 *
bobv@42664 23 */
bobv@42664 24
bobv@42664 25 #include "precompiled.hpp"
bobv@42664 26 #include "asm/assembler.inline.hpp"
bobv@42664 27 #include "assembler_arm.inline.hpp"
bobv@42664 28 #include "code/relocInfo.hpp"
bobv@42664 29 #include "nativeInst_arm.hpp"
stefank@50087 30 #include "oops/compressedOops.inline.hpp"
stefank@50087 31 #include "oops/oop.hpp"
shade@50360 32 #include "runtime/orderAccess.inline.hpp"
bobv@42664 33 #include "runtime/safepoint.hpp"
bobv@42664 34
bobv@42664 35 void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
bobv@42664 36
bobv@42664 37 NativeMovConstReg* ni = nativeMovConstReg_at(addr());
bobv@42664 38 #if defined(AARCH64) && defined(COMPILER2)
bobv@42664 39 if (ni->is_movz()) {
bobv@42664 40 assert(type() == relocInfo::oop_type, "!");
bobv@42664 41 if (verify_only) {
bobv@42664 42 uintptr_t d = ni->data();
bobv@42664 43 guarantee((d >> 32) == 0, "not narrow oop");
bobv@42664 44 narrowOop no = d;
stefank@50087 45 oop o = CompressedOops::decode(no);
bobv@42664 46 guarantee(cast_from_oop<intptr_t>(o) == (intptr_t)x, "instructions must match");
bobv@42664 47 } else {
bobv@42664 48 ni->set_data((intptr_t)x);
bobv@42664 49 }
bobv@42664 50 return;
bobv@42664 51 }
bobv@42664 52 #endif
bobv@42664 53 if (verify_only) {
bobv@42664 54 guarantee(ni->data() == (intptr_t)(x + o), "instructions must match");
bobv@42664 55 } else {
bobv@42664 56 ni->set_data((intptr_t)(x + o));
bobv@42664 57 }
bobv@42664 58 }
bobv@42664 59
bobv@42664 60 address Relocation::pd_call_destination(address orig_addr) {
bobv@42664 61 address pc = addr();
bobv@42664 62
bobv@42664 63 int adj = 0;
bobv@42664 64 if (orig_addr != NULL) {
bobv@42664 65 // We just moved this call instruction from orig_addr to addr().
bobv@42664 66 // This means that, when relative, its target will appear to have grown by addr() - orig_addr.
bobv@42664 67 adj = orig_addr - pc;
bobv@42664 68 }
bobv@42664 69
bobv@42664 70 RawNativeInstruction* ni = rawNativeInstruction_at(pc);
bobv@42664 71
bobv@42664 72 #if (!defined(AARCH64))
bobv@42664 73 if (NOT_AARCH64(ni->is_add_lr()) AARCH64_ONLY(ni->is_adr_aligned_lr())) {
bobv@42664 74 // On arm32, skip the optional 'add LR, PC, #offset'
bobv@42664 75 // (Allowing the jump support code to handle fat_call)
bobv@42664 76 pc = ni->next_raw_instruction_address();
bobv@42664 77 ni = nativeInstruction_at(pc);
bobv@42664 78 }
bobv@42664 79 #endif
bobv@42664 80
bobv@42664 81 if (AARCH64_ONLY(ni->is_call()) NOT_AARCH64(ni->is_bl())) {
bobv@42664 82 // For arm32, fat_call are handled by is_jump for the new 'ni',
bobv@42664 83 // requiring only to support is_bl.
bobv@42664 84 //
bobv@42664 85 // For AARCH64, skipping a leading adr is not sufficient
bobv@42664 86 // to reduce calls to a simple bl.
bobv@42664 87 return rawNativeCall_at(pc)->destination(adj);
bobv@42664 88 }
bobv@42664 89
bobv@42664 90 if (ni->is_jump()) {
bobv@42664 91 return rawNativeJump_at(pc)->jump_destination(adj);
bobv@42664 92 }
bobv@42664 93 ShouldNotReachHere();
bobv@42664 94 return NULL;
bobv@42664 95 }
bobv@42664 96
bobv@42664 97 void Relocation::pd_set_call_destination(address x) {
bobv@42664 98 address pc = addr();
bobv@42664 99 NativeInstruction* ni = nativeInstruction_at(pc);
bobv@42664 100
bobv@42664 101 #if (!defined(AARCH64))
bobv@42664 102 if (NOT_AARCH64(ni->is_add_lr()) AARCH64_ONLY(ni->is_adr_aligned_lr())) {
bobv@42664 103 // On arm32, skip the optional 'add LR, PC, #offset'
bobv@42664 104 // (Allowing the jump support code to handle fat_call)
bobv@42664 105 pc = ni->next_raw_instruction_address();
bobv@42664 106 ni = nativeInstruction_at(pc);
bobv@42664 107 }
bobv@42664 108 #endif
bobv@42664 109
bobv@42664 110 if (AARCH64_ONLY(ni->is_call()) NOT_AARCH64(ni->is_bl())) {
bobv@42664 111 // For arm32, fat_call are handled by is_jump for the new 'ni',
bobv@42664 112 // requiring only to support is_bl.
bobv@42664 113 //
bobv@42664 114 // For AARCH64, skipping a leading adr is not sufficient
bobv@42664 115 // to reduce calls to a simple bl.
bobv@42664 116 rawNativeCall_at(pc)->set_destination(x);
bobv@42664 117 return;
bobv@42664 118 }
bobv@42664 119
bobv@42664 120 if (ni->is_jump()) { // raw jump
bobv@42664 121 rawNativeJump_at(pc)->set_jump_destination(x);
bobv@42664 122 return;
bobv@42664 123 }
bobv@42664 124 ShouldNotReachHere();
bobv@42664 125 }
bobv@42664 126
bobv@42664 127
bobv@42664 128 address* Relocation::pd_address_in_code() {
bobv@42664 129 return (address*)addr();
bobv@42664 130 }
bobv@42664 131
bobv@42664 132 address Relocation::pd_get_address_from_code() {
bobv@42664 133 return *pd_address_in_code();
bobv@42664 134 }
bobv@42664 135
bobv@42664 136 void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
bobv@42664 137 }
bobv@42664 138
bobv@42664 139 void metadata_Relocation::pd_fix_value(address x) {
bobv@42664 140 assert(! addr_in_const(), "Do not use");
bobv@42664 141 #ifdef AARCH64
bobv@42664 142 #ifdef COMPILER2
bobv@42664 143 NativeMovConstReg* ni = nativeMovConstReg_at(addr());
bobv@45429 144 if (ni->is_mov_slow()) {
bobv@42664 145 return;
bobv@42664 146 }
bobv@42664 147 #endif
bobv@42664 148 set_value(x);
bobv@42664 149 #else
bobv@42664 150 if (!VM_Version::supports_movw()) {
bobv@42664 151 set_value(x);
bobv@42664 152 #ifdef ASSERT
bobv@42664 153 } else {
bobv@42664 154 // the movw/movt data should be correct
bobv@42664 155 NativeMovConstReg* ni = nativeMovConstReg_at(addr());
bobv@42664 156 assert(ni->is_movw(), "not a movw");
bobv@42664 157 // The following assert should be correct but the shared code
bobv@42664 158 // currently 'fixes' the metadata instructions before the
bobv@42664 159 // metadata_table is copied in the new method (see
bobv@42664 160 // JDK-8042845). This means that 'x' (which comes from the table)
bobv@42664 161 // does not match the value inlined in the code (which is
bobv@42664 162 // correct). Failure can be temporarily ignored since the code is
bobv@42664 163 // correct and the table is copied shortly afterward.
bobv@42664 164 //
bobv@42664 165 // assert(ni->data() == (int)x, "metadata relocation mismatch");
bobv@42664 166 #endif
bobv@42664 167 }
bobv@42664 168 #endif // !AARCH64
bobv@42664 169 }