annotate hotspot/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp @ 24933:c16c7a4ac386

8031994: java/lang/Character/CheckProp test times out Reviewed-by: iveresov, roland
author rbackman
date Wed, 04 Jun 2014 10:01:28 +0200
parents db68f26d4f1b
children 2de6f3566659
rev   line source
duke@1 1 /*
drchase@18507 2 * Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
duke@1 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@1 4 *
duke@1 5 * This code is free software; you can redistribute it and/or modify it
duke@1 6 * under the terms of the GNU General Public License version 2 only, as
duke@1 7 * published by the Free Software Foundation.
duke@1 8 *
duke@1 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@1 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@1 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@1 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@1 13 * accompanied this code).
duke@1 14 *
duke@1 15 * You should have received a copy of the GNU General Public License version
duke@1 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@1 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@1 18 *
trims@5547 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@5547 20 * or visit www.oracle.com if you need additional information or have any
trims@5547 21 * questions.
duke@1 22 *
duke@1 23 */
duke@1 24
stefank@7397 25 #include "precompiled.hpp"
stefank@7397 26 #include "c1/c1_Compilation.hpp"
stefank@7397 27 #include "c1/c1_FrameMap.hpp"
stefank@7397 28 #include "c1/c1_Instruction.hpp"
stefank@7397 29 #include "c1/c1_LIRAssembler.hpp"
stefank@7397 30 #include "c1/c1_LIRGenerator.hpp"
stefank@7397 31 #include "c1/c1_Runtime1.hpp"
stefank@7397 32 #include "c1/c1_ValueStack.hpp"
stefank@7397 33 #include "ci/ciArray.hpp"
stefank@7397 34 #include "ci/ciObjArrayKlass.hpp"
stefank@7397 35 #include "ci/ciTypeArrayKlass.hpp"
stefank@7397 36 #include "runtime/sharedRuntime.hpp"
stefank@7397 37 #include "runtime/stubRoutines.hpp"
stefank@7397 38 #include "vmreg_sparc.inline.hpp"
duke@1 39
duke@1 40 #ifdef ASSERT
duke@1 41 #define __ gen()->lir(__FILE__, __LINE__)->
duke@1 42 #else
duke@1 43 #define __ gen()->lir()->
duke@1 44 #endif
duke@1 45
duke@1 46 void LIRItem::load_byte_item() {
duke@1 47 // byte loads use same registers as other loads
duke@1 48 load_item();
duke@1 49 }
duke@1 50
duke@1 51
duke@1 52 void LIRItem::load_nonconstant() {
duke@1 53 LIR_Opr r = value()->operand();
duke@1 54 if (_gen->can_inline_as_constant(value())) {
duke@1 55 if (!r->is_constant()) {
duke@1 56 r = LIR_OprFact::value_type(value()->type());
duke@1 57 }
duke@1 58 _result = r;
duke@1 59 } else {
duke@1 60 load_item();
duke@1 61 }
duke@1 62 }
duke@1 63
duke@1 64
duke@1 65 //--------------------------------------------------------------
duke@1 66 // LIRGenerator
duke@1 67 //--------------------------------------------------------------
duke@1 68
duke@1 69 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::Oexception_opr; }
duke@1 70 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::Oissuing_pc_opr; }
duke@1 71 LIR_Opr LIRGenerator::syncTempOpr() { return new_register(T_OBJECT); }
iveresov@23485 72 LIR_Opr LIRGenerator::getThreadTemp() { return rlock_callee_saved(NOT_LP64(T_INT) LP64_ONLY(T_LONG)); }
duke@1 73
duke@1 74 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
duke@1 75 LIR_Opr opr;
duke@1 76 switch (type->tag()) {
duke@1 77 case intTag: opr = callee ? FrameMap::I0_opr : FrameMap::O0_opr; break;
duke@1 78 case objectTag: opr = callee ? FrameMap::I0_oop_opr : FrameMap::O0_oop_opr; break;
duke@1 79 case longTag: opr = callee ? FrameMap::in_long_opr : FrameMap::out_long_opr; break;
duke@1 80 case floatTag: opr = FrameMap::F0_opr; break;
duke@1 81 case doubleTag: opr = FrameMap::F0_double_opr; break;
duke@1 82
duke@1 83 case addressTag:
duke@1 84 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
duke@1 85 }
duke@1 86
duke@1 87 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
duke@1 88 return opr;
duke@1 89 }
duke@1 90
duke@1 91 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
duke@1 92 LIR_Opr reg = new_register(type);
duke@1 93 set_vreg_flag(reg, callee_saved);
duke@1 94 return reg;
duke@1 95 }
duke@1 96
duke@1 97
duke@1 98 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
duke@1 99 return new_register(T_INT);
duke@1 100 }
duke@1 101
duke@1 102
duke@1 103
duke@1 104
duke@1 105
duke@1 106 //--------- loading items into registers --------------------------------
duke@1 107
duke@1 108 // SPARC cannot inline all constants
duke@1 109 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
duke@1 110 if (v->type()->as_IntConstant() != NULL) {
duke@1 111 return v->type()->as_IntConstant()->value() == 0;
duke@1 112 } else if (v->type()->as_LongConstant() != NULL) {
duke@1 113 return v->type()->as_LongConstant()->value() == 0L;
duke@1 114 } else if (v->type()->as_ObjectConstant() != NULL) {
duke@1 115 return v->type()->as_ObjectConstant()->value()->is_null_object();
duke@1 116 } else {
duke@1 117 return false;
duke@1 118 }
duke@1 119 }
duke@1 120
duke@1 121
duke@1 122 // only simm13 constants can be inlined
duke@1 123 bool LIRGenerator:: can_inline_as_constant(Value i) const {
duke@1 124 if (i->type()->as_IntConstant() != NULL) {
duke@1 125 return Assembler::is_simm13(i->type()->as_IntConstant()->value());
duke@1 126 } else {
duke@1 127 return can_store_as_constant(i, as_BasicType(i->type()));
duke@1 128 }
duke@1 129 }
duke@1 130
duke@1 131
duke@1 132 bool LIRGenerator:: can_inline_as_constant(LIR_Const* c) const {
duke@1 133 if (c->type() == T_INT) {
duke@1 134 return Assembler::is_simm13(c->as_jint());
duke@1 135 }
duke@1 136 return false;
duke@1 137 }
duke@1 138
duke@1 139
duke@1 140 LIR_Opr LIRGenerator::safepoint_poll_register() {
duke@1 141 return new_register(T_INT);
duke@1 142 }
duke@1 143
duke@1 144
duke@1 145
duke@1 146 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
duke@1 147 int shift, int disp, BasicType type) {
duke@1 148 assert(base->is_register(), "must be");
duke@1 149
duke@1 150 // accumulate fixed displacements
duke@1 151 if (index->is_constant()) {
duke@1 152 disp += index->as_constant_ptr()->as_jint() << shift;
duke@1 153 index = LIR_OprFact::illegalOpr;
duke@1 154 }
duke@1 155
duke@1 156 if (index->is_register()) {
duke@1 157 // apply the shift and accumulate the displacement
duke@1 158 if (shift > 0) {
roland@4430 159 LIR_Opr tmp = new_pointer_register();
duke@1 160 __ shift_left(index, shift, tmp);
duke@1 161 index = tmp;
duke@1 162 }
duke@1 163 if (disp != 0) {
roland@4430 164 LIR_Opr tmp = new_pointer_register();
duke@1 165 if (Assembler::is_simm13(disp)) {
roland@4430 166 __ add(tmp, LIR_OprFact::intptrConst(disp), tmp);
duke@1 167 index = tmp;
duke@1 168 } else {
roland@4430 169 __ move(LIR_OprFact::intptrConst(disp), tmp);
duke@1 170 __ add(tmp, index, tmp);
duke@1 171 index = tmp;
duke@1 172 }
duke@1 173 disp = 0;
duke@1 174 }
duke@1 175 } else if (disp != 0 && !Assembler::is_simm13(disp)) {
duke@1 176 // index is illegal so replace it with the displacement loaded into a register
roland@4430 177 index = new_pointer_register();
roland@4430 178 __ move(LIR_OprFact::intptrConst(disp), index);
duke@1 179 disp = 0;
duke@1 180 }
duke@1 181
duke@1 182 // at this point we either have base + index or base + displacement
duke@1 183 if (disp == 0) {
duke@1 184 return new LIR_Address(base, index, type);
duke@1 185 } else {
duke@1 186 assert(Assembler::is_simm13(disp), "must be");
duke@1 187 return new LIR_Address(base, disp, type);
duke@1 188 }
duke@1 189 }
duke@1 190
duke@1 191
duke@1 192 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
duke@1 193 BasicType type, bool needs_card_mark) {
kvn@202 194 int elem_size = type2aelembytes(type);
duke@1 195 int shift = exact_log2(elem_size);
duke@1 196
duke@1 197 LIR_Opr base_opr;
duke@1 198 int offset = arrayOopDesc::base_offset_in_bytes(type);
duke@1 199
duke@1 200 if (index_opr->is_constant()) {
duke@1 201 int i = index_opr->as_constant_ptr()->as_jint();
duke@1 202 int array_offset = i * elem_size;
duke@1 203 if (Assembler::is_simm13(array_offset + offset)) {
duke@1 204 base_opr = array_opr;
duke@1 205 offset = array_offset + offset;
duke@1 206 } else {
duke@1 207 base_opr = new_pointer_register();
duke@1 208 if (Assembler::is_simm13(array_offset)) {
duke@1 209 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
duke@1 210 } else {
duke@1 211 __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
duke@1 212 __ add(base_opr, array_opr, base_opr);
duke@1 213 }
duke@1 214 }
duke@1 215 } else {
duke@1 216 #ifdef _LP64
duke@1 217 if (index_opr->type() == T_INT) {
duke@1 218 LIR_Opr tmp = new_register(T_LONG);
duke@1 219 __ convert(Bytecodes::_i2l, index_opr, tmp);
duke@1 220 index_opr = tmp;
duke@1 221 }
duke@1 222 #endif
duke@1 223
duke@1 224 base_opr = new_pointer_register();
duke@1 225 assert (index_opr->is_register(), "Must be register");
duke@1 226 if (shift > 0) {
duke@1 227 __ shift_left(index_opr, shift, base_opr);
duke@1 228 __ add(base_opr, array_opr, base_opr);
duke@1 229 } else {
duke@1 230 __ add(index_opr, array_opr, base_opr);
duke@1 231 }
duke@1 232 }
duke@1 233 if (needs_card_mark) {
duke@1 234 LIR_Opr ptr = new_pointer_register();
duke@1 235 __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
iveresov@5695 236 return new LIR_Address(ptr, type);
duke@1 237 } else {
duke@1 238 return new LIR_Address(base_opr, offset, type);
duke@1 239 }
duke@1 240 }
duke@1 241
iveresov@6453 242 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
iveresov@6453 243 LIR_Opr r;
iveresov@6453 244 if (type == T_LONG) {
iveresov@6453 245 r = LIR_OprFact::longConst(x);
iveresov@6453 246 } else if (type == T_INT) {
iveresov@6453 247 r = LIR_OprFact::intConst(x);
iveresov@6453 248 } else {
iveresov@6453 249 ShouldNotReachHere();
iveresov@6453 250 }
iveresov@6453 251 if (!Assembler::is_simm13(x)) {
iveresov@6453 252 LIR_Opr tmp = new_register(type);
iveresov@6453 253 __ move(r, tmp);
iveresov@6453 254 return tmp;
iveresov@6453 255 }
iveresov@6453 256 return r;
iveresov@6453 257 }
duke@1 258
iveresov@6453 259 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
duke@1 260 LIR_Opr pointer = new_pointer_register();
duke@1 261 __ move(LIR_OprFact::intptrConst(counter), pointer);
iveresov@6453 262 LIR_Address* addr = new LIR_Address(pointer, type);
duke@1 263 increment_counter(addr, step);
duke@1 264 }
duke@1 265
duke@1 266 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
iveresov@6453 267 LIR_Opr temp = new_register(addr->type());
duke@1 268 __ move(addr, temp);
iveresov@6453 269 __ add(temp, load_immediate(step, addr->type()), temp);
duke@1 270 __ move(temp, addr);
duke@1 271 }
duke@1 272
duke@1 273 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
duke@1 274 LIR_Opr o7opr = FrameMap::O7_opr;
duke@1 275 __ load(new LIR_Address(base, disp, T_INT), o7opr, info);
duke@1 276 __ cmp(condition, o7opr, c);
duke@1 277 }
duke@1 278
duke@1 279
duke@1 280 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
duke@1 281 LIR_Opr o7opr = FrameMap::O7_opr;
duke@1 282 __ load(new LIR_Address(base, disp, type), o7opr, info);
duke@1 283 __ cmp(condition, reg, o7opr);
duke@1 284 }
duke@1 285
duke@1 286
duke@1 287 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
duke@1 288 LIR_Opr o7opr = FrameMap::O7_opr;
duke@1 289 __ load(new LIR_Address(base, disp, type), o7opr, info);
duke@1 290 __ cmp(condition, reg, o7opr);
duke@1 291 }
duke@1 292
duke@1 293
duke@1 294 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
duke@1 295 assert(left != result, "should be different registers");
duke@1 296 if (is_power_of_2(c + 1)) {
duke@1 297 __ shift_left(left, log2_intptr(c + 1), result);
duke@1 298 __ sub(result, left, result);
duke@1 299 return true;
duke@1 300 } else if (is_power_of_2(c - 1)) {
duke@1 301 __ shift_left(left, log2_intptr(c - 1), result);
duke@1 302 __ add(result, left, result);
duke@1 303 return true;
duke@1 304 }
duke@1 305 return false;
duke@1 306 }
duke@1 307
duke@1 308
duke@1 309 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
duke@1 310 BasicType t = item->type();
duke@1 311 LIR_Opr sp_opr = FrameMap::SP_opr;
duke@1 312 if ((t == T_LONG || t == T_DOUBLE) &&
duke@1 313 ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
duke@1 314 __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
duke@1 315 } else {
duke@1 316 __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
duke@1 317 }
duke@1 318 }
duke@1 319
duke@1 320 //----------------------------------------------------------------------
duke@1 321 // visitor functions
duke@1 322 //----------------------------------------------------------------------
duke@1 323
duke@1 324
duke@1 325 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
roland@6745 326 assert(x->is_pinned(),"");
roland@16611 327 bool needs_range_check = x->compute_needs_range_check();
duke@1 328 bool use_length = x->length() != NULL;
duke@1 329 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
duke@1 330 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
iveresov@10562 331 !get_jobject_constant(x->value())->is_null_object() ||
iveresov@10562 332 x->should_profile());
duke@1 333
duke@1 334 LIRItem array(x->array(), this);
duke@1 335 LIRItem index(x->index(), this);
duke@1 336 LIRItem value(x->value(), this);
duke@1 337 LIRItem length(this);
duke@1 338
duke@1 339 array.load_item();
duke@1 340 index.load_nonconstant();
duke@1 341
roland@16611 342 if (use_length && needs_range_check) {
roland@16611 343 length.set_instruction(x->length());
roland@16611 344 length.load_item();
duke@1 345 }
duke@1 346 if (needs_store_check) {
duke@1 347 value.load_item();
duke@1 348 } else {
duke@1 349 value.load_for_store(x->elt_type());
duke@1 350 }
duke@1 351
duke@1 352 set_no_result(x);
duke@1 353
duke@1 354 // the CodeEmitInfo must be duplicated for each different
duke@1 355 // LIR-instruction because spilling can occur anywhere between two
duke@1 356 // instructions and so the debug information must be different
duke@1 357 CodeEmitInfo* range_check_info = state_for(x);
duke@1 358 CodeEmitInfo* null_check_info = NULL;
duke@1 359 if (x->needs_null_check()) {
duke@1 360 null_check_info = new CodeEmitInfo(range_check_info);
duke@1 361 }
duke@1 362
duke@1 363 // emit array address setup early so it schedules better
duke@1 364 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
duke@1 365
duke@1 366 if (GenerateRangeChecks && needs_range_check) {
duke@1 367 if (use_length) {
duke@1 368 __ cmp(lir_cond_belowEqual, length.result(), index.result());
duke@1 369 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
duke@1 370 } else {
duke@1 371 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
duke@1 372 // range_check also does the null check
duke@1 373 null_check_info = NULL;
duke@1 374 }
duke@1 375 }
duke@1 376
duke@1 377 if (GenerateArrayStoreCheck && needs_store_check) {
duke@1 378 LIR_Opr tmp1 = FrameMap::G1_opr;
duke@1 379 LIR_Opr tmp2 = FrameMap::G3_opr;
duke@1 380 LIR_Opr tmp3 = FrameMap::G5_opr;
duke@1 381
duke@1 382 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
iveresov@10562 383 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
duke@1 384 }
duke@1 385
ysr@1374 386 if (obj_store) {
ysr@1374 387 // Needs GC write barriers.
johnc@9176 388 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
johnc@9176 389 true /* do_load */, false /* patch */, NULL);
ysr@1374 390 }
duke@1 391 __ move(value.result(), array_addr, null_check_info);
duke@1 392 if (obj_store) {
never@3172 393 // Precise card mark
duke@1 394 post_barrier(LIR_OprFact::address(array_addr), value.result());
duke@1 395 }
duke@1 396 }
duke@1 397
duke@1 398
duke@1 399 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
roland@6745 400 assert(x->is_pinned(),"");
duke@1 401 LIRItem obj(x->obj(), this);
duke@1 402 obj.load_item();
duke@1 403
duke@1 404 set_no_result(x);
duke@1 405
duke@1 406 LIR_Opr lock = FrameMap::G1_opr;
duke@1 407 LIR_Opr scratch = FrameMap::G3_opr;
duke@1 408 LIR_Opr hdr = FrameMap::G4_opr;
duke@1 409
duke@1 410 CodeEmitInfo* info_for_exception = NULL;
duke@1 411 if (x->needs_null_check()) {
roland@6745 412 info_for_exception = state_for(x);
duke@1 413 }
duke@1 414
duke@1 415 // this CodeEmitInfo must not have the xhandlers because here the
duke@1 416 // object is already locked (xhandlers expects object to be unlocked)
duke@1 417 CodeEmitInfo* info = state_for(x, x->state(), true);
duke@1 418 monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
duke@1 419 }
duke@1 420
duke@1 421
duke@1 422 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
roland@6745 423 assert(x->is_pinned(),"");
duke@1 424 LIRItem obj(x->obj(), this);
duke@1 425 obj.dont_load_item();
duke@1 426
duke@1 427 set_no_result(x);
duke@1 428 LIR_Opr lock = FrameMap::G1_opr;
duke@1 429 LIR_Opr hdr = FrameMap::G3_opr;
duke@1 430 LIR_Opr obj_temp = FrameMap::G4_opr;
bobv@6176 431 monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
duke@1 432 }
duke@1 433
duke@1 434
duke@1 435 // _ineg, _lneg, _fneg, _dneg
duke@1 436 void LIRGenerator::do_NegateOp(NegateOp* x) {
duke@1 437 LIRItem value(x->x(), this);
duke@1 438 value.load_item();
duke@1 439 LIR_Opr reg = rlock_result(x);
duke@1 440 __ negate(value.result(), reg);
duke@1 441 }
duke@1 442
duke@1 443
duke@1 444
duke@1 445 // for _fadd, _fmul, _fsub, _fdiv, _frem
duke@1 446 // _dadd, _dmul, _dsub, _ddiv, _drem
duke@1 447 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
duke@1 448 switch (x->op()) {
duke@1 449 case Bytecodes::_fadd:
duke@1 450 case Bytecodes::_fmul:
duke@1 451 case Bytecodes::_fsub:
duke@1 452 case Bytecodes::_fdiv:
duke@1 453 case Bytecodes::_dadd:
duke@1 454 case Bytecodes::_dmul:
duke@1 455 case Bytecodes::_dsub:
duke@1 456 case Bytecodes::_ddiv: {
duke@1 457 LIRItem left(x->x(), this);
duke@1 458 LIRItem right(x->y(), this);
duke@1 459 left.load_item();
duke@1 460 right.load_item();
duke@1 461 rlock_result(x);
duke@1 462 arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
duke@1 463 }
duke@1 464 break;
duke@1 465
duke@1 466 case Bytecodes::_frem:
duke@1 467 case Bytecodes::_drem: {
duke@1 468 address entry;
duke@1 469 switch (x->op()) {
duke@1 470 case Bytecodes::_frem:
duke@1 471 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
duke@1 472 break;
duke@1 473 case Bytecodes::_drem:
duke@1 474 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
duke@1 475 break;
duke@1 476 default:
duke@1 477 ShouldNotReachHere();
duke@1 478 }
duke@1 479 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
duke@1 480 set_result(x, result);
duke@1 481 }
duke@1 482 break;
duke@1 483
duke@1 484 default: ShouldNotReachHere();
duke@1 485 }
duke@1 486 }
duke@1 487
duke@1 488
duke@1 489 // for _ladd, _lmul, _lsub, _ldiv, _lrem
duke@1 490 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
duke@1 491 switch (x->op()) {
duke@1 492 case Bytecodes::_lrem:
duke@1 493 case Bytecodes::_lmul:
duke@1 494 case Bytecodes::_ldiv: {
duke@1 495
duke@1 496 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
duke@1 497 LIRItem right(x->y(), this);
duke@1 498 right.load_item();
duke@1 499
duke@1 500 CodeEmitInfo* info = state_for(x);
duke@1 501 LIR_Opr item = right.result();
duke@1 502 assert(item->is_register(), "must be");
duke@1 503 __ cmp(lir_cond_equal, item, LIR_OprFact::longConst(0));
duke@1 504 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
duke@1 505 }
duke@1 506
duke@1 507 address entry;
duke@1 508 switch (x->op()) {
duke@1 509 case Bytecodes::_lrem:
duke@1 510 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
duke@1 511 break; // check if dividend is 0 is done elsewhere
duke@1 512 case Bytecodes::_ldiv:
duke@1 513 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
duke@1 514 break; // check if dividend is 0 is done elsewhere
duke@1 515 case Bytecodes::_lmul:
duke@1 516 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
duke@1 517 break;
duke@1 518 default:
duke@1 519 ShouldNotReachHere();
duke@1 520 }
duke@1 521
duke@1 522 // order of arguments to runtime call is reversed.
duke@1 523 LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL);
duke@1 524 set_result(x, result);
duke@1 525 break;
duke@1 526 }
duke@1 527 case Bytecodes::_ladd:
duke@1 528 case Bytecodes::_lsub: {
duke@1 529 LIRItem left(x->x(), this);
duke@1 530 LIRItem right(x->y(), this);
duke@1 531 left.load_item();
duke@1 532 right.load_item();
duke@1 533 rlock_result(x);
duke@1 534
duke@1 535 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
duke@1 536 break;
duke@1 537 }
duke@1 538 default: ShouldNotReachHere();
duke@1 539 }
duke@1 540 }
duke@1 541
duke@1 542
duke@1 543 // Returns if item is an int constant that can be represented by a simm13
duke@1 544 static bool is_simm13(LIR_Opr item) {
duke@1 545 if (item->is_constant() && item->type() == T_INT) {
duke@1 546 return Assembler::is_simm13(item->as_constant_ptr()->as_jint());
duke@1 547 } else {
duke@1 548 return false;
duke@1 549 }
duke@1 550 }
duke@1 551
duke@1 552
duke@1 553 // for: _iadd, _imul, _isub, _idiv, _irem
duke@1 554 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
duke@1 555 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
duke@1 556 LIRItem left(x->x(), this);
duke@1 557 LIRItem right(x->y(), this);
duke@1 558 // missing test if instr is commutative and if we should swap
duke@1 559 right.load_nonconstant();
duke@1 560 assert(right.is_constant() || right.is_register(), "wrong state of right");
duke@1 561 left.load_item();
duke@1 562 rlock_result(x);
duke@1 563 if (is_div_rem) {
duke@1 564 CodeEmitInfo* info = state_for(x);
duke@1 565 LIR_Opr tmp = FrameMap::G1_opr;
duke@1 566 if (x->op() == Bytecodes::_irem) {
duke@1 567 __ irem(left.result(), right.result(), x->operand(), tmp, info);
duke@1 568 } else if (x->op() == Bytecodes::_idiv) {
duke@1 569 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
duke@1 570 }
duke@1 571 } else {
duke@1 572 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::G1_opr);
duke@1 573 }
duke@1 574 }
duke@1 575
duke@1 576
duke@1 577 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
duke@1 578 ValueTag tag = x->type()->tag();
duke@1 579 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
duke@1 580 switch (tag) {
duke@1 581 case floatTag:
duke@1 582 case doubleTag: do_ArithmeticOp_FPU(x); return;
duke@1 583 case longTag: do_ArithmeticOp_Long(x); return;
duke@1 584 case intTag: do_ArithmeticOp_Int(x); return;
duke@1 585 }
duke@1 586 ShouldNotReachHere();
duke@1 587 }
duke@1 588
duke@1 589
duke@1 590 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
duke@1 591 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
duke@1 592 LIRItem value(x->x(), this);
duke@1 593 LIRItem count(x->y(), this);
duke@1 594 // Long shift destroys count register
duke@1 595 if (value.type()->is_long()) {
duke@1 596 count.set_destroys_register();
duke@1 597 }
duke@1 598 value.load_item();
duke@1 599 // the old backend doesn't support this
duke@1 600 if (count.is_constant() && count.type()->as_IntConstant() != NULL && value.type()->is_int()) {
duke@1 601 jint c = count.get_jint_constant() & 0x1f;
duke@1 602 assert(c >= 0 && c < 32, "should be small");
duke@1 603 count.dont_load_item();
duke@1 604 } else {
duke@1 605 count.load_item();
duke@1 606 }
duke@1 607 LIR_Opr reg = rlock_result(x);
duke@1 608 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
duke@1 609 }
duke@1 610
duke@1 611
duke@1 612 // _iand, _land, _ior, _lor, _ixor, _lxor
duke@1 613 void LIRGenerator::do_LogicOp(LogicOp* x) {
duke@1 614 LIRItem left(x->x(), this);
duke@1 615 LIRItem right(x->y(), this);
duke@1 616
duke@1 617 left.load_item();
duke@1 618 right.load_nonconstant();
duke@1 619 LIR_Opr reg = rlock_result(x);
duke@1 620
duke@1 621 logic_op(x->op(), reg, left.result(), right.result());
duke@1 622 }
duke@1 623
duke@1 624
duke@1 625
duke@1 626 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
duke@1 627 void LIRGenerator::do_CompareOp(CompareOp* x) {
duke@1 628 LIRItem left(x->x(), this);
duke@1 629 LIRItem right(x->y(), this);
duke@1 630 left.load_item();
duke@1 631 right.load_item();
duke@1 632 LIR_Opr reg = rlock_result(x);
duke@1 633 if (x->x()->type()->is_float_kind()) {
duke@1 634 Bytecodes::Code code = x->op();
duke@1 635 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
duke@1 636 } else if (x->x()->type()->tag() == longTag) {
duke@1 637 __ lcmp2int(left.result(), right.result(), reg);
duke@1 638 } else {
duke@1 639 Unimplemented();
duke@1 640 }
duke@1 641 }
duke@1 642
duke@1 643
duke@1 644 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
duke@1 645 assert(x->number_of_arguments() == 4, "wrong type");
duke@1 646 LIRItem obj (x->argument_at(0), this); // object
duke@1 647 LIRItem offset(x->argument_at(1), this); // offset of field
duke@1 648 LIRItem cmp (x->argument_at(2), this); // value to compare with field
duke@1 649 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
duke@1 650
duke@1 651 // Use temps to avoid kills
duke@1 652 LIR_Opr t1 = FrameMap::G1_opr;
duke@1 653 LIR_Opr t2 = FrameMap::G3_opr;
never@6970 654 LIR_Opr addr = new_pointer_register();
duke@1 655
duke@1 656 // get address of field
duke@1 657 obj.load_item();
duke@1 658 offset.load_item();
duke@1 659 cmp.load_item();
duke@1 660 val.load_item();
duke@1 661
duke@1 662 __ add(obj.result(), offset.result(), addr);
duke@1 663
ysr@1374 664 if (type == objectType) { // Write-barrier needed for Object fields.
johnc@9176 665 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
johnc@9176 666 true /* do_load */, false /* patch */, NULL);
ysr@1374 667 }
ysr@1374 668
duke@1 669 if (type == objectType)
duke@1 670 __ cas_obj(addr, cmp.result(), val.result(), t1, t2);
duke@1 671 else if (type == intType)
duke@1 672 __ cas_int(addr, cmp.result(), val.result(), t1, t2);
duke@1 673 else if (type == longType)
duke@1 674 __ cas_long(addr, cmp.result(), val.result(), t1, t2);
duke@1 675 else {
duke@1 676 ShouldNotReachHere();
duke@1 677 }
duke@1 678 // generate conditional move of boolean result
duke@1 679 LIR_Opr result = rlock_result(x);
iveresov@7713 680 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
iveresov@7713 681 result, as_BasicType(type));
duke@1 682 if (type == objectType) { // Write-barrier needed for Object fields.
never@3172 683 // Precise card mark since could either be object or array
ysr@1374 684 post_barrier(addr, val.result());
duke@1 685 }
duke@1 686 }
duke@1 687
duke@1 688
duke@1 689 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
duke@1 690 switch (x->id()) {
duke@1 691 case vmIntrinsics::_dabs:
duke@1 692 case vmIntrinsics::_dsqrt: {
duke@1 693 assert(x->number_of_arguments() == 1, "wrong type");
duke@1 694 LIRItem value(x->argument_at(0), this);
duke@1 695 value.load_item();
duke@1 696 LIR_Opr dst = rlock_result(x);
duke@1 697
duke@1 698 switch (x->id()) {
duke@1 699 case vmIntrinsics::_dsqrt: {
duke@1 700 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
duke@1 701 break;
duke@1 702 }
duke@1 703 case vmIntrinsics::_dabs: {
duke@1 704 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
duke@1 705 break;
duke@1 706 }
duke@1 707 }
duke@1 708 break;
duke@1 709 }
duke@1 710 case vmIntrinsics::_dlog10: // fall through
duke@1 711 case vmIntrinsics::_dlog: // fall through
duke@1 712 case vmIntrinsics::_dsin: // fall through
duke@1 713 case vmIntrinsics::_dtan: // fall through
roland@12739 714 case vmIntrinsics::_dcos: // fall through
roland@12739 715 case vmIntrinsics::_dexp: {
duke@1 716 assert(x->number_of_arguments() == 1, "wrong type");
duke@1 717
duke@1 718 address runtime_entry = NULL;
duke@1 719 switch (x->id()) {
duke@1 720 case vmIntrinsics::_dsin:
duke@1 721 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
duke@1 722 break;
duke@1 723 case vmIntrinsics::_dcos:
duke@1 724 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
duke@1 725 break;
duke@1 726 case vmIntrinsics::_dtan:
duke@1 727 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
duke@1 728 break;
duke@1 729 case vmIntrinsics::_dlog:
duke@1 730 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
duke@1 731 break;
duke@1 732 case vmIntrinsics::_dlog10:
duke@1 733 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
duke@1 734 break;
roland@12739 735 case vmIntrinsics::_dexp:
roland@12739 736 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
roland@12739 737 break;
duke@1 738 default:
duke@1 739 ShouldNotReachHere();
duke@1 740 }
duke@1 741
duke@1 742 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
duke@1 743 set_result(x, result);
roland@12739 744 break;
roland@12739 745 }
roland@12739 746 case vmIntrinsics::_dpow: {
roland@12739 747 assert(x->number_of_arguments() == 2, "wrong type");
roland@12739 748 address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
roland@12739 749 LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
roland@12739 750 set_result(x, result);
roland@12739 751 break;
duke@1 752 }
duke@1 753 }
duke@1 754 }
duke@1 755
duke@1 756
duke@1 757 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
duke@1 758 assert(x->number_of_arguments() == 5, "wrong type");
never@3683 759
never@3683 760 // Make all state_for calls early since they can emit code
never@3683 761 CodeEmitInfo* info = state_for(x, x->state());
never@3683 762
duke@1 763 // Note: spill caller save before setting the item
duke@1 764 LIRItem src (x->argument_at(0), this);
duke@1 765 LIRItem src_pos (x->argument_at(1), this);
duke@1 766 LIRItem dst (x->argument_at(2), this);
duke@1 767 LIRItem dst_pos (x->argument_at(3), this);
duke@1 768 LIRItem length (x->argument_at(4), this);
duke@1 769 // load all values in callee_save_registers, as this makes the
duke@1 770 // parameter passing to the fast case simpler
duke@1 771 src.load_item_force (rlock_callee_saved(T_OBJECT));
duke@1 772 src_pos.load_item_force (rlock_callee_saved(T_INT));
duke@1 773 dst.load_item_force (rlock_callee_saved(T_OBJECT));
duke@1 774 dst_pos.load_item_force (rlock_callee_saved(T_INT));
duke@1 775 length.load_item_force (rlock_callee_saved(T_INT));
duke@1 776
duke@1 777 int flags;
duke@1 778 ciArrayKlass* expected_type;
duke@1 779 arraycopy_helper(x, &flags, &expected_type);
duke@1 780
duke@1 781 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
duke@1 782 length.result(), rlock_callee_saved(T_INT),
duke@1 783 expected_type, flags, info);
duke@1 784 set_no_result(x);
duke@1 785 }
duke@1 786
drchase@18507 787 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
drchase@18507 788 fatal("CRC32 intrinsic is not implemented on this platform");
drchase@18507 789 }
drchase@18507 790
duke@1 791 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
duke@1 792 // _i2b, _i2c, _i2s
duke@1 793 void LIRGenerator::do_Convert(Convert* x) {
duke@1 794
duke@1 795 switch (x->op()) {
duke@1 796 case Bytecodes::_f2l:
duke@1 797 case Bytecodes::_d2l:
duke@1 798 case Bytecodes::_d2i:
duke@1 799 case Bytecodes::_l2f:
duke@1 800 case Bytecodes::_l2d: {
duke@1 801
duke@1 802 address entry;
duke@1 803 switch (x->op()) {
duke@1 804 case Bytecodes::_l2f:
duke@1 805 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
duke@1 806 break;
duke@1 807 case Bytecodes::_l2d:
duke@1 808 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2d);
duke@1 809 break;
duke@1 810 case Bytecodes::_f2l:
duke@1 811 entry = CAST_FROM_FN_PTR(address, SharedRuntime::f2l);
duke@1 812 break;
duke@1 813 case Bytecodes::_d2l:
duke@1 814 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2l);
duke@1 815 break;
duke@1 816 case Bytecodes::_d2i:
duke@1 817 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2i);
duke@1 818 break;
duke@1 819 default:
duke@1 820 ShouldNotReachHere();
duke@1 821 }
duke@1 822 LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
duke@1 823 set_result(x, result);
duke@1 824 break;
duke@1 825 }
duke@1 826
duke@1 827 case Bytecodes::_i2f:
duke@1 828 case Bytecodes::_i2d: {
duke@1 829 LIRItem value(x->value(), this);
duke@1 830
duke@1 831 LIR_Opr reg = rlock_result(x);
duke@1 832 // To convert an int to double, we need to load the 32-bit int
duke@1 833 // from memory into a single precision floating point register
duke@1 834 // (even numbered). Then the sparc fitod instruction takes care
duke@1 835 // of the conversion. This is a bit ugly, but is the best way to
duke@1 836 // get the int value in a single precision floating point register
duke@1 837 value.load_item();
duke@1 838 LIR_Opr tmp = force_to_spill(value.result(), T_FLOAT);
duke@1 839 __ convert(x->op(), tmp, reg);
duke@1 840 break;
duke@1 841 }
duke@1 842 break;
duke@1 843
duke@1 844 case Bytecodes::_i2l:
duke@1 845 case Bytecodes::_i2b:
duke@1 846 case Bytecodes::_i2c:
duke@1 847 case Bytecodes::_i2s:
duke@1 848 case Bytecodes::_l2i:
duke@1 849 case Bytecodes::_f2d:
duke@1 850 case Bytecodes::_d2f: { // inline code
duke@1 851 LIRItem value(x->value(), this);
duke@1 852
duke@1 853 value.load_item();
duke@1 854 LIR_Opr reg = rlock_result(x);
duke@1 855 __ convert(x->op(), value.result(), reg, false);
duke@1 856 }
duke@1 857 break;
duke@1 858
duke@1 859 case Bytecodes::_f2i: {
duke@1 860 LIRItem value (x->value(), this);
duke@1 861 value.set_destroys_register();
duke@1 862 value.load_item();
duke@1 863 LIR_Opr reg = rlock_result(x);
duke@1 864 set_vreg_flag(reg, must_start_in_memory);
duke@1 865 __ convert(x->op(), value.result(), reg, false);
duke@1 866 }
duke@1 867 break;
duke@1 868
duke@1 869 default: ShouldNotReachHere();
duke@1 870 }
duke@1 871 }
duke@1 872
duke@1 873
duke@1 874 void LIRGenerator::do_NewInstance(NewInstance* x) {
rbackman@24933 875 print_if_not_loaded(x);
rbackman@24933 876
duke@1 877 // This instruction can be deoptimized in the slow path : use
duke@1 878 // O0 as result register.
duke@1 879 const LIR_Opr reg = result_register_for(x->type());
rbackman@24933 880
duke@1 881 CodeEmitInfo* info = state_for(x, x->state());
duke@1 882 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
duke@1 883 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
duke@1 884 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
duke@1 885 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
roland@13742 886 LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
rbackman@24933 887 new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
duke@1 888 LIR_Opr result = rlock_result(x);
duke@1 889 __ move(reg, result);
duke@1 890 }
duke@1 891
duke@1 892
duke@1 893 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
never@3683 894 // Evaluate state_for early since it may emit code
never@3683 895 CodeEmitInfo* info = state_for(x, x->state());
never@3683 896
duke@1 897 LIRItem length(x->length(), this);
duke@1 898 length.load_item();
duke@1 899
duke@1 900 LIR_Opr reg = result_register_for(x->type());
duke@1 901 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
duke@1 902 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
duke@1 903 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
duke@1 904 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
roland@13742 905 LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
duke@1 906 LIR_Opr len = length.result();
duke@1 907 BasicType elem_type = x->elt_type();
duke@1 908
roland@13742 909 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
duke@1 910
duke@1 911 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
duke@1 912 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
duke@1 913
duke@1 914 LIR_Opr result = rlock_result(x);
duke@1 915 __ move(reg, result);
duke@1 916 }
duke@1 917
duke@1 918
duke@1 919 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
never@3683 920 // Evaluate state_for early since it may emit code.
never@3683 921 CodeEmitInfo* info = state_for(x, x->state());
duke@1 922 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
duke@1 923 // and therefore provide the state before the parameters have been consumed
duke@1 924 CodeEmitInfo* patching_info = NULL;
duke@1 925 if (!x->klass()->is_loaded() || PatchALot) {
duke@1 926 patching_info = state_for(x, x->state_before());
duke@1 927 }
duke@1 928
never@3683 929 LIRItem length(x->length(), this);
duke@1 930 length.load_item();
duke@1 931
duke@1 932 const LIR_Opr reg = result_register_for(x->type());
duke@1 933 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
duke@1 934 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
duke@1 935 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
duke@1 936 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
roland@13742 937 LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
duke@1 938 LIR_Opr len = length.result();
duke@1 939
duke@1 940 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
coleenp@13728 941 ciMetadata* obj = ciObjArrayKlass::make(x->klass());
duke@1 942 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
duke@1 943 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
duke@1 944 }
coleenp@13728 945 klass2reg_with_patching(klass_reg, obj, patching_info);
duke@1 946 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
duke@1 947
duke@1 948 LIR_Opr result = rlock_result(x);
duke@1 949 __ move(reg, result);
duke@1 950 }
duke@1 951
duke@1 952
duke@1 953 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
duke@1 954 Values* dims = x->dims();
duke@1 955 int i = dims->length();
duke@1 956 LIRItemList* items = new LIRItemList(dims->length(), NULL);
duke@1 957 while (i-- > 0) {
duke@1 958 LIRItem* size = new LIRItem(dims->at(i), this);
duke@1 959 items->at_put(i, size);
duke@1 960 }
duke@1 961
never@3683 962 // Evaluate state_for early since it may emit code.
duke@1 963 CodeEmitInfo* patching_info = NULL;
duke@1 964 if (!x->klass()->is_loaded() || PatchALot) {
duke@1 965 patching_info = state_for(x, x->state_before());
duke@1 966
twisti@12959 967 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
twisti@12959 968 // clone all handlers (NOTE: Usually this is handled transparently
twisti@12959 969 // by the CodeEmitInfo cloning logic in CodeStub constructors but
twisti@12959 970 // is done explicitly here because a stub isn't being used).
duke@1 971 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
duke@1 972 }
never@3688 973 CodeEmitInfo* info = state_for(x, x->state());
duke@1 974
duke@1 975 i = dims->length();
duke@1 976 while (i-- > 0) {
duke@1 977 LIRItem* size = items->at(i);
duke@1 978 size->load_item();
duke@1 979 store_stack_parameter (size->result(),
duke@1 980 in_ByteSize(STACK_BIAS +
never@1066 981 frame::memory_parameter_word_sp_offset * wordSize +
never@1066 982 i * sizeof(jint)));
duke@1 983 }
duke@1 984
duke@1 985 // This instruction can be deoptimized in the slow path : use
duke@1 986 // O0 as result register.
roland@13742 987 const LIR_Opr klass_reg = FrameMap::O0_metadata_opr;
roland@13742 988 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
duke@1 989 LIR_Opr rank = FrameMap::O1_opr;
duke@1 990 __ move(LIR_OprFact::intConst(x->rank()), rank);
duke@1 991 LIR_Opr varargs = FrameMap::as_pointer_opr(O2);
duke@1 992 int offset_from_sp = (frame::memory_parameter_word_sp_offset * wordSize) + STACK_BIAS;
duke@1 993 __ add(FrameMap::SP_opr,
duke@1 994 LIR_OprFact::intptrConst(offset_from_sp),
duke@1 995 varargs);
duke@1 996 LIR_OprList* args = new LIR_OprList(3);
roland@13742 997 args->append(klass_reg);
duke@1 998 args->append(rank);
duke@1 999 args->append(varargs);
roland@13742 1000 const LIR_Opr reg = result_register_for(x->type());
duke@1 1001 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
duke@1 1002 LIR_OprFact::illegalOpr,
duke@1 1003 reg, args, info);
duke@1 1004
duke@1 1005 LIR_Opr result = rlock_result(x);
duke@1 1006 __ move(reg, result);
duke@1 1007 }
duke@1 1008
duke@1 1009
duke@1 1010 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
duke@1 1011 }
duke@1 1012
duke@1 1013
duke@1 1014 void LIRGenerator::do_CheckCast(CheckCast* x) {
duke@1 1015 LIRItem obj(x->obj(), this);
duke@1 1016 CodeEmitInfo* patching_info = NULL;
duke@1 1017 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
duke@1 1018 // must do this before locking the destination register as an oop register,
duke@1 1019 // and before the obj is loaded (so x->obj()->item() is valid for creating a debug info location)
duke@1 1020 patching_info = state_for(x, x->state_before());
duke@1 1021 }
duke@1 1022 obj.load_item();
duke@1 1023 LIR_Opr out_reg = rlock_result(x);
duke@1 1024 CodeStub* stub;
roland@6745 1025 CodeEmitInfo* info_for_exception = state_for(x);
duke@1 1026
duke@1 1027 if (x->is_incompatible_class_change_check()) {
duke@1 1028 assert(patching_info == NULL, "can't patch this");
duke@1 1029 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
duke@1 1030 } else {
duke@1 1031 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
duke@1 1032 }
duke@1 1033 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
duke@1 1034 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
duke@1 1035 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
duke@1 1036 __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
duke@1 1037 x->direct_compare(), info_for_exception, patching_info, stub,
duke@1 1038 x->profiled_method(), x->profiled_bci());
duke@1 1039 }
duke@1 1040
duke@1 1041
duke@1 1042 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
duke@1 1043 LIRItem obj(x->obj(), this);
duke@1 1044 CodeEmitInfo* patching_info = NULL;
duke@1 1045 if (!x->klass()->is_loaded() || PatchALot) {
duke@1 1046 patching_info = state_for(x, x->state_before());
duke@1 1047 }
duke@1 1048 // ensure the result register is not the input register because the result is initialized before the patching safepoint
duke@1 1049 obj.load_item();
duke@1 1050 LIR_Opr out_reg = rlock_result(x);
duke@1 1051 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
duke@1 1052 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
duke@1 1053 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
iveresov@6461 1054 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
iveresov@6461 1055 x->direct_compare(), patching_info,
iveresov@6461 1056 x->profiled_method(), x->profiled_bci());
duke@1 1057 }
duke@1 1058
duke@1 1059
duke@1 1060 void LIRGenerator::do_If(If* x) {
duke@1 1061 assert(x->number_of_sux() == 2, "inconsistency");
duke@1 1062 ValueTag tag = x->x()->type()->tag();
duke@1 1063 LIRItem xitem(x->x(), this);
duke@1 1064 LIRItem yitem(x->y(), this);
duke@1 1065 LIRItem* xin = &xitem;
duke@1 1066 LIRItem* yin = &yitem;
duke@1 1067 If::Condition cond = x->cond();
duke@1 1068
duke@1 1069 if (tag == longTag) {
duke@1 1070 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
duke@1 1071 // mirror for other conditions
duke@1 1072 if (cond == If::gtr || cond == If::leq) {
duke@1 1073 // swap inputs
duke@1 1074 cond = Instruction::mirror(cond);
duke@1 1075 xin = &yitem;
duke@1 1076 yin = &xitem;
duke@1 1077 }
duke@1 1078 xin->set_destroys_register();
duke@1 1079 }
duke@1 1080
duke@1 1081 LIR_Opr left = LIR_OprFact::illegalOpr;
duke@1 1082 LIR_Opr right = LIR_OprFact::illegalOpr;
duke@1 1083
duke@1 1084 xin->load_item();
duke@1 1085 left = xin->result();
duke@1 1086
duke@1 1087 if (is_simm13(yin->result())) {
duke@1 1088 // inline int constants which are small enough to be immediate operands
duke@1 1089 right = LIR_OprFact::value_type(yin->value()->type());
duke@1 1090 } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
duke@1 1091 (cond == If::eql || cond == If::neq)) {
duke@1 1092 // inline long zero
duke@1 1093 right = LIR_OprFact::value_type(yin->value()->type());
duke@1 1094 } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
duke@1 1095 right = LIR_OprFact::value_type(yin->value()->type());
duke@1 1096 } else {
duke@1 1097 yin->load_item();
duke@1 1098 right = yin->result();
duke@1 1099 }
duke@1 1100 set_no_result(x);
duke@1 1101
duke@1 1102 // add safepoint before generating condition code so it can be recomputed
duke@1 1103 if (x->is_safepoint()) {
duke@1 1104 // increment backedge counter if needed
iveresov@6453 1105 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
duke@1 1106 __ safepoint(new_register(T_INT), state_for(x, x->state_before()));
duke@1 1107 }
duke@1 1108
duke@1 1109 __ cmp(lir_cond(cond), left, right);
iveresov@6453 1110 // Generate branch profiling. Profiling code doesn't kill flags.
duke@1 1111 profile_branch(x, cond);
duke@1 1112 move_to_phi(x->state());
duke@1 1113 if (x->x()->type()->is_float_kind()) {
duke@1 1114 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
duke@1 1115 } else {
duke@1 1116 __ branch(lir_cond(cond), right->type(), x->tsux());
duke@1 1117 }
duke@1 1118 assert(x->default_sux() == x->fsux(), "wrong destination above");
duke@1 1119 __ jump(x->default_sux());
duke@1 1120 }
duke@1 1121
duke@1 1122
duke@1 1123 LIR_Opr LIRGenerator::getThreadPointer() {
duke@1 1124 return FrameMap::as_pointer_opr(G2);
duke@1 1125 }
duke@1 1126
duke@1 1127
duke@1 1128 void LIRGenerator::trace_block_entry(BlockBegin* block) {
duke@1 1129 __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::O0_opr);
duke@1 1130 LIR_OprList* args = new LIR_OprList(1);
duke@1 1131 args->append(FrameMap::O0_opr);
duke@1 1132 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
duke@1 1133 __ call_runtime_leaf(func, rlock_callee_saved(T_INT), LIR_OprFact::illegalOpr, args);
duke@1 1134 }
duke@1 1135
duke@1 1136
duke@1 1137 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
duke@1 1138 CodeEmitInfo* info) {
duke@1 1139 #ifdef _LP64
duke@1 1140 __ store(value, address, info);
duke@1 1141 #else
duke@1 1142 __ volatile_store_mem_reg(value, address, info);
duke@1 1143 #endif
duke@1 1144 }
duke@1 1145
duke@1 1146 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
duke@1 1147 CodeEmitInfo* info) {
duke@1 1148 #ifdef _LP64
duke@1 1149 __ load(address, result, info);
duke@1 1150 #else
duke@1 1151 __ volatile_load_mem_reg(address, result, info);
duke@1 1152 #endif
duke@1 1153 }
duke@1 1154
duke@1 1155
duke@1 1156 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
duke@1 1157 BasicType type, bool is_volatile) {
duke@1 1158 LIR_Opr base_op = src;
duke@1 1159 LIR_Opr index_op = offset;
duke@1 1160
duke@1 1161 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
duke@1 1162 #ifndef _LP64
duke@1 1163 if (is_volatile && type == T_LONG) {
duke@1 1164 __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
duke@1 1165 } else
duke@1 1166 #endif
duke@1 1167 {
duke@1 1168 if (type == T_BOOLEAN) {
duke@1 1169 type = T_BYTE;
duke@1 1170 }
duke@1 1171 LIR_Address* addr;
duke@1 1172 if (type == T_ARRAY || type == T_OBJECT) {
duke@1 1173 LIR_Opr tmp = new_pointer_register();
duke@1 1174 __ add(base_op, index_op, tmp);
iveresov@5695 1175 addr = new LIR_Address(tmp, type);
duke@1 1176 } else {
duke@1 1177 addr = new LIR_Address(base_op, index_op, type);
duke@1 1178 }
duke@1 1179
ysr@1374 1180 if (is_obj) {
johnc@9176 1181 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
johnc@9176 1182 true /* do_load */, false /* patch */, NULL);
ysr@1374 1183 // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
ysr@1374 1184 }
duke@1 1185 __ move(data, addr);
duke@1 1186 if (is_obj) {
duke@1 1187 // This address is precise
duke@1 1188 post_barrier(LIR_OprFact::address(addr), data);
duke@1 1189 }
duke@1 1190 }
duke@1 1191 }
duke@1 1192
duke@1 1193
duke@1 1194 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
duke@1 1195 BasicType type, bool is_volatile) {
duke@1 1196 #ifndef _LP64
duke@1 1197 if (is_volatile && type == T_LONG) {
duke@1 1198 __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none);
duke@1 1199 } else
duke@1 1200 #endif
duke@1 1201 {
duke@1 1202 LIR_Address* addr = new LIR_Address(src, offset, type);
duke@1 1203 __ load(addr, dst);
duke@1 1204 }
duke@1 1205 }
roland@13886 1206
roland@13886 1207 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
roland@13886 1208 BasicType type = x->basic_type();
roland@13886 1209 LIRItem src(x->object(), this);
roland@13886 1210 LIRItem off(x->offset(), this);
roland@13886 1211 LIRItem value(x->value(), this);
roland@13886 1212
roland@13886 1213 src.load_item();
roland@13886 1214 value.load_item();
roland@13886 1215 off.load_nonconstant();
roland@13886 1216
roland@13886 1217 LIR_Opr dst = rlock_result(x, type);
roland@13886 1218 LIR_Opr data = value.result();
roland@13886 1219 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
roland@13886 1220 LIR_Opr offset = off.result();
roland@13886 1221
iveresov@24677 1222 // Because we want a 2-arg form of xchg
iveresov@24677 1223 __ move(data, dst);
roland@13886 1224
roland@13886 1225 assert (!x->is_add() && (type == T_INT || (is_obj LP64_ONLY(&& UseCompressedOops))), "unexpected type");
roland@13886 1226 LIR_Address* addr;
roland@13886 1227 if (offset->is_constant()) {
roland@13886 1228
roland@13886 1229 #ifdef _LP64
roland@13886 1230 jlong l = offset->as_jlong();
roland@13886 1231 assert((jlong)((jint)l) == l, "offset too large for constant");
roland@13886 1232 jint c = (jint)l;
roland@13886 1233 #else
roland@13886 1234 jint c = offset->as_jint();
roland@13886 1235 #endif
roland@13886 1236 addr = new LIR_Address(src.result(), c, type);
roland@13886 1237 } else {
roland@13886 1238 addr = new LIR_Address(src.result(), offset, type);
roland@13886 1239 }
roland@13886 1240
roland@13886 1241 LIR_Opr tmp = LIR_OprFact::illegalOpr;
roland@13886 1242 LIR_Opr ptr = LIR_OprFact::illegalOpr;
roland@13886 1243
roland@13886 1244 if (is_obj) {
roland@13886 1245 // Do the pre-write barrier, if any.
roland@13886 1246 // barriers on sparc don't work with a base + index address
roland@13886 1247 tmp = FrameMap::G3_opr;
roland@13886 1248 ptr = new_pointer_register();
roland@13886 1249 __ add(src.result(), off.result(), ptr);
roland@13886 1250 pre_barrier(ptr, LIR_OprFact::illegalOpr /* pre_val */,
roland@13886 1251 true /* do_load */, false /* patch */, NULL);
roland@13886 1252 }
iveresov@24677 1253 __ xchg(LIR_OprFact::address(addr), dst, dst, tmp);
roland@13886 1254 if (is_obj) {
roland@13886 1255 // Seems to be a precise address
roland@13886 1256 post_barrier(ptr, data);
roland@13886 1257 }
roland@13886 1258 }