annotate hotspot/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp @ 38237:d972e3a2df53

8155162: java.util.zip.CRC32C Interpreter/C1 intrinsics support on SPARC Reviewed-by: kvn Contributed-by: ahmed.khawaja@oracle.com
author kvn
date Wed, 04 May 2016 15:30:21 -0700
parents e0b822facc03
children 1bbcc430c78d
rev   line source
duke@1 1 /*
fzhinkin@38031 2 * Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved.
duke@1 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@1 4 *
duke@1 5 * This code is free software; you can redistribute it and/or modify it
duke@1 6 * under the terms of the GNU General Public License version 2 only, as
duke@1 7 * published by the Free Software Foundation.
duke@1 8 *
duke@1 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@1 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@1 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@1 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@1 13 * accompanied this code).
duke@1 14 *
duke@1 15 * You should have received a copy of the GNU General Public License version
duke@1 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@1 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@1 18 *
trims@5547 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@5547 20 * or visit www.oracle.com if you need additional information or have any
trims@5547 21 * questions.
duke@1 22 *
duke@1 23 */
duke@1 24
stefank@7397 25 #include "precompiled.hpp"
stefank@7397 26 #include "c1/c1_Compilation.hpp"
stefank@7397 27 #include "c1/c1_FrameMap.hpp"
stefank@7397 28 #include "c1/c1_Instruction.hpp"
stefank@7397 29 #include "c1/c1_LIRAssembler.hpp"
stefank@7397 30 #include "c1/c1_LIRGenerator.hpp"
stefank@7397 31 #include "c1/c1_Runtime1.hpp"
stefank@7397 32 #include "c1/c1_ValueStack.hpp"
stefank@7397 33 #include "ci/ciArray.hpp"
stefank@7397 34 #include "ci/ciObjArrayKlass.hpp"
stefank@7397 35 #include "ci/ciTypeArrayKlass.hpp"
stefank@7397 36 #include "runtime/sharedRuntime.hpp"
stefank@7397 37 #include "runtime/stubRoutines.hpp"
stefank@7397 38 #include "vmreg_sparc.inline.hpp"
duke@1 39
duke@1 40 #ifdef ASSERT
duke@1 41 #define __ gen()->lir(__FILE__, __LINE__)->
duke@1 42 #else
duke@1 43 #define __ gen()->lir()->
duke@1 44 #endif
duke@1 45
duke@1 46 void LIRItem::load_byte_item() {
duke@1 47 // byte loads use same registers as other loads
duke@1 48 load_item();
duke@1 49 }
duke@1 50
duke@1 51
duke@1 52 void LIRItem::load_nonconstant() {
duke@1 53 LIR_Opr r = value()->operand();
duke@1 54 if (_gen->can_inline_as_constant(value())) {
duke@1 55 if (!r->is_constant()) {
duke@1 56 r = LIR_OprFact::value_type(value()->type());
duke@1 57 }
duke@1 58 _result = r;
duke@1 59 } else {
duke@1 60 load_item();
duke@1 61 }
duke@1 62 }
duke@1 63
duke@1 64
duke@1 65 //--------------------------------------------------------------
duke@1 66 // LIRGenerator
duke@1 67 //--------------------------------------------------------------
duke@1 68
duke@1 69 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::Oexception_opr; }
duke@1 70 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::Oissuing_pc_opr; }
mdoerr@34201 71 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
duke@1 72 LIR_Opr LIRGenerator::syncTempOpr() { return new_register(T_OBJECT); }
iveresov@23485 73 LIR_Opr LIRGenerator::getThreadTemp() { return rlock_callee_saved(NOT_LP64(T_INT) LP64_ONLY(T_LONG)); }
duke@1 74
duke@1 75 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
duke@1 76 LIR_Opr opr;
duke@1 77 switch (type->tag()) {
duke@1 78 case intTag: opr = callee ? FrameMap::I0_opr : FrameMap::O0_opr; break;
duke@1 79 case objectTag: opr = callee ? FrameMap::I0_oop_opr : FrameMap::O0_oop_opr; break;
duke@1 80 case longTag: opr = callee ? FrameMap::in_long_opr : FrameMap::out_long_opr; break;
duke@1 81 case floatTag: opr = FrameMap::F0_opr; break;
duke@1 82 case doubleTag: opr = FrameMap::F0_double_opr; break;
duke@1 83
duke@1 84 case addressTag:
duke@1 85 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
duke@1 86 }
duke@1 87
duke@1 88 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
duke@1 89 return opr;
duke@1 90 }
duke@1 91
duke@1 92 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
duke@1 93 LIR_Opr reg = new_register(type);
duke@1 94 set_vreg_flag(reg, callee_saved);
duke@1 95 return reg;
duke@1 96 }
duke@1 97
duke@1 98
duke@1 99 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
duke@1 100 return new_register(T_INT);
duke@1 101 }
duke@1 102
duke@1 103
duke@1 104
duke@1 105
duke@1 106
duke@1 107 //--------- loading items into registers --------------------------------
duke@1 108
duke@1 109 // SPARC cannot inline all constants
duke@1 110 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
duke@1 111 if (v->type()->as_IntConstant() != NULL) {
duke@1 112 return v->type()->as_IntConstant()->value() == 0;
duke@1 113 } else if (v->type()->as_LongConstant() != NULL) {
duke@1 114 return v->type()->as_LongConstant()->value() == 0L;
duke@1 115 } else if (v->type()->as_ObjectConstant() != NULL) {
duke@1 116 return v->type()->as_ObjectConstant()->value()->is_null_object();
duke@1 117 } else {
duke@1 118 return false;
duke@1 119 }
duke@1 120 }
duke@1 121
duke@1 122
duke@1 123 // only simm13 constants can be inlined
duke@1 124 bool LIRGenerator:: can_inline_as_constant(Value i) const {
duke@1 125 if (i->type()->as_IntConstant() != NULL) {
duke@1 126 return Assembler::is_simm13(i->type()->as_IntConstant()->value());
duke@1 127 } else {
duke@1 128 return can_store_as_constant(i, as_BasicType(i->type()));
duke@1 129 }
duke@1 130 }
duke@1 131
duke@1 132
duke@1 133 bool LIRGenerator:: can_inline_as_constant(LIR_Const* c) const {
duke@1 134 if (c->type() == T_INT) {
duke@1 135 return Assembler::is_simm13(c->as_jint());
duke@1 136 }
duke@1 137 return false;
duke@1 138 }
duke@1 139
duke@1 140
duke@1 141 LIR_Opr LIRGenerator::safepoint_poll_register() {
duke@1 142 return new_register(T_INT);
duke@1 143 }
duke@1 144
duke@1 145
duke@1 146
duke@1 147 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
duke@1 148 int shift, int disp, BasicType type) {
duke@1 149 assert(base->is_register(), "must be");
duke@1 150
duke@1 151 // accumulate fixed displacements
duke@1 152 if (index->is_constant()) {
duke@1 153 disp += index->as_constant_ptr()->as_jint() << shift;
duke@1 154 index = LIR_OprFact::illegalOpr;
duke@1 155 }
duke@1 156
duke@1 157 if (index->is_register()) {
duke@1 158 // apply the shift and accumulate the displacement
duke@1 159 if (shift > 0) {
roland@4430 160 LIR_Opr tmp = new_pointer_register();
duke@1 161 __ shift_left(index, shift, tmp);
duke@1 162 index = tmp;
duke@1 163 }
duke@1 164 if (disp != 0) {
roland@4430 165 LIR_Opr tmp = new_pointer_register();
duke@1 166 if (Assembler::is_simm13(disp)) {
roland@4430 167 __ add(tmp, LIR_OprFact::intptrConst(disp), tmp);
duke@1 168 index = tmp;
duke@1 169 } else {
roland@4430 170 __ move(LIR_OprFact::intptrConst(disp), tmp);
duke@1 171 __ add(tmp, index, tmp);
duke@1 172 index = tmp;
duke@1 173 }
duke@1 174 disp = 0;
duke@1 175 }
duke@1 176 } else if (disp != 0 && !Assembler::is_simm13(disp)) {
duke@1 177 // index is illegal so replace it with the displacement loaded into a register
roland@4430 178 index = new_pointer_register();
roland@4430 179 __ move(LIR_OprFact::intptrConst(disp), index);
duke@1 180 disp = 0;
duke@1 181 }
duke@1 182
duke@1 183 // at this point we either have base + index or base + displacement
duke@1 184 if (disp == 0) {
duke@1 185 return new LIR_Address(base, index, type);
duke@1 186 } else {
duke@1 187 assert(Assembler::is_simm13(disp), "must be");
duke@1 188 return new LIR_Address(base, disp, type);
duke@1 189 }
duke@1 190 }
duke@1 191
duke@1 192
duke@1 193 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
duke@1 194 BasicType type, bool needs_card_mark) {
kvn@202 195 int elem_size = type2aelembytes(type);
duke@1 196 int shift = exact_log2(elem_size);
duke@1 197
duke@1 198 LIR_Opr base_opr;
duke@1 199 int offset = arrayOopDesc::base_offset_in_bytes(type);
duke@1 200
duke@1 201 if (index_opr->is_constant()) {
duke@1 202 int i = index_opr->as_constant_ptr()->as_jint();
duke@1 203 int array_offset = i * elem_size;
duke@1 204 if (Assembler::is_simm13(array_offset + offset)) {
duke@1 205 base_opr = array_opr;
duke@1 206 offset = array_offset + offset;
duke@1 207 } else {
duke@1 208 base_opr = new_pointer_register();
duke@1 209 if (Assembler::is_simm13(array_offset)) {
duke@1 210 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
duke@1 211 } else {
duke@1 212 __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
duke@1 213 __ add(base_opr, array_opr, base_opr);
duke@1 214 }
duke@1 215 }
duke@1 216 } else {
duke@1 217 #ifdef _LP64
duke@1 218 if (index_opr->type() == T_INT) {
duke@1 219 LIR_Opr tmp = new_register(T_LONG);
duke@1 220 __ convert(Bytecodes::_i2l, index_opr, tmp);
duke@1 221 index_opr = tmp;
duke@1 222 }
duke@1 223 #endif
duke@1 224
duke@1 225 base_opr = new_pointer_register();
duke@1 226 assert (index_opr->is_register(), "Must be register");
duke@1 227 if (shift > 0) {
duke@1 228 __ shift_left(index_opr, shift, base_opr);
duke@1 229 __ add(base_opr, array_opr, base_opr);
duke@1 230 } else {
duke@1 231 __ add(index_opr, array_opr, base_opr);
duke@1 232 }
duke@1 233 }
duke@1 234 if (needs_card_mark) {
duke@1 235 LIR_Opr ptr = new_pointer_register();
duke@1 236 __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
iveresov@5695 237 return new LIR_Address(ptr, type);
duke@1 238 } else {
duke@1 239 return new LIR_Address(base_opr, offset, type);
duke@1 240 }
duke@1 241 }
duke@1 242
iveresov@6453 243 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
iveresov@6453 244 LIR_Opr r;
iveresov@6453 245 if (type == T_LONG) {
iveresov@6453 246 r = LIR_OprFact::longConst(x);
iveresov@6453 247 } else if (type == T_INT) {
iveresov@6453 248 r = LIR_OprFact::intConst(x);
iveresov@6453 249 } else {
iveresov@6453 250 ShouldNotReachHere();
iveresov@6453 251 }
iveresov@6453 252 if (!Assembler::is_simm13(x)) {
iveresov@6453 253 LIR_Opr tmp = new_register(type);
iveresov@6453 254 __ move(r, tmp);
iveresov@6453 255 return tmp;
iveresov@6453 256 }
iveresov@6453 257 return r;
iveresov@6453 258 }
duke@1 259
iveresov@6453 260 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
duke@1 261 LIR_Opr pointer = new_pointer_register();
duke@1 262 __ move(LIR_OprFact::intptrConst(counter), pointer);
iveresov@6453 263 LIR_Address* addr = new LIR_Address(pointer, type);
duke@1 264 increment_counter(addr, step);
duke@1 265 }
duke@1 266
duke@1 267 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
iveresov@6453 268 LIR_Opr temp = new_register(addr->type());
duke@1 269 __ move(addr, temp);
iveresov@6453 270 __ add(temp, load_immediate(step, addr->type()), temp);
duke@1 271 __ move(temp, addr);
duke@1 272 }
duke@1 273
duke@1 274 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
duke@1 275 LIR_Opr o7opr = FrameMap::O7_opr;
duke@1 276 __ load(new LIR_Address(base, disp, T_INT), o7opr, info);
duke@1 277 __ cmp(condition, o7opr, c);
duke@1 278 }
duke@1 279
duke@1 280
duke@1 281 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
duke@1 282 LIR_Opr o7opr = FrameMap::O7_opr;
duke@1 283 __ load(new LIR_Address(base, disp, type), o7opr, info);
duke@1 284 __ cmp(condition, reg, o7opr);
duke@1 285 }
duke@1 286
duke@1 287
duke@1 288 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
duke@1 289 LIR_Opr o7opr = FrameMap::O7_opr;
duke@1 290 __ load(new LIR_Address(base, disp, type), o7opr, info);
duke@1 291 __ cmp(condition, reg, o7opr);
duke@1 292 }
duke@1 293
duke@1 294
duke@1 295 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
duke@1 296 assert(left != result, "should be different registers");
duke@1 297 if (is_power_of_2(c + 1)) {
duke@1 298 __ shift_left(left, log2_intptr(c + 1), result);
duke@1 299 __ sub(result, left, result);
duke@1 300 return true;
duke@1 301 } else if (is_power_of_2(c - 1)) {
duke@1 302 __ shift_left(left, log2_intptr(c - 1), result);
duke@1 303 __ add(result, left, result);
duke@1 304 return true;
duke@1 305 }
duke@1 306 return false;
duke@1 307 }
duke@1 308
duke@1 309
duke@1 310 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
duke@1 311 BasicType t = item->type();
duke@1 312 LIR_Opr sp_opr = FrameMap::SP_opr;
duke@1 313 if ((t == T_LONG || t == T_DOUBLE) &&
duke@1 314 ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
duke@1 315 __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
duke@1 316 } else {
duke@1 317 __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
duke@1 318 }
duke@1 319 }
duke@1 320
duke@1 321 //----------------------------------------------------------------------
duke@1 322 // visitor functions
duke@1 323 //----------------------------------------------------------------------
duke@1 324
duke@1 325
duke@1 326 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
roland@6745 327 assert(x->is_pinned(),"");
roland@16611 328 bool needs_range_check = x->compute_needs_range_check();
duke@1 329 bool use_length = x->length() != NULL;
duke@1 330 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
duke@1 331 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
iveresov@10562 332 !get_jobject_constant(x->value())->is_null_object() ||
iveresov@10562 333 x->should_profile());
duke@1 334
duke@1 335 LIRItem array(x->array(), this);
duke@1 336 LIRItem index(x->index(), this);
duke@1 337 LIRItem value(x->value(), this);
duke@1 338 LIRItem length(this);
duke@1 339
duke@1 340 array.load_item();
duke@1 341 index.load_nonconstant();
duke@1 342
roland@16611 343 if (use_length && needs_range_check) {
roland@16611 344 length.set_instruction(x->length());
roland@16611 345 length.load_item();
duke@1 346 }
duke@1 347 if (needs_store_check) {
duke@1 348 value.load_item();
duke@1 349 } else {
duke@1 350 value.load_for_store(x->elt_type());
duke@1 351 }
duke@1 352
duke@1 353 set_no_result(x);
duke@1 354
duke@1 355 // the CodeEmitInfo must be duplicated for each different
duke@1 356 // LIR-instruction because spilling can occur anywhere between two
duke@1 357 // instructions and so the debug information must be different
duke@1 358 CodeEmitInfo* range_check_info = state_for(x);
duke@1 359 CodeEmitInfo* null_check_info = NULL;
duke@1 360 if (x->needs_null_check()) {
duke@1 361 null_check_info = new CodeEmitInfo(range_check_info);
duke@1 362 }
duke@1 363
duke@1 364 // emit array address setup early so it schedules better
duke@1 365 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
duke@1 366
duke@1 367 if (GenerateRangeChecks && needs_range_check) {
duke@1 368 if (use_length) {
duke@1 369 __ cmp(lir_cond_belowEqual, length.result(), index.result());
duke@1 370 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
duke@1 371 } else {
duke@1 372 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
duke@1 373 // range_check also does the null check
duke@1 374 null_check_info = NULL;
duke@1 375 }
duke@1 376 }
duke@1 377
duke@1 378 if (GenerateArrayStoreCheck && needs_store_check) {
duke@1 379 LIR_Opr tmp1 = FrameMap::G1_opr;
duke@1 380 LIR_Opr tmp2 = FrameMap::G3_opr;
duke@1 381 LIR_Opr tmp3 = FrameMap::G5_opr;
duke@1 382
duke@1 383 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
iveresov@10562 384 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
duke@1 385 }
duke@1 386
ysr@1374 387 if (obj_store) {
ysr@1374 388 // Needs GC write barriers.
johnc@9176 389 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
johnc@9176 390 true /* do_load */, false /* patch */, NULL);
ysr@1374 391 }
duke@1 392 __ move(value.result(), array_addr, null_check_info);
duke@1 393 if (obj_store) {
never@3172 394 // Precise card mark
duke@1 395 post_barrier(LIR_OprFact::address(array_addr), value.result());
duke@1 396 }
duke@1 397 }
duke@1 398
duke@1 399
duke@1 400 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
roland@6745 401 assert(x->is_pinned(),"");
duke@1 402 LIRItem obj(x->obj(), this);
duke@1 403 obj.load_item();
duke@1 404
duke@1 405 set_no_result(x);
duke@1 406
duke@1 407 LIR_Opr lock = FrameMap::G1_opr;
duke@1 408 LIR_Opr scratch = FrameMap::G3_opr;
duke@1 409 LIR_Opr hdr = FrameMap::G4_opr;
duke@1 410
duke@1 411 CodeEmitInfo* info_for_exception = NULL;
duke@1 412 if (x->needs_null_check()) {
roland@6745 413 info_for_exception = state_for(x);
duke@1 414 }
duke@1 415
duke@1 416 // this CodeEmitInfo must not have the xhandlers because here the
duke@1 417 // object is already locked (xhandlers expects object to be unlocked)
duke@1 418 CodeEmitInfo* info = state_for(x, x->state(), true);
duke@1 419 monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
duke@1 420 }
duke@1 421
duke@1 422
duke@1 423 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
roland@6745 424 assert(x->is_pinned(),"");
duke@1 425 LIRItem obj(x->obj(), this);
duke@1 426 obj.dont_load_item();
duke@1 427
duke@1 428 set_no_result(x);
duke@1 429 LIR_Opr lock = FrameMap::G1_opr;
duke@1 430 LIR_Opr hdr = FrameMap::G3_opr;
duke@1 431 LIR_Opr obj_temp = FrameMap::G4_opr;
bobv@6176 432 monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
duke@1 433 }
duke@1 434
duke@1 435
duke@1 436 // _ineg, _lneg, _fneg, _dneg
duke@1 437 void LIRGenerator::do_NegateOp(NegateOp* x) {
duke@1 438 LIRItem value(x->x(), this);
duke@1 439 value.load_item();
duke@1 440 LIR_Opr reg = rlock_result(x);
duke@1 441 __ negate(value.result(), reg);
duke@1 442 }
duke@1 443
duke@1 444
duke@1 445
duke@1 446 // for _fadd, _fmul, _fsub, _fdiv, _frem
duke@1 447 // _dadd, _dmul, _dsub, _ddiv, _drem
duke@1 448 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
duke@1 449 switch (x->op()) {
duke@1 450 case Bytecodes::_fadd:
duke@1 451 case Bytecodes::_fmul:
duke@1 452 case Bytecodes::_fsub:
duke@1 453 case Bytecodes::_fdiv:
duke@1 454 case Bytecodes::_dadd:
duke@1 455 case Bytecodes::_dmul:
duke@1 456 case Bytecodes::_dsub:
duke@1 457 case Bytecodes::_ddiv: {
duke@1 458 LIRItem left(x->x(), this);
duke@1 459 LIRItem right(x->y(), this);
duke@1 460 left.load_item();
duke@1 461 right.load_item();
duke@1 462 rlock_result(x);
duke@1 463 arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
duke@1 464 }
duke@1 465 break;
duke@1 466
duke@1 467 case Bytecodes::_frem:
duke@1 468 case Bytecodes::_drem: {
duke@1 469 address entry;
duke@1 470 switch (x->op()) {
duke@1 471 case Bytecodes::_frem:
duke@1 472 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
duke@1 473 break;
duke@1 474 case Bytecodes::_drem:
duke@1 475 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
duke@1 476 break;
duke@1 477 default:
duke@1 478 ShouldNotReachHere();
duke@1 479 }
duke@1 480 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
duke@1 481 set_result(x, result);
duke@1 482 }
duke@1 483 break;
duke@1 484
duke@1 485 default: ShouldNotReachHere();
duke@1 486 }
duke@1 487 }
duke@1 488
duke@1 489
duke@1 490 // for _ladd, _lmul, _lsub, _ldiv, _lrem
duke@1 491 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
duke@1 492 switch (x->op()) {
duke@1 493 case Bytecodes::_lrem:
duke@1 494 case Bytecodes::_lmul:
duke@1 495 case Bytecodes::_ldiv: {
duke@1 496
duke@1 497 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
duke@1 498 LIRItem right(x->y(), this);
duke@1 499 right.load_item();
duke@1 500
duke@1 501 CodeEmitInfo* info = state_for(x);
duke@1 502 LIR_Opr item = right.result();
duke@1 503 assert(item->is_register(), "must be");
duke@1 504 __ cmp(lir_cond_equal, item, LIR_OprFact::longConst(0));
duke@1 505 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
duke@1 506 }
duke@1 507
duke@1 508 address entry;
duke@1 509 switch (x->op()) {
duke@1 510 case Bytecodes::_lrem:
duke@1 511 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
duke@1 512 break; // check if dividend is 0 is done elsewhere
duke@1 513 case Bytecodes::_ldiv:
duke@1 514 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
duke@1 515 break; // check if dividend is 0 is done elsewhere
duke@1 516 case Bytecodes::_lmul:
duke@1 517 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
duke@1 518 break;
duke@1 519 default:
duke@1 520 ShouldNotReachHere();
duke@1 521 }
duke@1 522
duke@1 523 // order of arguments to runtime call is reversed.
duke@1 524 LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL);
duke@1 525 set_result(x, result);
duke@1 526 break;
duke@1 527 }
duke@1 528 case Bytecodes::_ladd:
duke@1 529 case Bytecodes::_lsub: {
duke@1 530 LIRItem left(x->x(), this);
duke@1 531 LIRItem right(x->y(), this);
duke@1 532 left.load_item();
duke@1 533 right.load_item();
duke@1 534 rlock_result(x);
duke@1 535
duke@1 536 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
duke@1 537 break;
duke@1 538 }
duke@1 539 default: ShouldNotReachHere();
duke@1 540 }
duke@1 541 }
duke@1 542
duke@1 543
duke@1 544 // Returns if item is an int constant that can be represented by a simm13
duke@1 545 static bool is_simm13(LIR_Opr item) {
duke@1 546 if (item->is_constant() && item->type() == T_INT) {
duke@1 547 return Assembler::is_simm13(item->as_constant_ptr()->as_jint());
duke@1 548 } else {
duke@1 549 return false;
duke@1 550 }
duke@1 551 }
duke@1 552
duke@1 553
duke@1 554 // for: _iadd, _imul, _isub, _idiv, _irem
duke@1 555 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
duke@1 556 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
duke@1 557 LIRItem left(x->x(), this);
duke@1 558 LIRItem right(x->y(), this);
duke@1 559 // missing test if instr is commutative and if we should swap
duke@1 560 right.load_nonconstant();
duke@1 561 assert(right.is_constant() || right.is_register(), "wrong state of right");
duke@1 562 left.load_item();
duke@1 563 rlock_result(x);
duke@1 564 if (is_div_rem) {
duke@1 565 CodeEmitInfo* info = state_for(x);
duke@1 566 LIR_Opr tmp = FrameMap::G1_opr;
duke@1 567 if (x->op() == Bytecodes::_irem) {
duke@1 568 __ irem(left.result(), right.result(), x->operand(), tmp, info);
duke@1 569 } else if (x->op() == Bytecodes::_idiv) {
duke@1 570 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
duke@1 571 }
duke@1 572 } else {
duke@1 573 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::G1_opr);
duke@1 574 }
duke@1 575 }
duke@1 576
duke@1 577
duke@1 578 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
duke@1 579 ValueTag tag = x->type()->tag();
duke@1 580 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
duke@1 581 switch (tag) {
duke@1 582 case floatTag:
duke@1 583 case doubleTag: do_ArithmeticOp_FPU(x); return;
duke@1 584 case longTag: do_ArithmeticOp_Long(x); return;
duke@1 585 case intTag: do_ArithmeticOp_Int(x); return;
duke@1 586 }
duke@1 587 ShouldNotReachHere();
duke@1 588 }
duke@1 589
duke@1 590
duke@1 591 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
duke@1 592 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
duke@1 593 LIRItem value(x->x(), this);
duke@1 594 LIRItem count(x->y(), this);
duke@1 595 // Long shift destroys count register
duke@1 596 if (value.type()->is_long()) {
duke@1 597 count.set_destroys_register();
duke@1 598 }
duke@1 599 value.load_item();
duke@1 600 // the old backend doesn't support this
duke@1 601 if (count.is_constant() && count.type()->as_IntConstant() != NULL && value.type()->is_int()) {
duke@1 602 jint c = count.get_jint_constant() & 0x1f;
duke@1 603 assert(c >= 0 && c < 32, "should be small");
duke@1 604 count.dont_load_item();
duke@1 605 } else {
duke@1 606 count.load_item();
duke@1 607 }
duke@1 608 LIR_Opr reg = rlock_result(x);
duke@1 609 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
duke@1 610 }
duke@1 611
duke@1 612
duke@1 613 // _iand, _land, _ior, _lor, _ixor, _lxor
duke@1 614 void LIRGenerator::do_LogicOp(LogicOp* x) {
duke@1 615 LIRItem left(x->x(), this);
duke@1 616 LIRItem right(x->y(), this);
duke@1 617
duke@1 618 left.load_item();
duke@1 619 right.load_nonconstant();
duke@1 620 LIR_Opr reg = rlock_result(x);
duke@1 621
duke@1 622 logic_op(x->op(), reg, left.result(), right.result());
duke@1 623 }
duke@1 624
duke@1 625
duke@1 626
duke@1 627 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
duke@1 628 void LIRGenerator::do_CompareOp(CompareOp* x) {
duke@1 629 LIRItem left(x->x(), this);
duke@1 630 LIRItem right(x->y(), this);
duke@1 631 left.load_item();
duke@1 632 right.load_item();
duke@1 633 LIR_Opr reg = rlock_result(x);
duke@1 634 if (x->x()->type()->is_float_kind()) {
duke@1 635 Bytecodes::Code code = x->op();
duke@1 636 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
duke@1 637 } else if (x->x()->type()->tag() == longTag) {
duke@1 638 __ lcmp2int(left.result(), right.result(), reg);
duke@1 639 } else {
duke@1 640 Unimplemented();
duke@1 641 }
duke@1 642 }
duke@1 643
duke@1 644
duke@1 645 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
duke@1 646 assert(x->number_of_arguments() == 4, "wrong type");
duke@1 647 LIRItem obj (x->argument_at(0), this); // object
duke@1 648 LIRItem offset(x->argument_at(1), this); // offset of field
duke@1 649 LIRItem cmp (x->argument_at(2), this); // value to compare with field
duke@1 650 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
duke@1 651
duke@1 652 // Use temps to avoid kills
duke@1 653 LIR_Opr t1 = FrameMap::G1_opr;
duke@1 654 LIR_Opr t2 = FrameMap::G3_opr;
never@6970 655 LIR_Opr addr = new_pointer_register();
duke@1 656
duke@1 657 // get address of field
duke@1 658 obj.load_item();
duke@1 659 offset.load_item();
duke@1 660 cmp.load_item();
duke@1 661 val.load_item();
duke@1 662
duke@1 663 __ add(obj.result(), offset.result(), addr);
duke@1 664
ysr@1374 665 if (type == objectType) { // Write-barrier needed for Object fields.
johnc@9176 666 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
johnc@9176 667 true /* do_load */, false /* patch */, NULL);
ysr@1374 668 }
ysr@1374 669
duke@1 670 if (type == objectType)
duke@1 671 __ cas_obj(addr, cmp.result(), val.result(), t1, t2);
duke@1 672 else if (type == intType)
duke@1 673 __ cas_int(addr, cmp.result(), val.result(), t1, t2);
duke@1 674 else if (type == longType)
duke@1 675 __ cas_long(addr, cmp.result(), val.result(), t1, t2);
duke@1 676 else {
duke@1 677 ShouldNotReachHere();
duke@1 678 }
duke@1 679 // generate conditional move of boolean result
duke@1 680 LIR_Opr result = rlock_result(x);
iveresov@7713 681 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
iveresov@7713 682 result, as_BasicType(type));
duke@1 683 if (type == objectType) { // Write-barrier needed for Object fields.
never@3172 684 // Precise card mark since could either be object or array
ysr@1374 685 post_barrier(addr, val.result());
duke@1 686 }
duke@1 687 }
duke@1 688
duke@1 689
duke@1 690 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
duke@1 691 switch (x->id()) {
duke@1 692 case vmIntrinsics::_dabs:
duke@1 693 case vmIntrinsics::_dsqrt: {
duke@1 694 assert(x->number_of_arguments() == 1, "wrong type");
duke@1 695 LIRItem value(x->argument_at(0), this);
duke@1 696 value.load_item();
duke@1 697 LIR_Opr dst = rlock_result(x);
duke@1 698
duke@1 699 switch (x->id()) {
duke@1 700 case vmIntrinsics::_dsqrt: {
duke@1 701 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
duke@1 702 break;
duke@1 703 }
duke@1 704 case vmIntrinsics::_dabs: {
duke@1 705 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
duke@1 706 break;
duke@1 707 }
duke@1 708 }
duke@1 709 break;
duke@1 710 }
duke@1 711 case vmIntrinsics::_dlog10: // fall through
duke@1 712 case vmIntrinsics::_dlog: // fall through
duke@1 713 case vmIntrinsics::_dsin: // fall through
duke@1 714 case vmIntrinsics::_dtan: // fall through
roland@12739 715 case vmIntrinsics::_dcos: // fall through
roland@12739 716 case vmIntrinsics::_dexp: {
duke@1 717 assert(x->number_of_arguments() == 1, "wrong type");
duke@1 718
duke@1 719 address runtime_entry = NULL;
duke@1 720 switch (x->id()) {
duke@1 721 case vmIntrinsics::_dsin:
duke@1 722 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
duke@1 723 break;
duke@1 724 case vmIntrinsics::_dcos:
duke@1 725 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
duke@1 726 break;
duke@1 727 case vmIntrinsics::_dtan:
duke@1 728 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
duke@1 729 break;
duke@1 730 case vmIntrinsics::_dlog:
duke@1 731 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
duke@1 732 break;
duke@1 733 case vmIntrinsics::_dlog10:
duke@1 734 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
duke@1 735 break;
roland@12739 736 case vmIntrinsics::_dexp:
roland@12739 737 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
roland@12739 738 break;
duke@1 739 default:
duke@1 740 ShouldNotReachHere();
duke@1 741 }
duke@1 742
duke@1 743 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
duke@1 744 set_result(x, result);
roland@12739 745 break;
roland@12739 746 }
roland@12739 747 case vmIntrinsics::_dpow: {
roland@12739 748 assert(x->number_of_arguments() == 2, "wrong type");
roland@12739 749 address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
roland@12739 750 LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
roland@12739 751 set_result(x, result);
roland@12739 752 break;
duke@1 753 }
duke@1 754 }
duke@1 755 }
duke@1 756
duke@1 757
duke@1 758 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
duke@1 759 assert(x->number_of_arguments() == 5, "wrong type");
never@3683 760
never@3683 761 // Make all state_for calls early since they can emit code
never@3683 762 CodeEmitInfo* info = state_for(x, x->state());
never@3683 763
duke@1 764 // Note: spill caller save before setting the item
duke@1 765 LIRItem src (x->argument_at(0), this);
duke@1 766 LIRItem src_pos (x->argument_at(1), this);
duke@1 767 LIRItem dst (x->argument_at(2), this);
duke@1 768 LIRItem dst_pos (x->argument_at(3), this);
duke@1 769 LIRItem length (x->argument_at(4), this);
duke@1 770 // load all values in callee_save_registers, as this makes the
duke@1 771 // parameter passing to the fast case simpler
duke@1 772 src.load_item_force (rlock_callee_saved(T_OBJECT));
duke@1 773 src_pos.load_item_force (rlock_callee_saved(T_INT));
duke@1 774 dst.load_item_force (rlock_callee_saved(T_OBJECT));
duke@1 775 dst_pos.load_item_force (rlock_callee_saved(T_INT));
duke@1 776 length.load_item_force (rlock_callee_saved(T_INT));
duke@1 777
duke@1 778 int flags;
duke@1 779 ciArrayKlass* expected_type;
duke@1 780 arraycopy_helper(x, &flags, &expected_type);
duke@1 781
duke@1 782 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
duke@1 783 length.result(), rlock_callee_saved(T_INT),
duke@1 784 expected_type, flags, info);
duke@1 785 set_no_result(x);
duke@1 786 }
duke@1 787
drchase@18507 788 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
kvn@34205 789 // Make all state_for calls early since they can emit code
kvn@34205 790 LIR_Opr result = rlock_result(x);
kvn@34205 791 int flags = 0;
kvn@34205 792 switch (x->id()) {
kvn@34205 793 case vmIntrinsics::_updateCRC32: {
kvn@34205 794 LIRItem crc(x->argument_at(0), this);
kvn@34205 795 LIRItem val(x->argument_at(1), this);
kvn@34205 796 // val is destroyed by update_crc32
kvn@34205 797 val.set_destroys_register();
kvn@34205 798 crc.load_item();
kvn@34205 799 val.load_item();
kvn@34205 800 __ update_crc32(crc.result(), val.result(), result);
kvn@34205 801 break;
kvn@34205 802 }
kvn@34205 803 case vmIntrinsics::_updateBytesCRC32:
kvn@34205 804 case vmIntrinsics::_updateByteBufferCRC32: {
kvn@34205 805
kvn@34205 806 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
kvn@34205 807
kvn@34205 808 LIRItem crc(x->argument_at(0), this);
kvn@34205 809 LIRItem buf(x->argument_at(1), this);
kvn@34205 810 LIRItem off(x->argument_at(2), this);
kvn@34205 811 LIRItem len(x->argument_at(3), this);
kvn@34205 812
kvn@34205 813 buf.load_item();
kvn@34205 814 off.load_nonconstant();
kvn@34205 815
kvn@34205 816 LIR_Opr index = off.result();
kvn@34205 817 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
kvn@34205 818 if(off.result()->is_constant()) {
kvn@34205 819 index = LIR_OprFact::illegalOpr;
kvn@34205 820 offset += off.result()->as_jint();
kvn@34205 821 }
kvn@34205 822
kvn@34205 823 LIR_Opr base_op = buf.result();
kvn@34205 824
kvn@34205 825 if (index->is_valid()) {
kvn@34205 826 LIR_Opr tmp = new_register(T_LONG);
kvn@34205 827 __ convert(Bytecodes::_i2l, index, tmp);
kvn@34205 828 index = tmp;
kvn@34205 829 if (index->is_constant()) {
kvn@34205 830 offset += index->as_constant_ptr()->as_jint();
kvn@34205 831 index = LIR_OprFact::illegalOpr;
kvn@34205 832 } else if (index->is_register()) {
kvn@34205 833 LIR_Opr tmp2 = new_register(T_LONG);
kvn@34205 834 LIR_Opr tmp3 = new_register(T_LONG);
kvn@34205 835 __ move(base_op, tmp2);
kvn@34205 836 __ move(index, tmp3);
kvn@34205 837 __ add(tmp2, tmp3, tmp2);
kvn@34205 838 base_op = tmp2;
kvn@34205 839 } else {
kvn@34205 840 ShouldNotReachHere();
kvn@34205 841 }
kvn@34205 842 }
kvn@34205 843
kvn@34205 844 LIR_Address* a = new LIR_Address(base_op, offset, T_BYTE);
kvn@34205 845
kvn@34205 846 BasicTypeList signature(3);
kvn@34205 847 signature.append(T_INT);
kvn@34205 848 signature.append(T_ADDRESS);
kvn@34205 849 signature.append(T_INT);
kvn@34205 850 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
kvn@34205 851 const LIR_Opr result_reg = result_register_for(x->type());
kvn@34205 852
kvn@34205 853 LIR_Opr addr = new_pointer_register();
kvn@34205 854 __ leal(LIR_OprFact::address(a), addr);
kvn@34205 855
kvn@34205 856 crc.load_item_force(cc->at(0));
kvn@34205 857 __ move(addr, cc->at(1));
kvn@34205 858 len.load_item_force(cc->at(2));
kvn@34205 859
kvn@34205 860 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
kvn@34205 861 __ move(result_reg, result);
kvn@34205 862
kvn@34205 863 break;
kvn@34205 864 }
kvn@34205 865 default: {
kvn@34205 866 ShouldNotReachHere();
kvn@34205 867 }
kvn@34205 868 }
drchase@18507 869 }
drchase@18507 870
kvn@38237 871 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
kvn@38237 872 // Make all state_for calls early since they can emit code
kvn@38237 873 LIR_Opr result = rlock_result(x);
kvn@38237 874 int flags = 0;
kvn@38237 875 switch (x->id()) {
kvn@38237 876 case vmIntrinsics::_updateBytesCRC32C:
kvn@38237 877 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
kvn@38237 878
kvn@38237 879 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
kvn@38237 880 int array_offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
kvn@38237 881
kvn@38237 882 LIRItem crc(x->argument_at(0), this);
kvn@38237 883 LIRItem buf(x->argument_at(1), this);
kvn@38237 884 LIRItem off(x->argument_at(2), this);
kvn@38237 885 LIRItem end(x->argument_at(3), this);
kvn@38237 886
kvn@38237 887 buf.load_item();
kvn@38237 888 off.load_nonconstant();
kvn@38237 889 end.load_nonconstant();
kvn@38237 890
kvn@38237 891 // len = end - off
kvn@38237 892 LIR_Opr len = end.result();
kvn@38237 893 LIR_Opr tmpA = new_register(T_INT);
kvn@38237 894 LIR_Opr tmpB = new_register(T_INT);
kvn@38237 895 __ move(end.result(), tmpA);
kvn@38237 896 __ move(off.result(), tmpB);
kvn@38237 897 __ sub(tmpA, tmpB, tmpA);
kvn@38237 898 len = tmpA;
kvn@38237 899
kvn@38237 900 LIR_Opr index = off.result();
kvn@38237 901
kvn@38237 902 if(off.result()->is_constant()) {
kvn@38237 903 index = LIR_OprFact::illegalOpr;
kvn@38237 904 array_offset += off.result()->as_jint();
kvn@38237 905 }
kvn@38237 906
kvn@38237 907 LIR_Opr base_op = buf.result();
kvn@38237 908
kvn@38237 909 if (index->is_valid()) {
kvn@38237 910 LIR_Opr tmp = new_register(T_LONG);
kvn@38237 911 __ convert(Bytecodes::_i2l, index, tmp);
kvn@38237 912 index = tmp;
kvn@38237 913 if (index->is_constant()) {
kvn@38237 914 array_offset += index->as_constant_ptr()->as_jint();
kvn@38237 915 index = LIR_OprFact::illegalOpr;
kvn@38237 916 } else if (index->is_register()) {
kvn@38237 917 LIR_Opr tmp2 = new_register(T_LONG);
kvn@38237 918 LIR_Opr tmp3 = new_register(T_LONG);
kvn@38237 919 __ move(base_op, tmp2);
kvn@38237 920 __ move(index, tmp3);
kvn@38237 921 __ add(tmp2, tmp3, tmp2);
kvn@38237 922 base_op = tmp2;
kvn@38237 923 } else {
kvn@38237 924 ShouldNotReachHere();
kvn@38237 925 }
kvn@38237 926 }
kvn@38237 927
kvn@38237 928 LIR_Address* a = new LIR_Address(base_op, array_offset, T_BYTE);
kvn@38237 929
kvn@38237 930 BasicTypeList signature(3);
kvn@38237 931 signature.append(T_INT);
kvn@38237 932 signature.append(T_ADDRESS);
kvn@38237 933 signature.append(T_INT);
kvn@38237 934 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
kvn@38237 935 const LIR_Opr result_reg = result_register_for(x->type());
kvn@38237 936
kvn@38237 937 LIR_Opr addr = new_pointer_register();
kvn@38237 938 __ leal(LIR_OprFact::address(a), addr);
kvn@38237 939
kvn@38237 940 crc.load_item_force(cc->at(0));
kvn@38237 941 __ move(addr, cc->at(1));
kvn@38237 942 __ move(len, cc->at(2));
kvn@38237 943
kvn@38237 944 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), getThreadTemp(), result_reg, cc->args());
kvn@38237 945 __ move(result_reg, result);
kvn@38237 946
kvn@38237 947 break;
kvn@38237 948 }
kvn@38237 949 default: {
kvn@38237 950 ShouldNotReachHere();
kvn@38237 951 }
kvn@38237 952 }
kvn@38237 953 }
kvn@38237 954
duke@1 955 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
duke@1 956 // _i2b, _i2c, _i2s
duke@1 957 void LIRGenerator::do_Convert(Convert* x) {
duke@1 958
duke@1 959 switch (x->op()) {
duke@1 960 case Bytecodes::_f2l:
duke@1 961 case Bytecodes::_d2l:
duke@1 962 case Bytecodes::_d2i:
duke@1 963 case Bytecodes::_l2f:
duke@1 964 case Bytecodes::_l2d: {
duke@1 965
duke@1 966 address entry;
duke@1 967 switch (x->op()) {
duke@1 968 case Bytecodes::_l2f:
duke@1 969 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
duke@1 970 break;
duke@1 971 case Bytecodes::_l2d:
duke@1 972 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2d);
duke@1 973 break;
duke@1 974 case Bytecodes::_f2l:
duke@1 975 entry = CAST_FROM_FN_PTR(address, SharedRuntime::f2l);
duke@1 976 break;
duke@1 977 case Bytecodes::_d2l:
duke@1 978 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2l);
duke@1 979 break;
duke@1 980 case Bytecodes::_d2i:
duke@1 981 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2i);
duke@1 982 break;
duke@1 983 default:
duke@1 984 ShouldNotReachHere();
duke@1 985 }
duke@1 986 LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
duke@1 987 set_result(x, result);
duke@1 988 break;
duke@1 989 }
duke@1 990
duke@1 991 case Bytecodes::_i2f:
duke@1 992 case Bytecodes::_i2d: {
duke@1 993 LIRItem value(x->value(), this);
duke@1 994
duke@1 995 LIR_Opr reg = rlock_result(x);
duke@1 996 // To convert an int to double, we need to load the 32-bit int
duke@1 997 // from memory into a single precision floating point register
duke@1 998 // (even numbered). Then the sparc fitod instruction takes care
duke@1 999 // of the conversion. This is a bit ugly, but is the best way to
duke@1 1000 // get the int value in a single precision floating point register
duke@1 1001 value.load_item();
duke@1 1002 LIR_Opr tmp = force_to_spill(value.result(), T_FLOAT);
duke@1 1003 __ convert(x->op(), tmp, reg);
duke@1 1004 break;
duke@1 1005 }
duke@1 1006 break;
duke@1 1007
duke@1 1008 case Bytecodes::_i2l:
duke@1 1009 case Bytecodes::_i2b:
duke@1 1010 case Bytecodes::_i2c:
duke@1 1011 case Bytecodes::_i2s:
duke@1 1012 case Bytecodes::_l2i:
duke@1 1013 case Bytecodes::_f2d:
duke@1 1014 case Bytecodes::_d2f: { // inline code
duke@1 1015 LIRItem value(x->value(), this);
duke@1 1016
duke@1 1017 value.load_item();
duke@1 1018 LIR_Opr reg = rlock_result(x);
duke@1 1019 __ convert(x->op(), value.result(), reg, false);
duke@1 1020 }
duke@1 1021 break;
duke@1 1022
duke@1 1023 case Bytecodes::_f2i: {
duke@1 1024 LIRItem value (x->value(), this);
duke@1 1025 value.set_destroys_register();
duke@1 1026 value.load_item();
duke@1 1027 LIR_Opr reg = rlock_result(x);
duke@1 1028 set_vreg_flag(reg, must_start_in_memory);
duke@1 1029 __ convert(x->op(), value.result(), reg, false);
duke@1 1030 }
duke@1 1031 break;
duke@1 1032
duke@1 1033 default: ShouldNotReachHere();
duke@1 1034 }
duke@1 1035 }
duke@1 1036
duke@1 1037
duke@1 1038 void LIRGenerator::do_NewInstance(NewInstance* x) {
rbackman@24933 1039 print_if_not_loaded(x);
rbackman@24933 1040
duke@1 1041 // This instruction can be deoptimized in the slow path : use
duke@1 1042 // O0 as result register.
duke@1 1043 const LIR_Opr reg = result_register_for(x->type());
rbackman@24933 1044
duke@1 1045 CodeEmitInfo* info = state_for(x, x->state());
duke@1 1046 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
duke@1 1047 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
duke@1 1048 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
duke@1 1049 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
roland@13742 1050 LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
rbackman@24933 1051 new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
duke@1 1052 LIR_Opr result = rlock_result(x);
duke@1 1053 __ move(reg, result);
duke@1 1054 }
duke@1 1055
duke@1 1056
duke@1 1057 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
never@3683 1058 // Evaluate state_for early since it may emit code
never@3683 1059 CodeEmitInfo* info = state_for(x, x->state());
never@3683 1060
duke@1 1061 LIRItem length(x->length(), this);
duke@1 1062 length.load_item();
duke@1 1063
duke@1 1064 LIR_Opr reg = result_register_for(x->type());
duke@1 1065 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
duke@1 1066 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
duke@1 1067 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
duke@1 1068 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
roland@13742 1069 LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
duke@1 1070 LIR_Opr len = length.result();
duke@1 1071 BasicType elem_type = x->elt_type();
duke@1 1072
roland@13742 1073 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
duke@1 1074
duke@1 1075 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
duke@1 1076 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
duke@1 1077
duke@1 1078 LIR_Opr result = rlock_result(x);
duke@1 1079 __ move(reg, result);
duke@1 1080 }
duke@1 1081
duke@1 1082
duke@1 1083 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
never@3683 1084 // Evaluate state_for early since it may emit code.
never@3683 1085 CodeEmitInfo* info = state_for(x, x->state());
duke@1 1086 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
duke@1 1087 // and therefore provide the state before the parameters have been consumed
duke@1 1088 CodeEmitInfo* patching_info = NULL;
duke@1 1089 if (!x->klass()->is_loaded() || PatchALot) {
duke@1 1090 patching_info = state_for(x, x->state_before());
duke@1 1091 }
duke@1 1092
never@3683 1093 LIRItem length(x->length(), this);
duke@1 1094 length.load_item();
duke@1 1095
duke@1 1096 const LIR_Opr reg = result_register_for(x->type());
duke@1 1097 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
duke@1 1098 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
duke@1 1099 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
duke@1 1100 LIR_Opr tmp4 = FrameMap::O1_oop_opr;
roland@13742 1101 LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
duke@1 1102 LIR_Opr len = length.result();
duke@1 1103
duke@1 1104 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
coleenp@13728 1105 ciMetadata* obj = ciObjArrayKlass::make(x->klass());
duke@1 1106 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
duke@1 1107 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
duke@1 1108 }
coleenp@13728 1109 klass2reg_with_patching(klass_reg, obj, patching_info);
duke@1 1110 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
duke@1 1111
duke@1 1112 LIR_Opr result = rlock_result(x);
duke@1 1113 __ move(reg, result);
duke@1 1114 }
duke@1 1115
duke@1 1116
duke@1 1117 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
duke@1 1118 Values* dims = x->dims();
duke@1 1119 int i = dims->length();
fzhinkin@38031 1120 LIRItemList* items = new LIRItemList(i, i, NULL);
duke@1 1121 while (i-- > 0) {
duke@1 1122 LIRItem* size = new LIRItem(dims->at(i), this);
duke@1 1123 items->at_put(i, size);
duke@1 1124 }
duke@1 1125
never@3683 1126 // Evaluate state_for early since it may emit code.
duke@1 1127 CodeEmitInfo* patching_info = NULL;
duke@1 1128 if (!x->klass()->is_loaded() || PatchALot) {
duke@1 1129 patching_info = state_for(x, x->state_before());
duke@1 1130
twisti@12959 1131 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
twisti@12959 1132 // clone all handlers (NOTE: Usually this is handled transparently
twisti@12959 1133 // by the CodeEmitInfo cloning logic in CodeStub constructors but
twisti@12959 1134 // is done explicitly here because a stub isn't being used).
duke@1 1135 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
duke@1 1136 }
never@3688 1137 CodeEmitInfo* info = state_for(x, x->state());
duke@1 1138
duke@1 1139 i = dims->length();
duke@1 1140 while (i-- > 0) {
duke@1 1141 LIRItem* size = items->at(i);
duke@1 1142 size->load_item();
duke@1 1143 store_stack_parameter (size->result(),
duke@1 1144 in_ByteSize(STACK_BIAS +
never@1066 1145 frame::memory_parameter_word_sp_offset * wordSize +
never@1066 1146 i * sizeof(jint)));
duke@1 1147 }
duke@1 1148
duke@1 1149 // This instruction can be deoptimized in the slow path : use
duke@1 1150 // O0 as result register.
roland@13742 1151 const LIR_Opr klass_reg = FrameMap::O0_metadata_opr;
roland@13742 1152 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
duke@1 1153 LIR_Opr rank = FrameMap::O1_opr;
duke@1 1154 __ move(LIR_OprFact::intConst(x->rank()), rank);
duke@1 1155 LIR_Opr varargs = FrameMap::as_pointer_opr(O2);
duke@1 1156 int offset_from_sp = (frame::memory_parameter_word_sp_offset * wordSize) + STACK_BIAS;
duke@1 1157 __ add(FrameMap::SP_opr,
duke@1 1158 LIR_OprFact::intptrConst(offset_from_sp),
duke@1 1159 varargs);
duke@1 1160 LIR_OprList* args = new LIR_OprList(3);
roland@13742 1161 args->append(klass_reg);
duke@1 1162 args->append(rank);
duke@1 1163 args->append(varargs);
roland@13742 1164 const LIR_Opr reg = result_register_for(x->type());
duke@1 1165 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
duke@1 1166 LIR_OprFact::illegalOpr,
duke@1 1167 reg, args, info);
duke@1 1168
duke@1 1169 LIR_Opr result = rlock_result(x);
duke@1 1170 __ move(reg, result);
duke@1 1171 }
duke@1 1172
duke@1 1173
duke@1 1174 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
duke@1 1175 }
duke@1 1176
duke@1 1177
duke@1 1178 void LIRGenerator::do_CheckCast(CheckCast* x) {
duke@1 1179 LIRItem obj(x->obj(), this);
duke@1 1180 CodeEmitInfo* patching_info = NULL;
duke@1 1181 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
duke@1 1182 // must do this before locking the destination register as an oop register,
duke@1 1183 // and before the obj is loaded (so x->obj()->item() is valid for creating a debug info location)
duke@1 1184 patching_info = state_for(x, x->state_before());
duke@1 1185 }
duke@1 1186 obj.load_item();
duke@1 1187 LIR_Opr out_reg = rlock_result(x);
duke@1 1188 CodeStub* stub;
roland@6745 1189 CodeEmitInfo* info_for_exception = state_for(x);
duke@1 1190
duke@1 1191 if (x->is_incompatible_class_change_check()) {
duke@1 1192 assert(patching_info == NULL, "can't patch this");
duke@1 1193 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
duke@1 1194 } else {
duke@1 1195 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
duke@1 1196 }
duke@1 1197 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
duke@1 1198 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
duke@1 1199 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
duke@1 1200 __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
duke@1 1201 x->direct_compare(), info_for_exception, patching_info, stub,
duke@1 1202 x->profiled_method(), x->profiled_bci());
duke@1 1203 }
duke@1 1204
duke@1 1205
duke@1 1206 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
duke@1 1207 LIRItem obj(x->obj(), this);
duke@1 1208 CodeEmitInfo* patching_info = NULL;
duke@1 1209 if (!x->klass()->is_loaded() || PatchALot) {
duke@1 1210 patching_info = state_for(x, x->state_before());
duke@1 1211 }
duke@1 1212 // ensure the result register is not the input register because the result is initialized before the patching safepoint
duke@1 1213 obj.load_item();
duke@1 1214 LIR_Opr out_reg = rlock_result(x);
duke@1 1215 LIR_Opr tmp1 = FrameMap::G1_oop_opr;
duke@1 1216 LIR_Opr tmp2 = FrameMap::G3_oop_opr;
duke@1 1217 LIR_Opr tmp3 = FrameMap::G4_oop_opr;
iveresov@6461 1218 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
iveresov@6461 1219 x->direct_compare(), patching_info,
iveresov@6461 1220 x->profiled_method(), x->profiled_bci());
duke@1 1221 }
duke@1 1222
duke@1 1223
duke@1 1224 void LIRGenerator::do_If(If* x) {
duke@1 1225 assert(x->number_of_sux() == 2, "inconsistency");
duke@1 1226 ValueTag tag = x->x()->type()->tag();
duke@1 1227 LIRItem xitem(x->x(), this);
duke@1 1228 LIRItem yitem(x->y(), this);
duke@1 1229 LIRItem* xin = &xitem;
duke@1 1230 LIRItem* yin = &yitem;
duke@1 1231 If::Condition cond = x->cond();
duke@1 1232
duke@1 1233 if (tag == longTag) {
duke@1 1234 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
duke@1 1235 // mirror for other conditions
duke@1 1236 if (cond == If::gtr || cond == If::leq) {
duke@1 1237 // swap inputs
duke@1 1238 cond = Instruction::mirror(cond);
duke@1 1239 xin = &yitem;
duke@1 1240 yin = &xitem;
duke@1 1241 }
duke@1 1242 xin->set_destroys_register();
duke@1 1243 }
duke@1 1244
duke@1 1245 LIR_Opr left = LIR_OprFact::illegalOpr;
duke@1 1246 LIR_Opr right = LIR_OprFact::illegalOpr;
duke@1 1247
duke@1 1248 xin->load_item();
duke@1 1249 left = xin->result();
duke@1 1250
duke@1 1251 if (is_simm13(yin->result())) {
duke@1 1252 // inline int constants which are small enough to be immediate operands
duke@1 1253 right = LIR_OprFact::value_type(yin->value()->type());
duke@1 1254 } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
duke@1 1255 (cond == If::eql || cond == If::neq)) {
duke@1 1256 // inline long zero
duke@1 1257 right = LIR_OprFact::value_type(yin->value()->type());
duke@1 1258 } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
duke@1 1259 right = LIR_OprFact::value_type(yin->value()->type());
duke@1 1260 } else {
duke@1 1261 yin->load_item();
duke@1 1262 right = yin->result();
duke@1 1263 }
duke@1 1264 set_no_result(x);
duke@1 1265
duke@1 1266 // add safepoint before generating condition code so it can be recomputed
duke@1 1267 if (x->is_safepoint()) {
duke@1 1268 // increment backedge counter if needed
iveresov@6453 1269 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
duke@1 1270 __ safepoint(new_register(T_INT), state_for(x, x->state_before()));
duke@1 1271 }
duke@1 1272
duke@1 1273 __ cmp(lir_cond(cond), left, right);
iveresov@6453 1274 // Generate branch profiling. Profiling code doesn't kill flags.
duke@1 1275 profile_branch(x, cond);
duke@1 1276 move_to_phi(x->state());
duke@1 1277 if (x->x()->type()->is_float_kind()) {
duke@1 1278 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
duke@1 1279 } else {
duke@1 1280 __ branch(lir_cond(cond), right->type(), x->tsux());
duke@1 1281 }
duke@1 1282 assert(x->default_sux() == x->fsux(), "wrong destination above");
duke@1 1283 __ jump(x->default_sux());
duke@1 1284 }
duke@1 1285
duke@1 1286
duke@1 1287 LIR_Opr LIRGenerator::getThreadPointer() {
duke@1 1288 return FrameMap::as_pointer_opr(G2);
duke@1 1289 }
duke@1 1290
duke@1 1291
duke@1 1292 void LIRGenerator::trace_block_entry(BlockBegin* block) {
duke@1 1293 __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::O0_opr);
duke@1 1294 LIR_OprList* args = new LIR_OprList(1);
duke@1 1295 args->append(FrameMap::O0_opr);
duke@1 1296 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
duke@1 1297 __ call_runtime_leaf(func, rlock_callee_saved(T_INT), LIR_OprFact::illegalOpr, args);
duke@1 1298 }
duke@1 1299
duke@1 1300
duke@1 1301 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
duke@1 1302 CodeEmitInfo* info) {
duke@1 1303 #ifdef _LP64
duke@1 1304 __ store(value, address, info);
duke@1 1305 #else
duke@1 1306 __ volatile_store_mem_reg(value, address, info);
duke@1 1307 #endif
duke@1 1308 }
duke@1 1309
duke@1 1310 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
duke@1 1311 CodeEmitInfo* info) {
duke@1 1312 #ifdef _LP64
duke@1 1313 __ load(address, result, info);
duke@1 1314 #else
duke@1 1315 __ volatile_load_mem_reg(address, result, info);
duke@1 1316 #endif
duke@1 1317 }
duke@1 1318
duke@1 1319
duke@1 1320 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
duke@1 1321 BasicType type, bool is_volatile) {
duke@1 1322 LIR_Opr base_op = src;
duke@1 1323 LIR_Opr index_op = offset;
duke@1 1324
duke@1 1325 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
duke@1 1326 #ifndef _LP64
duke@1 1327 if (is_volatile && type == T_LONG) {
duke@1 1328 __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
duke@1 1329 } else
duke@1 1330 #endif
duke@1 1331 {
duke@1 1332 if (type == T_BOOLEAN) {
duke@1 1333 type = T_BYTE;
duke@1 1334 }
duke@1 1335 LIR_Address* addr;
duke@1 1336 if (type == T_ARRAY || type == T_OBJECT) {
duke@1 1337 LIR_Opr tmp = new_pointer_register();
duke@1 1338 __ add(base_op, index_op, tmp);
iveresov@5695 1339 addr = new LIR_Address(tmp, type);
duke@1 1340 } else {
duke@1 1341 addr = new LIR_Address(base_op, index_op, type);
duke@1 1342 }
duke@1 1343
ysr@1374 1344 if (is_obj) {
johnc@9176 1345 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
johnc@9176 1346 true /* do_load */, false /* patch */, NULL);
ysr@1374 1347 // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
ysr@1374 1348 }
duke@1 1349 __ move(data, addr);
duke@1 1350 if (is_obj) {
duke@1 1351 // This address is precise
duke@1 1352 post_barrier(LIR_OprFact::address(addr), data);
duke@1 1353 }
duke@1 1354 }
duke@1 1355 }
duke@1 1356
duke@1 1357
duke@1 1358 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
duke@1 1359 BasicType type, bool is_volatile) {
duke@1 1360 #ifndef _LP64
duke@1 1361 if (is_volatile && type == T_LONG) {
duke@1 1362 __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none);
duke@1 1363 } else
duke@1 1364 #endif
duke@1 1365 {
duke@1 1366 LIR_Address* addr = new LIR_Address(src, offset, type);
duke@1 1367 __ load(addr, dst);
duke@1 1368 }
duke@1 1369 }
roland@13886 1370
roland@13886 1371 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
roland@13886 1372 BasicType type = x->basic_type();
roland@13886 1373 LIRItem src(x->object(), this);
roland@13886 1374 LIRItem off(x->offset(), this);
roland@13886 1375 LIRItem value(x->value(), this);
roland@13886 1376
roland@13886 1377 src.load_item();
roland@13886 1378 value.load_item();
roland@13886 1379 off.load_nonconstant();
roland@13886 1380
roland@13886 1381 LIR_Opr dst = rlock_result(x, type);
roland@13886 1382 LIR_Opr data = value.result();
roland@13886 1383 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
roland@13886 1384 LIR_Opr offset = off.result();
roland@13886 1385
iveresov@24677 1386 // Because we want a 2-arg form of xchg
iveresov@24677 1387 __ move(data, dst);
roland@13886 1388
roland@13886 1389 assert (!x->is_add() && (type == T_INT || (is_obj LP64_ONLY(&& UseCompressedOops))), "unexpected type");
roland@13886 1390 LIR_Address* addr;
roland@13886 1391 if (offset->is_constant()) {
roland@13886 1392
roland@13886 1393 #ifdef _LP64
roland@13886 1394 jlong l = offset->as_jlong();
roland@13886 1395 assert((jlong)((jint)l) == l, "offset too large for constant");
roland@13886 1396 jint c = (jint)l;
roland@13886 1397 #else
roland@13886 1398 jint c = offset->as_jint();
roland@13886 1399 #endif
roland@13886 1400 addr = new LIR_Address(src.result(), c, type);
roland@13886 1401 } else {
roland@13886 1402 addr = new LIR_Address(src.result(), offset, type);
roland@13886 1403 }
roland@13886 1404
roland@13886 1405 LIR_Opr tmp = LIR_OprFact::illegalOpr;
roland@13886 1406 LIR_Opr ptr = LIR_OprFact::illegalOpr;
roland@13886 1407
roland@13886 1408 if (is_obj) {
roland@13886 1409 // Do the pre-write barrier, if any.
roland@13886 1410 // barriers on sparc don't work with a base + index address
roland@13886 1411 tmp = FrameMap::G3_opr;
roland@13886 1412 ptr = new_pointer_register();
roland@13886 1413 __ add(src.result(), off.result(), ptr);
roland@13886 1414 pre_barrier(ptr, LIR_OprFact::illegalOpr /* pre_val */,
roland@13886 1415 true /* do_load */, false /* patch */, NULL);
roland@13886 1416 }
iveresov@24677 1417 __ xchg(LIR_OprFact::address(addr), dst, dst, tmp);
roland@13886 1418 if (is_obj) {
roland@13886 1419 // Seems to be a precise address
roland@13886 1420 post_barrier(ptr, data);
roland@13886 1421 }
roland@13886 1422 }