annotate src/hotspot/cpu/aarch64/ad_encode.m4 @ 54526:ee29b516a36a

revert changes
author jlaskey
date Wed, 23 Jan 2019 16:09:20 -0400
parents e234025cafb6
children ec872b4817f8
rev   line source
aph@29184 1 dnl Copyright (c) 2014, Red Hat Inc. All rights reserved.
aph@29184 2 dnl DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aph@29184 3 dnl
aph@29184 4 dnl This code is free software; you can redistribute it and/or modify it
aph@29184 5 dnl under the terms of the GNU General Public License version 2 only, as
aph@29184 6 dnl published by the Free Software Foundation.
aph@29184 7 dnl
aph@29184 8 dnl This code is distributed in the hope that it will be useful, but WITHOUT
aph@29184 9 dnl ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aph@29184 10 dnl FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aph@29184 11 dnl version 2 for more details (a copy is included in the LICENSE file that
aph@29184 12 dnl accompanied this code).
aph@29184 13 dnl
aph@29184 14 dnl You should have received a copy of the GNU General Public License version
aph@29184 15 dnl 2 along with this work; if not, write to the Free Software Foundation,
aph@29184 16 dnl Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aph@29184 17 dnl
aph@29184 18 dnl Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aph@29184 19 dnl or visit www.oracle.com if you need additional information or have any
aph@29184 20 dnl questions.
aph@29184 21 dnl
aph@29184 22 dnl
aph@29184 23 dnl Process this file with m4 ad_encode.m4 to generate the load/store
aph@29184 24 dnl patterns used in aarch64.ad.
aph@29184 25 dnl
aph@29184 26 define(choose, `loadStore($1, &MacroAssembler::$3, $2, $4,
aph@29184 27 $5, $6, $7, $8);dnl
aph@29184 28
aph@29184 29 %}')dnl
aph@29184 30 define(access, `
aph@29184 31 $3Register $1_reg = as_$3Register($$1$$reg);
aph@29184 32 $4choose(MacroAssembler(&cbuf), $1_reg,$2,$mem->opcode(),
aph@29184 33 as_Register($mem$$base),$mem$$index,$mem$$scale,$mem$$disp)')dnl
aph@29184 34 define(load,`
aph@29184 35 enc_class aarch64_enc_$2($1 dst, memory mem) %{dnl
aph@29184 36 access(dst,$2,$3)')dnl
aph@29184 37 load(iRegI,ldrsbw)
aph@29184 38 load(iRegI,ldrsb)
aph@29184 39 load(iRegI,ldrb)
aph@29184 40 load(iRegL,ldrb)
aph@29184 41 load(iRegI,ldrshw)
aph@29184 42 load(iRegI,ldrsh)
aph@29184 43 load(iRegI,ldrh)
aph@29184 44 load(iRegL,ldrh)
aph@29184 45 load(iRegI,ldrw)
aph@29184 46 load(iRegL,ldrw)
aph@29184 47 load(iRegL,ldrsw)
aph@29184 48 load(iRegL,ldr)
aph@29184 49 load(vRegF,ldrs,Float)
aph@29184 50 load(vRegD,ldrd,Float)
aph@29184 51 define(STORE,`
aph@29184 52 enc_class aarch64_enc_$2($1 src, memory mem) %{dnl
aph@29184 53 access(src,$2,$3,$4)')dnl
aph@29184 54 define(STORE0,`
aph@29184 55 enc_class aarch64_enc_$2`'0(memory mem) %{
aph@29184 56 MacroAssembler _masm(&cbuf);
aph@29184 57 choose(_masm,zr,$2,$mem->opcode(),
aph@29184 58 as_$3Register($mem$$base),$mem$$index,$mem$$scale,$mem$$disp)')dnl
aph@29184 59 STORE(iRegI,strb)
aph@29184 60 STORE0(iRegI,strb)
aph@29184 61 STORE(iRegI,strh)
aph@29184 62 STORE0(iRegI,strh)
aph@29184 63 STORE(iRegI,strw)
aph@29184 64 STORE0(iRegI,strw)
aph@29184 65 STORE(iRegL,str,,
aph@29184 66 `// we sometimes get asked to store the stack pointer into the
aph@29184 67 // current thread -- we cannot do that directly on AArch64
aph@29184 68 if (src_reg == r31_sp) {
aph@29184 69 MacroAssembler _masm(&cbuf);
aph@29184 70 assert(as_Register($mem$$base) == rthread, "unexpected store for sp");
aph@29184 71 __ mov(rscratch2, sp);
aph@29184 72 src_reg = rscratch2;
aph@29184 73 }
aph@29184 74 ')
aph@29184 75 STORE0(iRegL,str)
aph@29184 76 STORE(vRegF,strs,Float)
aph@29184 77 STORE(vRegD,strd,Float)
aph@29184 78
aph@29184 79 enc_class aarch64_enc_strw_immn(immN src, memory mem) %{
aph@29184 80 MacroAssembler _masm(&cbuf);
aph@29184 81 address con = (address)$src$$constant;
aph@29184 82 // need to do this the hard way until we can manage relocs
aph@29184 83 // for 32 bit constants
aph@29184 84 __ movoop(rscratch2, (jobject)con);
aph@29184 85 if (con) __ encode_heap_oop_not_null(rscratch2);
aph@29184 86 choose(_masm,rscratch2,strw,$mem->opcode(),
aph@29184 87 as_Register($mem$$base),$mem$$index,$mem$$scale,$mem$$disp)
aph@29184 88
aph@29184 89 enc_class aarch64_enc_strw_immnk(immN src, memory mem) %{
aph@29184 90 MacroAssembler _masm(&cbuf);
aph@29184 91 address con = (address)$src$$constant;
aph@29184 92 // need to do this the hard way until we can manage relocs
aph@29184 93 // for 32 bit constants
aph@29184 94 __ movoop(rscratch2, (jobject)con);
aph@29184 95 __ encode_klass_not_null(rscratch2);
aph@29184 96 choose(_masm,rscratch2,strw,$mem->opcode(),
aph@29184 97 as_Register($mem$$base),$mem$$index,$mem$$scale,$mem$$disp)
aph@29184 98