annotate src/hotspot/cpu/aarch64/c1_FrameMap_aarch64.hpp @ 54526:ee29b516a36a

revert changes
author jlaskey
date Wed, 23 Jan 2019 16:09:20 -0400
parents 71c04702a3d5
children
rev   line source
aph@29184 1 /*
coleenp@54304 2 * Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
aph@29184 3 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
aph@29184 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aph@29184 5 *
aph@29184 6 * This code is free software; you can redistribute it and/or modify it
aph@29184 7 * under the terms of the GNU General Public License version 2 only, as
aph@29184 8 * published by the Free Software Foundation.
aph@29184 9 *
aph@29184 10 * This code is distributed in the hope that it will be useful, but WITHOUT
aph@29184 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aph@29184 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aph@29184 13 * version 2 for more details (a copy is included in the LICENSE file that
aph@29184 14 * accompanied this code).
aph@29184 15 *
aph@29184 16 * You should have received a copy of the GNU General Public License version
aph@29184 17 * 2 along with this work; if not, write to the Free Software Foundation,
aph@29184 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aph@29184 19 *
aph@29184 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aph@29184 21 * or visit www.oracle.com if you need additional information or have any
aph@29184 22 * questions.
aph@29184 23 *
aph@29184 24 */
aph@29184 25
coleenp@54304 26 #ifndef CPU_AARCH64_C1_FRAMEMAP_AARCH64_HPP
coleenp@54304 27 #define CPU_AARCH64_C1_FRAMEMAP_AARCH64_HPP
aph@29184 28
aph@29184 29 // On AArch64 the frame looks as follows:
aph@29184 30 //
aph@29184 31 // +-----------------------------+---------+----------------------------------------+----------------+-----------
aph@29184 32 // | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling .
aph@29184 33 // +-----------------------------+---------+----------------------------------------+----------------+-----------
aph@29184 34
aph@29184 35 public:
aph@29184 36 static const int pd_c_runtime_reserved_arg_size;
aph@29184 37
aph@29184 38 enum {
aph@29184 39 first_available_sp_in_frame = 0,
aph@29184 40 frame_pad_in_bytes = 16,
aph@29184 41 nof_reg_args = 8
aph@29184 42 };
aph@29184 43
aph@29184 44 public:
aph@29184 45 static LIR_Opr receiver_opr;
aph@29184 46
aph@29184 47 static LIR_Opr r0_opr;
aph@29184 48 static LIR_Opr r1_opr;
aph@29184 49 static LIR_Opr r2_opr;
aph@29184 50 static LIR_Opr r3_opr;
aph@29184 51 static LIR_Opr r4_opr;
aph@29184 52 static LIR_Opr r5_opr;
aph@29184 53 static LIR_Opr r6_opr;
aph@29184 54 static LIR_Opr r7_opr;
aph@29184 55 static LIR_Opr r8_opr;
aph@29184 56 static LIR_Opr r9_opr;
aph@29184 57 static LIR_Opr r10_opr;
aph@29184 58 static LIR_Opr r11_opr;
aph@29184 59 static LIR_Opr r12_opr;
aph@29184 60 static LIR_Opr r13_opr;
aph@29184 61 static LIR_Opr r14_opr;
aph@29184 62 static LIR_Opr r15_opr;
aph@29184 63 static LIR_Opr r16_opr;
aph@29184 64 static LIR_Opr r17_opr;
aph@29184 65 static LIR_Opr r18_opr;
aph@29184 66 static LIR_Opr r19_opr;
aph@29184 67 static LIR_Opr r20_opr;
aph@29184 68 static LIR_Opr r21_opr;
aph@29184 69 static LIR_Opr r22_opr;
aph@29184 70 static LIR_Opr r23_opr;
aph@29184 71 static LIR_Opr r24_opr;
aph@29184 72 static LIR_Opr r25_opr;
aph@29184 73 static LIR_Opr r26_opr;
aph@29184 74 static LIR_Opr r27_opr;
aph@29184 75 static LIR_Opr r28_opr;
aph@29184 76 static LIR_Opr r29_opr;
aph@29184 77 static LIR_Opr r30_opr;
aph@29184 78 static LIR_Opr rfp_opr;
aph@29184 79 static LIR_Opr sp_opr;
aph@29184 80
aph@29184 81 static LIR_Opr r0_oop_opr;
aph@29184 82 static LIR_Opr r1_oop_opr;
aph@29184 83 static LIR_Opr r2_oop_opr;
aph@29184 84 static LIR_Opr r3_oop_opr;
aph@29184 85 static LIR_Opr r4_oop_opr;
aph@29184 86 static LIR_Opr r5_oop_opr;
aph@29184 87 static LIR_Opr r6_oop_opr;
aph@29184 88 static LIR_Opr r7_oop_opr;
aph@29184 89 static LIR_Opr r8_oop_opr;
aph@29184 90 static LIR_Opr r9_oop_opr;
aph@29184 91 static LIR_Opr r10_oop_opr;
aph@29184 92 static LIR_Opr r11_oop_opr;
aph@29184 93 static LIR_Opr r12_oop_opr;
aph@29184 94 static LIR_Opr r13_oop_opr;
aph@29184 95 static LIR_Opr r14_oop_opr;
aph@29184 96 static LIR_Opr r15_oop_opr;
aph@29184 97 static LIR_Opr r16_oop_opr;
aph@29184 98 static LIR_Opr r17_oop_opr;
aph@29184 99 static LIR_Opr r18_oop_opr;
aph@29184 100 static LIR_Opr r19_oop_opr;
aph@29184 101 static LIR_Opr r20_oop_opr;
aph@29184 102 static LIR_Opr r21_oop_opr;
aph@29184 103 static LIR_Opr r22_oop_opr;
aph@29184 104 static LIR_Opr r23_oop_opr;
aph@29184 105 static LIR_Opr r24_oop_opr;
aph@29184 106 static LIR_Opr r25_oop_opr;
aph@29184 107 static LIR_Opr r26_oop_opr;
aph@29184 108 static LIR_Opr r27_oop_opr;
aph@29184 109 static LIR_Opr r28_oop_opr;
aph@29184 110 static LIR_Opr r29_oop_opr;
aph@29184 111 static LIR_Opr r30_oop_opr;
aph@29184 112
aph@29184 113 static LIR_Opr rscratch1_opr;
aph@29184 114 static LIR_Opr rscratch2_opr;
aph@29184 115 static LIR_Opr rscratch1_long_opr;
aph@29184 116 static LIR_Opr rscratch2_long_opr;
aph@29184 117
aph@29184 118 static LIR_Opr r0_metadata_opr;
aph@29184 119 static LIR_Opr r1_metadata_opr;
aph@29184 120 static LIR_Opr r2_metadata_opr;
aph@29184 121 static LIR_Opr r3_metadata_opr;
aph@29184 122 static LIR_Opr r4_metadata_opr;
aph@29184 123 static LIR_Opr r5_metadata_opr;
aph@29184 124
aph@29184 125 static LIR_Opr long0_opr;
aph@29184 126 static LIR_Opr long1_opr;
aph@29184 127 static LIR_Opr fpu0_float_opr;
aph@29184 128 static LIR_Opr fpu0_double_opr;
aph@29184 129
aph@29184 130 static LIR_Opr as_long_opr(Register r) {
aph@29184 131 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
aph@29184 132 }
aph@29184 133 static LIR_Opr as_pointer_opr(Register r) {
aph@29184 134 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
aph@29184 135 }
aph@29184 136
aph@29184 137 // VMReg name for spilled physical FPU stack slot n
aph@29184 138 static VMReg fpu_regname (int n);
aph@29184 139
aph@29184 140 static bool is_caller_save_register (LIR_Opr opr) { return true; }
aph@29184 141 static bool is_caller_save_register (Register r) { return true; }
aph@29184 142
aph@29184 143 static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; }
aph@29184 144 static int last_cpu_reg() { return pd_last_cpu_reg; }
aph@29184 145 static int last_byte_reg() { return pd_last_byte_reg; }
aph@29184 146
coleenp@54304 147 #endif // CPU_AARCH64_C1_FRAMEMAP_AARCH64_HPP