diff src/hotspot/cpu/ppc/assembler_ppc.inline.hpp @ 53635:a959583eea01

8214205: PPC64: Add instructions for counting trailing zeros Reviewed-by: mdoerr, gromero
author mhorie
date Thu, 22 Nov 2018 21:43:37 -0500
parents 0caa36de8703
children 7384e00d5860
line wrap: on
line diff
--- a/src/hotspot/cpu/ppc/assembler_ppc.inline.hpp	Thu Nov 22 10:15:32 2018 -0800
+++ b/src/hotspot/cpu/ppc/assembler_ppc.inline.hpp	Thu Nov 22 21:43:37 2018 -0500
@@ -235,6 +235,10 @@
 inline void Assembler::cntlzw_( Register a, Register s)              { emit_int32(CNTLZW_OPCODE | rta(a) | rs(s) | rc(1)); }
 inline void Assembler::cntlzd(  Register a, Register s)              { emit_int32(CNTLZD_OPCODE | rta(a) | rs(s) | rc(0)); }
 inline void Assembler::cntlzd_( Register a, Register s)              { emit_int32(CNTLZD_OPCODE | rta(a) | rs(s) | rc(1)); }
+inline void Assembler::cnttzw(  Register a, Register s)              { emit_int32(CNTTZW_OPCODE | rta(a) | rs(s) | rc(0)); }
+inline void Assembler::cnttzw_( Register a, Register s)              { emit_int32(CNTTZW_OPCODE | rta(a) | rs(s) | rc(1)); }
+inline void Assembler::cnttzd(  Register a, Register s)              { emit_int32(CNTTZD_OPCODE | rta(a) | rs(s) | rc(0)); }
+inline void Assembler::cnttzd_( Register a, Register s)              { emit_int32(CNTTZD_OPCODE | rta(a) | rs(s) | rc(1)); }
 
 // PPC 1, section 3.3.12, Fixed-Point Rotate and Shift Instructions
 inline void Assembler::sld(     Register a, Register s, Register b)  { emit_int32(SLD_OPCODE    | rta(a) | rs(s) | rb(b) | rc(0)); }