changeset 46488:01c282163d38

Merge
author jwilhelm
date Tue, 23 May 2017 17:51:35 +0200
parents 44927fb4cd60 f8e5223d1501
children d530e842c512
files hotspot/make/lib/Lib-jdk.aot.gmk hotspot/src/cpu/aarch64/vm/metaspaceShared_aarch64.cpp hotspot/src/cpu/aarch64/vm/templateTable_aarch64.cpp hotspot/src/cpu/arm/vm/metaspaceShared_arm.cpp hotspot/src/cpu/ppc/vm/metaspaceShared_ppc.cpp hotspot/src/cpu/s390/vm/metaspaceShared_s390.cpp hotspot/src/cpu/sparc/vm/metaspaceShared_sparc.cpp hotspot/src/cpu/x86/vm/metaspaceShared_x86_32.cpp hotspot/src/cpu/x86/vm/metaspaceShared_x86_64.cpp hotspot/src/cpu/zero/vm/metaspaceShared_zero.cpp hotspot/src/jdk.aot/share/classes/jdk.tools.jaotc.jnilibelf/src/jdk/tools/jaotc/jnilibelf/ELFContainer.java hotspot/src/jdk.aot/share/classes/jdk.tools.jaotc.jnilibelf/src/jdk/tools/jaotc/jnilibelf/ELFSymbol.java hotspot/src/jdk.aot/share/classes/jdk.tools.jaotc.jnilibelf/src/jdk/tools/jaotc/jnilibelf/JNIELFContainer.java hotspot/src/jdk.aot/share/classes/jdk.tools.jaotc.jnilibelf/src/jdk/tools/jaotc/jnilibelf/JNIELFRelocation.java hotspot/src/jdk.aot/share/classes/jdk.tools.jaotc.jnilibelf/src/jdk/tools/jaotc/jnilibelf/JNIELFTargetInfo.java hotspot/src/jdk.aot/share/classes/jdk.tools.jaotc.jnilibelf/src/jdk/tools/jaotc/jnilibelf/JNILibELFAPI.java hotspot/src/jdk.aot/share/classes/jdk.tools.jaotc.jnilibelf/src/jdk/tools/jaotc/jnilibelf/Pointer.java hotspot/src/jdk.aot/share/classes/jdk.tools.jaotc.jnilibelf/src/jdk/tools/jaotc/jnilibelf/UnsafeAccess.java hotspot/src/jdk.aot/share/classes/jdk.tools.jaotc.jnilibelf/src/jdk/tools/jaotc/jnilibelf/linux/Elf_Cmd.java hotspot/src/jdk.aot/share/classes/jdk.tools.jaotc.jnilibelf/src/jdk/tools/jaotc/jnilibelf/sunos/Elf_Cmd.java hotspot/src/jdk.aot/unix/native/libjelfshim/jdk_tools_jaotc_jnilibelf_JNILibELFAPI.c hotspot/src/jdk.aot/unix/native/libjelfshim/shim_functions.c hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.api.collections/src/org/graalvm/compiler/api/collections/CollectionsProvider.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.api.collections/src/org/graalvm/compiler/api/collections/DefaultCollectionsProvider.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.api.directives.test/src/org/graalvm/compiler/api/directives/test/AllocationInstrumentationTest.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.api.directives.test/src/org/graalvm/compiler/api/directives/test/IsMethodInlineDirectiveTest.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.api.directives.test/src/org/graalvm/compiler/api/directives/test/LockInstrumentationTest.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.api.directives.test/src/org/graalvm/compiler/api/directives/test/RootNameDirectiveTest.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.api.directives.test/src/org/graalvm/compiler/api/directives/test/TinyInstrumentor.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.asm/src/org/graalvm/compiler/asm/NumUtil.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.common/src/org/graalvm/compiler/common/PermanentBailoutException.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.common/src/org/graalvm/compiler/common/RetryableBailoutException.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.common/src/org/graalvm/compiler/core/common/CollectionsFactory.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.common/src/org/graalvm/compiler/core/common/LinkedIdentityHashMap.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.common/src/org/graalvm/compiler/core/common/LocationIdentity.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.common/src/org/graalvm/compiler/core/common/util/ArrayMap.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.common/src/org/graalvm/compiler/core/common/util/ArraySet.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.test/src/org/graalvm/compiler/core/test/ConditionalEliminationLoadFieldConstantFoldTest.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.test/src/org/graalvm/compiler/core/test/GuardEliminationCornerCasesTest.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.test/src/org/graalvm/compiler/core/test/inlining/RecursiveInliningTest.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.graph/src/org/graalvm/compiler/graph/DefaultNodeCollectionsProvider.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.graph/src/org/graalvm/compiler/graph/NodeCollectionsProvider.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.graph/src/org/graalvm/compiler/graph/NodeNodeMap.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.aarch64/src/org/graalvm/compiler/hotspot/aarch64/AArch64HotSpotLIRKindTool.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.aarch64/src/org/graalvm/compiler/hotspot/aarch64/AArchHotSpotNodeCostProvider.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.amd64/src/org/graalvm/compiler/hotspot/amd64/AMD64DeoptimizationStub.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.amd64/src/org/graalvm/compiler/hotspot/amd64/AMD64HotSpotEnterUnpackFramesStackFrameOp.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.amd64/src/org/graalvm/compiler/hotspot/amd64/AMD64HotSpotLIRKindTool.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.amd64/src/org/graalvm/compiler/hotspot/amd64/AMD64HotSpotLeaveUnpackFramesStackFrameOp.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.amd64/src/org/graalvm/compiler/hotspot/amd64/AMD64HotSpotNodeCostProvider.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.amd64/src/org/graalvm/compiler/hotspot/amd64/AMD64UncommonTrapStub.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.sparc/src/org/graalvm/compiler/hotspot/sparc/SPARCDeoptimizationStub.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.sparc/src/org/graalvm/compiler/hotspot/sparc/SPARCHotSpotEnterUnpackFramesStackFrameOp.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.sparc/src/org/graalvm/compiler/hotspot/sparc/SPARCHotSpotLIRKindTool.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.sparc/src/org/graalvm/compiler/hotspot/sparc/SPARCHotSpotLeaveUnpackFramesStackFrameOp.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.sparc/src/org/graalvm/compiler/hotspot/sparc/SPARCHotSpotNodeCostProvider.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.sparc/src/org/graalvm/compiler/hotspot/sparc/SPARCUncommonTrapStub.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/CompileTheWorld.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/CompileTheWorldOptions.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/CompressEncoding.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/PrintStreamOption.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/CompressionNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/DeoptimizationFetchUnrollInfoCallNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/DirectCompareAndSwapNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/EnterUnpackFramesStackFrameNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/HotSpotNodeCostProvider.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/LeaveCurrentStackFrameNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/LeaveDeoptimizedStackFrameNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/LeaveUnpackFramesStackFrameNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/PushInterpreterFrameNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/SaveAllRegistersNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/SnippetAnchorNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/SnippetLocationProxyNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/UncommonTrapCallNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/type/HotSpotLIRKindTool.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/nodes/type/NarrowOopStamp.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/stubs/DeoptimizationStub.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot/src/org/graalvm/compiler/hotspot/stubs/UncommonTrapStub.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir/src/org/graalvm/compiler/lir/ssi/FastSSIBuilder.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir/src/org/graalvm/compiler/lir/ssi/SSIBuilder.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir/src/org/graalvm/compiler/lir/ssi/SSIBuilderBase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir/src/org/graalvm/compiler/lir/ssi/SSIConstructionPhase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir/src/org/graalvm/compiler/lir/ssi/SSIUtil.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir/src/org/graalvm/compiler/lir/ssi/SSIVerifier.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/debug/instrumentation/InstrumentationBeginNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/debug/instrumentation/InstrumentationEndNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/debug/instrumentation/InstrumentationInliningCallback.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/debug/instrumentation/InstrumentationNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/debug/instrumentation/IsMethodInlinedNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/debug/instrumentation/MonitorProxyNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/debug/instrumentation/RootNameNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/extended/UnsafeLoadNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/extended/UnsafeStoreNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/java/CompareAndSwapNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/java/LoweredCompareAndSwapNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/spi/DefaultNodeCostProvider.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/spi/NodeCostProvider.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.nodes/src/org/graalvm/compiler/nodes/spi/PiPushable.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.options.test/src/org/graalvm/compiler/options/test/NestedBooleanOptionValueTest.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.options.test/src/org/graalvm/compiler/options/test/TestOptionValue.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.options/src/org/graalvm/compiler/options/DerivedOptionValue.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.options/src/org/graalvm/compiler/options/EnumOptionValue.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.options/src/org/graalvm/compiler/options/NestedBooleanOptionValue.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.options/src/org/graalvm/compiler/options/OptionValue.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.options/src/org/graalvm/compiler/options/StableOptionValue.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.phases.common/src/org/graalvm/compiler/phases/common/DominatorConditionalEliminationPhase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.phases.common/src/org/graalvm/compiler/phases/common/OptimizeGuardAnchorsPhase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.phases.common/src/org/graalvm/compiler/phases/common/PushThroughPiPhase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.phases.common/src/org/graalvm/compiler/phases/common/ValueAnchorCleanupPhase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.phases.common/src/org/graalvm/compiler/phases/common/instrumentation/ExtractInstrumentationPhase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.phases.common/src/org/graalvm/compiler/phases/common/instrumentation/HighTierReconcileInstrumentationPhase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.phases.common/src/org/graalvm/compiler/phases/common/instrumentation/InlineInstrumentationPhase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.phases.common/src/org/graalvm/compiler/phases/common/instrumentation/MidTierReconcileInstrumentationPhase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.replacements.test/src/org/graalvm/compiler/replacements/test/IntegerMulExactFoldTest.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.replacements/src/org/graalvm/compiler/replacements/InlineGraalDirectivesPlugin.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.replacements/src/org/graalvm/compiler/replacements/WordOperationPlugin.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.replacements/src/org/graalvm/compiler/replacements/nodes/DirectObjectStoreNode.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/Salver.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/SalverDebugConfigCustomizer.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/SalverOptions.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/data/DataDict.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/data/DataList.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/dumper/AbstractGraalDumper.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/dumper/AbstractMethodScopeDumper.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/dumper/AbstractSerializerDumper.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/dumper/Dumper.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/dumper/GraphDumper.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/handler/AbstractDumpHandler.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/handler/AbstractGraalDumpHandler.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/handler/DumpHandler.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/handler/GraphDumpHandler.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/package-info.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/serialize/AbstractSerializer.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/serialize/JSONSerializer.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/serialize/Serializer.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/util/ECIDUtil.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/util/MethodContext.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/writer/ChannelDumpWriter.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.salver/src/org/graalvm/compiler/salver/writer/DumpWriter.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.word/src/org/graalvm/compiler/word/AtomicUnsigned.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.word/src/org/graalvm/compiler/word/AtomicWord.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.word/src/org/graalvm/compiler/word/ComparableWord.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.word/src/org/graalvm/compiler/word/Pointer.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.word/src/org/graalvm/compiler/word/PointerBase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.word/src/org/graalvm/compiler/word/PointerUtils.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.word/src/org/graalvm/compiler/word/Signed.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.word/src/org/graalvm/compiler/word/Unsigned.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.word/src/org/graalvm/compiler/word/UnsignedUtils.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.word/src/org/graalvm/compiler/word/WordBase.java hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.word/src/org/graalvm/compiler/word/nodes/WordCastNode.java hotspot/src/share/vm/classfile/stringTable.cpp hotspot/src/share/vm/classfile/stringTable.hpp hotspot/src/share/vm/runtime/vmStructs.cpp hotspot/src/share/vm/utilities/array.hpp hotspot/src/share/vm/utilities/hashtable.cpp hotspot/src/share/vm/utilities/hashtable.hpp hotspot/test/compiler/aot/jdk.tools.jaotc.jnilibelf.test/src/jdk/tools/jaotc/jnilibelf/test/JNILibELFTest.java hotspot/test/gc/stress/TestGCOld.java hotspot/test/runtime/CommandLine/OptionsValidation/common/optionsvalidation/JVMOption.java hotspot/test/runtime/SharedArchiveFile/CDSTestUtils.java hotspot/test/runtime/modules/JVMGetModuleByPkgName.java hotspot/test/runtime/modules/PatchModule/PatchModuleTraceCL.java hotspot/test/runtime/noClassDefFoundMsg/NoClassDefFoundMsg.java
diffstat 1949 files changed, 131763 insertions(+), 48074 deletions(-) [+]
line wrap: on
line diff
--- a/hotspot/make/CompileTools.gmk	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/make/CompileTools.gmk	Tue May 23 17:51:35 2017 +0200
@@ -47,11 +47,10 @@
   $(eval $(call SetupJavaCompilation, BUILD_VM_COMPILER_MATCH_PROCESSOR, \
       SETUP := GENERATE_OLDBYTECODE, \
       SRC := \
-          $(SRC_DIR)/org.graalvm.compiler.common/src \
+          $(SRC_DIR)/org.graalvm.api.word/src \
           $(SRC_DIR)/org.graalvm.compiler.core/src \
           $(SRC_DIR)/org.graalvm.compiler.core.common/src \
           $(SRC_DIR)/org.graalvm.compiler.core.match.processor/src \
-          $(SRC_DIR)/org.graalvm.compiler.api.collections/src \
           $(SRC_DIR)/org.graalvm.compiler.api.replacements/src \
           $(SRC_DIR)/org.graalvm.compiler.asm/src \
           $(SRC_DIR)/org.graalvm.compiler.bytecode/src \
@@ -68,6 +67,7 @@
           $(SRC_DIR)/org.graalvm.compiler.phases.common/src \
           $(SRC_DIR)/org.graalvm.compiler.serviceprovider/src \
           $(SRC_DIR)/org.graalvm.compiler.virtual/src \
+          $(SRC_DIR)/org.graalvm.util/src \
           $(VM_CI_SRC_DIR)/jdk.vm.ci.code/src \
           $(VM_CI_SRC_DIR)/jdk.vm.ci.common/src \
           $(VM_CI_SRC_DIR)/jdk.vm.ci.meta/src \
@@ -102,6 +102,7 @@
       SRC := \
           $(SRC_DIR)/org.graalvm.compiler.options/src \
           $(SRC_DIR)/org.graalvm.compiler.options.processor/src \
+          $(SRC_DIR)/org.graalvm.util/src \
           , \
       BIN := $(BUILDTOOLS_OUTPUTDIR)/jdk.vm.compiler.options.processor, \
       JAR := $(BUILDTOOLS_OUTPUTDIR)/jdk.vm.compiler.options.processor.jar, \
@@ -114,9 +115,8 @@
   $(eval $(call SetupJavaCompilation, BUILD_VM_COMPILER_REPLACEMENTS_VERIFIER, \
       SETUP := GENERATE_OLDBYTECODE, \
       SRC := \
-          $(SRC_DIR)/org.graalvm.compiler.common/src \
+          $(SRC_DIR)/org.graalvm.api.word/src \
           $(SRC_DIR)/org.graalvm.compiler.replacements.verifier/src \
-          $(SRC_DIR)/org.graalvm.compiler.api.collections/src \
           $(SRC_DIR)/org.graalvm.compiler.api.replacements/src \
           $(SRC_DIR)/org.graalvm.compiler.code/src \
           $(SRC_DIR)/org.graalvm.compiler.core.common/src \
@@ -125,6 +125,7 @@
           $(SRC_DIR)/org.graalvm.compiler.nodeinfo/src \
           $(SRC_DIR)/org.graalvm.compiler.options/src \
           $(SRC_DIR)/org.graalvm.compiler.serviceprovider/src \
+          $(SRC_DIR)/org.graalvm.util/src \
           $(VM_CI_SRC_DIR)/jdk.vm.ci.code/src \
           $(VM_CI_SRC_DIR)/jdk.vm.ci.common/src \
           $(VM_CI_SRC_DIR)/jdk.vm.ci.meta/src \
--- a/hotspot/make/gensrc/Gensrc-jdk.internal.vm.compiler.gmk	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/make/gensrc/Gensrc-jdk.internal.vm.compiler.gmk	Tue May 23 17:51:35 2017 +0200
@@ -37,7 +37,6 @@
 
 PROC_SRC_SUBDIRS := \
     org.graalvm.compiler.code \
-    org.graalvm.compiler.common \
     org.graalvm.compiler.core \
     org.graalvm.compiler.core.aarch64 \
     org.graalvm.compiler.core.amd64 \
--- a/hotspot/make/lib/Lib-jdk.aot.gmk	Fri May 19 04:18:25 2017 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,53 +0,0 @@
-#
-# Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved.
-# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
-#
-# This code is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License version 2 only, as
-# published by the Free Software Foundation.  Oracle designates this
-# particular file as subject to the "Classpath" exception as provided
-# by Oracle in the LICENSE file that accompanied this code.
-#
-# This code is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-# version 2 for more details (a copy is included in the LICENSE file that
-# accompanied this code).
-#
-# You should have received a copy of the GNU General Public License version
-# 2 along with this work; if not, write to the Free Software Foundation,
-# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
-#
-# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
-# or visit www.oracle.com if you need additional information or have any
-# questions.
-#
-
-include $(SPEC)
-include NativeCompilation.gmk
-
-$(eval $(call IncludeCustomExtension, hotspot, lib/Lib-jdk.aot.gmk))
-
-##############################################################################
-# Build libjelfshim only when AOT is enabled.
-ifeq ($(ENABLE_AOT), true)
-  JELFSHIM_NAME := jelfshim
-
-  $(eval $(call SetupNativeCompilation, BUILD_LIBJELFSHIM, \
-      TOOLCHAIN := TOOLCHAIN_DEFAULT, \
-      OPTIMIZATION := LOW, \
-      LIBRARY := $(JELFSHIM_NAME), \
-      OUTPUT_DIR := $(call FindLibDirForModule, $(MODULE)), \
-      SRC := $(HOTSPOT_TOPDIR)/src/jdk.aot/unix/native/libjelfshim, \
-      CFLAGS := $(CFLAGS_JDKLIB) $(ELF_CFLAGS) \
-          -DAOT_VERSION_STRING='"$(VERSION_STRING)"' \
-          -I$(SUPPORT_OUTPUTDIR)/headers/$(MODULE), \
-      LDFLAGS := $(LDFLAGS_JDKLIB), \
-      OBJECT_DIR := $(SUPPORT_OUTPUTDIR)/native/$(MODULE)/lib$(JELFSHIM_NAME), \
-      LIBS := $(ELF_LIBS) $(LIBS_JDKLIB), \
-  ))
-
-  TARGETS += $(BUILD_LIBJELFSHIM)
-endif
-
-##############################################################################
--- a/hotspot/make/test/JtregNative.gmk	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/make/test/JtregNative.gmk	Tue May 23 17:51:35 2017 +0200
@@ -35,12 +35,16 @@
 include MakeBase.gmk
 include TestFilesCompilation.gmk
 
+$(eval $(call IncludeCustomExtension, hotspot, test/JtregNative.gmk))
+
 ################################################################################
 # Targets for building the native tests themselves.
 ################################################################################
 
 # Add more directories here when needed.
-BUILD_HOTSPOT_JTREG_NATIVE_SRC := \
+BUILD_HOTSPOT_JTREG_NATIVE_SRC += \
+    $(HOTSPOT_TOPDIR)/test/gc/g1/TestJNIWeakG1 \
+    $(HOTSPOT_TOPDIR)/test/gc/stress/gclocker \
     $(HOTSPOT_TOPDIR)/test/native_sanity \
     $(HOTSPOT_TOPDIR)/test/runtime/jni/8025979 \
     $(HOTSPOT_TOPDIR)/test/runtime/jni/8033445 \
@@ -53,6 +57,7 @@
     $(HOTSPOT_TOPDIR)/test/runtime/modules/getModuleJNI \
     $(HOTSPOT_TOPDIR)/test/runtime/SameObject \
     $(HOTSPOT_TOPDIR)/test/runtime/BoolReturn \
+    $(HOTSPOT_TOPDIR)/test/runtime/noClassDefFoundMsg \
     $(HOTSPOT_TOPDIR)/test/compiler/floatingpoint/ \
     $(HOTSPOT_TOPDIR)/test/compiler/calls \
     $(HOTSPOT_TOPDIR)/test/serviceability/jvmti/GetNamedModule \
@@ -65,6 +70,7 @@
     $(HOTSPOT_TOPDIR)/test/serviceability/jvmti/ModuleAwareAgents/ClassFileLoadHook \
     $(HOTSPOT_TOPDIR)/test/serviceability/jvmti/ModuleAwareAgents/ClassLoadPrepare \
     $(HOTSPOT_TOPDIR)/test/serviceability/jvmti/ModuleAwareAgents/ThreadStart \
+    $(HOTSPOT_TOPDIR)/test/serviceability/jvmti/StartPhase/AllowedFunctions \
     #
 
 # Add conditional directories here when needed.
@@ -91,6 +97,7 @@
     BUILD_HOTSPOT_JTREG_LIBRARIES_LIBS_libMAAClassFileLoadHook := -lc
     BUILD_HOTSPOT_JTREG_LIBRARIES_LIBS_libMAAClassLoadPrepare := -lc
     BUILD_HOTSPOT_JTREG_LIBRARIES_LIBS_libMAAThreadStart := -lc
+    BUILD_HOTSPOT_JTREG_LIBRARIES_LIBS_libAllowedFunctions := -lc
 endif
 
 ifeq ($(OPENJDK_TARGET_OS), linux)
--- a/hotspot/src/cpu/aarch64/vm/aarch64.ad	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/aarch64/vm/aarch64.ad	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
 // Copyright (c) 2014, Red Hat Inc. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
@@ -3564,7 +3564,7 @@
 }
 
 // Vector ideal reg.
-const int Matcher::vector_ideal_reg(int len) {
+const uint Matcher::vector_ideal_reg(int len) {
   switch(len) {
     case  8: return Op_VecD;
     case 16: return Op_VecX;
@@ -3573,7 +3573,7 @@
   return 0;
 }
 
-const int Matcher::vector_shift_count_ideal_reg(int size) {
+const uint Matcher::vector_shift_count_ideal_reg(int size) {
   return Op_VecX;
 }
 
--- a/hotspot/src/cpu/aarch64/vm/c1_FpuStackSim_aarch64.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/aarch64/vm/c1_FpuStackSim_aarch64.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -23,12 +23,6 @@
  *
  */
 
-#include "precompiled.hpp"
-#include "c1/c1_FpuStackSim.hpp"
-#include "c1/c1_FrameMap.hpp"
-#include "utilities/array.hpp"
-#include "utilities/ostream.hpp"
-
 //--------------------------------------------------------
 //               FpuStackSim
 //--------------------------------------------------------
--- a/hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -270,7 +270,8 @@
 
   get_constant_pool(result);
   // load pointer for resolved_references[] objArray
-  ldr(result, Address(result, ConstantPool::resolved_references_offset_in_bytes()));
+  ldr(result, Address(result, ConstantPool::cache_offset_in_bytes()));
+  ldr(result, Address(result, ConstantPoolCache::resolved_references_offset_in_bytes()));
   // JNIHandles::resolve(obj);
   ldr(result, Address(result, 0));
   // Add in the index
@@ -278,6 +279,15 @@
   load_heap_oop(result, Address(result, arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
 }
 
+void InterpreterMacroAssembler::load_resolved_klass_at_offset(
+                             Register cpool, Register index, Register klass, Register temp) {
+  add(temp, cpool, index, LSL, LogBytesPerWord);
+  ldrh(temp, Address(temp, sizeof(ConstantPool))); // temp = resolved_klass_index
+  ldr(klass, Address(cpool,  ConstantPool::resolved_klasses_offset_in_bytes())); // klass = cpool->_resolved_klasses
+  add(klass, klass, temp, LSL, LogBytesPerWord);
+  ldr(klass, Address(klass, Array<Klass*>::base_offset_in_bytes()));
+}
+
 // Generate a subtype check: branch to ok_is_subtype if sub_klass is a
 // subtype of super_klass.
 //
@@ -682,7 +692,7 @@
     }
 
     // Load (object->mark() | 1) into swap_reg
-    ldr(rscratch1, Address(obj_reg, 0));
+    ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
     orr(swap_reg, rscratch1, 1);
 
     // Save (object->mark() | 1) into BasicLock's displaced header
@@ -694,14 +704,14 @@
     Label fail;
     if (PrintBiasedLockingStatistics) {
       Label fast;
-      cmpxchgptr(swap_reg, lock_reg, obj_reg, rscratch1, fast, &fail);
+      cmpxchg_obj_header(swap_reg, lock_reg, obj_reg, rscratch1, fast, &fail);
       bind(fast);
       atomic_incw(Address((address)BiasedLocking::fast_path_entry_count_addr()),
                   rscratch2, rscratch1, tmp);
       b(done);
       bind(fail);
     } else {
-      cmpxchgptr(swap_reg, lock_reg, obj_reg, rscratch1, done, /*fallthrough*/NULL);
+      cmpxchg_obj_header(swap_reg, lock_reg, obj_reg, rscratch1, done, /*fallthrough*/NULL);
     }
 
     // Test if the oopMark is an obvious stack pointer, i.e.,
@@ -791,7 +801,7 @@
     cbz(header_reg, done);
 
     // Atomic swap back the old header
-    cmpxchgptr(swap_reg, header_reg, obj_reg, rscratch1, done, /*fallthrough*/NULL);
+    cmpxchg_obj_header(swap_reg, header_reg, obj_reg, rscratch1, done, /*fallthrough*/NULL);
 
     // Call the runtime routine for slow case.
     str(obj_reg, Address(lock_reg, BasicObjectLock::obj_offset_in_bytes())); // restore obj
--- a/hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.hpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.hpp	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -54,9 +54,6 @@
                             int number_of_arguments,
                             bool check_exceptions);
 
-  virtual void check_and_handle_popframe(Register java_thread);
-  virtual void check_and_handle_earlyret(Register java_thread);
-
   // base routine for all dispatches
   void dispatch_base(TosState state, address* table, bool verifyoop = true);
 
@@ -67,6 +64,9 @@
 
   void jump_to_entry(address entry);
 
+  virtual void check_and_handle_popframe(Register java_thread);
+  virtual void check_and_handle_earlyret(Register java_thread);
+
   // Interpreter-specific registers
   void save_bcp() {
     str(rbcp, Address(rfp, frame::interpreter_frame_bcp_offset * wordSize));
@@ -123,6 +123,9 @@
   // load cpool->resolved_references(index);
   void load_resolved_reference_at_index(Register result, Register index);
 
+  // load cpool->resolved_klass_at(index);
+  void load_resolved_klass_at_offset(Register cpool, Register index, Register klass, Register temp);
+
   void pop_ptr(Register r = r0);
   void pop_i(Register r = r0);
   void pop_l(Register r = r0);
--- a/hotspot/src/cpu/aarch64/vm/jvmciCodeInstaller_aarch64.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/aarch64/vm/jvmciCodeInstaller_aarch64.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015, 2017, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -55,7 +55,7 @@
     }
   }
 #endif // ASSERT
-  Handle obj = HotSpotObjectConstantImpl::object(constant);
+  Handle obj(THREAD, HotSpotObjectConstantImpl::object(constant));
   jobject value = JNIHandles::make_local(obj());
   MacroAssembler::patch_oop(pc, (address)obj());
   int oop_index = _oop_recorder->find_index(value);
--- a/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp	Tue May 23 17:51:35 2017 +0200
@@ -515,7 +515,7 @@
     mov(rscratch1, markOopDesc::biased_lock_mask_in_place | markOopDesc::age_mask_in_place | markOopDesc::epoch_mask_in_place);
     andr(swap_reg, swap_reg, rscratch1);
     orr(tmp_reg, swap_reg, rthread);
-    cmpxchgptr(swap_reg, tmp_reg, obj_reg, rscratch1, here, slow_case);
+    cmpxchg_obj_header(swap_reg, tmp_reg, obj_reg, rscratch1, here, slow_case);
     // If the biasing toward our thread failed, this means that
     // another thread succeeded in biasing it toward itself and we
     // need to revoke that bias. The revocation will occur in the
@@ -542,7 +542,7 @@
     Label here;
     load_prototype_header(tmp_reg, obj_reg);
     orr(tmp_reg, rthread, tmp_reg);
-    cmpxchgptr(swap_reg, tmp_reg, obj_reg, rscratch1, here, slow_case);
+    cmpxchg_obj_header(swap_reg, tmp_reg, obj_reg, rscratch1, here, slow_case);
     // If the biasing toward our thread failed, then another thread
     // succeeded in biasing it toward itself and we need to revoke that
     // bias. The revocation will occur in the runtime in the slow case.
@@ -569,7 +569,7 @@
   {
     Label here, nope;
     load_prototype_header(tmp_reg, obj_reg);
-    cmpxchgptr(swap_reg, tmp_reg, obj_reg, rscratch1, here, &nope);
+    cmpxchg_obj_header(swap_reg, tmp_reg, obj_reg, rscratch1, here, &nope);
     bind(here);
 
     // Fall through to the normal CAS-based lock, because no matter what
@@ -2141,6 +2141,12 @@
     b(*fail);
 }
 
+void MacroAssembler::cmpxchg_obj_header(Register oldv, Register newv, Register obj, Register tmp,
+                                        Label &succeed, Label *fail) {
+  assert(oopDesc::mark_offset_in_bytes() == 0, "assumption");
+  cmpxchgptr(oldv, newv, obj, tmp, succeed, fail);
+}
+
 void MacroAssembler::cmpxchgw(Register oldv, Register newv, Register addr, Register tmp,
                                 Label &succeed, Label *fail) {
   // oldv holds comparison value
--- a/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -77,12 +77,6 @@
     bool     check_exceptions          // whether to check for pending exceptions after return
   );
 
-  // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
-  // The implementation is only non-empty for the InterpreterMacroAssembler,
-  // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
-  virtual void check_and_handle_popframe(Register java_thread);
-  virtual void check_and_handle_earlyret(Register java_thread);
-
   void call_VM_helper(Register oop_result, address entry_point, int number_of_arguments, bool check_exceptions = true);
 
   // Maximum size of class area in Metaspace when compressed
@@ -97,6 +91,12 @@
              > (1u << log2_intptr(CompressedClassSpaceSize))));
   }
 
+ // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
+ // The implementation is only non-empty for the InterpreterMacroAssembler,
+ // as only the interpreter handles PopFrame and ForceEarlyReturn requests.
+ virtual void check_and_handle_popframe(Register java_thread);
+ virtual void check_and_handle_earlyret(Register java_thread);
+
   // Biased locking support
   // lock_reg and obj_reg must be loaded up with the appropriate values.
   // swap_reg is killed.
@@ -974,6 +974,8 @@
 
   // Various forms of CAS
 
+  void cmpxchg_obj_header(Register oldv, Register newv, Register obj, Register tmp,
+                          Label &suceed, Label *fail);
   void cmpxchgptr(Register oldv, Register newv, Register addr, Register tmp,
                   Label &suceed, Label *fail);
 
--- a/hotspot/src/cpu/aarch64/vm/metaspaceShared_aarch64.cpp	Fri May 19 04:18:25 2017 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,126 +0,0 @@
-/*
- * Copyright (c) 2004, 2012, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2014, Red Hat Inc. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- *
- */
-
-#include "precompiled.hpp"
-#include "asm/macroAssembler.hpp"
-#include "memory/metaspaceShared.hpp"
-
-// Generate the self-patching vtable method:
-//
-// This method will be called (as any other Klass virtual method) with
-// the Klass itself as the first argument.  Example:
-//
-//      oop obj;
-//      int size = obj->klass()->oop_size(this);
-//
-// for which the virtual method call is Klass::oop_size();
-//
-// The dummy method is called with the Klass object as the first
-// operand, and an object as the second argument.
-//
-
-//=====================================================================
-
-// All of the dummy methods in the vtable are essentially identical,
-// differing only by an ordinal constant, and they bear no relationship
-// to the original method which the caller intended. Also, there needs
-// to be 'vtbl_list_size' instances of the vtable in order to
-// differentiate between the 'vtable_list_size' original Klass objects.
-
-#define __ masm->
-
-extern "C" {
-  void aarch64_prolog(void);
-}
-
-void MetaspaceShared::generate_vtable_methods(void** vtbl_list,
-                                                   void** vtable,
-                                                   char** md_top,
-                                                   char* md_end,
-                                                   char** mc_top,
-                                                   char* mc_end) {
-
-#ifdef BUILTIN_SIM
-  // Write a dummy word to the writable shared metaspace.
-  // MetaspaceShared::initialize_shared_spaces will fill it with the
-  // address of aarch64_prolog().
-  address *prolog_ptr = (address*)*md_top;
-  *(intptr_t *)(*md_top) = (intptr_t)0;
-  (*md_top) += sizeof(intptr_t);
-#endif
-
-  intptr_t vtable_bytes = (num_virtuals * vtbl_list_size) * sizeof(void*);
-  *(intptr_t *)(*md_top) = vtable_bytes;
-  *md_top += sizeof(intptr_t);
-  void** dummy_vtable = (void**)*md_top;
-  *vtable = dummy_vtable;
-  *md_top += vtable_bytes;
-
-  // Get ready to generate dummy methods.
-
-  CodeBuffer cb((unsigned char*)*mc_top, mc_end - *mc_top);
-  MacroAssembler* masm = new MacroAssembler(&cb);
-
-  Label common_code;
-  for (int i = 0; i < vtbl_list_size; ++i) {
-    for (int j = 0; j < num_virtuals; ++j) {
-      dummy_vtable[num_virtuals * i + j] = (void*)masm->pc();
-
-      // We're called directly from C code.
-#ifdef BUILTIN_SIM
-      __ c_stub_prolog(8, 0, MacroAssembler::ret_type_integral, prolog_ptr);
-#endif
-      // Load rscratch1 with a value indicating vtable/offset pair.
-      // -- bits[ 7..0]  (8 bits) which virtual method in table?
-      // -- bits[12..8]  (5 bits) which virtual method table?
-      __ mov(rscratch1, (i << 8) + j);
-      __ b(common_code);
-    }
-  }
-
-  __ bind(common_code);
-
-  Register tmp0 = r10, tmp1 = r11;       // AAPCS64 temporary registers
-  __ enter();
-  __ lsr(tmp0, rscratch1, 8);            // isolate vtable identifier.
-  __ mov(tmp1, (address)vtbl_list);      // address of list of vtable pointers.
-  __ ldr(tmp1, Address(tmp1, tmp0, Address::lsl(LogBytesPerWord))); // get correct vtable pointer.
-  __ str(tmp1, Address(c_rarg0));        // update vtable pointer in obj.
-  __ add(rscratch1, tmp1, rscratch1, ext::uxtb, LogBytesPerWord); // address of real method pointer.
-  __ ldr(rscratch1, Address(rscratch1)); // get real method pointer.
-  __ blrt(rscratch1, 8, 0, 1);           // jump to the real method.
-  __ leave();
-  __ ret(lr);
-
-  *mc_top = (char*)__ pc();
-}
-
-#ifdef BUILTIN_SIM
-void MetaspaceShared::relocate_vtbl_list(char **buffer) {
-  void **sim_entry = (void**)*buffer;
-  *sim_entry = (void*)aarch64_prolog;
-  *buffer += sizeof(intptr_t);
-}
-#endif
--- a/hotspot/src/cpu/aarch64/vm/methodHandles_aarch64.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/aarch64/vm/methodHandles_aarch64.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -63,7 +63,7 @@
                                  Register obj, SystemDictionary::WKID klass_id,
                                  const char* error_message) {
   InstanceKlass** klass_addr = SystemDictionary::well_known_klass_addr(klass_id);
-  KlassHandle klass = SystemDictionary::well_known_klass(klass_id);
+  Klass* klass = SystemDictionary::well_known_klass(klass_id);
   Register temp = rscratch2;
   Register temp2 = rscratch1; // used by MacroAssembler::cmpptr
   Label L_ok, L_bad;
--- a/hotspot/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1842,7 +1842,7 @@
     }
 
     // Load (object->mark() | 1) into swap_reg %r0
-    __ ldr(rscratch1, Address(obj_reg, 0));
+    __ ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
     __ orr(swap_reg, rscratch1, 1);
 
     // Save (object->mark() | 1) into BasicLock's displaced header
@@ -1850,7 +1850,7 @@
 
     // src -> dest iff dest == r0 else r0 <- dest
     { Label here;
-      __ cmpxchgptr(r0, lock_reg, obj_reg, rscratch1, lock_done, /*fallthrough*/NULL);
+      __ cmpxchg_obj_header(r0, lock_reg, obj_reg, rscratch1, lock_done, /*fallthrough*/NULL);
     }
 
     // Hmm should this move to the slow path code area???
@@ -2029,7 +2029,7 @@
 
     // Atomic swap old header if oop still contains the stack lock
     Label succeed;
-    __ cmpxchgptr(r0, old_hdr, obj_reg, rscratch1, succeed, &slow_path_unlock);
+    __ cmpxchg_obj_header(r0, old_hdr, obj_reg, rscratch1, succeed, &slow_path_unlock);
     __ bind(succeed);
 
     // slow path re-enters here
--- a/hotspot/src/cpu/aarch64/vm/templateInterpreterGenerator_aarch64.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/aarch64/vm/templateInterpreterGenerator_aarch64.cpp	Tue May 23 17:51:35 2017 +0200
@@ -402,14 +402,6 @@
   return entry;
 }
 
-address TemplateInterpreterGenerator::generate_continuation_for(TosState state) {
-  address entry = __ pc();
-  // NULL last_sp until next java call
-  __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
-  __ dispatch_next(state);
-  return entry;
-}
-
 address TemplateInterpreterGenerator::generate_return_entry_for(TosState state, int step, size_t index_size) {
   address entry = __ pc();
 
@@ -444,6 +436,10 @@
     __ notify(Assembler::method_reentry);
   }
 #endif
+
+ __ check_and_handle_popframe(rthread);
+ __ check_and_handle_earlyret(rthread);
+
   __ get_dispatch();
   __ dispatch_next(state, step);
 
--- a/hotspot/src/cpu/aarch64/vm/templateTable_aarch64.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/aarch64/vm/templateTable_aarch64.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -3418,8 +3418,7 @@
   __ br(Assembler::NE, slow_case);
 
   // get InstanceKlass
-  __ lea(r4, Address(r4, r3, Address::lsl(3)));
-  __ ldr(r4, Address(r4, sizeof(ConstantPool)));
+  __ load_resolved_klass_at_offset(r4, r3, r4, rscratch1);
 
   // make sure klass is initialized & doesn't have finalizer
   // make sure klass is fully initialized
@@ -3572,8 +3571,7 @@
   // Get superklass in r0 and subklass in r3
   __ bind(quicked);
   __ mov(r3, r0); // Save object in r3; r0 needed for subtype check
-  __ lea(r0, Address(r2, r19, Address::lsl(3)));
-  __ ldr(r0, Address(r0, sizeof(ConstantPool)));
+  __ load_resolved_klass_at_offset(r2, r19, r0, rscratch1); // r0 = klass
 
   __ bind(resolved);
   __ load_klass(r19, r3);
@@ -3629,8 +3627,7 @@
   // Get superklass in r0 and subklass in r3
   __ bind(quicked);
   __ load_klass(r3, r0);
-  __ lea(r0, Address(r2, r19, Address::lsl(3)));
-  __ ldr(r0, Address(r0, sizeof(ConstantPool)));
+  __ load_resolved_klass_at_offset(r2, r19, r0, rscratch1);
 
   __ bind(resolved);
 
--- a/hotspot/src/cpu/arm/vm/abstractInterpreter_arm.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/arm/vm/abstractInterpreter_arm.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2017, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -234,8 +234,15 @@
 #ifdef AARCH64
   interpreter_frame->interpreter_frame_set_stack_top(stack_top);
 
+  // We have to add extra reserved slots to max_stack. There are 3 users of the extra slots,
+  // none of which are at the same time, so we just need to make sure there is enough room
+  // for the biggest user:
+  //   -reserved slot for exception handler
+  //   -reserved slots for JSR292. Method::extra_stack_entries() is the size.
+  //   -3 reserved slots so get_method_counters() can save some registers before call_VM().
+  int max_stack = method->constMethod()->max_stack() + MAX2(3, Method::extra_stack_entries());
   intptr_t* extended_sp = (intptr_t*) monbot  -
-    (method->max_stack() + 1) * Interpreter::stackElementWords - // +1 is reserved slot for exception handler
+    (max_stack * Interpreter::stackElementWords) -
     popframe_extra_args;
   extended_sp = (intptr_t*)round_down((intptr_t)extended_sp, StackAlignmentInBytes);
   interpreter_frame->interpreter_frame_set_extended_sp(extended_sp);
--- a/hotspot/src/cpu/arm/vm/arm.ad	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/arm/vm/arm.ad	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2008, 2015, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2008, 2017, Oracle and/or its affiliates. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
 // This code is free software; you can redistribute it and/or modify it
@@ -1122,7 +1122,7 @@
 }
 
 // Vector ideal reg corresponding to specified size in bytes
-const int Matcher::vector_ideal_reg(int size) {
+const uint Matcher::vector_ideal_reg(int size) {
   assert(MaxVectorSize >= size, "");
   switch(size) {
     case  8: return Op_VecD;
@@ -1132,7 +1132,7 @@
   return 0;
 }
 
-const int Matcher::vector_shift_count_ideal_reg(int size) {
+const uint Matcher::vector_shift_count_ideal_reg(int size) {
   return vector_ideal_reg(size);
 }
 
--- a/hotspot/src/cpu/arm/vm/c1_FpuStackSim_arm.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/arm/vm/c1_FpuStackSim_arm.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2011, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2017, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -22,10 +22,4 @@
  *
  */
 
-#include "precompiled.hpp"
-#include "c1/c1_FpuStackSim.hpp"
-#include "c1/c1_FrameMap.hpp"
-#include "utilities/array.hpp"
-#include "utilities/ostream.hpp"
-
 // Nothing needed here
--- a/hotspot/src/cpu/arm/vm/interp_masm_arm.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/arm/vm/interp_masm_arm.cpp	Tue May 23 17:51:35 2017 +0200
@@ -298,7 +298,8 @@
 
   Register cache = result;
   // load pointer for resolved_references[] objArray
-  ldr(cache, Address(result, ConstantPool::resolved_references_offset_in_bytes()));
+  ldr(cache, Address(result, ConstantPool::cache_offset_in_bytes()));
+  ldr(cache, Address(result, ConstantPoolCache::resolved_references_offset_in_bytes()));
   // JNIHandles::resolve(result)
   ldr(cache, Address(cache, 0));
   // Add in the index
@@ -308,6 +309,15 @@
   load_heap_oop(result, Address(cache, arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
 }
 
+void InterpreterMacroAssembler::load_resolved_klass_at_offset(
+                                           Register Rcpool, Register Rindex, Register Rklass) {
+  add(Rtemp, Rcpool, AsmOperand(Rindex, lsl, LogBytesPerWord));
+  ldrh(Rtemp, Address(Rtemp, sizeof(ConstantPool))); // Rtemp = resolved_klass_index
+  ldr(Rklass, Address(Rcpool,  ConstantPool::resolved_klasses_offset_in_bytes())); // Rklass = cpool->_resolved_klasses
+  add(Rklass, Rklass, AsmOperand(Rtemp, lsl, LogBytesPerWord));
+  ldr(Rklass, Address(Rklass, Array<Klass*>::base_offset_in_bytes()));
+}
+
 // Generate a subtype check: branch to not_subtype if sub_klass is
 // not a subtype of super_klass.
 // Profiling code for the subtype check failure (profile_typecheck_failed)
@@ -2016,75 +2026,42 @@
 
 void InterpreterMacroAssembler::get_method_counters(Register method,
                                                     Register Rcounters,
-                                                    Label& skip) {
+                                                    Label& skip,
+                                                    bool saveRegs,
+                                                    Register reg1,
+                                                    Register reg2,
+                                                    Register reg3) {
   const Address method_counters(method, Method::method_counters_offset());
   Label has_counters;
 
   ldr(Rcounters, method_counters);
   cbnz(Rcounters, has_counters);
 
+  if (saveRegs) {
+    // Save and restore in use caller-saved registers since they will be trashed by call_VM
+    assert(reg1 != noreg, "must specify reg1");
+    assert(reg2 != noreg, "must specify reg2");
 #ifdef AARCH64
-  const Register tmp = Rcounters;
-  const int saved_regs_size = 20*wordSize;
-
-  // Note: call_VM will cut SP according to Rstack_top value before call, and restore SP to
-  // extended_sp value from frame after the call.
-  // So make sure there is enough stack space to save registers and adjust Rstack_top accordingly.
-  {
-    Label enough_stack_space;
-    check_extended_sp(tmp);
-    sub(Rstack_top, Rstack_top, saved_regs_size);
-    cmp(SP, Rstack_top);
-    b(enough_stack_space, ls);
-
-    align_reg(tmp, Rstack_top, StackAlignmentInBytes);
-    mov(SP, tmp);
-    str(tmp, Address(FP, frame::interpreter_frame_extended_sp_offset * wordSize));
-
-    bind(enough_stack_space);
-    check_stack_top();
-
-    int offset = 0;
-    stp(R0,  R1,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    stp(R2,  R3,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    stp(R4,  R5,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    stp(R6,  R7,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    stp(R8,  R9,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    stp(R10, R11, Address(Rstack_top, offset)); offset += 2*wordSize;
-    stp(R12, R13, Address(Rstack_top, offset)); offset += 2*wordSize;
-    stp(R14, R15, Address(Rstack_top, offset)); offset += 2*wordSize;
-    stp(R16, R17, Address(Rstack_top, offset)); offset += 2*wordSize;
-    stp(R18, LR,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    assert (offset == saved_regs_size, "should be");
+    assert(reg3 != noreg, "must specify reg3");
+    stp(reg1, reg2, Address(Rstack_top, -2*wordSize, pre_indexed));
+    stp(reg3, ZR, Address(Rstack_top, -2*wordSize, pre_indexed));
+#else
+    assert(reg3 == noreg, "must not specify reg3");
+    push(RegisterSet(reg1) | RegisterSet(reg2));
+#endif
   }
-#else
-  push(RegisterSet(R0, R3) | RegisterSet(R12) | RegisterSet(R14));
-#endif // AARCH64
 
   mov(R1, method);
-  call_VM(noreg, CAST_FROM_FN_PTR(address,
-          InterpreterRuntime::build_method_counters), R1);
+  call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::build_method_counters), R1);
 
+  if (saveRegs) {
 #ifdef AARCH64
-  {
-    int offset = 0;
-    ldp(R0,  R1,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    ldp(R2,  R3,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    ldp(R4,  R5,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    ldp(R6,  R7,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    ldp(R8,  R9,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    ldp(R10, R11, Address(Rstack_top, offset)); offset += 2*wordSize;
-    ldp(R12, R13, Address(Rstack_top, offset)); offset += 2*wordSize;
-    ldp(R14, R15, Address(Rstack_top, offset)); offset += 2*wordSize;
-    ldp(R16, R17, Address(Rstack_top, offset)); offset += 2*wordSize;
-    ldp(R18, LR,  Address(Rstack_top, offset)); offset += 2*wordSize;
-    assert (offset == saved_regs_size, "should be");
-
-    add(Rstack_top, Rstack_top, saved_regs_size);
+    ldp(reg3, ZR, Address(Rstack_top, 2*wordSize, post_indexed));
+    ldp(reg1, reg2, Address(Rstack_top, 2*wordSize, post_indexed));
+#else
+    pop(RegisterSet(reg1) | RegisterSet(reg2));
+#endif
   }
-#else
-  pop(RegisterSet(R0, R3) | RegisterSet(R12) | RegisterSet(R14));
-#endif // AARCH64
 
   ldr(Rcounters, method_counters);
   cbz(Rcounters, skip); // No MethodCounters created, OutOfMemory
--- a/hotspot/src/cpu/arm/vm/interp_masm_arm.hpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/arm/vm/interp_masm_arm.hpp	Tue May 23 17:51:35 2017 +0200
@@ -53,9 +53,6 @@
   // Template interpreter specific version of call_VM_helper
   virtual void call_VM_helper(Register oop_result, address entry_point, int number_of_arguments, bool check_exceptions);
 
-  virtual void check_and_handle_popframe();
-  virtual void check_and_handle_earlyret();
-
   // base routine for all dispatches
   typedef enum { DispatchDefault, DispatchNormal } DispatchTableMode;
   void dispatch_base(TosState state, DispatchTableMode table_mode, bool verifyoop = true);
@@ -63,6 +60,9 @@
  public:
   InterpreterMacroAssembler(CodeBuffer* code);
 
+  virtual void check_and_handle_popframe();
+  virtual void check_and_handle_earlyret();
+
   // Interpreter-specific registers
 #if defined(AARCH64) && defined(ASSERT)
 
@@ -141,6 +141,9 @@
   // Load object from cpool->resolved_references(*bcp+1)
   void load_resolved_reference_at_index(Register result, Register tmp);
 
+  // load cpool->resolved_klass_at(index); Rtemp is corrupted upon return
+  void load_resolved_klass_at_offset(Register Rcpool, Register Rindex, Register Rklass);
+
   void store_check_part1(Register card_table_base);                // Sets card_table_base register.
   void store_check_part2(Register obj, Register card_table_base, Register tmp);
 
@@ -328,7 +331,13 @@
 
   void trace_state(const char* msg) PRODUCT_RETURN;
 
-  void get_method_counters(Register method, Register Rcounters, Label& skip);
+void get_method_counters(Register method,
+                         Register Rcounters,
+                         Label& skip,
+                         bool saveRegs = false,
+                         Register reg1 = noreg,
+                         Register reg2 = noreg,
+                         Register reg3 = noreg);
 };
 
 #endif // CPU_ARM_VM_INTERP_MASM_ARM_HPP
--- a/hotspot/src/cpu/arm/vm/macroAssembler_arm.hpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/arm/vm/macroAssembler_arm.hpp	Tue May 23 17:51:35 2017 +0200
@@ -206,6 +206,9 @@
   // may customize this version by overriding it for its purposes (e.g., to save/restore
   // additional registers when doing a VM call).
   virtual void call_VM_helper(Register oop_result, address entry_point, int number_of_arguments, bool check_exceptions);
+public:
+
+  MacroAssembler(CodeBuffer* code) : Assembler(code) {}
 
   // These routines should emit JVMTI PopFrame and ForceEarlyReturn handling code.
   // The implementation is only non-empty for the InterpreterMacroAssembler,
@@ -213,10 +216,6 @@
   virtual void check_and_handle_popframe() {}
   virtual void check_and_handle_earlyret() {}
 
-public:
-
-  MacroAssembler(CodeBuffer* code) : Assembler(code) {}
-
   // By default, we do not need relocation information for non
   // patchable absolute addresses. However, when needed by some
   // extensions, ignore_non_patchable_relocations can be modified,
--- a/hotspot/src/cpu/arm/vm/metaspaceShared_arm.cpp	Fri May 19 04:18:25 2017 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,99 +0,0 @@
-/*
- * Copyright (c) 2008, 2015, Oracle and/or its affiliates. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- *
- */
-
-#include "precompiled.hpp"
-#include "asm/macroAssembler.hpp"
-#include "assembler_arm.inline.hpp"
-#include "memory/metaspaceShared.hpp"
-
-// Generate the self-patching vtable method:
-//
-// This method will be called (as any other Klass virtual method) with
-// the Klass itself as the first argument.  Example:
-//
-//      oop obj;
-//      int size = obj->klass()->oop_size(this);
-//
-// for which the virtual method call is Klass::oop_size();
-//
-// The dummy method is called with the Klass object as the first
-// operand, and an object as the second argument.
-//
-
-//=====================================================================
-
-// All of the dummy methods in the vtable are essentially identical,
-// differing only by an ordinal constant, and they bear no relationship
-// to the original method which the caller intended. Also, there needs
-// to be 'vtbl_list_size' instances of the vtable in order to
-// differentiate between the 'vtable_list_size' original Klass objects.
-
-#define __ masm->
-
-void MetaspaceShared::generate_vtable_methods(void** vtbl_list,
-                                                   void** vtable,
-                                                   char** md_top,
-                                                   char* md_end,
-                                                   char** mc_top,
-                                                   char* mc_end) {
-  intptr_t vtable_bytes = (num_virtuals * vtbl_list_size) * sizeof(void*);
-  *(intptr_t *)(*md_top) = vtable_bytes;
-  *md_top += sizeof(intptr_t);
-  void** dummy_vtable = (void**)*md_top;
-  *vtable = dummy_vtable;
-  *md_top += vtable_bytes;
-
-  CodeBuffer cb((unsigned char*)*mc_top, mc_end - *mc_top);
-  MacroAssembler* masm = new MacroAssembler(&cb);
-
-  for (int i = 0; i < vtbl_list_size; ++i) {
-    Label common_code;
-    for (int j = 0; j < num_virtuals; ++j) {
-      dummy_vtable[num_virtuals * i + j] = (void*) __ pc();
-      __ mov(Rtemp, j);  // Rtemp contains an index of a virtual method in the table
-      __ b(common_code);
-    }
-
-    InlinedAddress vtable_address((address)&vtbl_list[i]);
-    __ bind(common_code);
-    const Register tmp2 = AARCH64_ONLY(Rtemp2) NOT_AARCH64(R4);
-    assert_different_registers(Rtemp, tmp2);
-#ifndef AARCH64
-    __ push(tmp2);
-#endif // !AARCH64
-    // Do not use ldr_global since the code must be portable across all ARM architectures
-    __ ldr_literal(tmp2, vtable_address);
-    __ ldr(tmp2, Address(tmp2));                              // get correct vtable address
-    __ ldr(Rtemp, Address::indexed_ptr(tmp2, Rtemp));         // get real method pointer
-    __ str(tmp2, Address(R0));                                // update vtable. R0 = "this"
-#ifndef AARCH64
-    __ pop(tmp2);
-#endif // !AARCH64
-    __ jump(Rtemp);
-    __ bind_literal(vtable_address);
-  }
-
-  __ flush();
-  *mc_top = (char*) __ pc();
-}
--- a/hotspot/src/cpu/arm/vm/methodHandles_arm.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/arm/vm/methodHandles_arm.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2017, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -67,7 +67,7 @@
                                  Register obj, Register temp1, Register temp2, SystemDictionary::WKID klass_id,
                                  const char* error_message) {
   InstanceKlass** klass_addr = SystemDictionary::well_known_klass_addr(klass_id);
-  KlassHandle klass = SystemDictionary::well_known_klass(klass_id);
+  Klass* klass = SystemDictionary::well_known_klass(klass_id);
   Label L_ok, L_bad;
   BLOCK_COMMENT("verify_klass {");
   __ verify_oop(obj);
--- a/hotspot/src/cpu/arm/vm/templateInterpreterGenerator_arm.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/arm/vm/templateInterpreterGenerator_arm.cpp	Tue May 23 17:51:35 2017 +0200
@@ -270,12 +270,6 @@
   return entry;
 }
 
-address TemplateInterpreterGenerator::generate_continuation_for(TosState state) {
-  // Not used.
-  STOP("generate_continuation_for");
-  return NULL;
-}
-
 address TemplateInterpreterGenerator::generate_return_entry_for(TosState state, int step, size_t index_size) {
   address entry = __ pc();
 
@@ -310,6 +304,9 @@
   __ convert_retval_to_tos(state);
 #endif // !AARCH64
 
+ __ check_and_handle_popframe();
+ __ check_and_handle_earlyret();
+
   __ dispatch_next(state, step);
 
   return entry;
@@ -1401,7 +1398,13 @@
 #ifdef AARCH64
   // setup RmaxStack
   __ ldrh(RmaxStack, Address(RconstMethod, ConstMethod::max_stack_offset()));
-  __ add(RmaxStack, RmaxStack, MAX2(1, Method::extra_stack_entries())); // reserve slots for exception handler and JSR292 appendix argument
+  // We have to add extra reserved slots to max_stack. There are 3 users of the extra slots,
+  // none of which are at the same time, so we just need to make sure there is enough room
+  // for the biggest user:
+  //   -reserved slot for exception handler
+  //   -reserved slots for JSR292. Method::extra_stack_entries() is the size.
+  //   -3 reserved slots so get_method_counters() can save some registers before call_VM().
+  __ add(RmaxStack, RmaxStack, MAX2(3, Method::extra_stack_entries()));
 #endif // AARCH64
 
   // see if we've got enough room on the stack for locals plus overhead.
--- a/hotspot/src/cpu/arm/vm/templateTable_arm.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/arm/vm/templateTable_arm.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2008, 2017, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -2286,13 +2286,18 @@
       }
       __ bind(no_mdo);
       // Increment backedge counter in MethodCounters*
-      __ get_method_counters(Rmethod, Rcounters, dispatch);
+      // Note Rbumped_taken_count is a callee saved registers for ARM32, but caller saved for ARM64
+      __ get_method_counters(Rmethod, Rcounters, dispatch, true /*saveRegs*/,
+                             Rdisp, R3_bytecode,
+                             AARCH64_ONLY(Rbumped_taken_count) NOT_AARCH64(noreg));
       const Address mask(Rcounters, in_bytes(MethodCounters::backedge_mask_offset()));
       __ increment_mask_and_jump(Address(Rcounters, be_offset), increment, mask,
                                  Rcnt, R4_tmp, eq, &backedge_counter_overflow);
     } else {
-      // increment counter
-      __ get_method_counters(Rmethod, Rcounters, dispatch);
+      // Increment backedge counter in MethodCounters*
+      __ get_method_counters(Rmethod, Rcounters, dispatch, true /*saveRegs*/,
+                             Rdisp, R3_bytecode,
+                             AARCH64_ONLY(Rbumped_taken_count) NOT_AARCH64(noreg));
       __ ldr_u32(Rtemp, Address(Rcounters, be_offset));           // load backedge counter
       __ add(Rtemp, Rtemp, InvocationCounter::count_increment);   // increment counter
       __ str_32(Rtemp, Address(Rcounters, be_offset));            // store counter
@@ -4367,10 +4372,9 @@
 #endif // AARCH64
 
   // get InstanceKlass
-  __ add(Rklass, Rcpool, AsmOperand(Rindex, lsl, LogBytesPerWord));
-  __ ldr(Rklass, Address(Rklass, sizeof(ConstantPool)));
   __ cmp(Rtemp, JVM_CONSTANT_Class);
   __ b(slow_case, ne);
+  __ load_resolved_klass_at_offset(Rcpool, Rindex, Rklass);
 
   // make sure klass is initialized & doesn't have finalizer
   // make sure klass is fully initialized
@@ -4642,8 +4646,7 @@
 
   // Get superklass in Rsuper and subklass in Rsub
   __ bind(quicked);
-  __ add(Rtemp, Rcpool, AsmOperand(Rindex, lsl, LogBytesPerWord));
-  __ ldr(Rsuper, Address(Rtemp, sizeof(ConstantPool)));
+  __ load_resolved_klass_at_offset(Rcpool, Rindex, Rsuper);
 
   __ bind(resolved);
   __ load_klass(Rsub, Robj);
@@ -4716,8 +4719,7 @@
 
   // Get superklass in Rsuper and subklass in Rsub
   __ bind(quicked);
-  __ add(Rtemp, Rcpool, AsmOperand(Rindex, lsl, LogBytesPerWord));
-  __ ldr(Rsuper, Address(Rtemp, sizeof(ConstantPool)));
+  __ load_resolved_klass_at_offset(Rcpool, Rindex, Rsuper);
 
   __ bind(resolved);
   __ load_klass(Rsub, Robj);
--- a/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2016 SAP SE. All rights reserved.
+ * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2017, SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -3177,9 +3177,8 @@
   assert_different_registers(val, crc, res);
 
   __ load_const_optimized(res, StubRoutines::crc_table_addr(), R0);
-  __ nand(crc, crc, crc); // ~crc
-  __ update_byte_crc32(crc, val, res);
-  __ nand(res, crc, crc); // ~crc
+  __ kernel_crc32_singleByteReg(crc, val, res, true);
+  __ mr(res, crc);
 }
 
 #undef __
--- a/hotspot/src/cpu/ppc/vm/c1_LIRGenerator_ppc.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/ppc/vm/c1_LIRGenerator_ppc.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
+ * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2017, SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -63,18 +63,6 @@
 }
 
 
-inline void load_int_as_long(LIR_List *ll, LIRItem &li, LIR_Opr dst) {
-  LIR_Opr r = li.value()->operand();
-  if (r->is_register()) {
-    LIR_Opr dst_l = FrameMap::as_long_opr(dst->as_register());
-    ll->convert(Bytecodes::_i2l, li.result(), dst_l); // Convert.
-  } else {
-    // Constants or memory get loaded with sign extend on this platform.
-    ll->move(li.result(), dst);
-  }
-}
-
-
 //--------------------------------------------------------------
 //               LIRGenerator
 //--------------------------------------------------------------
@@ -1426,10 +1414,9 @@
               arg2 = cc->at(1),
               arg3 = cc->at(2);
 
-      // CCallingConventionRequiresIntsAsLongs
       crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
       __ leal(LIR_OprFact::address(a), arg2);
-      load_int_as_long(gen()->lir(), len, arg3);
+      len.load_item_force(arg3); // We skip int->long conversion here, , because CRC32 stub expects int.
 
       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
       __ move(result_reg, result);
@@ -1441,6 +1428,76 @@
   }
 }
 
+void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
+  assert(UseCRC32CIntrinsics, "or should not be here");
+  LIR_Opr result = rlock_result(x);
+
+  switch (x->id()) {
+    case vmIntrinsics::_updateBytesCRC32C:
+    case vmIntrinsics::_updateDirectByteBufferCRC32C: {
+      bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
+
+      LIRItem crc(x->argument_at(0), this);
+      LIRItem buf(x->argument_at(1), this);
+      LIRItem off(x->argument_at(2), this);
+      LIRItem end(x->argument_at(3), this);
+      buf.load_item();
+      off.load_nonconstant();
+      end.load_nonconstant();
+
+      // len = end - off
+      LIR_Opr len  = end.result();
+      LIR_Opr tmpA = new_register(T_INT);
+      LIR_Opr tmpB = new_register(T_INT);
+      __ move(end.result(), tmpA);
+      __ move(off.result(), tmpB);
+      __ sub(tmpA, tmpB, tmpA);
+      len = tmpA;
+
+      LIR_Opr index = off.result();
+      int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
+      if (off.result()->is_constant()) {
+        index = LIR_OprFact::illegalOpr;
+        offset += off.result()->as_jint();
+      }
+      LIR_Opr base_op = buf.result();
+      LIR_Address* a = NULL;
+
+      if (index->is_valid()) {
+        LIR_Opr tmp = new_register(T_LONG);
+        __ convert(Bytecodes::_i2l, index, tmp);
+        index = tmp;
+        __ add(index, LIR_OprFact::intptrConst(offset), index);
+        a = new LIR_Address(base_op, index, T_BYTE);
+      } else {
+        a = new LIR_Address(base_op, offset, T_BYTE);
+      }
+
+      BasicTypeList signature(3);
+      signature.append(T_INT);
+      signature.append(T_ADDRESS);
+      signature.append(T_INT);
+      CallingConvention* cc = frame_map()->c_calling_convention(&signature);
+      const LIR_Opr result_reg = result_register_for(x->type());
+
+      LIR_Opr arg1 = cc->at(0),
+              arg2 = cc->at(1),
+              arg3 = cc->at(2);
+
+      crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
+      __ leal(LIR_OprFact::address(a), arg2);
+      __ move(len, cc->at(2));   // We skip int->long conversion here, because CRC32C stub expects int.
+
+      __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
+      __ move(result_reg, result);
+      break;
+    }
+    default: {
+      ShouldNotReachHere();
+    }
+  }
+}
+
 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
   assert(x->number_of_arguments() == 3, "wrong type");
   assert(UseFMA, "Needs FMA instructions support.");
@@ -1467,7 +1524,3 @@
 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
   fatal("vectorizedMismatch intrinsic is not implemented on this platform");
 }
-
-void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
-  Unimplemented();
-}
--- a/hotspot/src/cpu/ppc/vm/interp_masm_ppc.hpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/ppc/vm/interp_masm_ppc.hpp	Tue May 23 17:51:35 2017 +0200
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2002, 2016, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2016 SAP SE. All rights reserved.
+ * Copyright (c) 2002, 2017, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2017 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -45,8 +45,8 @@
 #define thread_(field_name) in_bytes(JavaThread::field_name ## _offset()), R16_thread
 #define method_(field_name) in_bytes(Method::field_name ## _offset()), R19_method
 
-  virtual void check_and_handle_popframe(Register java_thread);
-  virtual void check_and_handle_earlyret(Register java_thread);
+  virtual void check_and_handle_popframe(Register scratch_reg);
+  virtual void check_and_handle_earlyret(Register scratch_reg);
 
   // Base routine for all dispatches.
   void dispatch_base(TosState state, address* table);
@@ -79,6 +79,9 @@
   // Load object from cpool->resolved_references(index).
   void load_resolved_reference_at_index(Register result, Register index, Label *is_null = NULL);
 
+  // load cpool->resolved_klass_at(index)
+  void load_resolved_klass_at_offset(Register Rcpool, Register Roffset, Register Rklass);
+
   void load_receiver(Register Rparam_count, Register Rrecv_dst);
 
   // helpers for expression stack
--- a/hotspot/src/cpu/ppc/vm/interp_masm_ppc_64.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/ppc/vm/interp_masm_ppc_64.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2016 SAP SE. All rights reserved.
+ * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2017 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -454,7 +454,8 @@
   Register tmp = index;  // reuse
   sldi(tmp, index, LogBytesPerHeapOop);
   // Load pointer for resolved_references[] objArray.
-  ld(result, ConstantPool::resolved_references_offset_in_bytes(), result);
+  ld(result, ConstantPool::cache_offset_in_bytes(), result);
+  ld(result, ConstantPoolCache::resolved_references_offset_in_bytes(), result);
   // JNIHandles::resolve(result)
   ld(result, 0, result);
 #ifdef ASSERT
@@ -471,6 +472,25 @@
   load_heap_oop(result, arrayOopDesc::base_offset_in_bytes(T_OBJECT), result, is_null);
 }
 
+// load cpool->resolved_klass_at(index)
+void InterpreterMacroAssembler::load_resolved_klass_at_offset(Register Rcpool, Register Roffset, Register Rklass) {
+  // int value = *(Rcpool->int_at_addr(which));
+  // int resolved_klass_index = extract_low_short_from_int(value);
+  add(Roffset, Rcpool, Roffset);
+#if defined(VM_LITTLE_ENDIAN)
+  lhz(Roffset, sizeof(ConstantPool), Roffset);     // Roffset = resolved_klass_index
+#else
+  lhz(Roffset, sizeof(ConstantPool) + 2, Roffset); // Roffset = resolved_klass_index
+#endif
+
+  ld(Rklass, ConstantPool::resolved_klasses_offset_in_bytes(), Rcpool); // Rklass = Rcpool->_resolved_klasses
+
+  sldi(Roffset, Roffset, LogBytesPerWord);
+  addi(Roffset, Roffset, Array<Klass*>::base_offset_in_bytes());
+  isync(); // Order load of instance Klass wrt. tags.
+  ldx(Rklass, Rklass, Roffset);
+}
+
 // Generate a subtype check: branch to ok_is_subtype if sub_klass is
 // a subtype of super_klass. Blows registers Rsub_klass, tmp1, tmp2.
 void InterpreterMacroAssembler::gen_subtype_check(Register Rsub_klass, Register Rsuper_klass, Register Rtmp1,
--- a/hotspot/src/cpu/ppc/vm/macroAssembler_ppc.cpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/ppc/vm/macroAssembler_ppc.cpp	Tue May 23 17:51:35 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2017 SAP SE. All rights reserved.
+ * Copyright (c) 2012, 2017, SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -4120,7 +4120,7 @@
  * @param table register pointing to CRC table
  */
 void MacroAssembler::update_byteLoop_crc32(Register crc, Register buf, Register len, Register table,
-                                           Register data, bool loopAlignment, bool invertCRC) {
+                                           Register data, bool loopAlignment) {
   assert_different_registers(crc, buf, len, table, data);
 
   Label L_mainLoop, L_done;
@@ -4131,10 +4131,6 @@
   clrldi_(len, len, 32);                         // Enforce 32 bit. Anything to do?
   beq(CCR0, L_done);
 
-  if (invertCRC) {
-    nand(crc, crc, crc);                         // ~c
-  }
-
   mtctr(len);
   align(mainLoop_alignment);
   BIND(L_mainLoop);
@@ -4143,10 +4139,6 @@
     update_byte_crc32(crc, data, table);
     bdnz(L_mainLoop);                            // Iterate.
 
-  if (invertCRC) {
-    nand(crc, crc, crc);                         // ~c
-  }
-
   bind(L_done);
 }
 
@@ -4203,7 +4195,8 @@
  */
 void MacroAssembler::kernel_crc32_2word(Register crc, Register buf, Register len, Register table,
                                         Register t0,  Register t1,  Register t2,  Register t3,
-                                        Register tc0, Register tc1, Register tc2, Register tc3) {
+                                        Register tc0, Register tc1, Register tc2, Register tc3,
+                                        bool invertCRC) {
   assert_different_registers(crc, buf, len, table);
 
   Label L_mainLoop, L_tail;
@@ -4217,14 +4210,16 @@
   const int complexThreshold   = 2*mainLoop_stepping;
 
   // Don't test for len <= 0 here. This pathological case should not occur anyway.
-  // Optimizing for it by adding a test and a branch seems to be a waste of CPU cycles.
-  // The situation itself is detected and handled correctly by the conditional branches
-  // following  aghi(len, -stepping) and aghi(len, +stepping).
+  // Optimizing for it by adding a test and a branch seems to be a waste of CPU cycles
+  // for all well-behaved cases. The situation itself is detected and handled correctly
+  // within update_byteLoop_crc32.
   assert(tailLoop_stepping == 1, "check tailLoop_stepping!");
 
   BLOCK_COMMENT("kernel_crc32_2word {");
 
-  nand(crc, crc, crc);                           // ~c
+  if (invertCRC) {
+    nand(crc, crc, crc);                      // 1s complement of crc
+  }
 
   // Check for short (<mainLoop_stepping) buffer.
   cmpdi(CCR0, len, complexThreshold);
@@ -4245,7 +4240,7 @@
       blt(CCR0, L_tail);                         // For less than one mainloop_stepping left, do only tail processing
       mr(len, tmp);                              // remaining bytes for main loop (>=mainLoop_stepping is guaranteed).
     }
-    update_byteLoop_crc32(crc, buf, tmp2, table, data, false, false);
+    update_byteLoop_crc32(crc, buf, tmp2, table, data, false);
   }
 
   srdi(tmp2, len, log_stepping);                 // #iterations for mainLoop
@@ -4281,9 +4276,11 @@
 
   // Process last few (<complexThreshold) bytes of buffer.
   BIND(L_tail);
-  update_byteLoop_crc32(crc, buf, len, table, data, false, false);
-
-  nand(crc, crc, crc);                           // ~c
+  update_byteLoop_crc32(crc, buf, len, table, data, false);
+
+  if (invertCRC) {
+    nand(crc, crc, crc);                      // 1s complement of crc
+  }
   BLOCK_COMMENT("} kernel_crc32_2word");
 }
 
@@ -4297,7 +4294,8 @@
  */
 void MacroAssembler::kernel_crc32_1word(Register crc, Register buf, Register len, Register table,
                                         Register t0,  Register t1,  Register t2,  Register t3,
-                                        Register tc0, Register tc1, Register tc2, Register tc3) {
+                                        Register tc0, Register tc1, Register tc2, Register tc3,
+                                        bool invertCRC) {
   assert_different_registers(crc, buf, len, table);
 
   Label L_mainLoop, L_tail;
@@ -4311,14 +4309,16 @@
   const int complexThreshold   = 2*mainLoop_stepping;
 
   // Don't test for len <= 0 here. This pathological case should not occur anyway.
-  // Optimizing for it by adding a test and a branch seems to be a waste of CPU cycles.
-  // The situation itself is detected and handled correctly by the conditional branches
-  // following  aghi(len, -stepping) and aghi(len, +stepping).
+  // Optimizing for it by adding a test and a branch seems to be a waste of CPU cycles
+  // for all well-behaved cases. The situation itself is detected and handled correctly
+  // within update_byteLoop_crc32.
   assert(tailLoop_stepping == 1, "check tailLoop_stepping!");
 
   BLOCK_COMMENT("kernel_crc32_1word {");
 
-  nand(crc, crc, crc);                           // ~c
+  if (invertCRC) {
+    nand(crc, crc, crc);                      // 1s complement of crc
+  }
 
   // Check for short (<mainLoop_stepping) buffer.
   cmpdi(CCR0, len, complexThreshold);
@@ -4339,7 +4339,7 @@
       blt(CCR0, L_tail);                         // For less than one mainloop_stepping left, do only tail processing
       mr(len, tmp);                              // remaining bytes for main loop (>=mainLoop_stepping is guaranteed).
     }
-    update_byteLoop_crc32(crc, buf, tmp2, table, data, false, false);
+    update_byteLoop_crc32(crc, buf, tmp2, table, data, false);
   }
 
   srdi(tmp2, len, log_stepping);                 // #iterations for mainLoop
@@ -4374,9 +4374,11 @@
 
   // Process last few (<complexThreshold) bytes of buffer.
   BIND(L_tail);
-  update_byteLoop_crc32(crc, buf, len, table, data, false, false);
-
-  nand(crc, crc, crc);                           // ~c
+  update_byteLoop_crc32(crc, buf, len, table, data, false);
+
+  if (invertCRC) {
+    nand(crc, crc, crc);                      // 1s complement of crc
+  }
   BLOCK_COMMENT("} kernel_crc32_1word");
 }
 
@@ -4389,16 +4391,24 @@
  * Uses R7_ARG5, R8_ARG6 as work registers.
  */
 void MacroAssembler::kernel_crc32_1byte(Register crc, Register buf, Register len, Register table,
-                                        Register t0,  Register t1,  Register t2,  Register t3) {
+                                        Register t0,  Register t1,  Register t2,  Register t3,
+                                        bool invertCRC) {
   assert_different_registers(crc, buf, len, table);
 
   Register  data = t0;                   // Holds the current byte to be folded into crc.
 
   BLOCK_COMMENT("kernel_crc32_1byte {");
 
+  if (invertCRC) {
+    nand(crc, crc, crc);                      // 1s complement of crc
+  }
+
   // Process all bytes in a single-byte loop.
-  update_byteLoop_crc32(crc, buf, len, table, data, true, true);
-
+  update_byteLoop_crc32(crc, buf, len, table, data, true);
+
+  if (invertCRC) {
+    nand(crc, crc, crc);                      // 1s complement of crc
+  }
   BLOCK_COMMENT("} kernel_crc32_1byte");
 }
 
@@ -4416,7 +4426,8 @@
  */
 void MacroAssembler::kernel_crc32_1word_vpmsumd(Register crc, Register buf, Register len, Register table,
                                                 Register constants,  Register barretConstants,
-                                                Register t0,  Register t1, Register t2, Register t3, Register t4) {
+                                                Register t0,  Register t1, Register t2, Register t3, Register t4,
+                                                bool invertCRC) {
   assert_different_registers(crc, buf, len, table);
 
   Label L_alignedHead, L_tail, L_alignTail, L_start, L_end;
@@ -4434,13 +4445,15 @@
     Register tc0 = t4;
     Register tc1 = constants;
     Register tc2 = barretConstants;
-    kernel_crc32_1word(crc, buf, len, table,t0, t1, t2, t3, tc0, tc1, tc2, table);
+    kernel_crc32_1word(crc, buf, len, table,t0, t1, t2, t3, tc0, tc1, tc2, table, invertCRC);
     b(L_end);
 
   BIND(L_start);
 
     // 2. ~c
-    nand(crc, crc, crc);
+    if (invertCRC) {
+      nand(crc, crc, crc);                      // 1s complement of crc
+    }
 
     // 3. calculate from 0 to first 128bit-aligned address
     clrldi_(prealign, buf, 57);
@@ -4449,7 +4462,7 @@
     subfic(prealign, prealign, 128);
 
     subf(len, prealign, len);
-    update_byteLoop_crc32(crc, buf, prealign, table, t2, false, false);
+    update_byteLoop_crc32(crc, buf, prealign, table, t2, false);
 
     // 4. calculate from first 128bit-aligned address to last 128bit-aligned address
     BIND(L_alignedHead);
@@ -4464,12 +4477,14 @@
     cmpdi(CCR0, postalign, 0);
     beq(CCR0, L_tail);
 
-    update_byteLoop_crc32(crc, buf, postalign, table, t2, false, false);
+    update_byteLoop_crc32(crc, buf, postalign, table, t2, false);
 
     BIND(L_tail);
 
     // 6. ~c
-    nand(crc, crc, crc);
+    if (invertCRC) {
+      nand(crc, crc, crc);                      // 1s complement of crc
+    }
 
   BIND(L_end);
 
@@ -4961,16 +4976,35 @@
   offsetInt -= 8;  ld(R31, offsetInt, R1_SP);
 }
 
-void MacroAssembler::kernel_crc32_singleByte(Register crc, Register buf, Register len, Register table, Register tmp) {
+void MacroAssembler::kernel_crc32_singleByte(Register crc, Register buf, Register len, Register table, Register tmp, bool invertCRC) {
   assert_different_registers(crc, buf, /* len,  not used!! */ table, tmp);
 
   BLOCK_COMMENT("kernel_crc32_singleByte:");
-  nand(crc, crc, crc);       // ~c
-
-  lbz(tmp, 0, buf);          // Byte from buffer, zero-extended.
+  if (invertCRC) {
+    nand(crc, crc, crc);                // 1s complement of crc
+  }
+
+  lbz(tmp, 0, buf);                     // Byte from buffer, zero-extended.
   update_byte_crc32(crc, tmp, table);
 
-  nand(crc, crc, crc);       // ~c
+  if (invertCRC) {
+    nand(crc, crc, crc);                // 1s complement of crc
+  }
+}
+
+void MacroAssembler::kernel_crc32_singleByteReg(Register crc, Register val, Register table, bool invertCRC) {
+  assert_different_registers(crc, val, table);
+
+  BLOCK_COMMENT("kernel_crc32_singleByteReg:");
+  if (invertCRC) {
+    nand(crc, crc, crc);                // 1s complement of crc
+  }
+
+  update_byte_crc32(crc, val, table);
+
+  if (invertCRC) {
+    nand(crc, crc, crc);                // 1s complement of crc
+  }
 }
 
 // dest_lo += src1 + src2
--- a/hotspot/src/cpu/ppc/vm/macroAssembler_ppc.hpp	Fri May 19 04:18:25 2017 +0000
+++ b/hotspot/src/cpu/ppc/vm/macroAssembler_ppc.hpp	Tue May 23 17:51:35 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2017, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2017 SAP SE. All rights reserved.
+ * Copyright (c) 2012, 2017, SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -819,33 +819,47 @@
                        Register tmp6, Register tmp7, Register tmp8, Register tmp9, Register tmp10,
                        Register tmp11, Register tmp12, Register tmp13);
 
-  // CRC32 Intrinsics.
+  // Emitters for CRC32 calculation.
+  // A note on invertCRC:
+  //   Unfortunately, internal representation of crc differs between CRC32 and CRC32C.
+  //   CRC32 holds it's current crc value in the externally visible representation.
+  //   CRC32C holds it's current crc value in internal format, ready for updating.
+  //   Thus, the crc value must be bit-flipped before updating it in the CRC32 case.
+  //   In the CRC32C case, it must be bit-flipped when it is given to the outside world (getValue()).
+  //   The bool invertCRC parameter indicates whether bit-flipping is required before updates.
   void load_reverse_32(Register dst, Register src);
   int  crc32_table_columns(Register table, Register tc0, Register tc1, Register tc2, Register tc3);
   void fold_byte_crc32(Register crc, Register val, Register table, Register tmp);
   void fold_8bit_crc32(Register crc, Register table, Register tmp);
   void update_byte_crc32(Register crc, Register val, Register table);
   void update_byteLoop_crc32(Register crc, Register buf, Register len, Register table,
-                             Register data, bool loopAlignment, bool invertCRC);
+                             Register data, bool loopAlignment);
   void update_1word_crc32(Register crc, Register buf, Register table, int bufDisp, int bufInc,
                           Register t0,  Register t1,  Register t2,  Register t3,
                           Register tc0, Register tc1, Register tc2, Register tc3);
   void kernel_crc32_2word(Register crc, Register buf, Register len, Register table,
                           Register t0,  Register t1,  Register t2,  Register t3,
-                          Register tc0, Register tc1, Register tc2, Register tc3);
+                          Register tc0, Register tc1, Register tc2, Register tc3,
+                          bool invertCRC);
   void kernel_crc32_1word(Register crc, Register buf, Register len, Register table,
                           Register t0,  Register t1,  Register t2,  Register t3,
-                          Register tc0, Register tc1, Register tc2, Register tc3);
+                          Register tc0, Register tc1, Register tc2, Register tc3,
+                          bool invertCRC);
   void kernel_crc32_1byte(Register crc, Register buf, Register len, Register table,
-                          Register t0,  Register t1,  Register t2,  Register t3);
+                          Register t0,  Register t1,  Register t2,  Register t3,
+                          bool invertCRC);
   void kernel_crc32_1word_vpmsumd(Register crc, Register buf, Register len, Register table,
                           Register constants, Register barretConstants,
-                          Register t0,  Register t1, Register t2, Register t3, Register t4);
+                          Register t0,  Register t1, Register t2, Register t3, Register t4,
+                          bool invertCRC);
   void kernel_crc32_1word_aligned(Register crc, Register buf, Register len,
                           Register constants, Register barretConstants,
                           Register t0, Register t1, Register t2);
 
-  void kernel_crc32_singleByte(Register crc, Register buf, Register len, Register table, Register tmp);
+  void kernel_crc32_singleByte(Register crc, Register buf, Register len, Register table, Register tmp,
+                               bool invertCRC);
+  void kernel_crc32_singleByteReg(Register crc, Register val, Register table,
+                                  bool invertCRC);
 
   //
   // Debugging
--- a/hotspot/src/cpu/ppc/vm/metaspaceShared_ppc.cpp	Fri May 19 04:18:25 2017 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,78 +0,0 @@
-/*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FI