changeset 55025:8323fdac6da5

8218767: ZGC: Do not assume that r12 is a special register in C2 Reviewed-by: eosterlund, rkennke
author pliden
date Wed, 20 Feb 2019 13:43:28 +0100
parents b38d76fc4835
children 1807da9ad196
files src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp src/hotspot/cpu/x86/gc/z/z_x86_64.ad src/hotspot/cpu/x86/x86_64.ad
diffstat 3 files changed, 3 insertions(+), 4 deletions(-) [+]
line wrap: on
line diff
--- a/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp	Wed Feb 20 13:43:02 2019 +0100
+++ b/src/hotspot/cpu/x86/gc/z/zBarrierSetAssembler_x86.cpp	Wed Feb 20 13:43:28 2019 +0100
@@ -359,7 +359,7 @@
 // ZBarrierSetRuntime::load_barrier_on_weak_oop_field_preloaded().
 static address generate_load_barrier_stub(StubCodeGenerator* cgen, Register raddr, DecoratorSet decorators) {
   // Don't generate stub for invalid registers
-  if (raddr == rsp || raddr == r12 || raddr == r15) {
+  if (raddr == rsp || raddr == r15) {
     return NULL;
   }
 
--- a/src/hotspot/cpu/x86/gc/z/z_x86_64.ad	Wed Feb 20 13:43:02 2019 +0100
+++ b/src/hotspot/cpu/x86/gc/z/z_x86_64.ad	Wed Feb 20 13:43:28 2019 +0100
@@ -26,9 +26,8 @@
 #include "gc/z/zBarrierSetAssembler.hpp"
 
 static void z_load_barrier_slow_reg(MacroAssembler& _masm, Register dst, Address src, bool weak) {
-  assert(dst != r12, "Invalid register");
+  assert(dst != rsp, "Invalid register");
   assert(dst != r15, "Invalid register");
-  assert(dst != rsp, "Invalid register");
 
   const address stub = weak ? ZBarrierSet::assembler()->load_barrier_weak_slow_stub(dst)
                             : ZBarrierSet::assembler()->load_barrier_slow_stub(dst);
--- a/src/hotspot/cpu/x86/x86_64.ad	Wed Feb 20 13:43:02 2019 +0100
+++ b/src/hotspot/cpu/x86/x86_64.ad	Wed Feb 20 13:43:28 2019 +0100
@@ -354,7 +354,7 @@
 RegMask _STACK_OR_INT_REG_mask;
 
 static bool need_r12_heapbase() {
-  return UseCompressedOops || UseCompressedClassPointers || UseZGC;
+  return UseCompressedOops || UseCompressedClassPointers;
 }
 
 void reg_mask_init() {