changeset 45966:b2019823b5bd

8181420: PPC: Image conversion improvements Reviewed-by: thartmann, simonis, mbaesken
author mdoerr
date Thu, 01 Jun 2017 12:20:37 +0200
parents e29c1363af9a
children ee148c113ae0
files hotspot/src/cpu/ppc/vm/ppc.ad hotspot/src/cpu/s390/vm/s390.ad
diffstat 2 files changed, 41 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- a/hotspot/src/cpu/ppc/vm/ppc.ad	Thu Mar 23 15:14:18 2017 +0100
+++ b/hotspot/src/cpu/ppc/vm/ppc.ad	Thu Jun 01 12:20:37 2017 +0200
@@ -11048,6 +11048,29 @@
   ins_pipe(pipe_class_compare);
 %}
 
+// Added CmpUL for LoopPredicate.
+instruct cmpUL_reg_reg(flagsReg crx, iRegLsrc src1, iRegLsrc src2) %{
+  match(Set crx (CmpUL src1 src2));
+  format %{ "CMPLD   $crx, $src1, $src2" %}
+  size(4);
+  ins_encode %{
+    // TODO: PPC port $archOpcode(ppc64Opcode_cmpl);
+    __ cmpld($crx$$CondRegister, $src1$$Register, $src2$$Register);
+  %}
+  ins_pipe(pipe_class_compare);
+%}
+
+instruct cmpUL_reg_imm16(flagsReg crx, iRegLsrc src1, uimmL16 src2) %{
+  match(Set crx (CmpUL src1 src2));
+  format %{ "CMPLDI  $crx, $src1, $src2" %}
+  size(4);
+  ins_encode %{
+    // TODO: PPC port $archOpcode(ppc64Opcode_cmpli);
+    __ cmpldi($crx$$CondRegister, $src1$$Register, $src2$$constant);
+  %}
+  ins_pipe(pipe_class_compare);
+%}
+
 instruct testL_reg_reg(flagsRegCR0 cr0, iRegLsrc src1, iRegLsrc src2, immL_0 zero) %{
   match(Set cr0 (CmpL (AndL src1 src2) zero));
   // r0 is killed
--- a/hotspot/src/cpu/s390/vm/s390.ad	Thu Mar 23 15:14:18 2017 +0100
+++ b/hotspot/src/cpu/s390/vm/s390.ad	Thu Jun 01 12:20:37 2017 +0200
@@ -8475,6 +8475,24 @@
 %}
 
 //  LONG unsigned
+// Added CmpUL for LoopPredicate.
+instruct compUL_reg_reg(flagsReg cr, iRegL op1, iRegL op2) %{
+  match(Set cr (CmpUL op1 op2));
+  size(4);
+  format %{ "CLGR    $op1,$op2\t # long" %}
+  opcode(CLGR_ZOPC);
+  ins_encode(z_rreform(op1, op2));
+  ins_pipe(pipe_class_dummy);
+%}
+
+instruct compUL_reg_imm32(flagsReg cr, iRegL op1, uimmL32 con) %{
+  match(Set cr (CmpUL op1 con));
+  size(6);
+  format %{ "CLGFI   $op1,$con" %}
+  opcode(CLGFI_ZOPC);
+  ins_encode(z_rilform_unsigned(op1, con));
+  ins_pipe(pipe_class_dummy);
+%}
 
 //  PTR unsigned