changeset 52499:cc0e590e669b enhanced-enums

Automatic merge with default
author mcimadamore
date Thu, 13 Sep 2018 22:05:54 +0200
parents a8c68a18cec1 506e9b592f7b
children 88a2df282d09
files make/jdk/src/classes/build/tools/hasher/Hasher.java make/jdk/src/classes/build/tools/jarreorder/JarReorder.java make/mapfiles/libjsig/mapfile-vers-solaris make/mapfiles/libjsound/mapfile-vers make/mapfiles/libjvm_db/mapfile-vers make/mapfiles/libjvm_dtrace/mapfile-vers src/hotspot/share/utilities/globalDefinitions_sparcWorks.hpp src/java.desktop/windows/native/common/awt_makecube.cpp test/hotspot/jtreg/vmTestbase/nsk/share/test/timeoutwatchdog/TimeoutHandler.java test/hotspot/jtreg/vmTestbase/nsk/share/test/timeoutwatchdog/TimeoutWatchdog.java test/hotspot/jtreg/vmTestbase/vm/share/gc/TriggerUnloadingByFillingHeap.java test/hotspot/jtreg/vmTestbase/vm/share/vmstresser/CompileAndDeoptimize.java test/hotspot/jtreg/vmTestbase/vm/share/vmstresser/MetaspaceStresser.java test/jdk/com/sun/jdi/GetLocalVariables4Test.sh test/jdk/com/sun/jdi/JdbArgTest.sh test/jdk/com/sun/jdi/JdbLockTest.sh test/jdk/com/sun/jdi/JdbMissStep.sh test/jdk/com/sun/jdi/JdbVarargsTest.sh test/jdk/com/sun/jdi/MixedSuspendTest.sh test/jdk/com/sun/jdi/NotAField.sh test/jdk/com/sun/jdi/NullLocalVariable.sh test/jdk/com/sun/jdi/Redefine-g.sh test/jdk/com/sun/jdi/RedefineAbstractClass.sh test/jdk/com/sun/jdi/RedefineAddPrivateMethod.sh test/jdk/com/sun/jdi/RedefineAnnotation.sh test/jdk/com/sun/jdi/RedefineChangeClassOrder.sh test/jdk/com/sun/jdi/RedefineClasses.sh test/jdk/com/sun/jdi/RedefineClearBreakpoint.sh test/jdk/com/sun/jdi/RedefineImplementor.sh test/jdk/java/util/zip/ZipFile/deletetempjar.sh test/jdk/javax/naming/module/basic.sh test/jdk/jdk/internal/reflect/Reflection/GetCallerClassTest.sh test/jdk/lib/testlibrary/jdk/testlibrary/JDKToolFinder.java test/jdk/lib/testlibrary/jdk/testlibrary/JDKToolLauncher.java test/jdk/lib/testlibrary/jdk/testlibrary/OSInfo.java test/jdk/lib/testlibrary/jdk/testlibrary/OutputAnalyzer.java test/jdk/lib/testlibrary/jdk/testlibrary/OutputBuffer.java test/jdk/lib/testlibrary/jdk/testlibrary/ProcessTools.java test/jdk/lib/testlibrary/jdk/testlibrary/StreamPumper.java
diffstat 898 files changed, 12661 insertions(+), 16260 deletions(-) [+]
line wrap: on
line diff
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/.gitignore	Thu Sep 13 22:05:54 2018 +0200
@@ -0,0 +1,15 @@
+/build/
+/dist/
+/.idea/
+nbproject/private/
+/webrev
+/.src-rev
+/.jib/
+.DS_Store
+.metadata/
+.recommenders/
+test/nashorn/script/external
+test/nashorn/lib
+NashornProfile.txt
+**/JTreport/**
+**/JTwork/**
--- a/.hgtags	Thu Aug 30 22:06:18 2018 +0200
+++ b/.hgtags	Thu Sep 13 22:05:54 2018 +0200
@@ -510,3 +510,5 @@
 76072a077ee1d815152d45d1692c4b36c53c5c49 jdk-11+28
 492b366f8e5784cc4927c2c98f9b8a3f16c067eb jdk-12+8
 31b159f30fb281016c5f0c103552809aeda84063 jdk-12+9
+8f594f75e0547d4ca16649cb3501659e3155e81b jdk-12+10
+f0f5d23449d31f1b3580c8a73313918cafeaefd7 jdk-12+11
--- a/bin/idea.sh	Thu Aug 30 22:06:18 2018 +0200
+++ b/bin/idea.sh	Thu Sep 13 22:05:54 2018 +0200
@@ -49,7 +49,7 @@
       ;;
 
     -o | --output )
-      IDEA_OUTPUT=$2
+      IDEA_OUTPUT=$2/.idea
       shift
       ;;
 
@@ -64,28 +64,25 @@
   shift
 done
 
-mkdir $IDEA_OUTPUT || exit 1
+mkdir -p $IDEA_OUTPUT || exit 1
 cd $IDEA_OUTPUT; IDEA_OUTPUT=`pwd`
 
+if [ "x$TOPLEVEL_DIR" = "x" ] ; then
+    cd $SCRIPT_DIR/..
+    TOPLEVEL_DIR=`pwd`
+    cd $IDEA_OUTPUT
+fi
+
 MAKE_DIR="$SCRIPT_DIR/../make"
 IDEA_MAKE="$MAKE_DIR/idea"
 IDEA_TEMPLATE="$IDEA_MAKE/template"
 
 cp -r "$IDEA_TEMPLATE"/* "$IDEA_OUTPUT"
 
-#init template variables
-for file in `ls -p $IDEA_TEMPLATE | grep -v /`; do
-	VAR_SUFFIX=`echo $file | cut -d'.' -f1 | tr [:lower:] [:upper:]`
-    eval "$VAR_SUFFIX"_TEMPLATE="$IDEA_TEMPLATE"/$file
-	eval IDEA_"$VAR_SUFFIX"="$IDEA_OUTPUT"/$file
-done
-
-#override template variables
+#override template
 if [ -d "$TEMPLATES_OVERRIDE" ] ; then
     for file in `ls -p "$TEMPLATES_OVERRIDE" | grep -v /`; do
         cp "$TEMPLATES_OVERRIDE"/$file "$IDEA_OUTPUT"/
-    	VAR_SUFFIX=`echo $file | cut -d'.' -f1 | tr [:lower:] [:upper:]`
-        eval "$VAR_SUFFIX"_TEMPLATE="$TEMPLATES_OVERRIDE"/$file
     done
 fi
 
@@ -94,14 +91,6 @@
   echo "idea template dir: $IDEA_TEMPLATE"
 fi
 
-if [ ! -f "$JDK_TEMPLATE" ] ; then
-  echo "FATAL: cannot find $JDK_TEMPLATE" >&2; exit 1
-fi
-
-if [ ! -f "$ANT_TEMPLATE" ] ; then
-  echo "FATAL: cannot find $ANT_TEMPLATE" >&2; exit 1
-fi
-
 cd $TOP ; make -f "$IDEA_MAKE/idea.gmk" -I $MAKE_DIR/.. idea MAKEOVERRIDES= OUT=$IDEA_OUTPUT/env.cfg MODULES="$*" || exit 1
 cd $SCRIPT_DIR
 
@@ -124,94 +113,46 @@
   echo "FATAL: SPEC is empty" >&2; exit 1
 fi
 
-SOURCE_FOLDER="      <sourceFolder url=\"file://\$MODULE_DIR\$/####\" isTestSource=\"false\" />"
-SOURCE_FOLDERS_DONE="false"
+### Replace template variables
 
-addSourceFolder() {
-  root=$@
-  relativePath="`echo "$root" | sed -e s@"$TOP/\(.*$\)"@"\1"@`"
-  folder="`echo "$SOURCE_FOLDER" | sed -e s@"\(.*/\)####\(.*\)"@"\1$relativePath\2"@`"
-  printf "%s\n" "$folder" >> $IDEA_JDK
+NUM_REPLACEMENTS=0
+
+replace_template_file() {
+    for i in $(seq 1 $NUM_REPLACEMENTS); do
+      eval "sed \"s|\${FROM${i}}|\${TO${i}}|g\" $1 > $1.tmp"
+      mv $1.tmp $1
+    done
 }
 
-### Generate project iml
-
-rm -f $IDEA_JDK
-while IFS= read -r line
-do
-  if echo "$line" | egrep "^ .* <sourceFolder.*####" > /dev/null ; then
-    if [ "$SOURCE_FOLDERS_DONE" = "false" ] ; then
-      SOURCE_FOLDERS_DONE="true"
-      for root in $MODULE_ROOTS; do
-         addSourceFolder $root
-      done
-    fi
-  else
-    printf "%s\n" "$line" >> $IDEA_JDK
-  fi
-done < "$JDK_TEMPLATE"
-
-
-MODULE_NAME="        <property name=\"module.name\" value=\"####\" />"
-
-addModuleName() {
-  mn="`echo "$MODULE_NAME" | sed -e s@"\(.*\)####\(.*\)"@"\1$MODULE_NAMES\2"@`"
-  printf "%s\n" "$mn" >> $IDEA_ANT
+replace_template_dir() {
+    for f in `find $1 -type f` ; do
+        replace_template_file $f
+    done
 }
 
-BUILD_DIR="        <property name=\"build.target.dir\" value=\"####\" />"
-
-addBuildDir() {
-  DIR=`dirname $SPEC`
-  mn="`echo "$BUILD_DIR" | sed -e s@"\(.*\)####\(.*\)"@"\1$DIR\2"@`"
-  printf "%s\n" "$mn" >> $IDEA_ANT
+add_replacement() {
+    NUM_REPLACEMENTS=`expr $NUM_REPLACEMENTS + 1`
+    eval FROM$NUM_REPLACEMENTS='$1'
+    eval TO$NUM_REPLACEMENTS='$2'
 }
 
-### Generate ant.xml
+add_replacement "###BUILD_DIR###" "`dirname $SPEC`"
+add_replacement "###MODULE_NAMES###" "$MODULE_NAMES"
+add_replacement "###JTREG_HOME###" "$JT_HOME"
+add_replacement "###IMAGES_DIR###" "`dirname $SPEC`/images/jdk"
+add_replacement "###ROOT_DIR###" "$TOPLEVEL_DIR"
+add_replacement "###IDEA_DIR###" "$IDEA_OUTPUT"
 
-rm -f $IDEA_ANT
-while IFS= read -r line
-do
-  if echo "$line" | egrep "^ .* <property name=\"module.name\"" > /dev/null ; then
-    addModuleName
-  elif echo "$line" | egrep "^ .* <property name=\"build.target.dir\"" > /dev/null ; then
-    addBuildDir
-  else
-    printf "%s\n" "$line" >> $IDEA_ANT
-  fi
-done < "$ANT_TEMPLATE"
+SOURCE_PREFIX="<sourceFolder url=\"file://"
+SOURCE_POSTFIX="\" isTestSource=\"false\" />"
 
-### Generate misc.xml
+for root in $MODULE_ROOTS; do
+    SOURCES=$SOURCES" $SOURCE_PREFIX""$root""$SOURCE_POSTFIX"
+done
 
-rm -f $IDEA_MISC
+add_replacement "###SOURCE_ROOTS###" "$SOURCES"
 
-JTREG_HOME="    <path>####</path>"
-
-IMAGES_DIR="    <jre alt=\"true\" value=\"####\" />"
-
-addImagesDir() {
-  DIR=`dirname $SPEC`/images/jdk
-  mn="`echo "$IMAGES_DIR" | sed -e s@"\(.*\)####\(.*\)"@"\1$DIR\2"@`"
-  printf "%s\n" "$mn" >> $IDEA_MISC
-}
-
-addJtregHome() {
-  DIR=`dirname $SPEC`
-  mn="`echo "$JTREG_HOME" | sed -e s@"\(.*\)####\(.*\)"@"\1$JT_HOME\2"@`"
-  printf "%s\n" "$mn" >> $IDEA_MISC
-}
-
-rm -f $MISC_ANT
-while IFS= read -r line
-do
-  if echo "$line" | egrep "^ .*<path>jtreg_home</path>" > /dev/null ; then
-	addJtregHome
-  elif echo "$line" | egrep "^ .*<jre alt=\"true\" value=\"images_jdk\"" > /dev/null ; then
-    addImagesDir
-  else
-    printf "%s\n" "$line" >> $IDEA_MISC
-  fi
-done < "$MISC_TEMPLATE"
+replace_template_dir "$IDEA_OUTPUT"
 
 ### Compile the custom Logger
 
--- a/doc/building.html	Thu Aug 30 22:06:18 2018 +0200
+++ b/doc/building.html	Thu Sep 13 22:05:54 2018 +0200
@@ -26,7 +26,8 @@
 <li><a href="#build-hardware-requirements">Build Hardware Requirements</a><ul>
 <li><a href="#building-on-x86">Building on x86</a></li>
 <li><a href="#building-on-sparc">Building on sparc</a></li>
-<li><a href="#building-on-armaarch64">Building on arm/aarch64</a></li>
+<li><a href="#building-on-aarch64">Building on aarch64</a></li>
+<li><a href="#building-on-32-bit-arm">Building on 32-bit arm</a></li>
 </ul></li>
 <li><a href="#operating-system-requirements">Operating System Requirements</a><ul>
 <li><a href="#windows">Windows</a></li>
@@ -154,7 +155,10 @@
 <p>Even for 32-bit builds, it is recommended to use a 64-bit build machine, and instead create a 32-bit target using <code>--with-target-bits=32</code>.</p>
 <h3 id="building-on-sparc">Building on sparc</h3>
 <p>At a minimum, a machine with 4 cores is advisable, as well as 4 GB of RAM. (The more cores to use, the more memory you need.) At least 8 GB of free disk space is required.</p>
-<h3 id="building-on-armaarch64">Building on arm/aarch64</h3>
+<h3 id="building-on-aarch64">Building on aarch64</h3>
+<p>At a minimum, a machine with 8 cores is advisable, as well as 8 GB of RAM. (The more cores to use, the more memory you need.) At least 6 GB of free disk space is required.</p>
+<p>If you do not have access to sufficiently powerful hardware, it is also possible to use <a href="#cross-compiling">cross-compiling</a>.</p>
+<h3 id="building-on-32-bit-arm">Building on 32-bit arm</h3>
 <p>This is not recommended. Instead, see the section on <a href="#cross-compiling">Cross-compiling</a>.</p>
 <h2 id="operating-system-requirements">Operating System Requirements</h2>
 <p>The mainline JDK project supports Linux, Solaris, macOS, AIX and Windows. Support for other operating system, e.g. BSD, exists in separate &quot;port&quot; projects.</p>
--- a/doc/building.md	Thu Aug 30 22:06:18 2018 +0200
+++ b/doc/building.md	Thu Sep 13 22:05:54 2018 +0200
@@ -120,7 +120,16 @@
 more cores to use, the more memory you need.) At least 8 GB of free disk space
 is required.
 
-### Building on arm/aarch64
+### Building on aarch64
+
+At a minimum, a machine with 8 cores is advisable, as well as 8 GB of RAM.
+(The more cores to use, the more memory you need.) At least 6 GB of free disk
+space is required.
+
+If you do not have access to sufficiently powerful hardware, it is also
+possible to use [cross-compiling](#cross-compiling).
+
+### Building on 32-bit arm
 
 This is not recommended. Instead, see the section on [Cross-compiling](
 #cross-compiling).
--- a/doc/testing.html	Thu Aug 30 22:06:18 2018 +0200
+++ b/doc/testing.html	Thu Sep 13 22:05:54 2018 +0200
@@ -1,16 +1,11 @@
 <!DOCTYPE html>
-<html xmlns="http://www.w3.org/1999/xhtml" lang="" xml:lang="">
+<html>
 <head>
-  <meta charset="utf-8" />
-  <meta name="generator" content="pandoc" />
-  <meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
+  <meta charset="utf-8">
+  <meta name="generator" content="pandoc">
+  <meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes">
   <title>Testing the JDK</title>
-  <style type="text/css">
-      code{white-space: pre-wrap;}
-      span.smallcaps{font-variant: small-caps;}
-      span.underline{text-decoration: underline;}
-      div.column{display: inline-block; vertical-align: top; width: 50%;}
-  </style>
+  <style type="text/css">code{white-space: pre;}</style>
   <link rel="stylesheet" href="../make/data/docs-resources/resources/jdk-default.css">
   <!--[if lt IE 9]>
     <script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
@@ -39,7 +34,7 @@
 </nav>
 <h2 id="using-the-run-test-framework">Using the run-test framework</h2>
 <p>This new way of running tests is developer-centric. It assumes that you have built a JDK locally and want to test it. Running common test targets is simple, and more complex ad-hoc combination of tests is possible. The user interface is forgiving, and clearly report errors it cannot resolve.</p>
-<p>The main target “run-test” uses the jdk-image as the tested product. There is also an alternate target “exploded-run-test” that uses the exploded image instead. Not all tests will run successfully on the exploded image, but using this target can greatly improve rebuild times for certain workflows.</p>
+<p>The main target &quot;run-test&quot; uses the jdk-image as the tested product. There is also an alternate target &quot;exploded-run-test&quot; that uses the exploded image instead. Not all tests will run successfully on the exploded image, but using this target can greatly improve rebuild times for certain workflows.</p>
 <p>Some example command-lines:</p>
 <pre><code>$ make run-test-tier1
 $ make run-test-jdk_lang JTREG=&quot;JOBS=8&quot;
@@ -49,7 +44,7 @@
 $ make run-test TEST=&quot;jtreg:test/hotspot:hotspot_gc test/hotspot/jtreg/native_sanity/JniVersion.java&quot;
 $ make exploded-run-test TEST=tier2</code></pre>
 <h3 id="configuration">Configuration</h3>
-<p>To be able to run JTReg tests, <code>configure</code> needs to know where to find the JTReg test framework. If it is not picked up automatically by configure, use the <code>--with-jtreg=&lt;path to jtreg home&gt;</code> option to point to the JTReg framework. Note that this option should point to the JTReg home, i.e. the top directory, containing <code>lib/jtreg.jar</code> etc. (An alternative is to set the <code>JT_HOME</code> environment variable to point to the JTReg home before running <code>configure</code>.)</p>
+<p>To be able to run JTReg tests, <code>configure</code> needs to know where to find the JTReg test framework. If it is not picked up automatically by configure, use the <code>--with-jtreg=&lt;path to jtreg home&gt;</code> option to point to the JTReg framework. Note that this option should point to the JTReg home, i.e. the top directory, containing <code>lib/jtreg.jar</code> etc. (An alternative is to set the <code>JT_HOME</code> environment variable to point to the JTReg home before running <code>configure</code>.)</p>
 <h2 id="test-selection">Test selection</h2>
 <p>All functionality is available using the run-test make target. In this use case, the test or tests to be executed is controlled using the <code>TEST</code> variable. To speed up subsequent test runs with no source code changes, run-test-only can be used instead, which do not depend on the source and test image build.</p>
 <p>For some common top-level tests, direct make targets have been generated. This includes all JTReg test groups, the hotspot gtest, and custom tests (if present). This means that <code>make run-test-tier1</code> is equivalent to <code>make run-test TEST=&quot;tier1&quot;</code>, but the latter is more tab-completion friendly. For more complex test runs, the <code>run-test TEST=&quot;x&quot;</code> solution needs to be used.</p>
@@ -63,7 +58,7 @@
 <h3 id="gtest">Gtest</h3>
 <p>Since the Hotspot Gtest suite is so quick, the default is to run all tests. This is specified by just <code>gtest</code>, or as a fully qualified test descriptor <code>gtest:all</code>.</p>
 <p>If you want, you can single out an individual test or a group of tests, for instance <code>gtest:LogDecorations</code> or <code>gtest:LogDecorations.level_test_vm</code>. This can be particularly useful if you want to run a shaky test repeatedly.</p>
-<p>For Gtest, there is a separate test suite for each JVM variant. The JVM variant is defined by adding <code>/&lt;variant&gt;</code> to the test descriptor, e.g. <code>gtest:Log/client</code>. If you specify no variant, gtest will run once for each JVM variant present (e.g. server, client). So if you only have the server JVM present, then <code>gtest:all</code> will be equivalent to <code>gtest:all/server</code>.</p>
+<p>For Gtest, there is a separate test suite for each JVM variant. The JVM variant is defined by adding <code>/&lt;variant&gt;</code> to the test descriptor, e.g. <code>gtest:Log/client</code>. If you specify no variant, gtest will run once for each JVM variant present (e.g. server, client). So if you only have the server JVM present, then <code>gtest:all</code> will be equivalent to <code>gtest:all/server</code>.</p>
 <h2 id="test-results-and-summary">Test results and summary</h2>
 <p>At the end of the test run, a summary of all tests run will be presented. This will have a consistent look, regardless of what test suites were used. This is a sample summary:</p>
 <pre><code>==============================
@@ -78,13 +73,13 @@
 <p>Tests where the number of TOTAL tests does not equal the number of PASSed tests will be considered a test failure. These are marked with the <code>&gt;&gt; ... &lt;&lt;</code> marker for easy identification.</p>
 <p>The classification of non-passed tests differs a bit between test suites. In the summary, ERROR is used as a catch-all for tests that neither passed nor are classified as failed by the framework. This might indicate test framework error, timeout or other problems.</p>
 <p>In case of test failures, <code>make run-test</code> will exit with a non-zero exit value.</p>
-<p>All tests have their result stored in <code>build/$BUILD/test-results/$TEST_ID</code>, where TEST_ID is a path-safe conversion from the fully qualified test descriptor, e.g. for <code>jtreg:jdk/test:tier1</code> the TEST_ID is <code>jtreg_jdk_test_tier1</code>. This path is also printed in the log at the end of the test run.</p>
+<p>All tests have their result stored in <code>build/$BUILD/test-results/$TEST_ID</code>, where TEST_ID is a path-safe conversion from the fully qualified test descriptor, e.g. for <code>jtreg:jdk/test:tier1</code> the TEST_ID is <code>jtreg_jdk_test_tier1</code>. This path is also printed in the log at the end of the test run.</p>
 <p>Additional work data is stored in <code>build/$BUILD/test-support/$TEST_ID</code>. For some frameworks, this directory might contain information that is useful in determining the cause of a failed test.</p>
 <h2 id="test-suite-control">Test suite control</h2>
 <p>It is possible to control various aspects of the test suites using make control variables.</p>
 <p>These variables use a keyword=value approach to allow multiple values to be set. So, for instance, <code>JTREG=&quot;JOBS=1;TIMEOUT=8&quot;</code> will set the JTReg concurrency level to 1 and the timeout factor to 8. This is equivalent to setting <code>JTREG_JOBS=1 JTREG_TIMEOUT=8</code>, but using the keyword format means that the <code>JTREG</code> variable is parsed and verified for correctness, so <code>JTREG=&quot;TMIEOUT=8&quot;</code> would give an error, while <code>JTREG_TMIEOUT=8</code> would just pass unnoticed.</p>
 <p>To separate multiple keyword=value pairs, use <code>;</code> (semicolon). Since the shell normally eats <code>;</code>, the recommended usage is to write the assignment inside qoutes, e.g. <code>JTREG=&quot;...;...&quot;</code>. This will also make sure spaces are preserved, as in <code>JTREG=&quot;VM_OPTIONS=-XshowSettings -Xlog:gc+ref=debug&quot;</code>.</p>
-<p>(Other ways are possible, e.g. using backslash: <code>JTREG=JOBS=1\;TIMEOUT=8</code>. Also, as a special technique, the string <code>%20</code> will be replaced with space for certain options, e.g. <code>JTREG=VM_OPTIONS=-XshowSettings%20-Xlog:gc+ref=debug</code>. This can be useful if you have layers of scripts and have trouble getting proper quoting of command line arguments through.)</p>
+<p>(Other ways are possible, e.g. using backslash: <code>JTREG=JOBS=1\;TIMEOUT=8</code>. Also, as a special technique, the string <code>%20</code> will be replaced with space for certain options, e.g. <code>JTREG=VM_OPTIONS=-XshowSettings%20-Xlog:gc+ref=debug</code>. This can be useful if you have layers of scripts and have trouble getting proper quoting of command line arguments through.)</p>
 <p>As far as possible, the names of the keywords have been standardized between test suites.</p>
 <h3 id="jtreg-keywords">JTReg keywords</h3>
 <h4 id="jobs">JOBS</h4>
--- a/make/Init.gmk	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/Init.gmk	Thu Sep 13 22:05:54 2018 +0200
@@ -240,6 +240,11 @@
     override BUILD_LOG_PIPE :=
   endif
 
+  ifeq ($(filter dist-clean, $(SEQUENTIAL_TARGETS)), dist-clean)
+    # We can't have a log file if we're about to remove it.
+    override BUILD_LOG_PIPE :=
+  endif
+
   ifeq ($(OUTPUT_SYNC_SUPPORTED), true)
     OUTPUT_SYNC_FLAG := -O$(OUTPUT_SYNC)
   endif
--- a/make/Main.gmk	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/Main.gmk	Thu Sep 13 22:05:54 2018 +0200
@@ -1107,7 +1107,8 @@
 # directory was created by configure and now becomes empty, remove it as well.
 dist-clean: clean
 	($(CD) $(OUTPUTDIR) && \
-	    $(RM) -r *spec.gmk $(CONFIGURESUPPORT_OUTPUTDIR) Makefile compare.sh ide)
+	    $(RM) -r *spec.gmk $(CONFIGURESUPPORT_OUTPUTDIR) Makefile compare.sh ide \
+	    configure.log* build.log*)
 	$(if $(filter $(CONF_NAME),$(notdir $(OUTPUTDIR))), \
 	  if test "x`$(LS) $(OUTPUTDIR)`" != x; then \
 	    $(ECHO) "Warning: Not removing non-empty configuration directory for '$(CONF_NAME)'" ; \
--- a/make/SourceRevision.gmk	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/SourceRevision.gmk	Thu Sep 13 22:05:54 2018 +0200
@@ -31,23 +31,35 @@
 ################################################################################
 # Keep track of what source revision is used to create the build, by creating
 # a tracker file in the output directory. This tracker file is included in the
-# image, and can be used to recreate the source revision used.
+# source image, and can be used to recreate the source revision used.
 #
-# We're either building directly from a mercurial forest, and if so, use the
-# current revision from mercurial. Otherwise, we are building from a source
-# bundle. As a part of creating this source bundle, the current mercurial
-# revisions of all repos will be stored in a file in the top dir, which is then
-# used when creating the tracker file.
+# We're either building directly from an SCM repository, and if so, use the
+# current revision from that SCM. Otherwise, we are building from a source
+# bundle. As a part of creating this source bundle, the current SCM revisions of
+# all repos will be stored in a file in the top dir, which is then used when
+# creating the tracker file.
 
 STORED_SOURCE_REVISION := $(TOPDIR)/.src-rev
 
-# Are we using mercurial?
+USE_SCM := false
 ifneq ($(and $(HG), $(wildcard $(TOPDIR)/.hg)), )
+  USE_SCM := true
+  SCM_DIR := .hg
+  ID_COMMAND := $(PRINTF) "hg:%s" "$$($(HG) id -i)"
+else ifneq ($(and $(GIT), $(wildcard $(TOPDIR)/.git)), )
+  USE_SCM := true
+  SCM_DIR := .git
+  ID_COMMAND := $(PRINTF) "git:%s%s\n" \
+      "$$(git log -n1 --format=%H | cut -c1-12)" \
+      "$$(if test -n "$$(git status --porcelain)"; then printf '+'; fi)"
+endif
+
+ifeq ($(USE_SCM), true)
 
   # Verify that the entire forest is consistent
   $(foreach repo, $(call FindAllReposRel), \
-    $(if $(wildcard $(TOPDIR)/$(repo)/.hg),, \
-        $(error Inconsistent revision control: $(repo) is missing .hg directory)) \
+    $(if $(wildcard $(TOPDIR)/$(repo)/$(SCM_DIR)),, \
+        $(error Inconsistent revision control: $(repo) is missing $(SCM_DIR) directory)) \
   )
 
   # Replace "." with "_top" and "/" with "-"
@@ -56,7 +68,9 @@
 
   ################################################################################
   # SetupGetRevisionForRepo defines a make rule for creating a file containing
-  # the name of the repository and the output of "hg id" for that repository.
+  # the name of the repository and the output of the scm command for that
+  # repository.
+  #
   # Argument 1 is the relative path to the repository from the top dir.
   #
   SetupGetRevisionForRepo = $(NamedParamsMacroTemplate)
@@ -66,7 +80,7 @@
 
     $$(SUPPORT_OUTPUTDIR)/src-rev/$$($1_FILENAME): FRC
 	$$(call MakeDir, $$(@D))
-	$$(ECHO) $$(strip $1):`$$(HG) id -i --repository $$($1_REPO_PATH)` > $$@
+	$$(ECHO) $$(strip $1):`$$(CD) $$($1_REPO_PATH) && $$(ID_COMMAND)` > $$@
 
     REPO_REVISIONS += $$(SUPPORT_OUTPUTDIR)/src-rev/$$($1_FILENAME)
   endef
@@ -92,23 +106,25 @@
 
   $(eval $(call CreateSourceRevisionFile, $(STORED_SOURCE_REVISION)))
 
-  hg-store-source-revision: $(STORED_SOURCE_REVISION)
+  scm-store-source-revision: $(STORED_SOURCE_REVISION)
 
   $(eval $(call CreateSourceRevisionFile, $(SOURCE_REVISION_TRACKER)))
 
-  hg-create-source-revision-tracker: $(SOURCE_REVISION_TRACKER)
+  scm-create-source-revision-tracker: $(SOURCE_REVISION_TRACKER)
 
-  STORE_SOURCE_REVISION_TARGET := hg-store-source-revision
-  CREATE_SOURCE_REVISION_TRACKER_TARGET := hg-create-source-revision-tracker
+  STORE_SOURCE_REVISION_TARGET := scm-store-source-revision
+  CREATE_SOURCE_REVISION_TRACKER_TARGET := scm-create-source-revision-tracker
+
+  .PHONY: scm-store-source-revision scm-create-source-revision-tracker
 
 else
-  # Not using HG
+  # Not using any SCM
 
   ifneq ($(wildcard $(STORED_SOURCE_REVISION)), )
     # We have a stored source revision (.src-rev)
 
     src-store-source-revision:
-	$(call LogInfo, No mercurial configuration present$(COMMA) not updating .src-rev)
+	$(call LogInfo, No SCM configuration present$(COMMA) not updating .src-rev)
 
     $(SOURCE_REVISION_TRACKER): $(STORED_SOURCE_REVISION)
 	$(install-file)
@@ -118,16 +134,18 @@
     # We don't have a stored source revision. Can't do anything, really.
 
     src-store-source-revision:
-	$(call LogWarn, Error: No mercurial configuration present$(COMMA) cannot create .src-rev)
+	$(call LogWarn, Error: No SCM configuration present$(COMMA) cannot create .src-rev)
 	exit 2
 
     src-create-source-revision-tracker:
-	$(call LogWarn, Warning: No mercurial configuration present and no .src-rev)
+	$(call LogWarn, Warning: No SCM configuration present and no .src-rev)
   endif
 
   STORE_SOURCE_REVISION_TARGET := src-store-source-revision
   CREATE_SOURCE_REVISION_TRACKER_TARGET := src-create-source-revision-tracker
 
+  .PHONY: src-store-source-revision src-create-source-revision-tracker
+
 endif
 
 ################################################################################
--- a/make/ToolsJdk.gmk	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/ToolsJdk.gmk	Thu Sep 13 22:05:54 2018 +0200
@@ -47,9 +47,6 @@
 TOOL_COMPILEPROPERTIES = $(JAVA_SMALL) -cp $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes \
     build.tools.compileproperties.CompileProperties
 
-TOOL_JARREORDER = $(JAVA_SMALL) -cp $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes \
-    build.tools.jarreorder.JarReorder
-
 TOOL_GENERATECHARACTER = $(JAVA_SMALL) -cp $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes \
     build.tools.generatecharacter.GenerateCharacter
 
@@ -67,9 +64,6 @@
 TOOL_GENERATECURRENCYDATA = $(JAVA_SMALL) -cp $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes \
     build.tools.generatecurrencydata.GenerateCurrencyData
 
-TOOL_HASHER = $(JAVA_SMALL) -cp $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes \
-    build.tools.hasher.Hasher
-
 TOOL_TZDB = $(JAVA_SMALL) -cp $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes \
     build.tools.tzdb.TzdbZoneRulesCompiler
 
@@ -109,10 +103,6 @@
 TOOL_GENERATELSREQUIVMAPS = $(JAVA_SMALL) -cp $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes \
     build.tools.generatelsrequivmaps.EquivMapsGenerator
 
-TOOL_GENMODULESXML = $(JAVA_SMALL) $(INTERIM_LANGTOOLS_BOOTCLASSPATH) \
-    -cp $(call PathList, $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes) \
-    build.tools.module.GenJdepsModulesXml
-
 TOOL_GENMODULEINFOSOURCE = $(JAVA_SMALL) $(INTERIM_LANGTOOLS_BOOTCLASSPATH) \
     -cp $(call PathList, $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes) \
     build.tools.module.GenModuleInfoSource
--- a/make/autoconf/basics.m4	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/autoconf/basics.m4	Thu Sep 13 22:05:54 2018 +0200
@@ -1190,6 +1190,7 @@
   BASIC_PATH_PROGS(READELF, [greadelf readelf])
   BASIC_PATH_PROGS(DOT, dot)
   BASIC_PATH_PROGS(HG, hg)
+  BASIC_PATH_PROGS(GIT, git)
   BASIC_PATH_PROGS(STAT, stat)
   BASIC_PATH_PROGS(TIME, time)
   BASIC_PATH_PROGS(FLOCK, flock)
--- a/make/autoconf/flags.m4	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/autoconf/flags.m4	Thu Sep 13 22:05:54 2018 +0200
@@ -241,7 +241,8 @@
   elif test "x$TOOLCHAIN_TYPE" = xsolstudio; then
     MACHINE_FLAG="-m${OPENJDK_TARGET_CPU_BITS}"
   elif test "x$TOOLCHAIN_TYPE" = xgcc || test "x$TOOLCHAIN_TYPE" = xclang; then
-    if test "x$OPENJDK_TARGET_CPU_ARCH" = xx86 ||
+    if test "x$OPENJDK_TARGET_CPU_ARCH" = xx86 &&
+        test "x$OPENJDK_TARGET_CPU" != xx32 ||
         test "x$OPENJDK_TARGET_CPU_ARCH" = xsparc ||
         test "x$OPENJDK_TARGET_CPU_ARCH" = xppc; then
       MACHINE_FLAG="-m${OPENJDK_TARGET_CPU_BITS}"
--- a/make/autoconf/platform.m4	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/autoconf/platform.m4	Thu Sep 13 22:05:54 2018 +0200
@@ -30,6 +30,12 @@
 [
   # First argument is the cpu name from the trip/quad
   case "$1" in
+    x86_64*x32)
+      VAR_CPU=x32
+      VAR_CPU_ARCH=x86
+      VAR_CPU_BITS=32
+      VAR_CPU_ENDIAN=little
+      ;;
     x86_64)
       VAR_CPU=x86_64
       VAR_CPU_ARCH=x86
@@ -455,6 +461,8 @@
     HOTSPOT_$1_CPU_DEFINE=IA32
   elif test "x$OPENJDK_$1_CPU" = xx86_64; then
     HOTSPOT_$1_CPU_DEFINE=AMD64
+  elif test "x$OPENJDK_$1_CPU" = xx32; then
+    HOTSPOT_$1_CPU_DEFINE=X32
   elif test "x$OPENJDK_$1_CPU" = xsparcv9; then
     HOTSPOT_$1_CPU_DEFINE=SPARC
   elif test "x$OPENJDK_$1_CPU" = xaarch64; then
--- a/make/autoconf/spec.gmk.in	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/autoconf/spec.gmk.in	Thu Sep 13 22:05:54 2018 +0200
@@ -723,6 +723,7 @@
 FILE:=@FILE@
 DOT:=@DOT@
 HG:=@HG@
+GIT:=@GIT@
 OBJCOPY:=@OBJCOPY@
 SETFILE:=@SETFILE@
 XATTR:=@XATTR@
--- a/make/autoconf/toolchain.m4	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/autoconf/toolchain.m4	Thu Sep 13 22:05:54 2018 +0200
@@ -1026,8 +1026,6 @@
   HOTSPOT_TOOLCHAIN_TYPE=$TOOLCHAIN_TYPE
   if test "x$TOOLCHAIN_TYPE" = xclang; then
     HOTSPOT_TOOLCHAIN_TYPE=gcc
-  elif test "x$TOOLCHAIN_TYPE" = xsolstudio; then
-    HOTSPOT_TOOLCHAIN_TYPE=sparcWorks
   elif test "x$TOOLCHAIN_TYPE" = xmicrosoft; then
     HOTSPOT_TOOLCHAIN_TYPE=visCPP
   fi
--- a/make/common/MakeBase.gmk	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/common/MakeBase.gmk	Thu Sep 13 22:05:54 2018 +0200
@@ -347,6 +347,7 @@
 FindAllReposAbs = \
     $(strip $(sort $(dir $(filter-out $(TOPDIR)/build/%, $(wildcard \
         $(addprefix $(TOPDIR)/, .hg */.hg */*/.hg */*/*/.hg */*/*/*/.hg) \
+        $(addprefix $(TOPDIR)/, .git */.git */*/.git */*/*/.git */*/*/*/.git) \
     )))))
 
 # Locate all hg repositories included in the forest, as relative paths
--- a/make/copy/Copy-java.base.gmk	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/copy/Copy-java.base.gmk	Thu Sep 13 22:05:54 2018 +0200
@@ -183,7 +183,7 @@
 
 TARGETS += $(COPY_NET_PROPERTIES)
 
-ifeq ($(OPENJDK_TARGET_OS), solaris)
+ifneq ($(filter $(OPENJDK_TARGET_OS), solaris linux), )
   $(eval $(call SetupCopyFiles, COPY_SDP_CONF, \
       FILES := $(TOPDIR)/src/java.base/$(OPENJDK_TARGET_OS_TYPE)/conf/sdp/sdp.conf.template, \
       DEST := $(CONF_DST_DIR)/sdp, \
--- a/make/hotspot/lib/CompileDtraceLibraries.gmk	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/hotspot/lib/CompileDtraceLibraries.gmk	Thu Sep 13 22:05:54 2018 +0200
@@ -25,6 +25,10 @@
 
 ifeq ($(call check-jvm-feature, dtrace), true)
   ifeq ($(OPENJDK_TARGET_OS), solaris)
+    JNI_INCLUDE_FLAGS := \
+        -I$(SUPPORT_OUTPUTDIR)/modules_include/java.base \
+        -I$(SUPPORT_OUTPUTDIR)/modules_include/java.base/$(OPENJDK_TARGET_OS_INCLUDE_SUBDIR) \
+        #
 
     ############################################################################
     # Build the stand-alone dtrace libraries.
@@ -34,10 +38,9 @@
         NAME := jvm_dtrace, \
         OUTPUT_DIR := $(JVM_LIB_OUTPUTDIR), \
         SRC := $(TOPDIR)/src/java.base/solaris/native/libjvm_dtrace, \
-        CFLAGS := -m64 -G -mt -KPIC, \
+        CFLAGS := $(JNI_INCLUDE_FLAGS) -m64 -G -mt -KPIC -xldscope=hidden, \
         LDFLAGS := -m64 -mt -xnolib $(SHARED_LIBRARY_FLAGS), \
         LIBS := $(LIBDL) -lthread -ldoor, \
-        MAPFILE := $(TOPDIR)/make/mapfiles/libjvm_dtrace/mapfile-vers, \
         OBJECT_DIR := $(LIBJVM_DTRACE_OUTPUTDIR)/objs, \
     ))
 
@@ -48,9 +51,8 @@
         NAME := jvm_db, \
         OUTPUT_DIR := $(JVM_LIB_OUTPUTDIR), \
         SRC := $(TOPDIR)/src/java.base/solaris/native/libjvm_db, \
-        CFLAGS := -I$(DTRACE_GENSRC_DIR) -m64 -G -mt -KPIC, \
+        CFLAGS := -I$(DTRACE_GENSRC_DIR) $(JNI_INCLUDE_FLAGS) -m64 -G -mt -KPIC -xldscope=hidden, \
         LDFLAGS := -m64 -mt -xnolib $(SHARED_LIBRARY_FLAGS), \
-        MAPFILE := $(TOPDIR)/make/mapfiles/libjvm_db/mapfile-vers, \
         OBJECT_DIR := $(LIBJVM_DB_OUTPUTDIR)/objs, \
     ))
 
--- a/make/idea/template/ant.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/idea/template/ant.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -1,12 +1,12 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <project version="4">
   <component name="AntConfiguration">
-    <buildFile url="file://$PROJECT_DIR$/make/idea/build.xml">
+    <buildFile url="file://###ROOT_DIR###/make/idea/build.xml">
       <properties>
         <property name="intellij.ismake" value="$IsMake$" />
-        <property name="build.target.dir" value="specDir" /> <!-- this will be replaced -->
-        <property name="module.name" value="java.base" /> <!-- this will be replaced -->
-        <property name="idea.dir" value="$ModuleFileDir$" />
+        <property name="build.target.dir" value="###BUILD_DIR###" />
+        <property name="module.name" value="###MODULE_NAMES###" />
+        <property name="idea.dir" value="###IDEA_DIR###" />
       </properties>
       <executeOn event="afterCompilation" target="post-make" />
     </buildFile>
--- a/make/idea/template/compiler.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/idea/template/compiler.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -3,10 +3,10 @@
   <component name="CompilerConfiguration">
     <option name="DEFAULT_COMPILER" value="Javac" />
     <excludeFromCompile>
-      <directory url="file://$PROJECT_DIR$/src" includeSubdirectories="true" />
-      <directory url="file://$PROJECT_DIR$/build" includeSubdirectories="true" />
-      <directory url="file://$PROJECT_DIR$/make" includeSubdirectories="true" />
-      <directory url="file://$PROJECT_DIR$/test" includeSubdirectories="true" />
+      <directory url="file://###ROOT_DIR###/src" includeSubdirectories="true" />
+      <directory url="file://###ROOT_DIR###/build" includeSubdirectories="true" />
+      <directory url="file://###ROOT_DIR###/make" includeSubdirectories="true" />
+      <directory url="file://###ROOT_DIR###/test" includeSubdirectories="true" />
     </excludeFromCompile>
     <resourceExtensions />
     <wildcardResourcePatterns>
@@ -25,4 +25,5 @@
       </profile>
     </annotationProcessing>
   </component>
-</project>
\ No newline at end of file
+</project>
+
--- a/make/idea/template/jdk.iml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/idea/template/jdk.iml	Thu Sep 13 22:05:54 2018 +0200
@@ -2,10 +2,10 @@
 <module type="JAVA_MODULE" version="4">
   <component name="NewModuleRootManager" inherit-compiler-output="true">
     <exclude-output />
-    <content url="file://$MODULE_DIR$">
-      <sourceFolder url="file://$MODULE_DIR$/####" isTestSource="false" />
-      <excludeFolder url="file://$MODULE_DIR$/build" />
-      <excludeFolder url="file://$MODULE_DIR$/make" />
+    <content url="file://###ROOT_DIR###">
+      ###SOURCE_ROOTS###
+      <excludeFolder url="file://###ROOT_DIR###/build" />
+      <excludeFolder url="file://###ROOT_DIR###/make" />
     </content>
     <orderEntry type="sourceFolder" forTests="false" />
     <orderEntry type="inheritedJdk" />
--- a/make/idea/template/misc.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/idea/template/misc.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -4,15 +4,15 @@
     <entry_points version="2.0" />
   </component>
   <component name="JTRegService">
-    <path>jtreg_home</path> <!-- this will be replaced -->
-    <workDir>build</workDir>
-    <jre alt="true" value="images_jdk" /> <!-- this will be replaced -->
+    <path>###JTREG_HOME###</path>
+    <workDir>###BUILD_DIR###</workDir>
+    <jre alt="true" value="###IMAGES_DIR###" />
     <options></options>
     <ant>
-      <target file="file://$PROJECT_DIR$/make/idea/build.xml" name="images" />
+      <target file="file://###ROOT_DIR###/make/idea/build.xml" name="images" />
     </ant>
   </component>
   <component name="ProjectRootManager" version="2" languageLevel="JDK_1_9" assert-keyword="true" jdk-15="true">
-    <output url="file://$PROJECT_DIR$/build/out" />
+    <output url="file://###BUILD_DIR###" />
   </component>
 </project>
--- a/make/idea/template/vcs.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/idea/template/vcs.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -1,7 +1,6 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <project version="4">
   <component name="VcsDirectoryMappings">
-    <mapping directory="$PROJECT_DIR$" vcs="hg4idea" />
+    <mapping directory="###ROOT_DIR###" vcs="hg4idea" />
   </component>
 </project>
-
--- a/make/idea/template/workspace.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/idea/template/workspace.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -2,7 +2,7 @@
 <project version="4">
   <component name="ChangeListManager">
     <ignored path="jdk.iws" />
-    <ignored path="$PROJECT_DIR$/build/idea/out/" />
+    <ignored path="###ROOT_DIR###/build/idea/out/" />
     <ignored path=".idea/" />
   </component>
   <component name="StructureViewFactory">
@@ -11,7 +11,7 @@
   <component name="antWorkspaceConfiguration">
     <option name="IS_AUTOSCROLL_TO_SOURCE" value="false" />
     <option name="FILTER_TARGETS" value="false" />
-    <buildFile url="file://$PROJECT_DIR$/make/idea/build.xml">
+    <buildFile url="file://###ROOT_DIR###/make/idea/build.xml">
       <runInBackground value="false" />
       <targetFilters>
         <filter targetName="clean" isVisible="true" />
--- a/make/jdk/src/classes/build/tools/hasher/Hasher.java	Thu Aug 30 22:06:18 2018 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,320 +0,0 @@
-/*
- * Copyright (c) 2004, 2013, Oracle and/or its affiliates. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.  Oracle designates this
- * particular file as subject to the "Classpath" exception as provided
- * by Oracle in the LICENSE file that accompanied this code.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- */
-
-package build.tools.hasher;
-
-import java.io.*;
-import java.util.*;
-
-
-/**
- * Reads a map in the form of a sequence of key/value-expression pairs from the
- * standard input, attempts to construct a hash map that fits within the given
- * table-size and chain-depth constraints, and, if successful, writes source
- * code to the standard output for a subclass of sun.util.PreHashedMap that
- * implements the map.
- *
- * @see sun.util.PreHashedMap
- *
- * @author Mark Reinhold
- */
-
-public class Hasher {
-
-    static final PrintStream out = System.out;
-    static final PrintStream err = System.err;
-
-    boolean verbose = false;
-
-    List<String> keys = new ArrayList<>();      // Key strings
-    List<String> values = new ArrayList<>();    // Value expressions
-    String pkg = null;                          // Package prefix for generated class
-    String cln = null;                          // Name of generated class
-    String vtype = "String";                    // Value type
-    int maxBits = 11;                           // lg table size
-    int maxDepth = 3;                           // Max chain depth
-    boolean inner = false;                      // Generating an inner class?
-    boolean empty = false;                      // Generating an empty table?
-
-    void usage() {
-        err.println("usage: java Hasher [options] [[pkgName.]ClassName]");
-        err.println("options:");
-        err.println("    -e           generate empty table (ignores value exprs)");
-        err.println("    -i           generate a static inner class");
-        err.println("    -md depth    max chain depth (default 3)");
-        err.println("    -mb bits     max index bits (lg of table size, default 10)");
-        err.println("    -t type      value type (default String)");
-        err.println("    -v           verbose");
-        err.println("Key/value-expression pairs are read from standard input");
-        err.println("If class name is given then source is written to standard output");
-        System.exit(1);
-    }
-
-    Hasher(String[] args) {
-        List<String> as = Arrays.asList(args);
-        for (Iterator<String> i = as.iterator(); i.hasNext();) {
-            String a = i.next();
-            if (a.equals("-e")) {
-                empty = true;
-            } else if (a.equals("-i")) {
-                inner = true;
-            } else if (a.equals("-v")) {
-                verbose = true;
-            } else if (a.equals("-md")) {
-                if (!i.hasNext())
-                    usage();
-                maxDepth = Integer.parseInt(i.next());
-            } else if (a.equals("-mb")) {
-                if (!i.hasNext())
-                    usage();
-                maxBits = Integer.parseInt(i.next());
-            } else if (a.equals("-t")) {
-                if (!i.hasNext())
-                    usage();
-                vtype = i.next();
-            } else if (a.startsWith("-")) {
-                usage();
-            } else {
-                int j = a.lastIndexOf('.');
-                if (j >= 0) {
-                    pkg = a.substring(0, j);
-                    cln = a.substring(j + 1);
-                } else {
-                    cln = a;
-                }
-            }
-        }
-        if (verbose)
-            err.println("pkg=" + pkg + ", cln=" + cln);
-    }
-
-    // Read keys and values
-    //
-    Hasher load() throws IOException {
-        BufferedReader br
-            = new BufferedReader(new InputStreamReader(System.in));
-        for (String ln; (ln = br.readLine()) != null;) {
-            String[] ws = ln.split(",?\\s+", 2);
-            String w = ws[0].replaceAll("\"", "");
-            if (keys.contains(w))
-                throw new RuntimeException("Duplicate word in input: " + w);
-            keys.add(w);
-            if (ws.length < 2)
-                throw new RuntimeException("Missing expression for key " + w);
-            values.add(ws[1]);
-        }
-        return this;
-    }
-
-    Object[] ht;                        // Hash table itself
-    int nb;                             // Number of bits (lg table size)
-    int md;                             // Maximum chain depth
-    int mask;                           // Hash-code mask
-    int shift;                          // Hash-code shift size
-
-    int hash(String w) {
-        return (w.hashCode() >> shift) & mask;
-    }
-
-    // Build a hash table of size 2^nb, shifting the hash code by s bits
-    //
-    void build(int nb, int s) {
-
-        this.nb = nb;
-        this.shift = s;
-        int n = 1 << nb;
-        this.mask = n - 1;
-        ht = new Object[n];
-        int nw = keys.size();
-
-        for (int i = 0; i < nw; i++) {
-            String w = keys.get(i);
-            String v = values.get(i);
-            int h = hash(w);
-            if (ht[h] == null)
-                ht[h] = new Object[] { w, v };
-            else
-                ht[h] = new Object[] { w, v, ht[h] };
-        }
-
-        this.md = 0;
-        for (int i = 0; i < n; i++) {
-            int d = 1;
-            for (Object[] a = (Object[])ht[i];
-                 a != null && a.length > 2;
-                 a = (Object[])a[2], d++);
-            this.md = Math.max(md, d);
-        }
-
-    }
-
-    Hasher build() {
-        // Iterate through acceptable table sizes
-        for (int nb = 2; nb < maxBits; nb++) {
-            // Iterate through possible shift sizes
-            for (int s = 0; s < (32 - nb); s++) {
-                build(nb, s);
-                if (verbose)
-                    err.println("nb=" + nb + " s=" + s + " md=" + md);
-                if (md <= maxDepth) {
-                    // Success
-                    out.flush();
-                    if (verbose) {
-                        if (cln != null)
-                            err.print(cln + ": ");
-                        err.println("Table size " + (1 << nb) + " (" + nb + " bits)"
-                                    + ", shift " + shift
-                                    + ", max chain depth " + md);
-                    }
-                    return this;
-                }
-            }
-        }
-        throw new RuntimeException("Cannot find a suitable size"
-                                   + " within given constraints");
-    }
-
-    // Look for the given key in the hash table
-    //
-    String get(String k) {
-        int h = hash(k);
-        Object[] a = (Object[])ht[h];
-        for (;;) {
-            if (a[0].equals(k))
-                return (String)a[1];
-            if (a.length < 3)
-                return null;
-            a = (Object[])a[2];
-        }
-    }
-
-    // Test that all input keys can be found in the table
-    //
-    Hasher test() {
-        if (verbose)
-            err.println();
-        for (int i = 0, n = keys.size(); i < n; i++) {
-            String w = keys.get(i);
-            String v = get(w);
-            if (verbose)
-                err.println(hash(w) + "\t" + w);
-            if (!v.equals(values.get(i)))
-                throw new Error("Incorrect value: " + w + " --> "
-                                + v + ", should be " + values.get(i));
-        }
-        return this;
-    }
-
-    String ind = "";                    // Indent prefix
-
-    // Generate code for a single table entry
-    //
-    void genEntry(Object[] a, int depth, PrintWriter pw) {
-        Object v = empty ? null : a[1];
-        pw.print("new Object[] { \"" + a[0] + "\", " + v);
-        if (a.length < 3) {
-            pw.print(" }");
-            return;
-        }
-        pw.println(",");
-        pw.print(ind + "                     ");
-        for (int i = 0; i < depth; i++)
-            pw.print("    ");
-        genEntry((Object[])a[2], depth + 1, pw);
-        pw.print(" }");
-    }
-
-    // Generate a PreHashedMap subclass from the computed hash table
-    //
-    Hasher generate() throws IOException {
-        if (cln == null)
-            return this;
-        PrintWriter pw
-            = new PrintWriter(new BufferedWriter(new OutputStreamWriter(out)));
-
-        if (inner)
-            ind = "    ";
-
-        if (!inner && pkg != null) {
-            pw.println();
-            pw.println("package " + pkg + ";");
-            pw.println();
-        }
-
-        if (inner) {
-            pw.println(ind + "private static final class " + cln);
-        } else {
-            pw.println();
-            pw.println("public final class " + cln);
-        }
-        pw.println(ind + "    extends sun.util.PreHashedMap<" + vtype +">");
-        pw.println(ind + "{");
-
-        pw.println();
-        pw.println(ind + "    private static final int ROWS = "
-                   + ht.length + ";");
-        pw.println(ind + "    private static final int SIZE = "
-                   + keys.size() + ";");
-        pw.println(ind + "    private static final int SHIFT = "
-                   + shift + ";");
-        pw.println(ind + "    private static final int MASK = 0x"
-                   + Integer.toHexString(mask) + ";");
-        pw.println();
-
-        pw.println(ind + "    " + (inner ? "private " : "public ")
-                   + cln + "() {");
-        pw.println(ind + "        super(ROWS, SIZE, SHIFT, MASK);");
-        pw.println(ind + "    }");
-        pw.println();
-
-        pw.println(ind + "    protected void init(Object[] ht) {");
-        for (int i = 0; i < ht.length; i++) {
-            if (ht[i] == null)
-                continue;
-            Object[] a = (Object[])ht[i];
-            pw.print(ind + "        ht[" + i + "] = ");
-            genEntry(a, 0, pw);
-            pw.println(";");
-        }
-        pw.println(ind + "    }");
-        pw.println();
-
-        pw.println(ind + "}");
-        if (inner)
-            pw.println();
-
-        pw.close();
-        return this;
-    }
-
-    public static void main(String[] args) throws IOException {
-        new Hasher(args)
-            .load()
-            .build()
-            .test()
-            .generate();
-    }
-
-}
--- a/make/jdk/src/classes/build/tools/jarreorder/JarReorder.java	Thu Aug 30 22:06:18 2018 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,384 +0,0 @@
-/*
- * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.  Oracle designates this
- * particular file as subject to the "Classpath" exception as provided
- * by Oracle in the LICENSE file that accompanied this code.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- */
-
-/*
- * Read an input file which is output from a java -verbose run,
- * combine with an argument list of files and directories, and
- * write a list of items to be included in a jar file.
- */
-package build.tools.jarreorder;
-
-import java.io.BufferedReader;
-import java.io.File;
-import java.io.FileNotFoundException;
-import java.io.FileReader;
-import java.io.IOException;
-import java.util.Collections;
-import java.util.HashSet;
-import java.io.PrintStream;
-import java.io.FileOutputStream;
-import java.util.ArrayList;
-import java.util.List;
-import java.util.Set;
-
-public class JarReorder {
-
-    // To deal with output
-    private PrintStream out;
-
-    private void usage() {
-        String help;
-        help =
-                "Usage:  jar JarReorder [-m] [-o <outputfile>] <order_list> <exclude_list> <file> ...\n"
-                + "   -m            activate module mode, where every direct sub\n"
-                + "                 directory of the current working directory\n"
-                + "                 will be assumed to be a separate source root\n"
-                + "   order_list    is a file containing names of files to load\n"
-                + "                 in order at the end of a jar file unless\n"
-                + "                 excluded in the exclude list.\n"
-                + "   exclude_list  is a file containing names of files/directories\n"
-                + "                 NOT to be included in a jar file.\n"
-                + "\n"
-                + "The order_list or exclude_list may be replaced by a \"-\" if no\n"
-                + "data is to be provided.\n"
-                + "\n"
-                + "   The remaining arguments are files or directories to be included\n"
-                + "   in a jar file, from which will be excluded those entries which\n"
-                + "   appear in the exclude list.\n";
-        System.err.println(help);
-    }
-
-
-    /*
-     * Create the file list to be included in a jar file, such that the
-     * list will appear in a specific order, and allowing certain
-     * files and directories to be excluded.
-     *
-     * Command path arguments are
-     *    - optional -m for module mode.
-     *    - optional -o outputfile
-     *    - name of a file containing a set of files to be included in a jar file.
-     *    - name of a file containing a set of files (or directories) to be
-     *      excluded from the jar file.
-     *    - names of files or directories to be searched for files to include
-     *      in the jar file.
-     */
-    public static void main(String[] args) {
-        JarReorder jr = new JarReorder();
-        jr.run(args);
-    }
-
-    private void run(String args[]) {
-
-        int arglen = args.length;
-        int argpos = 0;
-
-        boolean moduleMode = false;
-
-        if (arglen > 0) {
-            // Check for module mode
-            if (args[argpos].equals("-m")) {
-                moduleMode = true;
-                argpos++;
-                arglen--;
-            }
-            // Look for "-o outputfilename" option
-            if (arglen >= 2 && args[argpos].equals("-o")) {
-                try {
-                    out = new PrintStream(new FileOutputStream(args[argpos+1]));
-                } catch (FileNotFoundException e) {
-                    System.err.println("Error: " + e.getMessage());
-                    e.printStackTrace(System.err);
-                    System.exit(1);
-                }
-                argpos += 2;
-                arglen -= 2;
-            } else {
-                System.err.println("Error: Illegal arg count");
-                System.exit(1);
-            }
-        } else {
-            out = System.out;
-        }
-
-        // Should be 2 or more args left
-        if (arglen <= 2) {
-            usage();
-            System.exit(1);
-        }
-
-        // Read the ordered set of files to be included in rt.jar.
-        // Read the set of files/directories to be excluded from rt.jar.
-        String classListFile = args[argpos];
-        String excludeListFile = args[argpos + 1];
-        argpos += 2;
-        arglen -= 2;
-
-        // If we run module mode, this will contain the list of subdirs to use
-        // as source roots. Otherwise it will just contain the current working
-        // dir.
-        List<File> moduleDirs = findModuleDirs(moduleMode);
-
-        // Create 2 lists and a set of processed files
-        List<String> orderList = readListFromFile(classListFile, true, moduleDirs);
-        List<String> excludeList = readListFromFile(excludeListFile, false, moduleDirs);
-        Set<String> processed = new HashSet<String>();
-
-        // Create set of all files and directories excluded, then expand
-        //   that list completely
-        Set<String> excludeSet = new HashSet<String>(excludeList);
-        Set<String> allFilesExcluded = expand(null, excludeSet, processed);
-
-        // Indicate all these have been processed, orderList too, kept to end.
-        processed.addAll(orderList);
-
-        // The remaining arguments are names of files/directories to be included
-        // in the jar file.
-        Set<String> inputSet = new HashSet<String>();
-        for (int i = 0; i < arglen; ++i) {
-            String name = args[argpos + i];
-            for (File dir : moduleDirs) {
-                String cleanName = cleanPath(new File(dir, name));
-                if ( cleanName != null && cleanName.length() > 0 && !inputSet.contains(cleanName) ) {
-                    inputSet.add(cleanName);
-                }
-            }
-        }
-
-        // Expand file/directory input so we get a complete set (except ordered)
-        //   Should be everything not excluded and not in order list.
-        Set<String> allFilesIncluded = expand(null, inputSet, processed);
-
-        // Create simple sorted list so we can add ordered items at end.
-        List<String> allFiles = new ArrayList<String>(allFilesIncluded);
-        Collections.sort(allFiles);
-
-        // Now add the ordered set to the end of the list.
-        // Add in REVERSE ORDER, so that the first element is closest to
-        // the end (and the index).
-        for (int i = orderList.size() - 1; i >= 0; --i) {
-            String s = orderList.get(i);
-            if (allFilesExcluded.contains(s)) {
-                // Disable this warning until 8005688 is fixed
-                // System.err.println("Included order file " + s
-                //    + " is also excluded, skipping.");
-            } else if (new File(s).exists()) {
-                allFiles.add(s);
-            } else {
-                System.err.println("Included order file " + s
-                    + " missing, skipping.");
-            }
-        }
-
-        // Print final results.
-        for (String str : allFiles) {
-            // If running in module mode, each line must be prepended with a
-            // '-C dir ' which points to the source root where that file is
-            // found.
-            if (moduleMode) {
-                int firstPathSep = str.indexOf(File.separator);
-                String moduleDir;
-                if (firstPathSep < 0) {
-                    moduleDir = ".";
-                } else {
-                    moduleDir = str.substring(0, firstPathSep);
-                }
-                String filePath = str.substring(firstPathSep + 1);
-                out.println("-C " + moduleDir + " " + filePath);
-            } else {
-                out.println(str);
-            }
-        }
-        out.flush();
-        out.close();
-    }
-
-    /*
-     * Read a file containing a list of files and directories into a List.
-     */
-    private List<String> readListFromFile(String fileName,
-            boolean addClassSuffix, List<File> moduleDirs) {
-
-        BufferedReader br = null;
-        List<String> list = new ArrayList<String>();
-        // If you see "-" for the name, just assume nothing was provided.
-        if ("-".equals(fileName)) {
-            return list;
-        }
-        try {
-            br = new BufferedReader(new FileReader(fileName));
-            // Read the input file a path at a time. # in column 1 is a comment.
-            while (true) {
-                String path = br.readLine();
-                if (path == null) {
-                    break;
-                }
-                // Look for comments
-                path = path.trim();
-                if (path.length() == 0
-                        || path.charAt(0) == '#') {
-                    continue;
-                }
-                // Add trailing .class if necessary
-                if (addClassSuffix && !path.endsWith(".class")) {
-                    path = path + ".class";
-                }
-                // Look for file in each module source root
-                boolean pathFound = false;
-                for (File dir : moduleDirs) {
-                    File file = new File(dir, path);
-                    if (file.exists()) {
-                        pathFound = true;
-                        // Normalize the path
-                        String cleanPath = cleanPath(new File(dir, path));
-                        // Add to list
-                        if (cleanPath != null && cleanPath.length() > 0 && !list.contains(cleanPath)) {
-                            list.add(cleanPath);
-                        }
-                    }
-                }
-                if (!pathFound) {
-                    System.err.println("WARNING: Path does not exist as file or directory: " + path);
-                }
-            }
-            br.close();
-        } catch (FileNotFoundException e) {
-            System.err.println("Can't find file \"" + fileName + "\".");
-            System.exit(1);
-        } catch (IOException e) {
-            e.printStackTrace();
-            System.exit(2);
-        }
-        return list;
-    }
-
-    /*
-     * Expands inputSet (files or dirs) into full set of all files that
-     * can be found by recursively descending directories.
-     * @param dir root directory
-     * @param inputSet set of files or dirs to look into
-     * @param processed files or dirs already processed
-     * @return set of files
-     */
-    private Set<String> expand(File dir,
-            Set<String> inputSet,
-            Set<String> processed) {
-        Set<String> includedFiles = new HashSet<String>();
-        if (inputSet.isEmpty()) {
-            return includedFiles;
-        }
-        for (String name : inputSet) {
-            // Depending on start location
-            File f = (dir == null) ? new File(name)
-                    : new File(dir, name);
-            // Normalized path to use
-            String path = cleanPath(f);
-            if (path != null && path.length() > 0
-                    && !processed.contains(path)) {
-                if (f.isFile()) {
-                    // Not in the excludeList, add it to both lists
-                    includedFiles.add(path);
-                    processed.add(path);
-                } else if (f.isDirectory()) {
-                    // Add the directory entries
-                    String[] dirList = f.list();
-                    Set<String> dirInputSet = new HashSet<String>();
-                    for (String x : dirList) {
-                        dirInputSet.add(x);
-                    }
-                    // Process all entries in this directory
-                    Set<String> subList = expand(f, dirInputSet, processed);
-                    includedFiles.addAll(subList);
-                    processed.add(path);
-                }
-            }
-        }
-        return includedFiles;
-    }
-
-    /**
-     * Find all module sub directories to be used as source roots.
-     * @param moduleMode If true, assume sub directories are modules, otherwise
-     *                   just use current working directory.
-     * @return List of all found source roots
-     */
-    private List<File> findModuleDirs(boolean moduleMode) {
-        File cwd = new File(".");
-        List<File> moduleDirs = new ArrayList<File>();
-        if (moduleMode) {
-            for (File f : cwd.listFiles()) {
-                if (f.isDirectory()) {
-                    moduleDirs.add(f);
-                }
-            }
-        } else {
-            moduleDirs.add(cwd);
-        }
-        return moduleDirs;
-    }
-
-    private String cleanPath(File f) {
-        String path = f.getPath();
-        if (f.isFile()) {
-            path = cleanFilePath(path);
-        } else if (f.isDirectory()) {
-            path = cleanDirPath(path);
-        } else {
-            System.err.println("WARNING: Path does not exist as file or directory: " + path);
-            path = null;
-        }
-        return path;
-    }
-
-    private String cleanFilePath(String path) {
-        // Remove leading and trailing whitespace
-        path = path.trim();
-        // Make all / and \ chars one
-        if (File.separatorChar == '/') {
-            path = path.replace('\\', '/');
-        } else {
-            path = path.replace('/', '\\');
-        }
-        // Remove leading ./
-        while (path.startsWith("." + File.separator)) {
-            path = path.substring(2);
-        }
-        return path;
-    }
-
-    private String cleanDirPath(String path) {
-        path = cleanFilePath(path);
-        // Make sure it ends with a file separator
-        if (!path.endsWith(File.separator)) {
-            path = path + File.separator;
-        }
-        // Remove any /./ in the path.
-        if (path.endsWith(File.separator + "." + File.separator)) {
-            path = path.substring(0, path.length() - 2);
-        }
-        return path;
-    }
-
-}
--- a/make/langtools/intellij/build.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/langtools/intellij/build.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -1,7 +1,7 @@
 <!-- importing.xml -->
 <project name="langtools" basedir = "../../..">
 
-    <script language="javascript" classpath="${idea.dir}/classes">
+    <script language="javascript" classpath=".idea/classes">
         var LangtoolsLogger = Java.type("idea.LangtoolsIdeaAntLogger");
         new LangtoolsLogger(project)
     </script>
--- a/make/langtools/intellij/template/ant.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/langtools/intellij/template/ant.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -5,7 +5,6 @@
       <properties>
 	    <property name="langtools.jdk.home" value="@IDEA_TARGET_JDK@" />
         <property name="intellij.ismake" value="$IsMake$" />
-        <property name="idea.dir" value="$ModuleFileDir$" />
       </properties>
       <executeOn event="afterCompilation" target="post-make" />
     </buildFile>
--- a/make/langtools/intellij/template/misc.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/langtools/intellij/template/misc.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -13,6 +13,6 @@
     </ant>
   </component>
   <component name="ProjectRootManager" version="2" languageLevel="JDK_1_8" assert-keyword="true" jdk-15="true" project-jdk-name="1.8" project-jdk-type="JavaSDK">
-    <output url="file://$PROJECT_DIR$/build/.idea-support/out" />
+    <output url="file://$PROJECT_DIR$/build" />
   </component>
 </project>
--- a/make/langtools/intellij/template/runConfigurations/javac.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/langtools/intellij/template/runConfigurations/javac.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -16,7 +16,7 @@
     <ConfigurationWrapper RunnerId="Run" />
     <method>
       <option name="Make" enabled="false" />
-      <option name="AntTarget" enabled="true" antfile="file://$PROJECT_DIR$/.idea/build.xml" target="build-all-classes" />
+      <option name="AntTarget" enabled="true" antfile="file://$PROJECT_DIR$/make/langtools/intellij/build.xml" target="build-all-classes" />
     </method>
   </configuration>
 </component>
--- a/make/langtools/intellij/template/runConfigurations/javadoc.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/langtools/intellij/template/runConfigurations/javadoc.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -16,7 +16,7 @@
     <ConfigurationWrapper RunnerId="Run" />
     <method>
       <option name="Make" enabled="false" />
-      <option name="AntTarget" enabled="true" antfile="file://$PROJECT_DIR$/.idea/build.xml" target="build-all-classes" />
+      <option name="AntTarget" enabled="true" antfile="file://$PROJECT_DIR$/make/langtools/intellij/build.xml" target="build-all-classes" />
     </method>
   </configuration>
 </component>
--- a/make/langtools/intellij/template/runConfigurations/javap.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/langtools/intellij/template/runConfigurations/javap.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -16,7 +16,7 @@
     <ConfigurationWrapper RunnerId="Run" />
     <method>
       <option name="Make" enabled="false" />
-      <option name="AntTarget" enabled="true" antfile="file://$PROJECT_DIR$/.idea/build.xml" target="build-all-classes" />
+      <option name="AntTarget" enabled="true" antfile="file://$PROJECT_DIR$/make/langtools/intellij/build.xml" target="build-all-classes" />
     </method>
   </configuration>
 </component>
--- a/make/langtools/intellij/template/runConfigurations/jshell.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/langtools/intellij/template/runConfigurations/jshell.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -14,7 +14,7 @@
     <envs />
     <method>
       <option name="Make" enabled="false" />
-      <option name="AntTarget" enabled="true" antfile="file://$PROJECT_DIR$/.idea/build.xml" target="build-all-classes" />
+      <option name="AntTarget" enabled="true" antfile="file://$PROJECT_DIR$/make/langtools/intellij/build.xml" target="build-all-classes" />
     </method>
   </configuration>
 </component>
--- a/make/langtools/intellij/template/runConfigurations/sjavac.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/langtools/intellij/template/runConfigurations/sjavac.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -16,7 +16,7 @@
     <ConfigurationWrapper RunnerId="Run" />
     <method>
       <option name="Make" enabled="false" />
-      <option name="AntTarget" enabled="true" antfile="file://$PROJECT_DIR$/.idea/build.xml" target="build-all-classes" />
+      <option name="AntTarget" enabled="true" antfile="file://$PROJECT_DIR$/make/langtools/intellij/build.xml" target="build-all-classes" />
     </method>
   </configuration>
 </component>
--- a/make/launcher/Launcher-jdk.jconsole.gmk	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/launcher/Launcher-jdk.jconsole.gmk	Thu Sep 13 22:05:54 2018 +0200
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2011, 2015, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2011, 2018, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -28,6 +28,7 @@
 $(eval $(call SetupBuildLauncher, jconsole, \
     MAIN_CLASS := sun.tools.jconsole.JConsole, \
     JAVA_ARGS := --add-opens java.base/java.io=jdk.jconsole \
+                 --add-modules ALL-DEFAULT \
 		 -Djconsole.showOutputViewer, \
     CFLAGS_windows := -DJAVAW, \
     LIBS_windows := user32.lib, \
--- a/make/lib/CoreLibraries.gmk	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/lib/CoreLibraries.gmk	Thu Sep 13 22:05:54 2018 +0200
@@ -68,7 +68,7 @@
       CFLAGS_linux_ppc64le := -ffp-contract=off, \
       CFLAGS_linux_s390x := -ffp-contract=off, \
       CFLAGS_linux_aarch64 := -ffp-contract=off, \
-      DISABLED_WARNINGS_gcc := sign-compare misleading-indentation, \
+      DISABLED_WARNINGS_gcc := sign-compare misleading-indentation array-bounds, \
       DISABLED_WARNINGS_microsoft := 4146 4244 4018, \
       ARFLAGS := $(ARFLAGS), \
       OBJECT_DIR := $(SUPPORT_OUTPUTDIR)/native/$(MODULE)/libfdlibm, \
--- a/make/lib/Lib-java.base.gmk	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/lib/Lib-java.base.gmk	Thu Sep 13 22:05:54 2018 +0200
@@ -128,14 +128,6 @@
 
 ifeq ($(OPENJDK_TARGET_OS_TYPE), unix)
   ifeq ($(STATIC_BUILD), false)
-
-    LIBJSIG_MAPFILE := $(wildcard $(TOPDIR)/make/mapfiles/libjsig/mapfile-vers-$(OPENJDK_TARGET_OS))
-
-    ifeq ($(OPENJDK_TARGET_OS), linux)
-      # FIXME: This is probably not what we want to do, but keep it now for compatibility.
-      LIBJSIG_CFLAGS := $(EXPORT_ALL_SYMBOLS)
-    endif
-
     $(eval $(call SetupJdkLibrary, BUILD_LIBJSIG, \
         NAME := jsig, \
         CFLAGS := $(CFLAGS_JDKLIB) $(LIBJSIG_CFLAGS), \
@@ -144,7 +136,6 @@
         LIBS_linux := $(LIBDL), \
         LIBS_solaris := $(LIBDL), \
         LIBS_aix := $(LIBDL), \
-        MAPFILE := $(LIBJSIG_MAPFILE), \
     ))
 
     TARGETS += $(BUILD_LIBJSIG)
--- a/make/mapfiles/libjsig/mapfile-vers-solaris	Thu Aug 30 22:06:18 2018 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,37 +0,0 @@
-#
-# Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
-# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
-#
-# This code is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License version 2 only, as
-# published by the Free Software Foundation.
-#
-# This code is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-# version 2 for more details (a copy is included in the LICENSE file that
-# accompanied this code).
-#
-# You should have received a copy of the GNU General Public License version
-# 2 along with this work; if not, write to the Free Software Foundation,
-# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
-#
-# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
-# or visit www.oracle.com if you need additional information or have any
-# questions.
-#  
-#
-
-# Define library interface.
-
-SUNWprivate_1.1 {
-        global:
-            JVM_begin_signal_setting;
-            JVM_end_signal_setting;
-            JVM_get_signal_action;
-            sigaction;
-            signal;
-            sigset;
-        local:
-                *;
-};
--- a/make/mapfiles/libjsound/mapfile-vers	Thu Aug 30 22:06:18 2018 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,83 +0,0 @@
-#
-# Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
-# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
-#
-# This code is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License version 2 only, as
-# published by the Free Software Foundation.  Oracle designates this
-# particular file as subject to the "Classpath" exception as provided
-# by Oracle in the LICENSE file that accompanied this code.
-#
-# This code is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-# version 2 for more details (a copy is included in the LICENSE file that
-# accompanied this code).
-#
-# You should have received a copy of the GNU General Public License version
-# 2 along with this work; if not, write to the Free Software Foundation,
-# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
-#
-# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
-# or visit www.oracle.com if you need additional information or have any
-# questions.
-#
-
-# Define library interface.
-
-SUNWprivate_1.1 {
-    global:
-		Java_com_sun_media_sound_DirectAudioDevice_nAvailable;
-		Java_com_sun_media_sound_DirectAudioDevice_nClose;
-		Java_com_sun_media_sound_DirectAudioDevice_nFlush;
-		Java_com_sun_media_sound_DirectAudioDevice_nGetBufferSize;
-		Java_com_sun_media_sound_DirectAudioDevice_nGetBytePosition;
-		Java_com_sun_media_sound_DirectAudioDevice_nGetFormats;
-		Java_com_sun_media_sound_DirectAudioDevice_nIsStillDraining;
-		Java_com_sun_media_sound_DirectAudioDevice_nOpen;
-		Java_com_sun_media_sound_DirectAudioDevice_nRead;
-		Java_com_sun_media_sound_DirectAudioDevice_nRequiresServicing;
-		Java_com_sun_media_sound_DirectAudioDevice_nService;
-		Java_com_sun_media_sound_DirectAudioDevice_nSetBytePosition;
-		Java_com_sun_media_sound_DirectAudioDevice_nStart;
-		Java_com_sun_media_sound_DirectAudioDevice_nStop;
-		Java_com_sun_media_sound_DirectAudioDevice_nWrite;
-		Java_com_sun_media_sound_DirectAudioDeviceProvider_nGetNumDevices;
-		Java_com_sun_media_sound_DirectAudioDeviceProvider_nNewDirectAudioDeviceInfo;
-		Java_com_sun_media_sound_MidiInDevice_nClose;
-		Java_com_sun_media_sound_MidiInDevice_nGetMessages;
-		Java_com_sun_media_sound_MidiInDevice_nGetTimeStamp;
-		Java_com_sun_media_sound_MidiInDevice_nOpen;
-		Java_com_sun_media_sound_MidiInDevice_nStart;
-		Java_com_sun_media_sound_MidiInDevice_nStop;
-		Java_com_sun_media_sound_MidiInDeviceProvider_nGetDescription;
-		Java_com_sun_media_sound_MidiInDeviceProvider_nGetName;
-		Java_com_sun_media_sound_MidiInDeviceProvider_nGetNumDevices;
-		Java_com_sun_media_sound_MidiInDeviceProvider_nGetVendor;
-		Java_com_sun_media_sound_MidiInDeviceProvider_nGetVersion;
-		Java_com_sun_media_sound_MidiOutDevice_nClose;
-		Java_com_sun_media_sound_MidiOutDevice_nGetTimeStamp;
-		Java_com_sun_media_sound_MidiOutDevice_nOpen;
-		Java_com_sun_media_sound_MidiOutDevice_nSendLongMessage;
-		Java_com_sun_media_sound_MidiOutDevice_nSendShortMessage;
-		Java_com_sun_media_sound_MidiOutDeviceProvider_nGetDescription;
-		Java_com_sun_media_sound_MidiOutDeviceProvider_nGetName;
-		Java_com_sun_media_sound_MidiOutDeviceProvider_nGetNumDevices;
-		Java_com_sun_media_sound_MidiOutDeviceProvider_nGetVendor;
-		Java_com_sun_media_sound_MidiOutDeviceProvider_nGetVersion;
-		Java_com_sun_media_sound_Platform_nIsBigEndian;
-		Java_com_sun_media_sound_PortMixer_nClose;
-		Java_com_sun_media_sound_PortMixer_nControlGetFloatValue;
-		Java_com_sun_media_sound_PortMixer_nControlGetIntValue;
-		Java_com_sun_media_sound_PortMixer_nControlSetFloatValue;
-		Java_com_sun_media_sound_PortMixer_nControlSetIntValue;
-		Java_com_sun_media_sound_PortMixer_nGetControls;
-		Java_com_sun_media_sound_PortMixer_nGetPortCount;
-		Java_com_sun_media_sound_PortMixer_nGetPortName;
-		Java_com_sun_media_sound_PortMixer_nGetPortType;
-		Java_com_sun_media_sound_PortMixer_nOpen;
-		Java_com_sun_media_sound_PortMixerProvider_nGetNumDevices;
-		Java_com_sun_media_sound_PortMixerProvider_nNewPortMixerInfo;
-    local:
-        *;
-};
--- a/make/mapfiles/libjvm_db/mapfile-vers	Thu Aug 30 22:06:18 2018 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,38 +0,0 @@
-#
-
-#
-# Copyright (c) 2005, 2008, Oracle and/or its affiliates. All rights reserved.
-# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
-#
-# This code is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License version 2 only, as
-# published by the Free Software Foundation.
-#
-# This code is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-# version 2 for more details (a copy is included in the LICENSE file that
-# accompanied this code).
-#
-# You should have received a copy of the GNU General Public License version
-# 2 along with this work; if not, write to the Free Software Foundation,
-# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
-#
-# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
-# or visit www.oracle.com if you need additional information or have any
-# questions.
-#  
-#
-
-# Define library interface.
-
-SUNWprivate_1.1 {
-        global:
-            Jagent_create;
-	    Jagent_destroy;
-	    Jframe_iter;
-	    #Jget_vframe;
-	    #Jlookup_by_regs;
-        local:
-                *;
-};
--- a/make/mapfiles/libjvm_dtrace/mapfile-vers	Thu Aug 30 22:06:18 2018 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,37 +0,0 @@
-#
-
-#
-# Copyright (c) 2006, 2008, Oracle and/or its affiliates. All rights reserved.
-# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
-#
-# This code is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License version 2 only, as
-# published by the Free Software Foundation.
-#
-# This code is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-# version 2 for more details (a copy is included in the LICENSE file that
-# accompanied this code).
-#
-# You should have received a copy of the GNU General Public License version
-# 2 along with this work; if not, write to the Free Software Foundation,
-# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
-#
-# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
-# or visit www.oracle.com if you need additional information or have any
-# questions.
-#  
-#
-
-# Define library interface for JVM-DTrace interface
-
-SUNWprivate_1.1 {
-        global:
-            jvm_attach;
-            jvm_get_last_error;
-            jvm_enable_dtprobes;
-            jvm_detach;
-        local:
-                *;
-};
--- a/make/nb_native/nbproject/configurations.xml	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/nb_native/nbproject/configurations.xml	Thu Sep 13 22:05:54 2018 +0200
@@ -2853,7 +2853,7 @@
               <in>globalDefinitions.cpp</in>
               <in>globalDefinitions.hpp</in>
               <in>globalDefinitions_gcc.hpp</in>
-              <in>globalDefinitions_sparcWorks.hpp</in>
+              <in>globalDefinitions_solstudio.hpp</in>
               <in>globalDefinitions_visCPP.hpp</in>
               <in>globalDefinitions_xlc.hpp</in>
               <in>growableArray.cpp</in>
@@ -15217,7 +15217,7 @@
             tool="3"
             flavor2="0">
       </item>
-      <item path="../../src/hotspot/share/utilities/globalDefinitions_sparcWorks.hpp"
+      <item path="../../src/hotspot/share/utilities/globalDefinitions_solstudio.hpp"
             ex="false"
             tool="3"
             flavor2="0">
@@ -15869,7 +15869,7 @@
             <Elem>SPARC_WORKS</Elem>
             <Elem>TARGET_ARCH_MODEL_x86_64</Elem>
             <Elem>TARGET_ARCH_x86</Elem>
-            <Elem>TARGET_COMPILER_sparcWorks</Elem>
+            <Elem>TARGET_COMPILER_solstudio</Elem>
             <Elem>TARGET_OS_ARCH_MODEL_solaris_x86_64</Elem>
             <Elem>TARGET_OS_ARCH_solaris_x86</Elem>
             <Elem>TARGET_OS_FAMILY_solaris</Elem>
@@ -15922,7 +15922,7 @@
             <Elem>SPARC_WORKS</Elem>
             <Elem>TARGET_ARCH_MODEL_x86_64</Elem>
             <Elem>TARGET_ARCH_x86</Elem>
-            <Elem>TARGET_COMPILER_sparcWorks</Elem>
+            <Elem>TARGET_COMPILER_solstudio</Elem>
             <Elem>TARGET_OS_ARCH_MODEL_solaris_x86_64</Elem>
             <Elem>TARGET_OS_ARCH_solaris_x86</Elem>
             <Elem>TARGET_OS_FAMILY_solaris</Elem>
@@ -28989,7 +28989,7 @@
             tool="3"
             flavor2="0">
       </item>
-      <item path="../../src/hotspot/share/utilities/globalDefinitions_sparcWorks.hpp"
+      <item path="../../src/hotspot/share/utilities/globalDefinitions_solstudio.hpp"
             ex="false"
             tool="3"
             flavor2="0">
--- a/make/scripts/compare_exceptions.sh.incl	Thu Aug 30 22:06:18 2018 +0200
+++ b/make/scripts/compare_exceptions.sh.incl	Thu Sep 13 22:05:54 2018 +0200
@@ -350,13 +350,11 @@
 
   MAX_KNOWN_DIS_DIFF_SIZE="3000"
 
-  # On slowdebug the disassembly can differ randomly.
-  if [ "$DEBUG_LEVEL" = "slowdebug" ]; then
-    ACCEPTED_DIS_DIFF="
-        ./lib/libfontmanager.so
-        ./lib/server/libjvm.so
-    "
-  fi
+  ACCEPTED_DIS_DIFF="
+      ./lib/libfontmanager.so
+      ./lib/libsaproc.so
+      ./lib/server/libjvm.so
+  "
 
   SKIP_FULLDUMP_DIFF="true"
 
--- a/src/hotspot/cpu/aarch64/aarch64.ad	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/aarch64/aarch64.ad	Thu Sep 13 22:05:54 2018 +0200
@@ -3378,26 +3378,18 @@
     // Load markOop from object into displaced_header.
     __ ldr(disp_hdr, Address(oop, oopDesc::mark_offset_in_bytes()));
 
-    // Always do locking in runtime.
-    if (EmitSync & 0x01) {
-      __ cmp(oop, zr);
-      return;
-    }
-
     if (UseBiasedLocking && !UseOptoBiasInlining) {
       __ biased_locking_enter(box, oop, disp_hdr, tmp, true, cont);
     }
 
     // Handle existing monitor
-    if ((EmitSync & 0x02) == 0) {
-      // we can use AArch64's bit test and branch here but
-      // markoopDesc does not define a bit index just the bit value
-      // so assert in case the bit pos changes
-#     define __monitor_value_log2 1
-      assert(markOopDesc::monitor_value == (1 << __monitor_value_log2), "incorrect bit position");
-      __ tbnz(disp_hdr, __monitor_value_log2, object_has_monitor);
-#     undef __monitor_value_log2
-    }
+    // we can use AArch64's bit test and branch here but
+    // markoopDesc does not define a bit index just the bit value
+    // so assert in case the bit pos changes
+#   define __monitor_value_log2 1
+    assert(markOopDesc::monitor_value == (1 << __monitor_value_log2), "incorrect bit position");
+    __ tbnz(disp_hdr, __monitor_value_log2, object_has_monitor);
+#   undef __monitor_value_log2
 
     // Set displaced_header to be (markOop of object | UNLOCK_VALUE).
     __ orr(disp_hdr, disp_hdr, markOopDesc::unlocked_value);
@@ -3455,63 +3447,62 @@
     __ str(tmp/*==0, perhaps*/, Address(box, BasicLock::displaced_header_offset_in_bytes()));
 
     // Handle existing monitor.
-    if ((EmitSync & 0x02) == 0) {
-      __ b(cont);
-
-      __ bind(object_has_monitor);
-      // The object's monitor m is unlocked iff m->owner == NULL,
-      // otherwise m->owner may contain a thread or a stack address.
-      //
-      // Try to CAS m->owner from NULL to current thread.
-      __ add(tmp, disp_hdr, (ObjectMonitor::owner_offset_in_bytes()-markOopDesc::monitor_value));
-      __ mov(disp_hdr, zr);
-
-      if (UseLSE) {
-        __ mov(rscratch1, disp_hdr);
-        __ casal(Assembler::xword, rscratch1, rthread, tmp);
-        __ cmp(rscratch1, disp_hdr);
-      } else {
-        Label retry_load, fail;
-        if ((VM_Version::features() & VM_Version::CPU_STXR_PREFETCH))
-          __ prfm(Address(tmp), PSTL1STRM);
-        __ bind(retry_load);
-        __ ldaxr(rscratch1, tmp);
-        __ cmp(disp_hdr, rscratch1);
-        __ br(Assembler::NE, fail);
-        // use stlxr to ensure update is immediately visible
-        __ stlxr(rscratch1, rthread, tmp);
-        __ cbnzw(rscratch1, retry_load);
-        __ bind(fail);
+    __ b(cont);
+
+    __ bind(object_has_monitor);
+    // The object's monitor m is unlocked iff m->owner == NULL,
+    // otherwise m->owner may contain a thread or a stack address.
+    //
+    // Try to CAS m->owner from NULL to current thread.
+    __ add(tmp, disp_hdr, (ObjectMonitor::owner_offset_in_bytes()-markOopDesc::monitor_value));
+    __ mov(disp_hdr, zr);
+
+    if (UseLSE) {
+      __ mov(rscratch1, disp_hdr);
+      __ casal(Assembler::xword, rscratch1, rthread, tmp);
+      __ cmp(rscratch1, disp_hdr);
+    } else {
+      Label retry_load, fail;
+      if ((VM_Version::features() & VM_Version::CPU_STXR_PREFETCH)) {
+        __ prfm(Address(tmp), PSTL1STRM);
       }
-
-      // Label next;
-      // __ cmpxchgptr(/*oldv=*/disp_hdr,
-      //               /*newv=*/rthread,
-      //               /*addr=*/tmp,
-      //               /*tmp=*/rscratch1,
-      //               /*succeed*/next,
-      //               /*fail*/NULL);
-      // __ bind(next);
-
-      // store a non-null value into the box.
-      __ str(box, Address(box, BasicLock::displaced_header_offset_in_bytes()));
-
-      // PPC port checks the following invariants
-      // #ifdef ASSERT
-      // bne(flag, cont);
-      // We have acquired the monitor, check some invariants.
-      // addw(/*monitor=*/tmp, tmp, -ObjectMonitor::owner_offset_in_bytes());
-      // Invariant 1: _recursions should be 0.
-      // assert(ObjectMonitor::recursions_size_in_bytes() == 8, "unexpected size");
-      // assert_mem8_is_zero(ObjectMonitor::recursions_offset_in_bytes(), tmp,
-      //                        "monitor->_recursions should be 0", -1);
-      // Invariant 2: OwnerIsThread shouldn't be 0.
-      // assert(ObjectMonitor::OwnerIsThread_size_in_bytes() == 4, "unexpected size");
-      //assert_mem4_isnot_zero(ObjectMonitor::OwnerIsThread_offset_in_bytes(), tmp,
-      //                           "monitor->OwnerIsThread shouldn't be 0", -1);
-      // #endif
+      __ bind(retry_load);
+      __ ldaxr(rscratch1, tmp);
+      __ cmp(disp_hdr, rscratch1);
+      __ br(Assembler::NE, fail);
+      // use stlxr to ensure update is immediately visible
+      __ stlxr(rscratch1, rthread, tmp);
+      __ cbnzw(rscratch1, retry_load);
+      __ bind(fail);
     }
 
+    // Label next;
+    // __ cmpxchgptr(/*oldv=*/disp_hdr,
+    //               /*newv=*/rthread,
+    //               /*addr=*/tmp,
+    //               /*tmp=*/rscratch1,
+    //               /*succeed*/next,
+    //               /*fail*/NULL);
+    // __ bind(next);
+
+    // store a non-null value into the box.
+    __ str(box, Address(box, BasicLock::displaced_header_offset_in_bytes()));
+
+    // PPC port checks the following invariants
+    // #ifdef ASSERT
+    // bne(flag, cont);
+    // We have acquired the monitor, check some invariants.
+    // addw(/*monitor=*/tmp, tmp, -ObjectMonitor::owner_offset_in_bytes());
+    // Invariant 1: _recursions should be 0.
+    // assert(ObjectMonitor::recursions_size_in_bytes() == 8, "unexpected size");
+    // assert_mem8_is_zero(ObjectMonitor::recursions_offset_in_bytes(), tmp,
+    //                        "monitor->_recursions should be 0", -1);
+    // Invariant 2: OwnerIsThread shouldn't be 0.
+    // assert(ObjectMonitor::OwnerIsThread_size_in_bytes() == 4, "unexpected size");
+    //assert_mem4_isnot_zero(ObjectMonitor::OwnerIsThread_offset_in_bytes(), tmp,
+    //                           "monitor->OwnerIsThread shouldn't be 0", -1);
+    // #endif
+
     __ bind(cont);
     // flag == EQ indicates success
     // flag == NE indicates failure
@@ -3533,12 +3524,6 @@
 
     assert_different_registers(oop, box, tmp, disp_hdr);
 
-    // Always do locking in runtime.
-    if (EmitSync & 0x01) {
-      __ cmp(oop, zr); // Oop can't be 0 here => always false.
-      return;
-    }
-
     if (UseBiasedLocking && !UseOptoBiasInlining) {
       __ biased_locking_exit(oop, tmp, cont);
     }
@@ -3552,10 +3537,8 @@
 
 
     // Handle existing monitor.
-    if ((EmitSync & 0x02) == 0) {
-      __ ldr(tmp, Address(oop, oopDesc::mark_offset_in_bytes()));
-      __ tbnz(disp_hdr, exact_log2(markOopDesc::monitor_value), object_has_monitor);
-    }
+    __ ldr(tmp, Address(oop, oopDesc::mark_offset_in_bytes()));
+    __ tbnz(disp_hdr, exact_log2(markOopDesc::monitor_value), object_has_monitor);
 
     // Check if it is still a light weight lock, this is is true if we
     // see the stack address of the basicLock in the markOop of the
@@ -3590,27 +3573,25 @@
     __ bind(cas_failed);
 
     // Handle existing monitor.
-    if ((EmitSync & 0x02) == 0) {
-      __ b(cont);
-
-      __ bind(object_has_monitor);
-      __ add(tmp, tmp, -markOopDesc::monitor_value); // monitor
-      __ ldr(rscratch1, Address(tmp, ObjectMonitor::owner_offset_in_bytes()));
-      __ ldr(disp_hdr, Address(tmp, ObjectMonitor::recursions_offset_in_bytes()));
-      __ eor(rscratch1, rscratch1, rthread); // Will be 0 if we are the owner.
-      __ orr(rscratch1, rscratch1, disp_hdr); // Will be 0 if there are 0 recursions
-      __ cmp(rscratch1, zr);
-      __ br(Assembler::NE, cont);
-
-      __ ldr(rscratch1, Address(tmp, ObjectMonitor::EntryList_offset_in_bytes()));
-      __ ldr(disp_hdr, Address(tmp, ObjectMonitor::cxq_offset_in_bytes()));
-      __ orr(rscratch1, rscratch1, disp_hdr); // Will be 0 if both are 0.
-      __ cmp(rscratch1, zr);
-      __ cbnz(rscratch1, cont);
-      // need a release store here
-      __ lea(tmp, Address(tmp, ObjectMonitor::owner_offset_in_bytes()));
-      __ stlr(rscratch1, tmp); // rscratch1 is zero
-    }
+    __ b(cont);
+
+    __ bind(object_has_monitor);
+    __ add(tmp, tmp, -markOopDesc::monitor_value); // monitor
+    __ ldr(rscratch1, Address(tmp, ObjectMonitor::owner_offset_in_bytes()));
+    __ ldr(disp_hdr, Address(tmp, ObjectMonitor::recursions_offset_in_bytes()));
+    __ eor(rscratch1, rscratch1, rthread); // Will be 0 if we are the owner.
+    __ orr(rscratch1, rscratch1, disp_hdr); // Will be 0 if there are 0 recursions
+    __ cmp(rscratch1, zr);
+    __ br(Assembler::NE, cont);
+
+    __ ldr(rscratch1, Address(tmp, ObjectMonitor::EntryList_offset_in_bytes()));
+    __ ldr(disp_hdr, Address(tmp, ObjectMonitor::cxq_offset_in_bytes()));
+    __ orr(rscratch1, rscratch1, disp_hdr); // Will be 0 if both are 0.
+    __ cmp(rscratch1, zr);
+    __ cbnz(rscratch1, cont);
+    // need a release store here
+    __ lea(tmp, Address(tmp, ObjectMonitor::owner_offset_in_bytes()));
+    __ stlr(rscratch1, tmp); // rscratch1 is zero
 
     __ bind(cont);
     // flag == EQ indicates success
--- a/src/hotspot/cpu/aarch64/assembler_aarch64.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/aarch64/assembler_aarch64.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -2356,7 +2356,7 @@
 
   // FMLA/FMLS - Vector - Scalar
   INSN(fmlavs, 0, 0b0001);
-  INSN(fmlsvs, 0, 0b0001);
+  INSN(fmlsvs, 0, 0b0101);
   // FMULX - Vector - Scalar
   INSN(fmulxvs, 1, 0b1001);
 
--- a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -40,16 +40,21 @@
 #include "oops/accessDecorators.hpp"
 #include "oops/compressedOops.inline.hpp"
 #include "oops/klass.inline.hpp"
-#include "oops/oop.hpp"
-#include "opto/compile.hpp"
-#include "opto/intrinsicnode.hpp"
-#include "opto/node.hpp"
 #include "runtime/biasedLocking.hpp"
 #include "runtime/icache.hpp"
 #include "runtime/interfaceSupport.inline.hpp"
 #include "runtime/jniHandles.inline.hpp"
 #include "runtime/sharedRuntime.hpp"
 #include "runtime/thread.hpp"
+#ifdef COMPILER1
+#include "c1/c1_LIRAssembler.hpp"
+#endif
+#ifdef COMPILER2
+#include "oops/oop.hpp"
+#include "opto/compile.hpp"
+#include "opto/intrinsicnode.hpp"
+#include "opto/node.hpp"
+#endif
 
 #ifdef PRODUCT
 #define BLOCK_COMMENT(str) /* nothing */
@@ -741,12 +746,15 @@
 
   // We need a trampoline if branches are far.
   if (far_branches()) {
+    bool in_scratch_emit_size = false;
+#ifdef COMPILER2
     // We don't want to emit a trampoline if C2 is generating dummy
     // code during its branch shortening phase.
     CompileTask* task = ciEnv::current()->task();
-    bool in_scratch_emit_size =
+    in_scratch_emit_size =
       (task != NULL && is_c2_compile(task->comp_level()) &&
        Compile::current()->in_scratch_emit_size());
+#endif
     if (!in_scratch_emit_size) {
       address stub = emit_trampoline_stub(offset(), entry.target());
       if (stub == NULL) {
@@ -780,7 +788,9 @@
 
 address MacroAssembler::emit_trampoline_stub(int insts_call_instruction_offset,
                                              address dest) {
-  address stub = start_a_stub(Compile::MAX_stubs_size/2);
+  // Max stub size: alignment nop, TrampolineStub.
+  address stub = start_a_stub(NativeInstruction::instruction_size
+                   + NativeCallTrampolineStub::instruction_size);
   if (stub == NULL) {
     return NULL;  // CodeBuffer::expand failed
   }
@@ -4324,6 +4334,7 @@
   }
 }
 
+#ifdef COMPILER2
 typedef void (MacroAssembler::* chr_insn)(Register Rt, const Address &adr);
 
 // Search for str1 in str2 and return index or -1
@@ -5053,6 +5064,7 @@
 
   BLOCK_COMMENT("} string_compare");
 }
+#endif // COMPILER2
 
 // This method checks if provided byte array contains byte with highest bit set.
 void MacroAssembler::has_negatives(Register ary1, Register len, Register result) {
--- a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -592,7 +592,7 @@
   // Required platform-specific helpers for Label::patch_instructions.
   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
   static int pd_patch_instruction_size(address branch, address target);
-  static void pd_patch_instruction(address branch, address target) {
+  static void pd_patch_instruction(address branch, address target, const char* file = NULL, int line = 0) {
     pd_patch_instruction_size(branch, target);
   }
   static address pd_call_destination(address branch) {
--- a/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -5792,6 +5792,7 @@
     // byte_array_inflate stub for large arrays.
     StubRoutines::aarch64::_large_byte_array_inflate = generate_large_byte_array_inflate();
 
+#ifdef COMPILER2
     if (UseMultiplyToLenIntrinsic) {
       StubRoutines::_multiplyToLen = generate_multiplyToLen();
     }
@@ -5817,6 +5818,7 @@
       // because it's faster for the sizes of modulus we care about.
       StubRoutines::_montgomerySquare = g.generate_multiply();
     }
+#endif // COMPILER2
 
 #ifndef BUILTIN_SIM
     // generate GHASH intrinsics code
--- a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -217,9 +217,11 @@
     if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) {
       FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true);
     }
+#ifdef COMPILER2
     if (FLAG_IS_DEFAULT(UseFPUForSpilling)) {
       FLAG_SET_DEFAULT(UseFPUForSpilling, true);
     }
+#endif
   }
 
   // Cortex A53
@@ -384,6 +386,15 @@
     FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
   }
 
+  if (FLAG_IS_DEFAULT(UseBarriersForVolatile)) {
+    UseBarriersForVolatile = (_features & CPU_DMB_ATOMICS) != 0;
+  }
+
+  if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
+    UsePopCountInstruction = true;
+  }
+
+#ifdef COMPILER2
   if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
     UseMultiplyToLenIntrinsic = true;
   }
@@ -396,14 +407,6 @@
     UseMulAddIntrinsic = true;
   }
 
-  if (FLAG_IS_DEFAULT(UseBarriersForVolatile)) {
-    UseBarriersForVolatile = (_features & CPU_DMB_ATOMICS) != 0;
-  }
-
-  if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
-    UsePopCountInstruction = true;
-  }
-
   if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
     UseMontgomeryMultiplyIntrinsic = true;
   }
@@ -411,7 +414,6 @@
     UseMontgomerySquareIntrinsic = true;
   }
 
-#ifdef COMPILER2
   if (FLAG_IS_DEFAULT(OptoScheduling)) {
     OptoScheduling = true;
   }
--- a/src/hotspot/cpu/aarch64/vtableStubs_aarch64.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/aarch64/vtableStubs_aarch64.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -44,24 +44,30 @@
 #define __ masm->
 
 #ifndef PRODUCT
-extern "C" void bad_compiled_vtable_index(JavaThread* thread,
-                                          oop receiver,
-                                          int index);
+extern "C" void bad_compiled_vtable_index(JavaThread* thread, oop receiver, int index);
 #endif
 
 VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
-  const int aarch64_code_length = VtableStub::pd_code_size_limit(true);
-  VtableStub* s = new(aarch64_code_length) VtableStub(true, vtable_index);
+  // Read "A word on VtableStub sizing" in share/code/vtableStubs.hpp for details on stub sizing.
+  const int stub_code_length = code_size_limit(true);
+  VtableStub* s = new(stub_code_length) VtableStub(true, vtable_index);
   // Can be NULL if there is no free space in the code cache.
   if (s == NULL) {
     return NULL;
   }
 
-  ResourceMark rm;
-  CodeBuffer cb(s->entry_point(), aarch64_code_length);
+  // Count unused bytes in instruction sequences of variable size.
+  // We add them to the computed buffer size in order to avoid
+  // overflow in subsequently generated stubs.
+  address   start_pc;
+  int       slop_bytes = 0;
+  int       slop_delta = 0;
+
+  ResourceMark    rm;
+  CodeBuffer      cb(s->entry_point(), stub_code_length);
   MacroAssembler* masm = new MacroAssembler(&cb);
 
-#ifndef PRODUCT
+#if (!defined(PRODUCT) && defined(COMPILER2))
   if (CountCompiledCalls) {
     __ lea(r16, ExternalAddress((address) SharedRuntime::nof_megamorphic_calls_addr()));
     __ incrementw(Address(r16));
@@ -78,21 +84,35 @@
 #ifndef PRODUCT
   if (DebugVtables) {
     Label L;
+    // TODO: find upper bound for this debug code.
+    start_pc = __ pc();
+
     // check offset vs vtable length
     __ ldrw(rscratch1, Address(r16, Klass::vtable_length_offset()));
     __ cmpw(rscratch1, vtable_index * vtableEntry::size());
     __ br(Assembler::GT, L);
     __ enter();
     __ mov(r2, vtable_index);
-    __ call_VM(noreg,
-               CAST_FROM_FN_PTR(address, bad_compiled_vtable_index), j_rarg0, r2);
+
+    __ call_VM(noreg, CAST_FROM_FN_PTR(address, bad_compiled_vtable_index), j_rarg0, r2);
+    const ptrdiff_t estimate = 256;
+    const ptrdiff_t codesize = __ pc() - start_pc;
+    slop_delta  = estimate - codesize;  // call_VM varies in length, depending on data
+    slop_bytes += slop_delta;
+    assert(slop_delta >= 0, "vtable #%d: Code size estimate (%d) for DebugVtables too small, required: %d", vtable_index, (int)estimate, (int)codesize);
+
     __ leave();
     __ bind(L);
   }
 #endif // PRODUCT
 
+  start_pc = __ pc();
   __ lookup_virtual_method(r16, vtable_index, rmethod);
+  slop_delta  = 8 - (int)(__ pc() - start_pc);
+  slop_bytes += slop_delta;
+  assert(slop_delta >= 0, "negative slop(%d) encountered, adjust code size estimate!", slop_delta);
 
+#ifndef PRODUCT
   if (DebugVtables) {
     Label L;
     __ cbz(rmethod, L);
@@ -101,6 +121,8 @@
     __ stop("Vtable entry is NULL");
     __ bind(L);
   }
+#endif // PRODUCT
+
   // r0: receiver klass
   // rmethod: Method*
   // r2: receiver
@@ -108,43 +130,46 @@
   __ ldr(rscratch1, Address(rmethod, Method::from_compiled_offset()));
   __ br(rscratch1);
 
-  __ flush();
+  masm->flush();
+  bookkeeping(masm, tty, s, npe_addr, ame_addr, true, vtable_index, slop_bytes, 0);
 
-  if (PrintMiscellaneous && (WizardMode || Verbose)) {
-    tty->print_cr("vtable #%d at " PTR_FORMAT "[%d] left over: %d",
-                  vtable_index, p2i(s->entry_point()),
-                  (int)(s->code_end() - s->entry_point()),
-                  (int)(s->code_end() - __ pc()));
-  }
-  guarantee(__ pc() <= s->code_end(), "overflowed buffer");
-
-  s->set_exception_points(npe_addr, ame_addr);
   return s;
 }
 
 
 VtableStub* VtableStubs::create_itable_stub(int itable_index) {
-  // Note well: pd_code_size_limit is the absolute minimum we can get
-  // away with.  If you add code here, bump the code stub size
-  // returned by pd_code_size_limit!
-  const int code_length = VtableStub::pd_code_size_limit(false);
-  VtableStub* s = new(code_length) VtableStub(false, itable_index);
-  ResourceMark rm;
-  CodeBuffer cb(s->entry_point(), code_length);
+  // Read "A word on VtableStub sizing" in share/code/vtableStubs.hpp for details on stub sizing.
+  const int stub_code_length = code_size_limit(false);
+  VtableStub* s = new(stub_code_length) VtableStub(false, itable_index);
+  // Can be NULL if there is no free space in the code cache.
+  if (s == NULL) {
+    return NULL;
+  }
+  // Count unused bytes in instruction sequences of variable size.
+  // We add them to the computed buffer size in order to avoid
+  // overflow in subsequently generated stubs.
+  address   start_pc;
+  int       slop_bytes = 0;
+  int       slop_delta = 0;
+
+  ResourceMark    rm;
+  CodeBuffer      cb(s->entry_point(), stub_code_length);
   MacroAssembler* masm = new MacroAssembler(&cb);
 
-#ifndef PRODUCT
+#if (!defined(PRODUCT) && defined(COMPILER2))
   if (CountCompiledCalls) {
     __ lea(r10, ExternalAddress((address) SharedRuntime::nof_megamorphic_calls_addr()));
     __ incrementw(Address(r10));
   }
 #endif
 
+  // get receiver (need to skip return address on top of stack)
+  assert(VtableStub::receiver_location() == j_rarg0->as_VMReg(), "receiver expected in j_rarg0");
+
   // Entry arguments:
   //  rscratch2: CompiledICHolder
   //  j_rarg0: Receiver
 
-
   // Most registers are in use; we'll use r16, rmethod, r10, r11
   const Register recv_klass_reg     = r10;
   const Register holder_klass_reg   = r16; // declaring interface klass (DECC)
@@ -157,8 +182,8 @@
   __ ldr(resolved_klass_reg, Address(icholder_reg, CompiledICHolder::holder_klass_offset()));
   __ ldr(holder_klass_reg,   Address(icholder_reg, CompiledICHolder::holder_metadata_offset()));
 
-  // get receiver (need to skip return address on top of stack)
-  assert(VtableStub::receiver_location() == j_rarg0->as_VMReg(), "receiver expected in j_rarg0");
+  start_pc = __ pc();
+
   // get receiver klass (also an implicit null-check)
   address npe_addr = __ pc();
   __ load_klass(recv_klass_reg, j_rarg0);
@@ -172,16 +197,25 @@
                              L_no_such_interface,
                              /*return_method=*/false);
 
+  const ptrdiff_t  typecheckSize = __ pc() - start_pc;
+  start_pc = __ pc();
+
   // Get selected method from declaring class and itable index
   __ load_klass(recv_klass_reg, j_rarg0);   // restore recv_klass_reg
   __ lookup_interface_method(// inputs: rec. class, interface, itable index
-                       recv_klass_reg, holder_klass_reg, itable_index,
-                       // outputs: method, scan temp. reg
-                       rmethod, temp_reg,
-                       L_no_such_interface);
+                             recv_klass_reg, holder_klass_reg, itable_index,
+                             // outputs: method, scan temp. reg
+                             rmethod, temp_reg,
+                             L_no_such_interface);
 
-  // method (rmethod): Method*
-  // j_rarg0: receiver
+  const ptrdiff_t lookupSize = __ pc() - start_pc;
+
+  // Reduce "estimate" such that "padding" does not drop below 8.
+  const ptrdiff_t estimate = 152;
+  const ptrdiff_t codesize = typecheckSize + lookupSize;
+  slop_delta  = (int)(estimate - codesize);
+  slop_bytes += slop_delta;
+  assert(slop_delta >= 0, "itable #%d: Code size estimate (%d) for lookup_interface_method too small, required: %d", itable_index, (int)estimate, (int)codesize);
 
 #ifdef ASSERT
   if (DebugVtables) {
@@ -206,92 +240,17 @@
   // We force resolving of the call site by jumping to the "handle
   // wrong method" stub, and so let the interpreter runtime do all the
   // dirty work.
+  assert(SharedRuntime::get_handle_wrong_method_stub() != NULL, "check initialization order");
   __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
 
-  __ flush();
+  masm->flush();
+  bookkeeping(masm, tty, s, npe_addr, ame_addr, false, itable_index, slop_bytes, 0);
 
-  if (PrintMiscellaneous && (WizardMode || Verbose)) {
-    tty->print_cr("itable #%d at " PTR_FORMAT "[%d] left over: %d",
-                  itable_index, p2i(s->entry_point()),
-                  (int)(s->code_end() - s->entry_point()),
-                  (int)(s->code_end() - __ pc()));
-  }
-  guarantee(__ pc() <= s->code_end(), "overflowed buffer");
-
-  s->set_exception_points(npe_addr, ame_addr);
   return s;
 }
 
-
-int VtableStub::pd_code_size_limit(bool is_vtable_stub) {
-  int size = DebugVtables ? 216 : 0;
-  if (CountCompiledCalls)
-    size += 6 * 4;
-  // FIXME: vtable stubs only need 36 bytes
-  if (is_vtable_stub)
-    size += 52;
-  else
-    size += 176;
-  return size;
-
-  // In order to tune these parameters, run the JVM with VM options
-  // +PrintMiscellaneous and +WizardMode to see information about
-  // actual itable stubs.  Run it with -Xmx31G -XX:+UseCompressedOops.
-  //
-  // If Universe::narrow_klass_base is nonzero, decoding a compressed
-  // class can take zeveral instructions.
-  //
-  // The JVM98 app. _202_jess has a megamorphic interface call.
-  // The itable code looks like this:
-
-  //    ldr    xmethod, [xscratch2,#CompiledICHolder::holder_klass_offset]
-  //    ldr    x0, [xscratch2]
-  //    ldr    w10, [x1,#oopDesc::klass_offset_in_bytes]
-  //    mov    xheapbase, #0x3c000000                //   #narrow_klass_base
-  //    movk    xheapbase, #0x3f7, lsl #32
-  //    add    x10, xheapbase, x10
-  //    mov    xheapbase, #0xe7ff0000                //   #heapbase
-  //    movk    xheapbase, #0x3f7, lsl #32
-  //    ldr    w11, [x10,#vtable_length_offset]
-  //    add    x11, x10, x11, uxtx #3
-  //    add    x11, x11, #itableMethodEntry::method_offset_in_bytes
-  //    ldr    x10, [x11]
-  //    cmp    xmethod, x10
-  //    b.eq    found_method
-  // search:
-  //    cbz    x10, no_such_interface
-  //    add    x11, x11, #0x10
-  //    ldr    x10, [x11]
-  //    cmp    xmethod, x10
-  //    b.ne    search
-  // found_method:
-  //    ldr    w10, [x1,#oopDesc::klass_offset_in_bytes]
-  //    mov    xheapbase, #0x3c000000                //   #narrow_klass_base
-  //    movk    xheapbase, #0x3f7, lsl #32
-  //    add    x10, xheapbase, x10
-  //    mov    xheapbase, #0xe7ff0000                //   #heapbase
-  //    movk    xheapbase, #0x3f7, lsl #32
-  //    ldr    w11, [x10,#vtable_length_offset]
-  //    add    x11, x10, x11, uxtx #3
-  //    add    x11, x11, #itableMethodEntry::method_offset_in_bytes
-  //    add    x10, x10, #itentry_off
-  //    ldr    xmethod, [x11]
-  //    cmp    x0, xmethod
-  //    b.eq    found_method2
-  // search2:
-  //    cbz    xmethod, 0x000003ffa872e6cc
-  //    add    x11, x11, #0x10
-  //    ldr    xmethod, [x11]
-  //    cmp    x0, xmethod
-  //    b.ne    search2
-  // found_method2:
-  //    ldr    w11, [x11,#itableOffsetEntry::offset_offset_in_bytes]
-  //    ldr    xmethod, [x10,w11,uxtw]
-  //    ldr    xscratch1, [xmethod,#Method::from_compiled_offset]
-  //    br    xscratch1
-  // no_such_interface:
-  //    b      throw_ICCE_entry
-
+int VtableStub::pd_code_alignment() {
+  // aarch64 cache line size is not an architected constant. We just align on 4 bytes (instruction size).
+  const unsigned int icache_line_size = 4;
+  return icache_line_size;
 }
-
-int VtableStub::pd_code_alignment() { return 4; }
--- a/src/hotspot/cpu/arm/gc/shared/barrierSetAssembler_arm.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/arm/gc/shared/barrierSetAssembler_arm.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -50,6 +50,43 @@
     }
     break;
   }
+  case T_BOOLEAN: __ ldrb      (dst, src); break;
+  case T_BYTE:    __ ldrsb     (dst, src); break;
+  case T_CHAR:    __ ldrh      (dst, src); break;
+  case T_SHORT:   __ ldrsh     (dst, src); break;
+  case T_INT:     __ ldr_s32   (dst, src); break;
+  case T_ADDRESS: __ ldr       (dst, src); break;
+  case T_LONG:
+#ifdef AARCH64
+    __ ldr                     (dst, src); break;
+#else
+    assert(dst == noreg, "only to ltos");
+    __ add                     (src.index(), src.index(), src.base());
+    __ ldmia                   (src.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
+#endif // AARCH64
+    break;
+#ifdef __SOFTFP__
+  case T_FLOAT:
+    assert(dst == noreg, "only to ftos");
+    __ ldr                     (R0_tos, src);
+    break;
+  case T_DOUBLE:
+    assert(dst == noreg, "only to dtos");
+    __ add                     (src.index(), src.index(), src.base());
+    __ ldmia                   (src.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
+    break;
+#else
+  case T_FLOAT:
+    assert(dst == noreg, "only to ftos");
+    __ add(src.index(), src.index(), src.base());
+    __ ldr_float               (S0_tos, src.index());
+    break;
+  case T_DOUBLE:
+    assert(dst == noreg, "only to dtos");
+    __ add                     (src.index(), src.index(), src.base());
+    __ ldr_double              (D0_tos, src.index());
+    break;
+#endif
   default: Unimplemented();
   }
 
@@ -73,7 +110,7 @@
       } else
 #endif // AARCH64
       {
-        __ str(val, obj);
+      __ str(val, obj);
       }
     } else {
       assert(in_native, "why else?");
@@ -81,6 +118,46 @@
     }
     break;
   }
+  case T_BOOLEAN:
+    __ and_32(val, val, 1);
+    __ strb(val, obj);
+    break;
+  case T_BYTE:    __ strb      (val, obj); break;
+  case T_CHAR:    __ strh      (val, obj); break;
+  case T_SHORT:   __ strh      (val, obj); break;
+  case T_INT:     __ str       (val, obj); break;
+  case T_ADDRESS: __ str       (val, obj); break;
+  case T_LONG:
+#ifdef AARCH64
+    __ str                     (val, obj); break;
+#else // AARCH64
+    assert(val == noreg, "only tos");
+    __ add                     (obj.index(), obj.index(), obj.base());
+    __ stmia                   (obj.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
+#endif // AARCH64
+    break;
+#ifdef __SOFTFP__
+  case T_FLOAT:
+    assert(val == noreg, "only tos");
+    __ str (R0_tos,  obj);
+    break;
+  case T_DOUBLE:
+    assert(val == noreg, "only tos");
+    __ add                     (obj.index(), obj.index(), obj.base());
+    __ stmia                   (obj.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
+    break;
+#else
+  case T_FLOAT:
+    assert(val == noreg, "only tos");
+    __ add                     (obj.index(), obj.index(), obj.base());
+    __ str_float               (S0_tos,  obj.index());
+    break;
+  case T_DOUBLE:
+    assert(val == noreg, "only tos");
+    __ add                     (obj.index(), obj.index(), obj.base());
+    __ str_double              (D0_tos,  obj.index());
+    break;
+#endif
   default: Unimplemented();
   }
 }
--- a/src/hotspot/cpu/arm/interp_masm_arm.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/arm/interp_masm_arm.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -302,8 +302,9 @@
   // Add in the index
   // convert from field index to resolved_references() index and from
   // word index to byte offset. Since this is a java object, it can be compressed
-  add(cache, cache, AsmOperand(index, lsl, LogBytesPerHeapOop));
-  load_heap_oop(result, Address(cache, arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
+  logical_shift_left(index, index, LogBytesPerHeapOop);
+  add(index, index, arrayOopDesc::base_offset_in_bytes(T_OBJECT));
+  load_heap_oop(result, Address(cache, index));
 }
 
 void InterpreterMacroAssembler::load_resolved_klass_at_offset(
--- a/src/hotspot/cpu/arm/macroAssembler_arm.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/arm/macroAssembler_arm.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -1276,7 +1276,7 @@
     inc_counter((address) counter_addr, tmpreg1, tmpreg2);
   }
 
-  void pd_patch_instruction(address branch, address target);
+  void pd_patch_instruction(address branch, address target, const char* file, int line);
 
   // Loading and storing values by size and signed-ness;
   // size must not exceed wordSize (i.e. 8-byte values are not supported on 32-bit ARM);
--- a/src/hotspot/cpu/arm/macroAssembler_arm.inline.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/arm/macroAssembler_arm.inline.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -30,7 +30,7 @@
 #include "code/codeCache.hpp"
 #include "runtime/handles.inline.hpp"
 
-inline void MacroAssembler::pd_patch_instruction(address branch, address target) {
+inline void MacroAssembler::pd_patch_instruction(address branch, address target, const char* file, int line) {
   int instr = *(int*)branch;
   int new_offset = (int)(target - branch NOT_AARCH64(- 8));
   assert((new_offset & 3) == 0, "bad alignment");
--- a/src/hotspot/cpu/arm/methodHandles_arm.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/arm/methodHandles_arm.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -162,7 +162,7 @@
 
   __ load_heap_oop(Rmethod, Address(tmp, NONZERO(java_lang_invoke_MemberName::method_offset_in_bytes())));
   __ verify_oop(Rmethod);
-  __ ldr(Rmethod, Address(Rmethod, NONZERO(java_lang_invoke_ResolvedMethodName::vmtarget_offset_in_bytes())));
+  __ access_load_at(T_ADDRESS, IN_HEAP, Address(Rmethod, NONZERO(java_lang_invoke_ResolvedMethodName::vmtarget_offset_in_bytes())), Rmethod, noreg, noreg, noreg);
 
   if (VerifyMethodHandles && !for_compiler_entry) {
     // make sure recv is already on stack
@@ -381,7 +381,7 @@
         verify_ref_kind(_masm, JVM_REF_invokeSpecial, member_reg, temp3);
       }
       __ load_heap_oop(Rmethod, member_vmtarget);
-      __ ldr(Rmethod, vmtarget_method);
+      __ access_load_at(T_ADDRESS, IN_HEAP, vmtarget_method, Rmethod, noreg, noreg, noreg);
       break;
 
     case vmIntrinsics::_linkToStatic:
@@ -389,7 +389,7 @@
         verify_ref_kind(_masm, JVM_REF_invokeStatic, member_reg, temp3);
       }
       __ load_heap_oop(Rmethod, member_vmtarget);
-      __ ldr(Rmethod, vmtarget_method);
+      __ access_load_at(T_ADDRESS, IN_HEAP, vmtarget_method, Rmethod, noreg, noreg, noreg);
       break;
       break;
 
@@ -404,7 +404,7 @@
 
       // pick out the vtable index from the MemberName, and then we can discard it:
       Register temp2_index = temp2;
-      __ ldr(temp2_index, member_vmindex);
+      __ access_load_at(T_ADDRESS, IN_HEAP, member_vmindex, temp2_index, noreg, noreg, noreg);
 
       if (VerifyMethodHandles) {
         Label L_index_ok;
@@ -436,7 +436,7 @@
       __ verify_klass_ptr(temp3_intf);
 
       Register rbx_index = rbx_method;
-      __ ldr(rbx_index, member_vmindex);
+      __ access_load_at(T_ADDRESS, IN_HEAP, member_vmindex, rbx_index, noreg, noreg, noreg);
       if (VerifyMethodHandles) {
         Label L;
         __ cmp(rbx_index, 0);
--- a/src/hotspot/cpu/arm/templateTable_arm.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/arm/templateTable_arm.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -161,6 +161,18 @@
   return Address(temp, arrayOopDesc::base_offset_in_bytes(elemType));
 }
 
+// Returns address of Java array element using temp register as offset from array base
+Address TemplateTable::get_array_elem_addr_same_base(BasicType elemType, Register array, Register index, Register temp) {
+  int logElemSize = exact_log2(type2aelembytes(elemType));
+  if (logElemSize == 0) {
+    __ add(temp, index, arrayOopDesc::base_offset_in_bytes(elemType));
+  } else {
+    __ mov(temp, arrayOopDesc::base_offset_in_bytes(elemType));
+    __ add_ptr_scaled_int32(temp, temp, index, logElemSize);
+  }
+  return Address(array, temp);
+}
+
 //----------------------------------------------------------------------------------------------------
 // Condition conversion
 AsmCondition convNegCond(TemplateTable::Condition cc) {
@@ -883,7 +895,8 @@
   const Register Rindex = R0_tos;
 
   index_check(Rarray, Rindex);
-  __ ldr_s32(R0_tos, get_array_elem_addr(T_INT, Rarray, Rindex, Rtemp));
+  Address addr = get_array_elem_addr_same_base(T_INT, Rarray, Rindex, Rtemp);
+  __ access_load_at(T_INT, IN_HEAP | IS_ARRAY, addr, R0_tos, noreg, noreg, noreg);
 }
 
 
@@ -897,9 +910,8 @@
 #ifdef AARCH64
   __ ldr(R0_tos, get_array_elem_addr(T_LONG, Rarray, Rindex, Rtemp));
 #else
-  __ add(Rtemp, Rarray, AsmOperand(Rindex, lsl, LogBytesPerLong));
-  __ add(Rtemp, Rtemp, arrayOopDesc::base_offset_in_bytes(T_LONG));
-  __ ldmia(Rtemp, RegisterSet(R0_tos_lo, R1_tos_hi));
+  Address addr = get_array_elem_addr_same_base(T_LONG, Rarray, Rindex, Rtemp);
+  __ access_load_at(T_LONG, IN_HEAP | IS_ARRAY, addr, noreg /* ltos */, noreg, noreg, noreg);
 #endif // AARCH64
 }
 
@@ -911,12 +923,8 @@
 
   index_check(Rarray, Rindex);
 
-  Address addr = get_array_elem_addr(T_FLOAT, Rarray, Rindex, Rtemp);
-#ifdef __SOFTFP__
-  __ ldr(R0_tos, addr);
-#else
-  __ ldr_float(S0_tos, addr);
-#endif // __SOFTFP__
+  Address addr = get_array_elem_addr_same_base(T_FLOAT, Rarray, Rindex, Rtemp);
+  __ access_load_at(T_FLOAT, IN_HEAP | IS_ARRAY, addr, noreg /* ftos */, noreg, noreg, noreg);
 }
 
 
@@ -927,13 +935,8 @@
 
   index_check(Rarray, Rindex);
 
-#ifdef __SOFTFP__
-  __ add(Rtemp, Rarray, AsmOperand(Rindex, lsl, LogBytesPerLong));
-  __ add(Rtemp, Rtemp, arrayOopDesc::base_offset_in_bytes(T_DOUBLE));
-  __ ldmia(Rtemp, RegisterSet(R0_tos_lo, R1_tos_hi));
-#else
-  __ ldr_double(D0_tos, get_array_elem_addr(T_DOUBLE, Rarray, Rindex, Rtemp));
-#endif // __SOFTFP__
+  Address addr = get_array_elem_addr_same_base(T_DOUBLE, Rarray, Rindex, Rtemp);
+  __ access_load_at(T_DOUBLE, IN_HEAP | IS_ARRAY, addr, noreg /* dtos */, noreg, noreg, noreg);
 }
 
 
@@ -943,7 +946,7 @@
   const Register Rindex = R0_tos;
 
   index_check(Rarray, Rindex);
-  do_oop_load(_masm, R0_tos, get_array_elem_addr(T_OBJECT, Rarray, Rindex, Rtemp), IS_ARRAY);
+  do_oop_load(_masm, R0_tos, get_array_elem_addr_same_base(T_OBJECT, Rarray, Rindex, Rtemp), IS_ARRAY);
 }
 
 
@@ -953,7 +956,8 @@
   const Register Rindex = R0_tos;
 
   index_check(Rarray, Rindex);
-  __ ldrsb(R0_tos, get_array_elem_addr(T_BYTE, Rarray, Rindex, Rtemp));
+  Address addr = get_array_elem_addr_same_base(T_BYTE, Rarray, Rindex, Rtemp);
+  __ access_load_at(T_BYTE, IN_HEAP | IS_ARRAY, addr, R0_tos, noreg, noreg, noreg);
 }
 
 
@@ -963,7 +967,8 @@
   const Register Rindex = R0_tos;
 
   index_check(Rarray, Rindex);
-  __ ldrh(R0_tos, get_array_elem_addr(T_CHAR, Rarray, Rindex, Rtemp));
+  Address addr = get_array_elem_addr_same_base(T_CHAR, Rarray, Rindex, Rtemp);
+  __ access_load_at(T_CHAR, IN_HEAP | IS_ARRAY, addr, R0_tos, noreg, noreg, noreg);
 }
 
 
@@ -983,7 +988,8 @@
 
   // get array element
   index_check(Rarray, Rindex);
-  __ ldrh(R0_tos, get_array_elem_addr(T_CHAR, Rarray, Rindex, Rtemp));
+  Address addr = get_array_elem_addr_same_base(T_CHAR, Rarray, Rindex, Rtemp);
+  __ access_load_at(T_CHAR, IN_HEAP | IS_ARRAY, addr, R0_tos, noreg, noreg, noreg);
 }
 
 
@@ -993,7 +999,8 @@
   const Register Rindex = R0_tos;
 
   index_check(Rarray, Rindex);
-  __ ldrsh(R0_tos, get_array_elem_addr(T_SHORT, Rarray, Rindex, Rtemp));
+  Address addr = get_array_elem_addr_same_base(T_SHORT, Rarray, Rindex, Rtemp);
+  __ access_load_at(T_SHORT, IN_HEAP | IS_ARRAY, addr, R0_tos, noreg, noreg, noreg);
 }
 
 
@@ -1231,7 +1238,8 @@
 
   __ pop_i(Rindex);
   index_check(Rarray, Rindex);
-  __ str_32(R0_tos, get_array_elem_addr(T_INT, Rarray, Rindex, Rtemp));
+  Address addr = get_array_elem_addr_same_base(T_INT, Rarray, Rindex, Rtemp);
+  __ access_store_at(T_INT, IN_HEAP | IS_ARRAY, addr, R0_tos, noreg, noreg, noreg, false);
 }
 
 
@@ -1247,9 +1255,8 @@
 #ifdef AARCH64
   __ str(R0_tos, get_array_elem_addr(T_LONG, Rarray, Rindex, Rtemp));
 #else
-  __ add(Rtemp, Rarray, AsmOperand(Rindex, lsl, LogBytesPerLong));
-  __ add(Rtemp, Rtemp, arrayOopDesc::base_offset_in_bytes(T_LONG));
-  __ stmia(Rtemp, RegisterSet(R0_tos_lo, R1_tos_hi));
+  Address addr = get_array_elem_addr_same_base(T_LONG, Rarray, Rindex, Rtemp);
+  __ access_store_at(T_LONG, IN_HEAP | IS_ARRAY, addr, noreg /* ltos */, noreg, noreg, noreg, false);
 #endif // AARCH64
 }
 
@@ -1262,13 +1269,8 @@
 
   __ pop_i(Rindex);
   index_check(Rarray, Rindex);
-  Address addr = get_array_elem_addr(T_FLOAT, Rarray, Rindex, Rtemp);
-
-#ifdef __SOFTFP__
-  __ str(R0_tos, addr);
-#else
-  __ str_float(S0_tos, addr);
-#endif // __SOFTFP__
+  Address addr = get_array_elem_addr_same_base(T_FLOAT, Rarray, Rindex, Rtemp);
+  __ access_store_at(T_FLOAT, IN_HEAP | IS_ARRAY, addr, noreg /* ftos */, noreg, noreg, noreg, false);
 }
 
 
@@ -1281,13 +1283,8 @@
   __ pop_i(Rindex);
   index_check(Rarray, Rindex);
 
-#ifdef __SOFTFP__
-  __ add(Rtemp, Rarray, AsmOperand(Rindex, lsl, LogBytesPerLong));
-  __ add(Rtemp, Rtemp, arrayOopDesc::base_offset_in_bytes(T_DOUBLE));
-  __ stmia(Rtemp, RegisterSet(R0_tos_lo, R1_tos_hi));
-#else
-  __ str_double(D0_tos, get_array_elem_addr(T_DOUBLE, Rarray, Rindex, Rtemp));
-#endif // __SOFTFP__
+  Address addr = get_array_elem_addr_same_base(T_DOUBLE, Rarray, Rindex, Rtemp);
+  __ access_store_at(T_DOUBLE, IN_HEAP | IS_ARRAY, addr, noreg /* dtos */, noreg, noreg, noreg, false);
 }
 
 
@@ -1370,7 +1367,8 @@
   __ b(L_skip, eq);
   __ and_32(R0_tos, R0_tos, 1); // if it is a T_BOOLEAN array, mask the stored value to 0/1
   __ bind(L_skip);
-  __ strb(R0_tos, get_array_elem_addr(T_BYTE, Rarray, Rindex, Rtemp));
+  Address addr = get_array_elem_addr_same_base(T_BYTE, Rarray, Rindex, Rtemp);
+  __ access_store_at(T_BYTE, IN_HEAP | IS_ARRAY, addr, R0_tos, noreg, noreg, noreg, false);
 }
 
 
@@ -1382,8 +1380,8 @@
 
   __ pop_i(Rindex);
   index_check(Rarray, Rindex);
-
-  __ strh(R0_tos, get_array_elem_addr(T_CHAR, Rarray, Rindex, Rtemp));
+  Address addr = get_array_elem_addr_same_base(T_CHAR, Rarray, Rindex, Rtemp);
+  __ access_store_at(T_CHAR, IN_HEAP | IS_ARRAY, addr, R0_tos, noreg, noreg, noreg, false);
 }
 
 
@@ -3182,7 +3180,7 @@
   // modes.
 
   // Size of fixed size code block for fast_version
-  const int log_max_block_size = 2;
+  const int log_max_block_size = AARCH64_ONLY(2) NOT_AARCH64(3);
   const int max_block_size = 1 << log_max_block_size;
 
   // Decide if fast version is enabled
@@ -3249,7 +3247,7 @@
     assert(btos == seq++, "btos has unexpected value");
     FixedSizeCodeBlock btos_block(_masm, max_block_size, fast_version);
     __ bind(Lbtos);
-    __ ldrsb(R0_tos, Address(Robj, Roffset));
+    __ access_load_at(T_BYTE, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg);
     __ push(btos);
     // Rewrite bytecode to be faster
     if (!is_static && rc == may_rewrite) {
@@ -3263,7 +3261,7 @@
     assert(ztos == seq++, "btos has unexpected value");
     FixedSizeCodeBlock ztos_block(_masm, max_block_size, fast_version);
     __ bind(Lztos);
-    __ ldrsb(R0_tos, Address(Robj, Roffset));
+    __ access_load_at(T_BOOLEAN, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg);
     __ push(ztos);
     // Rewrite bytecode to be faster (use btos fast getfield)
     if (!is_static && rc == may_rewrite) {
@@ -3277,7 +3275,7 @@
     assert(ctos == seq++, "ctos has unexpected value");
     FixedSizeCodeBlock ctos_block(_masm, max_block_size, fast_version);
     __ bind(Lctos);
-    __ ldrh(R0_tos, Address(Robj, Roffset));
+    __ access_load_at(T_CHAR, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg);
     __ push(ctos);
     if (!is_static && rc == may_rewrite) {
       patch_bytecode(Bytecodes::_fast_cgetfield, R0_tmp, Rtemp);
@@ -3290,7 +3288,7 @@
     assert(stos == seq++, "stos has unexpected value");
     FixedSizeCodeBlock stos_block(_masm, max_block_size, fast_version);
     __ bind(Lstos);
-    __ ldrsh(R0_tos, Address(Robj, Roffset));
+    __ access_load_at(T_SHORT, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg);
     __ push(stos);
     if (!is_static && rc == may_rewrite) {
       patch_bytecode(Bytecodes::_fast_sgetfield, R0_tmp, Rtemp);
@@ -3314,8 +3312,7 @@
 #ifdef AARCH64
     __ ldr(R0_tos, Address(Robj, Roffset));
 #else
-    __ add(Roffset, Robj, Roffset);
-    __ ldmia(Roffset, RegisterSet(R0_tos_lo, R1_tos_hi));
+    __ access_load_at(T_LONG, IN_HEAP, Address(Robj, Roffset), noreg /* ltos */, noreg, noreg, noreg);
 #endif // AARCH64
     __ push(ltos);
     if (!is_static && rc == may_rewrite) {
@@ -3331,7 +3328,7 @@
     __ bind(Lftos);
     // floats and ints are placed on stack in same way, so
     // we can use push(itos) to transfer value without using VFP
-    __ ldr_u32(R0_tos, Address(Robj, Roffset));
+    __ access_load_at(T_INT, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg);
     __ push(itos);
     if (!is_static && rc == may_rewrite) {
       patch_bytecode(Bytecodes::_fast_fgetfield, R0_tmp, Rtemp);
@@ -3349,8 +3346,7 @@
 #ifdef AARCH64
     __ ldr(R0_tos, Address(Robj, Roffset));
 #else
-    __ add(Rtemp, Robj, Roffset);
-    __ ldmia(Rtemp, RegisterSet(R0_tos_lo, R1_tos_hi));
+    __ access_load_at(T_LONG, IN_HEAP, Address(Robj, Roffset), noreg /* ltos */, noreg, noreg, noreg);
 #endif // AARCH64
     __ push(ltos);
     if (!is_static && rc == may_rewrite) {
@@ -3385,7 +3381,7 @@
   // atos case can be merged with itos case (and thus moved out of table switch) on 32-bit ARM, fast version only
 
   __ bind(Lint);
-  __ ldr_s32(R0_tos, Address(Robj, Roffset));
+  __ access_load_at(T_INT, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg);
   __ push(itos);
   // Rewrite bytecode to be faster
   if (!is_static && rc == may_rewrite) {
@@ -3597,7 +3593,7 @@
     __ bind(Lbtos);
     __ pop(btos);
     if (!is_static) pop_and_check_object(Robj);
-    __ strb(R0_tos, Address(Robj, Roffset));
+    __ access_store_at(T_BYTE, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg, false);
     if (!is_static && rc == may_rewrite) {
       patch_bytecode(Bytecodes::_fast_bputfield, R0_tmp, Rtemp, true, byte_no);
     }
@@ -3611,8 +3607,7 @@
     __ bind(Lztos);
     __ pop(ztos);
     if (!is_static) pop_and_check_object(Robj);
-    __ and_32(R0_tos, R0_tos, 1);
-    __ strb(R0_tos, Address(Robj, Roffset));
+    __ access_store_at(T_BOOLEAN, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg, false);
     if (!is_static && rc == may_rewrite) {
       patch_bytecode(Bytecodes::_fast_zputfield, R0_tmp, Rtemp, true, byte_no);
     }
@@ -3626,7 +3621,7 @@
     __ bind(Lctos);
     __ pop(ctos);
     if (!is_static) pop_and_check_object(Robj);
-    __ strh(R0_tos, Address(Robj, Roffset));
+    __ access_store_at(T_CHAR, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg, false);
     if (!is_static && rc == may_rewrite) {
       patch_bytecode(Bytecodes::_fast_cputfield, R0_tmp, Rtemp, true, byte_no);
     }
@@ -3640,7 +3635,7 @@
     __ bind(Lstos);
     __ pop(stos);
     if (!is_static) pop_and_check_object(Robj);
-    __ strh(R0_tos, Address(Robj, Roffset));
+    __ access_store_at(T_SHORT, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg, false);
     if (!is_static && rc == may_rewrite) {
       patch_bytecode(Bytecodes::_fast_sputfield, R0_tmp, Rtemp, true, byte_no);
     }
@@ -3665,8 +3660,7 @@
 #ifdef AARCH64
     __ str(R0_tos, Address(Robj, Roffset));
 #else
-    __ add(Roffset, Robj, Roffset);
-    __ stmia(Roffset, RegisterSet(R0_tos_lo, R1_tos_hi));
+    __ access_store_at(T_LONG, IN_HEAP, Address(Robj, Roffset), noreg /* ltos */, noreg, noreg, noreg, false);
 #endif // AARCH64
     if (!is_static && rc == may_rewrite) {
       patch_bytecode(Bytecodes::_fast_lputfield, R0_tmp, Rtemp, true, byte_no);
@@ -3683,7 +3677,7 @@
     // we can use pop(itos) to transfer value without using VFP
     __ pop(itos);
     if (!is_static) pop_and_check_object(Robj);
-    __ str_32(R0_tos, Address(Robj, Roffset));
+    __ access_store_at(T_INT, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg, false);
     if (!is_static && rc == may_rewrite) {
       patch_bytecode(Bytecodes::_fast_fputfield, R0_tmp, Rtemp, true, byte_no);
     }
@@ -3702,8 +3696,7 @@
 #ifdef AARCH64
     __ str(R0_tos, Address(Robj, Roffset));
 #else
-    __ add(Rtemp, Robj, Roffset);
-    __ stmia(Rtemp, RegisterSet(R0_tos_lo, R1_tos_hi));
+    __ access_store_at(T_LONG, IN_HEAP, Address(Robj, Roffset), noreg /* ltos */, noreg, noreg, noreg, false);
 #endif // AARCH64
     if (!is_static && rc == may_rewrite) {
       patch_bytecode(Bytecodes::_fast_dputfield, R0_tmp, Rtemp, true, byte_no);
@@ -3732,7 +3725,7 @@
   __ bind(Lint);
   __ pop(itos);
   if (!is_static) pop_and_check_object(Robj);
-  __ str_32(R0_tos, Address(Robj, Roffset));
+  __ access_store_at(T_INT, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg, false);
   if (!is_static && rc == may_rewrite) {
     patch_bytecode(Bytecodes::_fast_iputfield, R0_tmp, Rtemp, true, byte_no);
   }
@@ -3867,36 +3860,42 @@
   // Get object from stack
   pop_and_check_object(Robj);
 
+  Address addr = Address(Robj, Roffset);
   // access field
   switch (bytecode()) {
-    case Bytecodes::_fast_zputfield: __ and_32(R0_tos, R0_tos, 1);
-                                     // fall through
-    case Bytecodes::_fast_bputfield: __ strb(R0_tos, Address(Robj, Roffset)); break;
-    case Bytecodes::_fast_sputfield: // fall through
-    case Bytecodes::_fast_cputfield: __ strh(R0_tos, Address(Robj, Roffset)); break;
-    case Bytecodes::_fast_iputfield: __ str_32(R0_tos, Address(Robj, Roffset)); break;
+    case Bytecodes::_fast_zputfield:
+      __ access_store_at(T_BOOLEAN, IN_HEAP, addr, R0_tos, noreg, noreg, noreg, false);
+      break;
+    case Bytecodes::_fast_bputfield:
+      __ access_store_at(T_BYTE, IN_HEAP, addr, R0_tos, noreg, noreg, noreg, false);
+      break;
+    case Bytecodes::_fast_sputfield:
+      __ access_store_at(T_SHORT, IN_HEAP, addr, R0_tos, noreg, noreg, noreg, false);
+      break;
+    case Bytecodes::_fast_cputfield:
+      __ access_store_at(T_CHAR, IN_HEAP, addr, R0_tos, noreg, noreg, noreg,false);
+      break;
+    case Bytecodes::_fast_iputfield:
+      __ access_store_at(T_INT, IN_HEAP, addr, R0_tos, noreg, noreg, noreg, false);
+      break;
 #ifdef AARCH64
-    case Bytecodes::_fast_lputfield: __ str  (R0_tos, Address(Robj, Roffset)); break;
-    case Bytecodes::_fast_fputfield: __ str_s(S0_tos, Address(Robj, Roffset)); break;
-    case Bytecodes::_fast_dputfield: __ str_d(D0_tos, Address(Robj, Roffset)); break;
+    case Bytecodes::_fast_lputfield: __ str  (R0_tos, addr); break;
+    case Bytecodes::_fast_fputfield: __ str_s(S0_tos, addr); break;
+    case Bytecodes::_fast_dputfield: __ str_d(D0_tos, addr); break;
 #else
-    case Bytecodes::_fast_lputfield: __ add(Robj, Robj, Roffset);
-                                     __ stmia(Robj, RegisterSet(R0_tos_lo, R1_tos_hi)); break;
-
-#ifdef __SOFTFP__
-    case Bytecodes::_fast_fputfield: __ str(R0_tos, Address(Robj, Roffset));  break;
-    case Bytecodes::_fast_dputfield: __ add(Robj, Robj, Roffset);
-                                     __ stmia(Robj, RegisterSet(R0_tos_lo, R1_tos_hi)); break;
-#else
-    case Bytecodes::_fast_fputfield: __ add(Robj, Robj, Roffset);
-                                     __ fsts(S0_tos, Address(Robj));          break;
-    case Bytecodes::_fast_dputfield: __ add(Robj, Robj, Roffset);
-                                     __ fstd(D0_tos, Address(Robj));          break;
-#endif // __SOFTFP__
+    case Bytecodes::_fast_lputfield:
+      __ access_store_at(T_LONG, IN_HEAP, addr, noreg, noreg, noreg, noreg, false);
+      break;
+    case Bytecodes::_fast_fputfield:
+      __ access_store_at(T_FLOAT, IN_HEAP, addr, noreg, noreg, noreg, noreg, false);
+      break;
+    case Bytecodes::_fast_dputfield:
+      __ access_store_at(T_DOUBLE, IN_HEAP, addr, noreg, noreg, noreg, noreg, false);
+      break;
 #endif // AARCH64
 
     case Bytecodes::_fast_aputfield:
-      do_oop_store(_masm, Address(Robj, Roffset), R0_tos, Rtemp, R1_tmp, R2_tmp, false);
+      do_oop_store(_masm, addr, R0_tos, Rtemp, R1_tmp, R2_tmp, false);
       break;
 
     default:
@@ -3970,29 +3969,40 @@
   __ verify_oop(Robj);
   __ null_check(Robj, Rtemp);
 
+  Address addr = Address(Robj, Roffset);
   // access field
   switch (bytecode()) {
-    case Bytecodes::_fast_bgetfield: __ ldrsb(R0_tos, Address(Robj, Roffset)); break;
-    case Bytecodes::_fast_sgetfield: __ ldrsh(R0_tos, Address(Robj, Roffset)); break;
-    case Bytecodes::_fast_cgetfield: __ ldrh (R0_tos, Address(Robj, Roffset)); break;
-    case Bytecodes::_fast_igetfield: __ ldr_s32(R0_tos, Address(Robj, Roffset)); break;
+    case Bytecodes::_fast_bgetfield:
+      __ access_load_at(T_BYTE, IN_HEAP, addr, R0_tos, noreg, noreg, noreg);
+      break;
+    case Bytecodes::_fast_sgetfield:
+      __ access_load_at(T_SHORT, IN_HEAP, addr, R0_tos, noreg, noreg, noreg);
+      break;
+    case Bytecodes::_fast_cgetfield:
+      __ access_load_at(T_CHAR, IN_HEAP, addr, R0_tos, noreg, noreg, noreg);
+      break;
+    case Bytecodes::_fast_igetfield:
+      __ access_load_at(T_INT, IN_HEAP, addr, R0_tos, noreg, noreg, noreg);
+      break;
 #ifdef AARCH64
-    case Bytecodes::_fast_lgetfield: __ ldr  (R0_tos, Address(Robj, Roffset)); break;
-    case Bytecodes::_fast_fgetfield: __ ldr_s(S0_tos, Address(Robj, Roffset)); break;
-    case Bytecodes::_fast_dgetfield: __ ldr_d(D0_tos, Address(Robj, Roffset)); break;
+    case Bytecodes::_fast_lgetfield: __ ldr  (R0_tos, addr); break;
+    case Bytecodes::_fast_fgetfield: __ ldr_s(S0_tos, addr); break;
+    case Bytecodes::_fast_dgetfield: __ ldr_d(D0_tos, addr); break;
 #else
-    case Bytecodes::_fast_lgetfield: __ add(Roffset, Robj, Roffset);
-                                     __ ldmia(Roffset, RegisterSet(R0_tos_lo, R1_tos_hi)); break;
-#ifdef __SOFTFP__
-    case Bytecodes::_fast_fgetfield: __ ldr  (R0_tos, Address(Robj, Roffset)); break;
-    case Bytecodes::_fast_dgetfield: __ add(Roffset, Robj, Roffset);
-                                     __ ldmia(Roffset, RegisterSet(R0_tos_lo, R1_tos_hi)); break;
-#else
-    case Bytecodes::_fast_fgetfield: __ add(Roffset, Robj, Roffset); __ flds(S0_tos, Address(Roffset)); break;
-    case Bytecodes::_fast_dgetfield: __ add(Roffset, Robj, Roffset); __ fldd(D0_tos, Address(Roffset)); break;
-#endif // __SOFTFP__
+    case Bytecodes::_fast_lgetfield:
+      __ access_load_at(T_LONG, IN_HEAP, addr, noreg, noreg, noreg, noreg);
+      break;
+    case Bytecodes::_fast_fgetfield:
+      __ access_load_at(T_FLOAT, IN_HEAP, addr, noreg, noreg, noreg, noreg);
+      break;
+    case Bytecodes::_fast_dgetfield:
+      __ access_load_at(T_DOUBLE, IN_HEAP, addr, noreg, noreg, noreg, noreg);
+      break;
 #endif // AARCH64
-    case Bytecodes::_fast_agetfield: do_oop_load(_masm, R0_tos, Address(Robj, Roffset)); __ verify_oop(R0_tos); break;
+    case Bytecodes::_fast_agetfield:
+      do_oop_load(_masm, R0_tos, addr);
+      __ verify_oop(R0_tos);
+      break;
     default:
       ShouldNotReachHere();
   }
@@ -4070,7 +4080,7 @@
 #endif // AARCH64
 
   if (state == itos) {
-    __ ldr_s32(R0_tos, Address(Robj, Roffset));
+    __ access_load_at(T_INT, IN_HEAP, Address(Robj, Roffset), R0_tos, noreg, noreg, noreg);
   } else if (state == atos) {
     do_oop_load(_masm, R0_tos, Address(Robj, Roffset));
     __ verify_oop(R0_tos);
@@ -4081,8 +4091,7 @@
 #ifdef __SOFTFP__
     __ ldr(R0_tos, Address(Robj, Roffset));
 #else
-    __ add(Roffset, Robj, Roffset);
-    __ flds(S0_tos, Address(Roffset));
+    __ access_load_at(T_FLOAT, IN_HEAP, Address(Robj, Roffset), noreg /* ftos */, noreg, noreg, noreg);
 #endif // __SOFTFP__
 #endif // AARCH64
   } else {
--- a/src/hotspot/cpu/arm/templateTable_arm.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/arm/templateTable_arm.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -55,6 +55,7 @@
   static void store_category2_local(Register Rlocal_index, Register tmp);
 
   static Address get_array_elem_addr(BasicType elemType, Register array, Register index, Register temp);
+  static Address get_array_elem_addr_same_base(BasicType elemType, Register array, Register index, Register temp);
 
   static void jvmti_post_fast_field_mod(TosState state);
 
--- a/src/hotspot/cpu/arm/vtableStubs_arm.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/arm/vtableStubs_arm.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -48,17 +48,31 @@
 #endif
 
 VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
-  const int code_length = VtableStub::pd_code_size_limit(true);
-  VtableStub* s = new(code_length) VtableStub(true, vtable_index);
+  // Read "A word on VtableStub sizing" in share/code/vtableStubs.hpp for details on stub sizing.
+  const int stub_code_length = code_size_limit(true);
+  VtableStub* s = new(stub_code_length) VtableStub(true, vtable_index);
   // Can be NULL if there is no free space in the code cache.
   if (s == NULL) {
     return NULL;
   }
 
-  ResourceMark rm;
-  CodeBuffer cb(s->entry_point(), code_length);
+  // Count unused bytes in instruction sequences of variable size.
+  // We add them to the computed buffer size in order to avoid
+  // overflow in subsequently generated stubs.
+  address   start_pc;
+  int       slop_bytes = 0;
+  int       slop_delta = 0;
+
+  ResourceMark    rm;
+  CodeBuffer      cb(s->entry_point(), stub_code_length);
   MacroAssembler* masm = new MacroAssembler(&cb);
 
+#if (!defined(PRODUCT) && defined(COMPILER2))
+  if (CountCompiledCalls) {
+    // Implementation required?
+  }
+#endif
+
   assert(VtableStub::receiver_location() == R0->as_VMReg(), "receiver expected in R0");
 
   const Register tmp = Rtemp; // Rtemp OK, should be free at call sites
@@ -66,17 +80,33 @@
   address npe_addr = __ pc();
   __ load_klass(tmp, R0);
 
-  {
-  int entry_offset = in_bytes(Klass::vtable_start_offset()) + vtable_index * vtableEntry::size_in_bytes();
-  int method_offset = vtableEntry::method_offset_in_bytes() + entry_offset;
+#ifndef PRODUCT
+  if (DebugVtables) {
+    // Implementation required?
+  }
+#endif
 
-  assert ((method_offset & (wordSize - 1)) == 0, "offset should be aligned");
-  int offset_mask = AARCH64_ONLY(0xfff << LogBytesPerWord) NOT_AARCH64(0xfff);
-  if (method_offset & ~offset_mask) {
-    __ add(tmp, tmp, method_offset & ~offset_mask);
+  start_pc = __ pc();
+  { // lookup virtual method
+    int entry_offset = in_bytes(Klass::vtable_start_offset()) + vtable_index * vtableEntry::size_in_bytes();
+    int method_offset = vtableEntry::method_offset_in_bytes() + entry_offset;
+
+    assert ((method_offset & (wordSize - 1)) == 0, "offset should be aligned");
+    int offset_mask = AARCH64_ONLY(0xfff << LogBytesPerWord) NOT_AARCH64(0xfff);
+    if (method_offset & ~offset_mask) {
+      __ add(tmp, tmp, method_offset & ~offset_mask);
+    }
+    __ ldr(Rmethod, Address(tmp, method_offset & offset_mask));
   }
-  __ ldr(Rmethod, Address(tmp, method_offset & offset_mask));
+  slop_delta  = 8 - (int)(__ pc() - start_pc);
+  slop_bytes += slop_delta;
+  assert(slop_delta >= 0, "negative slop(%d) encountered, adjust code size estimate!", slop_delta);
+
+#ifndef PRODUCT
+  if (DebugVtables) {
+    // Implementation required?
   }
+#endif
 
   address ame_addr = __ pc();
 #ifdef AARCH64
@@ -87,35 +117,36 @@
 #endif // AARCH64
 
   masm->flush();
+  bookkeeping(masm, tty, s, npe_addr, ame_addr, true, vtable_index, slop_bytes, 0);
 
-  if (PrintMiscellaneous && (WizardMode || Verbose)) {
-    tty->print_cr("vtable #%d at " PTR_FORMAT "[%d] left over: %d",
-                  vtable_index, p2i(s->entry_point()),
-                  (int)(s->code_end() - s->entry_point()),
-                  (int)(s->code_end() - __ pc()));
-  }
-  guarantee(__ pc() <= s->code_end(), "overflowed buffer");
-  // FIXME ARM: need correct 'slop' - below is x86 code
-  // shut the door on sizing bugs
-  //int slop = 8;  // 32-bit offset is this much larger than a 13-bit one
-  //assert(vtable_index > 10 || __ pc() + slop <= s->code_end(), "room for 32-bit offset");
-
-  s->set_exception_points(npe_addr, ame_addr);
   return s;
 }
 
 VtableStub* VtableStubs::create_itable_stub(int itable_index) {
-  const int code_length = VtableStub::pd_code_size_limit(false);
-  VtableStub* s = new(code_length) VtableStub(false, itable_index);
+  // Read "A word on VtableStub sizing" in share/code/vtableStubs.hpp for details on stub sizing.
+  const int stub_code_length = code_size_limit(false);
+  VtableStub* s = new(stub_code_length) VtableStub(false, itable_index);
   // Can be NULL if there is no free space in the code cache.
   if (s == NULL) {
     return NULL;
   }
+  // Count unused bytes in instruction sequences of variable size.
+  // We add them to the computed buffer size in order to avoid
+  // overflow in subsequently generated stubs.
+  address   start_pc;
+  int       slop_bytes = 0;
+  int       slop_delta = 0;
 
-  ResourceMark rm;
-  CodeBuffer cb(s->entry_point(), code_length);
+  ResourceMark    rm;
+  CodeBuffer      cb(s->entry_point(), stub_code_length);
   MacroAssembler* masm = new MacroAssembler(&cb);
 
+#if (!defined(PRODUCT) && defined(COMPILER2))
+  if (CountCompiledCalls) {
+    // Implementation required?
+  }
+#endif
+
   assert(VtableStub::receiver_location() == R0->as_VMReg(), "receiver expected in R0");
 
   // R0-R3 / R0-R7 registers hold the arguments and cannot be spoiled
@@ -123,15 +154,16 @@
   const Register Rintf   = AARCH64_ONLY(R10) NOT_AARCH64(R5);
   const Register Rscan   = AARCH64_ONLY(R11) NOT_AARCH64(R6);
 
+  Label L_no_such_interface;
+
   assert_different_registers(Ricklass, Rclass, Rintf, Rscan, Rtemp);
 
-  // Calculate the start of itable (itable goes after vtable)
-  const int scale = exact_log2(vtableEntry::size_in_bytes());
+  start_pc = __ pc();
+
+  // get receiver klass (also an implicit null-check)
   address npe_addr = __ pc();
   __ load_klass(Rclass, R0);
 
-  Label L_no_such_interface;
-
   // Receiver subtype check against REFC.
   __ ldr(Rintf, Address(Ricklass, CompiledICHolder::holder_klass_offset()));
   __ lookup_interface_method(// inputs: rec. class, interface, itable index
@@ -140,6 +172,9 @@
                              noreg, Rscan, Rtemp,
                              L_no_such_interface);
 
+  const ptrdiff_t  typecheckSize = __ pc() - start_pc;
+  start_pc = __ pc();
+
   // Get Method* and entry point for compiler
   __ ldr(Rintf, Address(Ricklass, CompiledICHolder::holder_metadata_offset()));
   __ lookup_interface_method(// inputs: rec. class, interface, itable index
@@ -148,6 +183,21 @@
                              Rmethod, Rscan, Rtemp,
                              L_no_such_interface);
 
+  const ptrdiff_t lookupSize = __ pc() - start_pc;
+
+  // Reduce "estimate" such that "padding" does not drop below 8.
+  const ptrdiff_t estimate = 140;
+  const ptrdiff_t codesize = typecheckSize + lookupSize;
+  slop_delta  = (int)(estimate - codesize);
+  slop_bytes += slop_delta;
+  assert(slop_delta >= 0, "itable #%d: Code size estimate (%d) for lookup_interface_method too small, required: %d", itable_index, (int)estimate, (int)codesize);
+
+#ifndef PRODUCT
+  if (DebugVtables) {
+    // Implementation required?
+  }
+#endif
+
   address ame_addr = __ pc();
 
 #ifdef AARCH64
@@ -158,7 +208,6 @@
 #endif // AARCH64
 
   __ bind(L_no_such_interface);
-
   // Handle IncompatibleClassChangeError in itable stubs.
   // More detailed error message.
   // We force resolving of the call site by jumping to the "handle
@@ -168,43 +217,13 @@
   __ jump(SharedRuntime::get_handle_wrong_method_stub(), relocInfo::runtime_call_type, Rtemp);
 
   masm->flush();
+  bookkeeping(masm, tty, s, npe_addr, ame_addr, false, itable_index, slop_bytes, 0);
 
-  if (PrintMiscellaneous && (WizardMode || Verbose)) {
-    tty->print_cr("itable #%d at " PTR_FORMAT "[%d] left over: %d",
-                  itable_index, p2i(s->entry_point()),
-                  (int)(s->code_end() - s->entry_point()),
-                  (int)(s->code_end() - __ pc()));
-  }
-  guarantee(__ pc() <= s->code_end(), "overflowed buffer");
-  // FIXME ARM: need correct 'slop' - below is x86 code
-  // shut the door on sizing bugs
-  //int slop = 8;  // 32-bit offset is this much larger than a 13-bit one
-  //assert(itable_index > 10 || __ pc() + slop <= s->code_end(), "room for 32-bit offset");
-
-  s->set_exception_points(npe_addr, ame_addr);
   return s;
 }
 
-int VtableStub::pd_code_size_limit(bool is_vtable_stub) {
-  int instr_count;
-
-  if (is_vtable_stub) {
-    // vtable stub size
-    instr_count = NOT_AARCH64(4) AARCH64_ONLY(5);
-  } else {
-    // itable stub size
-    instr_count = NOT_AARCH64(31) AARCH64_ONLY(31);
-  }
-
-#ifdef AARCH64
-  if (UseCompressedClassPointers) {
-    instr_count += MacroAssembler::instr_count_for_decode_klass_not_null();
-  }
-#endif // AARCH64
-
-  return instr_count * Assembler::InstructionSize;
+int VtableStub::pd_code_alignment() {
+  // ARM32 cache line size is not an architected constant. We just align on word size.
+  const unsigned int icache_line_size = wordSize;
+  return icache_line_size;
 }
-
-int VtableStub::pd_code_alignment() {
-  return 8;
-}
--- a/src/hotspot/cpu/ppc/assembler_ppc.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/assembler_ppc.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -521,6 +521,18 @@
     XXLOR_OPCODE   = (60u << OPCODE_SHIFT |  146u << 3),
     XXLXOR_OPCODE  = (60u << OPCODE_SHIFT |  154u << 3),
     XXLEQV_OPCODE  = (60u << OPCODE_SHIFT |  186u << 3),
+    XVDIVSP_OPCODE = (60u << OPCODE_SHIFT |   88u << 3),
+    XVDIVDP_OPCODE = (60u << OPCODE_SHIFT |  120u << 3),
+    XVABSSP_OPCODE = (60u << OPCODE_SHIFT |  409u << 2),
+    XVABSDP_OPCODE = (60u << OPCODE_SHIFT |  473u << 2),
+    XVNEGSP_OPCODE = (60u << OPCODE_SHIFT |  441u << 2),
+    XVNEGDP_OPCODE = (60u << OPCODE_SHIFT |  505u << 2),
+    XVSQRTSP_OPCODE= (60u << OPCODE_SHIFT |  139u << 2),
+    XVSQRTDP_OPCODE= (60u << OPCODE_SHIFT |  203u << 2),
+    XVADDDP_OPCODE = (60u << OPCODE_SHIFT |   96u << 3),
+    XVSUBDP_OPCODE = (60u << OPCODE_SHIFT |  104u << 3),
+    XVMULSP_OPCODE = (60u << OPCODE_SHIFT |   80u << 3),
+    XVMULDP_OPCODE = (60u << OPCODE_SHIFT |  112u << 3),
 
     // Vector Permute and Formatting
     VPKPX_OPCODE   = (4u  << OPCODE_SHIFT |  782u     ),
@@ -574,6 +586,7 @@
     VADDUBS_OPCODE = (4u  << OPCODE_SHIFT |  512u     ),
     VADDUWS_OPCODE = (4u  << OPCODE_SHIFT |  640u     ),
     VADDUHS_OPCODE = (4u  << OPCODE_SHIFT |  576u     ),
+    VADDFP_OPCODE  = (4u  << OPCODE_SHIFT |   10u     ),
     VSUBCUW_OPCODE = (4u  << OPCODE_SHIFT | 1408u     ),
     VSUBSHS_OPCODE = (4u  << OPCODE_SHIFT | 1856u     ),
     VSUBSBS_OPCODE = (4u  << OPCODE_SHIFT | 1792u     ),
@@ -581,9 +594,11 @@
     VSUBUBM_OPCODE = (4u  << OPCODE_SHIFT | 1024u     ),
     VSUBUWM_OPCODE = (4u  << OPCODE_SHIFT | 1152u     ),
     VSUBUHM_OPCODE = (4u  << OPCODE_SHIFT | 1088u     ),
+    VSUBUDM_OPCODE = (4u  << OPCODE_SHIFT | 1216u     ),
     VSUBUBS_OPCODE = (4u  << OPCODE_SHIFT | 1536u     ),
     VSUBUWS_OPCODE = (4u  << OPCODE_SHIFT | 1664u     ),
     VSUBUHS_OPCODE = (4u  << OPCODE_SHIFT | 1600u     ),
+    VSUBFP_OPCODE  = (4u  << OPCODE_SHIFT |   74u     ),
 
     VMULESB_OPCODE = (4u  << OPCODE_SHIFT |  776u     ),
     VMULEUB_OPCODE = (4u  << OPCODE_SHIFT |  520u     ),
@@ -592,7 +607,9 @@
     VMULOSB_OPCODE = (4u  << OPCODE_SHIFT |  264u     ),
     VMULOUB_OPCODE = (4u  << OPCODE_SHIFT |    8u     ),
     VMULOSH_OPCODE = (4u  << OPCODE_SHIFT |  328u     ),
+    VMULOSW_OPCODE = (4u  << OPCODE_SHIFT |  392u     ),
     VMULOUH_OPCODE = (4u  << OPCODE_SHIFT |   72u     ),
+    VMULUWM_OPCODE = (4u  << OPCODE_SHIFT |  137u     ),
     VMHADDSHS_OPCODE=(4u  << OPCODE_SHIFT |   32u     ),
     VMHRADDSHS_OPCODE=(4u << OPCODE_SHIFT |   33u     ),
     VMLADDUHM_OPCODE=(4u  << OPCODE_SHIFT |   34u     ),
@@ -602,6 +619,7 @@
     VMSUMSHS_OPCODE= (4u  << OPCODE_SHIFT |   41u     ),
     VMSUMUHM_OPCODE= (4u  << OPCODE_SHIFT |   38u     ),
     VMSUMUHS_OPCODE= (4u  << OPCODE_SHIFT |   39u     ),
+    VMADDFP_OPCODE = (4u  << OPCODE_SHIFT |   46u     ),
 
     VSUMSWS_OPCODE = (4u  << OPCODE_SHIFT | 1928u     ),
     VSUM2SWS_OPCODE= (4u  << OPCODE_SHIFT | 1672u     ),
@@ -657,6 +675,7 @@
     VSRAB_OPCODE   = (4u  << OPCODE_SHIFT |  772u     ),
     VSRAW_OPCODE   = (4u  << OPCODE_SHIFT |  900u     ),
     VSRAH_OPCODE   = (4u  << OPCODE_SHIFT |  836u     ),
+    VPOPCNTW_OPCODE= (4u  << OPCODE_SHIFT | 1923u     ),
 
     // Vector Floating-Point
     // not implemented yet
@@ -2059,6 +2078,7 @@
   inline void vaddubs(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vadduws(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vadduhs(  VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vaddfp(   VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubcuw(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubshs(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubsbs(  VectorRegister d, VectorRegister a, VectorRegister b);
@@ -2066,9 +2086,11 @@
   inline void vsububm(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubuwm(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubuhm(  VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vsubudm(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsububs(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubuws(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsubuhs(  VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vsubfp(   VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmulesb(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmuleub(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmulesh(  VectorRegister d, VectorRegister a, VectorRegister b);
@@ -2076,7 +2098,9 @@
   inline void vmulosb(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmuloub(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmulosh(  VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vmulosw(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmulouh(  VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vmuluwm(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vmhaddshs(VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmhraddshs(VectorRegister d,VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmladduhm(VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
@@ -2086,6 +2110,7 @@
   inline void vmsumshs( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmsumuhm( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vmsumuhs( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
+  inline void vmaddfp(  VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c);
   inline void vsumsws(  VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsum2sws( VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsum4sbs( VectorRegister d, VectorRegister a, VectorRegister b);
@@ -2146,6 +2171,7 @@
   inline void vsrab(    VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsraw(    VectorRegister d, VectorRegister a, VectorRegister b);
   inline void vsrah(    VectorRegister d, VectorRegister a, VectorRegister b);
+  inline void vpopcntw( VectorRegister d, VectorRegister b);
   // Vector Floating-Point not implemented yet
   inline void mtvscr(   VectorRegister b);
   inline void mfvscr(   VectorRegister d);
@@ -2168,6 +2194,18 @@
   inline void xxlor(    VectorSRegister d, VectorSRegister a, VectorSRegister b);
   inline void xxlxor(   VectorSRegister d, VectorSRegister a, VectorSRegister b);
   inline void xxleqv(   VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvdivsp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvdivdp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvabssp(  VectorSRegister d, VectorSRegister b);
+  inline void xvabsdp(  VectorSRegister d, VectorSRegister b);
+  inline void xvnegsp(  VectorSRegister d, VectorSRegister b);
+  inline void xvnegdp(  VectorSRegister d, VectorSRegister b);
+  inline void xvsqrtsp( VectorSRegister d, VectorSRegister b);
+  inline void xvsqrtdp( VectorSRegister d, VectorSRegister b);
+  inline void xvadddp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvsubdp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvmulsp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
+  inline void xvmuldp(  VectorSRegister d, VectorSRegister a, VectorSRegister b);
 
   // VSX Extended Mnemonics
   inline void xxspltd(  VectorSRegister d, VectorSRegister a, int x);
--- a/src/hotspot/cpu/ppc/assembler_ppc.inline.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/assembler_ppc.inline.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -769,7 +769,19 @@
 inline void Assembler::xxlor(   VectorSRegister d, VectorSRegister a, VectorSRegister b) { emit_int32( XXLOR_OPCODE  | vsrt(d) | vsra(a) | vsrb(b)); }
 inline void Assembler::xxlxor(  VectorSRegister d, VectorSRegister a, VectorSRegister b) { emit_int32( XXLXOR_OPCODE | vsrt(d) | vsra(a) | vsrb(b)); }
 inline void Assembler::xxleqv(  VectorSRegister d, VectorSRegister a, VectorSRegister b) { emit_int32( XXLEQV_OPCODE | vsrt(d) | vsra(a) | vsrb(b)); }
-inline void Assembler::mtvrd(    VectorRegister d, Register a)               { emit_int32( MTVSRD_OPCODE  | vsrt(d->to_vsr()) | ra(a)); }
+inline void Assembler::xvdivsp( VectorSRegister d, VectorSRegister a, VectorSRegister b) { emit_int32( XVDIVSP_OPCODE | vsrt(d) | vsra(a) | vsrb(b)); }
+inline void Assembler::xvdivdp( VectorSRegister d, VectorSRegister a, VectorSRegister b) { emit_int32( XVDIVDP_OPCODE | vsrt(d) | vsra(a) | vsrb(b)); }
+inline void Assembler::xvabssp( VectorSRegister d, VectorSRegister b)                    { emit_int32( XVABSSP_OPCODE | vsrt(d) | vsrb(b)); }
+inline void Assembler::xvabsdp( VectorSRegister d, VectorSRegister b)                    { emit_int32( XVABSDP_OPCODE | vsrt(d) | vsrb(b)); }
+inline void Assembler::xvnegsp( VectorSRegister d, VectorSRegister b)                    { emit_int32( XVNEGSP_OPCODE | vsrt(d) | vsrb(b)); }
+inline void Assembler::xvnegdp( VectorSRegister d, VectorSRegister b)                    { emit_int32( XVNEGDP_OPCODE | vsrt(d) | vsrb(b)); }
+inline void Assembler::xvsqrtsp(VectorSRegister d, VectorSRegister b)                    { emit_int32( XVSQRTSP_OPCODE| vsrt(d) | vsrb(b)); }
+inline void Assembler::xvsqrtdp(VectorSRegister d, VectorSRegister b)                    { emit_int32( XVSQRTDP_OPCODE| vsrt(d) | vsrb(b)); }
+inline void Assembler::xvadddp( VectorSRegister d, VectorSRegister a, VectorSRegister b) { emit_int32( XVADDDP_OPCODE | vsrt(d) | vsra(a) | vsrb(b)); }
+inline void Assembler::xvsubdp( VectorSRegister d, VectorSRegister a, VectorSRegister b) { emit_int32( XVSUBDP_OPCODE | vsrt(d) | vsra(a) | vsrb(b)); }
+inline void Assembler::xvmulsp( VectorSRegister d, VectorSRegister a, VectorSRegister b) { emit_int32( XVMULSP_OPCODE | vsrt(d) | vsra(a) | vsrb(b)); }
+inline void Assembler::xvmuldp( VectorSRegister d, VectorSRegister a, VectorSRegister b) { emit_int32( XVMULDP_OPCODE | vsrt(d) | vsra(a) | vsrb(b)); }
+inline void Assembler::mtvrd(   VectorRegister d, Register a)               { emit_int32( MTVSRD_OPCODE  | vsrt(d->to_vsr()) | ra(a)); }
 inline void Assembler::mfvrd(   Register        a, VectorRegister d)         { emit_int32( MFVSRD_OPCODE  | vsrt(d->to_vsr()) | ra(a)); }
 inline void Assembler::mtvrwz(  VectorRegister  d, Register a)               { emit_int32( MTVSRWZ_OPCODE | vsrt(d->to_vsr()) | ra(a)); }
 inline void Assembler::mfvrwz(  Register        a, VectorRegister d)         { emit_int32( MFVSRWZ_OPCODE | vsrt(d->to_vsr()) | ra(a)); }
@@ -833,6 +845,7 @@
 inline void Assembler::vaddubs( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VADDUBS_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vadduws( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VADDUWS_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vadduhs( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VADDUHS_OPCODE | vrt(d) | vra(a) | vrb(b)); }
+inline void Assembler::vaddfp(  VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VADDFP_OPCODE  | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsubcuw( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUBCUW_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsubshs( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUBSHS_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsubsbs( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUBSBS_OPCODE | vrt(d) | vra(a) | vrb(b)); }
@@ -840,9 +853,11 @@
 inline void Assembler::vsububm( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUBUBM_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsubuwm( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUBUWM_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsubuhm( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUBUHM_OPCODE | vrt(d) | vra(a) | vrb(b)); }
+inline void Assembler::vsubudm( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUBUDM_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsububs( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUBUBS_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsubuws( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUBUWS_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsubuhs( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUBUHS_OPCODE | vrt(d) | vra(a) | vrb(b)); }
+inline void Assembler::vsubfp(  VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUBFP_OPCODE  | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vmulesb( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VMULESB_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vmuleub( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VMULEUB_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vmulesh( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VMULESH_OPCODE | vrt(d) | vra(a) | vrb(b)); }
@@ -850,7 +865,9 @@
 inline void Assembler::vmulosb( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VMULOSB_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vmuloub( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VMULOUB_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vmulosh( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VMULOSH_OPCODE | vrt(d) | vra(a) | vrb(b)); }
+inline void Assembler::vmulosw( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VMULOSW_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vmulouh( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VMULOUH_OPCODE | vrt(d) | vra(a) | vrb(b)); }
+inline void Assembler::vmuluwm( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VMULUWM_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vmhaddshs(VectorRegister d,VectorRegister a, VectorRegister b, VectorRegister c) { emit_int32( VMHADDSHS_OPCODE | vrt(d) | vra(a) | vrb(b)| vrc(c)); }
 inline void Assembler::vmhraddshs(VectorRegister d,VectorRegister a,VectorRegister b, VectorRegister c) { emit_int32( VMHRADDSHS_OPCODE| vrt(d) | vra(a) | vrb(b)| vrc(c)); }
 inline void Assembler::vmladduhm(VectorRegister d,VectorRegister a, VectorRegister b, VectorRegister c) { emit_int32( VMLADDUHM_OPCODE | vrt(d) | vra(a) | vrb(b)| vrc(c)); }
@@ -860,6 +877,7 @@
 inline void Assembler::vmsumshs(VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c) { emit_int32( VMSUMSHS_OPCODE  | vrt(d) | vra(a) | vrb(b)| vrc(c)); }
 inline void Assembler::vmsumuhm(VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c) { emit_int32( VMSUMUHM_OPCODE  | vrt(d) | vra(a) | vrb(b)| vrc(c)); }
 inline void Assembler::vmsumuhs(VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c) { emit_int32( VMSUMUHS_OPCODE  | vrt(d) | vra(a) | vrb(b)| vrc(c)); }
+inline void Assembler::vmaddfp( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c) { emit_int32( VMADDFP_OPCODE   | vrt(d) | vra(a) | vrb(b)| vrc(c)); }
 inline void Assembler::vsumsws( VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUMSWS_OPCODE  | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsum2sws(VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUM2SWS_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsum4sbs(VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSUM4SBS_OPCODE | vrt(d) | vra(a) | vrb(b)); }
@@ -921,6 +939,7 @@
 inline void Assembler::vsrab(   VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSRAB_OPCODE    | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsraw(   VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSRAW_OPCODE    | vrt(d) | vra(a) | vrb(b)); }
 inline void Assembler::vsrah(   VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VSRAH_OPCODE    | vrt(d) | vra(a) | vrb(b)); }
+inline void Assembler::vpopcntw(VectorRegister d, VectorRegister b)                   { emit_int32( VPOPCNTW_OPCODE | vrt(d) | vrb(b)); }
 inline void Assembler::mtvscr(  VectorRegister b)                                     { emit_int32( MTVSCR_OPCODE   | vrb(b)); }
 inline void Assembler::mfvscr(  VectorRegister d)                                     { emit_int32( MFVSCR_OPCODE   | vrt(d)); }
 
--- a/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -2396,8 +2396,8 @@
     if (reg_conflict) { obj = dst; }
   }
 
-  ciMethodData* md;
-  ciProfileData* data;
+  ciMethodData* md = NULL;
+  ciProfileData* data = NULL;
   int mdo_offset_bias = 0;
   if (should_profile) {
     ciMethod* method = op->profiled_method();
@@ -2514,8 +2514,8 @@
     __ verify_oop(value);
     CodeStub* stub = op->stub();
     // Check if it needs to be profiled.
-    ciMethodData* md;
-    ciProfileData* data;
+    ciMethodData* md = NULL;
+    ciProfileData* data = NULL;
     int mdo_offset_bias = 0;
     if (should_profile) {
       ciMethod* method = op->profiled_method();
--- a/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -2848,12 +2848,6 @@
   ld(displaced_header, oopDesc::mark_offset_in_bytes(), oop);
 
 
-  // Always do locking in runtime.
-  if (EmitSync & 0x01) {
-    cmpdi(flag, oop, 0); // Oop can't be 0 here => always false.
-    return;
-  }
-
   if (try_bias) {
     biased_locking_enter(flag, oop, displaced_header, temp, current_header, cont);
   }
@@ -2867,11 +2861,9 @@
 #endif // INCLUDE_RTM_OPT
 
   // Handle existing monitor.
-  if ((EmitSync & 0x02) == 0) {
-    // The object has an existing monitor iff (mark & monitor_value) != 0.
-    andi_(temp, displaced_header, markOopDesc::monitor_value);
-    bne(CCR0, object_has_monitor);
-  }
+  // The object has an existing monitor iff (mark & monitor_value) != 0.
+  andi_(temp, displaced_header, markOopDesc::monitor_value);
+  bne(CCR0, object_has_monitor);
 
   // Set displaced_header to be (markOop of object | UNLOCK_VALUE).
   ori(displaced_header, displaced_header, markOopDesc::unlocked_value);
@@ -2914,48 +2906,46 @@
   std(R0/*==0, perhaps*/, BasicLock::displaced_header_offset_in_bytes(), box);
 
   // Handle existing monitor.
-  if ((EmitSync & 0x02) == 0) {
-    b(cont);
-
-    bind(object_has_monitor);
-    // The object's monitor m is unlocked iff m->owner == NULL,
-    // otherwise m->owner may contain a thread or a stack address.
+  b(cont);
+
+  bind(object_has_monitor);
+  // The object's monitor m is unlocked iff m->owner == NULL,
+  // otherwise m->owner may contain a thread or a stack address.
 
 #if INCLUDE_RTM_OPT
-    // Use the same RTM locking code in 32- and 64-bit VM.
-    if (use_rtm) {
-      rtm_inflated_locking(flag, oop, displaced_header, box, temp, /*temp*/ current_header,
-                           rtm_counters, method_data, profile_rtm, cont);
-    } else {
+  // Use the same RTM locking code in 32- and 64-bit VM.
+  if (use_rtm) {
+    rtm_inflated_locking(flag, oop, displaced_header, box, temp, /*temp*/ current_header,
+                         rtm_counters, method_data, profile_rtm, cont);
+  } else {
 #endif // INCLUDE_RTM_OPT
 
-    // Try to CAS m->owner from NULL to current thread.
-    addi(temp, displaced_header, ObjectMonitor::owner_offset_in_bytes()-markOopDesc::monitor_value);
-    cmpxchgd(/*flag=*/flag,
-             /*current_value=*/current_header,
-             /*compare_value=*/(intptr_t)0,
-             /*exchange_value=*/R16_thread,
-             /*where=*/temp,
-             MacroAssembler::MemBarRel | MacroAssembler::MemBarAcq,
-             MacroAssembler::cmpxchgx_hint_acquire_lock());
-
-    // Store a non-null value into the box.
-    std(box, BasicLock::displaced_header_offset_in_bytes(), box);
-
-#   ifdef ASSERT
-    bne(flag, cont);
-    // We have acquired the monitor, check some invariants.
-    addi(/*monitor=*/temp, temp, -ObjectMonitor::owner_offset_in_bytes());
-    // Invariant 1: _recursions should be 0.
-    //assert(ObjectMonitor::recursions_size_in_bytes() == 8, "unexpected size");
-    asm_assert_mem8_is_zero(ObjectMonitor::recursions_offset_in_bytes(), temp,
+  // Try to CAS m->owner from NULL to current thread.
+  addi(temp, displaced_header, ObjectMonitor::owner_offset_in_bytes()-markOopDesc::monitor_value);
+  cmpxchgd(/*flag=*/flag,
+           /*current_value=*/current_header,
+           /*compare_value=*/(intptr_t)0,
+           /*exchange_value=*/R16_thread,
+           /*where=*/temp,
+           MacroAssembler::MemBarRel | MacroAssembler::MemBarAcq,
+           MacroAssembler::cmpxchgx_hint_acquire_lock());
+
+  // Store a non-null value into the box.
+  std(box, BasicLock::displaced_header_offset_in_bytes(), box);
+
+# ifdef ASSERT
+  bne(flag, cont);
+  // We have acquired the monitor, check some invariants.
+  addi(/*monitor=*/temp, temp, -ObjectMonitor::owner_offset_in_bytes());
+  // Invariant 1: _recursions should be 0.
+  //assert(ObjectMonitor::recursions_size_in_bytes() == 8, "unexpected size");
+  asm_assert_mem8_is_zero(ObjectMonitor::recursions_offset_in_bytes(), temp,
                             "monitor->_recursions should be 0", -1);
-#   endif
+# endif
 
 #if INCLUDE_RTM_OPT
-    } // use_rtm()
+  } // use_rtm()
 #endif
-  }
 
   bind(cont);
   // flag == EQ indicates success
@@ -2970,12 +2960,6 @@
   Label cont;
   Label object_has_monitor;
 
-  // Always do locking in runtime.
-  if (EmitSync & 0x01) {
-    cmpdi(flag, oop, 0); // Oop can't be 0 here => always false.
-    return;
-  }
-
   if (try_bias) {
     biased_locking_exit(flag, oop, current_header, cont);
   }
@@ -3002,13 +2986,11 @@
   beq(flag, cont);
 
   // Handle existing monitor.
-  if ((EmitSync & 0x02) == 0) {
-    // The object has an existing monitor iff (mark & monitor_value) != 0.
-    RTM_OPT_ONLY( if (!(UseRTMForStackLocks && use_rtm)) ) // skip load if already done
-    ld(current_header, oopDesc::mark_offset_in_bytes(), oop);
-    andi_(R0, current_header, markOopDesc::monitor_value);
-    bne(CCR0, object_has_monitor);
-  }
+  // The object has an existing monitor iff (mark & monitor_value) != 0.
+  RTM_OPT_ONLY( if (!(UseRTMForStackLocks && use_rtm)) ) // skip load if already done
+  ld(current_header, oopDesc::mark_offset_in_bytes(), oop);
+  andi_(R0, current_header, markOopDesc::monitor_value);
+  bne(CCR0, object_has_monitor);
 
   // Check if it is still a light weight lock, this is is true if we see
   // the stack address of the basicLock in the markOop of the object.
@@ -3026,40 +3008,38 @@
   assert(oopDesc::mark_offset_in_bytes() == 0, "offset of _mark is not 0");
 
   // Handle existing monitor.
-  if ((EmitSync & 0x02) == 0) {
-    b(cont);
-
-    bind(object_has_monitor);
-    addi(current_header, current_header, -markOopDesc::monitor_value); // monitor
-    ld(temp,             ObjectMonitor::owner_offset_in_bytes(), current_header);
+  b(cont);
+
+  bind(object_has_monitor);
+  addi(current_header, current_header, -markOopDesc::monitor_value); // monitor
+  ld(temp,             ObjectMonitor::owner_offset_in_bytes(), current_header);
 
     // It's inflated.
 #if INCLUDE_RTM_OPT
-    if (use_rtm) {
-      Label L_regular_inflated_unlock;
-      // Clean monitor_value bit to get valid pointer
-      cmpdi(flag, temp, 0);
-      bne(flag, L_regular_inflated_unlock);
-      tend_();
-      b(cont);
-      bind(L_regular_inflated_unlock);
-    }
+  if (use_rtm) {
+    Label L_regular_inflated_unlock;
+    // Clean monitor_value bit to get valid pointer
+    cmpdi(flag, temp, 0);
+    bne(flag, L_regular_inflated_unlock);
+    tend_();
+    b(cont);
+    bind(L_regular_inflated_unlock);
+  }
 #endif
 
-    ld(displaced_header, ObjectMonitor::recursions_offset_in_bytes(), current_header);
-    xorr(temp, R16_thread, temp);      // Will be 0 if we are the owner.
-    orr(temp, temp, displaced_header); // Will be 0 if there are 0 recursions.
-    cmpdi(flag, temp, 0);
-    bne(flag, cont);
-
-    ld(temp,             ObjectMonitor::EntryList_offset_in_bytes(), current_header);
-    ld(displaced_header, ObjectMonitor::cxq_offset_in_bytes(), current_header);
-    orr(temp, temp, displaced_header); // Will be 0 if both are 0.
-    cmpdi(flag, temp, 0);
-    bne(flag, cont);
-    release();
-    std(temp, ObjectMonitor::owner_offset_in_bytes(), current_header);
-  }
+  ld(displaced_header, ObjectMonitor::recursions_offset_in_bytes(), current_header);
+  xorr(temp, R16_thread, temp);      // Will be 0 if we are the owner.
+  orr(temp, temp, displaced_header); // Will be 0 if there are 0 recursions.
+  cmpdi(flag, temp, 0);
+  bne(flag, cont);
+
+  ld(temp,             ObjectMonitor::EntryList_offset_in_bytes(), current_header);
+  ld(displaced_header, ObjectMonitor::cxq_offset_in_bytes(), current_header);
+  orr(temp, temp, displaced_header); // Will be 0 if both are 0.
+  cmpdi(flag, temp, 0);
+  bne(flag, cont);
+  release();
+  std(temp, ObjectMonitor::owner_offset_in_bytes(), current_header);
 
   bind(cont);
   // flag == EQ indicates success
--- a/src/hotspot/cpu/ppc/macroAssembler_ppc.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/macroAssembler_ppc.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -162,7 +162,7 @@
   // branch, jump
   //
 
-  inline void pd_patch_instruction(address branch, address target);
+  inline void pd_patch_instruction(address branch, address target, const char* file, int line);
   NOT_PRODUCT(static void pd_print_patched_instruction(address branch);)
 
   // Conditional far branch for destinations encodable in 24+2 bits.
--- a/src/hotspot/cpu/ppc/macroAssembler_ppc.inline.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/macroAssembler_ppc.inline.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -186,7 +186,7 @@
   load_const(d, obj_addr);
 }
 
-inline void MacroAssembler::pd_patch_instruction(address branch, address target) {
+inline void MacroAssembler::pd_patch_instruction(address branch, address target, const char* file, int line) {
   jint& stub_inst = *(jint*) branch;
   stub_inst = patched_branch(target - branch, stub_inst, 0);
 }
--- a/src/hotspot/cpu/ppc/ppc.ad	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/ppc.ad	Thu Sep 13 22:05:54 2018 +0200
@@ -908,6 +908,7 @@
 // ----------------------------
 
 reg_class vs_reg(
+  // Attention: Only these ones are saved & restored at safepoint by RegisterSaver.
   VSR32,
   VSR33,
   VSR34,
@@ -928,18 +929,7 @@
   VSR49,
   VSR50,
   VSR51
-//  VSR52,     // nv!
-//  VSR53,     // nv!
-//  VSR54,     // nv!
-//  VSR55,     // nv!
-//  VSR56,     // nv!
-//  VSR57,     // nv!
-//  VSR58,     // nv!
-//  VSR59,     // nv!
-//  VSR60,     // nv!
-//  VSR61,     // nv!
-//  VSR62,     // nv!
-//  VSR63      // nv!
+  // VSR52-VSR63 // nv!
 );
 
  %}
@@ -2234,9 +2224,35 @@
   case Op_StrEquals:
     return SpecialStringEquals;
   case Op_StrIndexOf:
-    return SpecialStringIndexOf;
   case Op_StrIndexOfChar:
     return SpecialStringIndexOf;
+  case Op_AddVB:
+  case Op_AddVS:
+  case Op_AddVI:
+  case Op_AddVF:
+  case Op_AddVD:
+  case Op_SubVB:
+  case Op_SubVS:
+  case Op_SubVI:
+  case Op_SubVF:
+  case Op_SubVD:
+  case Op_MulVS:
+  case Op_MulVF:
+  case Op_MulVD:
+  case Op_DivVF:
+  case Op_DivVD:
+  case Op_AbsVF:
+  case Op_AbsVD:
+  case Op_NegVF:
+  case Op_NegVD:
+  case Op_SqrtVF:
+  case Op_SqrtVD:
+  case Op_AddVL:
+  case Op_SubVL:
+  case Op_MulVI:
+    return SuperwordUseVSX;
+  case Op_PopCountVI:
+    return (SuperwordUseVSX && UsePopCountInstruction);
   }
 
   return true;  // Per default match rules are supported.
@@ -10017,7 +10033,7 @@
 
 // Single-precision sqrt.
 instruct sqrtF_reg(regF dst, regF src) %{
-  match(Set dst (ConvD2F (SqrtD (ConvF2D src))));
+  match(Set dst (SqrtF src));
   predicate(VM_Version::has_fsqrts());
   ins_cost(DEFAULT_COST);
 
@@ -13989,6 +14005,303 @@
 %}
 
 
+//----------Vector Arithmetic Instructions--------------------------------------
+
+// Vector Addition Instructions
+
+instruct vadd16B_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (AddVB src1 src2));
+  predicate(n->as_Vector()->length() == 16);
+  format %{ "VADDUBM  $dst,$src1,$src2\t// add packed16B" %}
+  size(4);
+  ins_encode %{
+    __ vaddubm($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vadd8S_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (AddVS src1 src2));
+  predicate(n->as_Vector()->length() == 8);
+  format %{ "VADDUHM  $dst,$src1,$src2\t// add packed8S" %}
+  size(4);
+  ins_encode %{
+    __ vadduhm($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vadd4I_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (AddVI src1 src2));
+  predicate(n->as_Vector()->length() == 4);
+  format %{ "VADDUWM  $dst,$src1,$src2\t// add packed4I" %}
+  size(4);
+  ins_encode %{
+    __ vadduwm($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vadd4F_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (AddVF src1 src2));
+  predicate(n->as_Vector()->length() == 4);
+  format %{ "VADDFP  $dst,$src1,$src2\t// add packed4F" %}
+  size(4);
+  ins_encode %{
+    __ vaddfp($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vadd2L_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (AddVL src1 src2));
+  predicate(n->as_Vector()->length() == 2);
+  format %{ "VADDUDM  $dst,$src1,$src2\t// add packed2L" %}
+  size(4);
+  ins_encode %{
+    __ vaddudm($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vadd2D_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (AddVD src1 src2));
+  predicate(n->as_Vector()->length() == 2);
+  format %{ "XVADDDP  $dst,$src1,$src2\t// add packed2D" %}
+  size(4);
+  ins_encode %{
+    __ xvadddp($dst$$VectorSRegister, $src1$$VectorSRegister, $src2$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+// Vector Subtraction Instructions
+
+instruct vsub16B_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (SubVB src1 src2));
+  predicate(n->as_Vector()->length() == 16);
+  format %{ "VSUBUBM  $dst,$src1,$src2\t// sub packed16B" %}
+  size(4);
+  ins_encode %{
+    __ vsububm($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vsub8S_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (SubVS src1 src2));
+  predicate(n->as_Vector()->length() == 8);
+  format %{ "VSUBUHM  $dst,$src1,$src2\t// sub packed8S" %}
+  size(4);
+  ins_encode %{
+    __ vsubuhm($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vsub4I_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (SubVI src1 src2));
+  predicate(n->as_Vector()->length() == 4);
+  format %{ "VSUBUWM  $dst,$src1,$src2\t// sub packed4I" %}
+  size(4);
+  ins_encode %{
+    __ vsubuwm($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vsub4F_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (SubVF src1 src2));
+  predicate(n->as_Vector()->length() == 4);
+  format %{ "VSUBFP  $dst,$src1,$src2\t// sub packed4F" %}
+  size(4);
+  ins_encode %{
+    __ vsubfp($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vsub2L_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (SubVL src1 src2));
+  predicate(n->as_Vector()->length() == 2);
+  format %{ "VSUBUDM  $dst,$src1,$src2\t// sub packed2L" %}
+  size(4);
+  ins_encode %{
+    __ vsubudm($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vsub2D_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (SubVD src1 src2));
+  predicate(n->as_Vector()->length() == 2);
+  format %{ "XVSUBDP  $dst,$src1,$src2\t// sub packed2D" %}
+  size(4);
+  ins_encode %{
+    __ xvsubdp($dst$$VectorSRegister, $src1$$VectorSRegister, $src2$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+// Vector Multiplication Instructions
+
+instruct vmul8S_reg(vecX dst, vecX src1, vecX src2, vecX tmp) %{
+  match(Set dst (MulVS src1 src2));
+  predicate(n->as_Vector()->length() == 8);
+  effect(TEMP tmp);
+  format %{ "VSPLTISH  $tmp,0\t// mul packed8S" %}
+  format %{ "VMLADDUHM  $dst,$src1,$src2\t// mul packed8S" %}
+  size(8);
+  ins_encode %{
+    __ vspltish($tmp$$VectorSRegister->to_vr(), 0);
+    __ vmladduhm($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr(), $tmp$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vmul4I_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (MulVI src1 src2));
+  predicate(n->as_Vector()->length() == 4);
+  format %{ "VMULUWM  $dst,$src1,$src2\t// mul packed4I" %}
+  size(4);
+  ins_encode %{
+    __ vmuluwm($dst$$VectorSRegister->to_vr(), $src1$$VectorSRegister->to_vr(), $src2$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vmul4F_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (MulVF src1 src2));
+  predicate(n->as_Vector()->length() == 4);
+  format %{ "XVMULSP  $dst,$src1,$src2\t// mul packed4F" %}
+  size(4);
+  ins_encode %{
+    __ xvmulsp($dst$$VectorSRegister, $src1$$VectorSRegister, $src2$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vmul2D_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (MulVD src1 src2));
+  predicate(n->as_Vector()->length() == 2);
+  format %{ "XVMULDP  $dst,$src1,$src2\t// mul packed2D" %}
+  size(4);
+  ins_encode %{
+    __ xvmuldp($dst$$VectorSRegister, $src1$$VectorSRegister, $src2$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+// Vector Division Instructions
+
+instruct vdiv4F_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (DivVF src1 src2));
+  predicate(n->as_Vector()->length() == 4);
+  format %{ "XVDIVSP  $dst,$src1,$src2\t// div packed4F" %}
+  size(4);
+  ins_encode %{
+    __ xvdivsp($dst$$VectorSRegister, $src1$$VectorSRegister, $src2$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vdiv2D_reg(vecX dst, vecX src1, vecX src2) %{
+  match(Set dst (DivVD src1 src2));
+  predicate(n->as_Vector()->length() == 2);
+  format %{ "XVDIVDP  $dst,$src1,$src2\t// div packed2D" %}
+  size(4);
+  ins_encode %{
+    __ xvdivdp($dst$$VectorSRegister, $src1$$VectorSRegister, $src2$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+// Vector Absolute Instructions
+
+instruct vabs4F_reg(vecX dst, vecX src) %{
+  match(Set dst (AbsVF src));
+  predicate(n->as_Vector()->length() == 4);
+  format %{ "XVABSSP $dst,$src\t// absolute packed4F" %}
+  size(4);
+  ins_encode %{
+    __ xvabssp($dst$$VectorSRegister, $src$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vabs2D_reg(vecX dst, vecX src) %{
+  match(Set dst (AbsVD src));
+  predicate(n->as_Vector()->length() == 2);
+  format %{ "XVABSDP $dst,$src\t// absolute packed2D" %}
+  size(4);
+  ins_encode %{
+    __ xvabsdp($dst$$VectorSRegister, $src$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+// Vector Negate Instructions
+
+instruct vneg4F_reg(vecX dst, vecX src) %{
+  match(Set dst (NegVF src));
+  predicate(n->as_Vector()->length() == 4);
+  format %{ "XVNEGSP $dst,$src\t// negate packed4F" %}
+  size(4);
+  ins_encode %{
+    __ xvnegsp($dst$$VectorSRegister, $src$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vneg2D_reg(vecX dst, vecX src) %{
+  match(Set dst (NegVD src));
+  predicate(n->as_Vector()->length() == 2);
+  format %{ "XVNEGDP $dst,$src\t// negate packed2D" %}
+  size(4);
+  ins_encode %{
+    __ xvnegdp($dst$$VectorSRegister, $src$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+// Vector Square Root Instructions
+
+instruct vsqrt4F_reg(vecX dst, vecX src) %{
+  match(Set dst (SqrtVF src));
+  predicate(n->as_Vector()->length() == 4);
+  format %{ "XVSQRTSP $dst,$src\t// sqrt packed4F" %}
+  size(4);
+  ins_encode %{
+    __ xvsqrtsp($dst$$VectorSRegister, $src$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+instruct vsqrt2D_reg(vecX dst, vecX src) %{
+  match(Set dst (SqrtVD src));
+  predicate(n->as_Vector()->length() == 2);
+  format %{ "XVSQRTDP  $dst,$src\t// sqrt packed2D" %}
+  size(4);
+  ins_encode %{
+    __ xvsqrtdp($dst$$VectorSRegister, $src$$VectorSRegister);
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+// Vector Population Count Instructions
+
+instruct vpopcnt4I_reg(vecX dst, vecX src) %{
+  match(Set dst (PopCountVI src));
+  predicate(n->as_Vector()->length() == 4);
+  format %{ "VPOPCNTW $dst,$src\t// pop count packed4I" %}
+  size(4);
+  ins_encode %{
+    __ vpopcntw($dst$$VectorSRegister->to_vr(), $src$$VectorSRegister->to_vr());
+  %}
+  ins_pipe(pipe_class_default);
+%}
+
+
 //----------Overflow Math Instructions-----------------------------------------
 
 // Note that we have to make sure that XER.SO is reset before using overflow instructions.
--- a/src/hotspot/cpu/ppc/register_definitions_ppc.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/register_definitions_ppc.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -32,4 +32,6 @@
 
 REGISTER_DEFINITION(FloatRegister, fnoreg);
 
+REGISTER_DEFINITION(VectorRegister, vnoreg);
+
 REGISTER_DEFINITION(VectorSRegister, vsnoreg);
--- a/src/hotspot/cpu/ppc/register_ppc.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/register_ppc.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2017 SAP SE. All rights reserved.
+ * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2018 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,11 +26,6 @@
 #include "precompiled.hpp"
 #include "register_ppc.hpp"
 
-const int ConcreteRegisterImpl::max_gpr = RegisterImpl::number_of_registers * 2;
-const int ConcreteRegisterImpl::max_fpr = ConcreteRegisterImpl::max_gpr +
-                                          FloatRegisterImpl::number_of_registers * 2;
-const int ConcreteRegisterImpl::max_cnd = ConcreteRegisterImpl::max_fpr +
-                                          ConditionRegisterImpl::number_of_registers;
 
 const char* RegisterImpl::name() const {
   const char* names[number_of_registers] = {
@@ -92,6 +87,12 @@
 
 // Method to convert a VectorRegister to a Vector-Scalar Register (VectorSRegister)
 VectorSRegister VectorRegisterImpl::to_vsr() const {
-  if (this == vnoreg) { return vsnoregi; }
+  if (this == vnoreg) { return vsnoreg; }
   return as_VectorSRegister(encoding() + 32);
 }
+
+// Method to convert a VectorSRegister to a Vector Register (VectorRegister)
+VectorRegister VectorSRegisterImpl::to_vr() const {
+  if (this == vsnoreg) { return vnoreg; }
+  return as_VectorRegister(encoding() - 32);
+}
--- a/src/hotspot/cpu/ppc/register_ppc.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/register_ppc.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2017 SAP SE. All rights reserved.
+ * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2018 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -515,11 +515,15 @@
 
   // accessors
   int encoding() const { assert(is_valid(), "invalid register"); return value(); }
+  inline VMReg as_VMReg();
 
   // testers
   bool is_valid() const { return 0 <=  value() &&  value() < number_of_registers; }
 
   const char* name() const;
+
+  // convert to VR
+  VectorRegister to_vr() const;
 };
 
 // The Vector-Scalar (VSX) registers of the POWER architecture.
@@ -592,7 +596,7 @@
 CONSTANT_REGISTER_DECLARATION(VectorSRegister, VSR63, (63));
 
 #ifndef DONT_USE_REGISTER_DEFINES
-#define vsnoregi ((VectorSRegister)(vsnoreg_VectorSRegisterEnumValue))
+#define vsnoreg ((VectorSRegister)(vsnoreg_VectorSRegisterEnumValue))
 #define VSR0    ((VectorSRegister)(   VSR0_VectorSRegisterEnumValue))
 #define VSR1    ((VectorSRegister)(   VSR1_VectorSRegisterEnumValue))
 #define VSR2    ((VectorSRegister)(   VSR2_VectorSRegisterEnumValue))
@@ -668,21 +672,16 @@
 class ConcreteRegisterImpl : public AbstractRegisterImpl {
  public:
   enum {
+    max_gpr = RegisterImpl::number_of_registers * 2,
+    max_fpr = max_gpr + FloatRegisterImpl::number_of_registers * 2,
+    max_vsr = max_fpr + VectorSRegisterImpl::number_of_registers,
+    max_cnd = max_vsr + ConditionRegisterImpl::number_of_registers,
+    max_spr = max_cnd + SpecialRegisterImpl::number_of_registers,
     // This number must be large enough to cover REG_COUNT (defined by c2) registers.
     // There is no requirement that any ordering here matches any ordering c2 gives
     // it's optoregs.
-    number_of_registers =
-      ( RegisterImpl::number_of_registers +
-        FloatRegisterImpl::number_of_registers )
-      * 2                                          // register halves
-      + ConditionRegisterImpl::number_of_registers // condition code registers
-      + SpecialRegisterImpl::number_of_registers   // special registers
-      + VectorSRegisterImpl::number_of_registers   // VSX registers
+    number_of_registers = max_spr
   };
-
-  static const int max_gpr;
-  static const int max_fpr;
-  static const int max_cnd;
 };
 
 // Common register declarations used in assembler code.
--- a/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -75,10 +75,12 @@
                          int* out_frame_size_in_bytes,
                          bool generate_oop_map,
                          int return_pc_adjustment,
-                         ReturnPCLocation return_pc_location);
+                         ReturnPCLocation return_pc_location,
+                         bool save_vectors = false);
   static void    restore_live_registers_and_pop_frame(MacroAssembler* masm,
                          int frame_size_in_bytes,
-                         bool restore_ctr);
+                         bool restore_ctr,
+                         bool save_vectors = false);
 
   static void push_frame_and_save_argument_registers(MacroAssembler* masm,
                          Register r_temp,
@@ -97,14 +99,16 @@
   // Constants and data structures:
 
   typedef enum {
-    int_reg           = 0,
-    float_reg         = 1,
-    special_reg       = 2
+    int_reg,
+    float_reg,
+    special_reg,
+    vs_reg
   } RegisterType;
 
   typedef enum {
     reg_size          = 8,
     half_reg_size     = reg_size / 2,
+    vs_reg_size       = 16
   } RegisterConstants;
 
   typedef struct {
@@ -115,14 +119,17 @@
 };
 
 
+#define RegisterSaver_LiveIntReg(regname) \
+  { RegisterSaver::int_reg,     regname->encoding(), regname->as_VMReg() }
+
+#define RegisterSaver_LiveFloatReg(regname) \
+  { RegisterSaver::float_reg,   regname->encoding(), regname->as_VMReg() }
+
 #define RegisterSaver_LiveSpecialReg(regname) \
   { RegisterSaver::special_reg, regname->encoding(), regname->as_VMReg() }
 
-#define RegisterSaver_LiveIntReg(regname) \
-  { RegisterSaver::int_reg,     regname->encoding(), regname->as_VMReg() }
-
-#define RegisterSaver_LiveFloatReg(regname) \
-  { RegisterSaver::float_reg,   regname->encoding(), regname->as_VMReg() }
+#define RegisterSaver_LiveVSReg(regname) \
+  { RegisterSaver::vs_reg,      regname->encoding(), regname->as_VMReg() }
 
 static const RegisterSaver::LiveRegType RegisterSaver_LiveRegs[] = {
   // Live registers which get spilled to the stack. Register
@@ -201,14 +208,42 @@
   RegisterSaver_LiveIntReg(   R28 ),
   RegisterSaver_LiveIntReg(   R29 ),
   RegisterSaver_LiveIntReg(   R30 ),
-  RegisterSaver_LiveIntReg(   R31 ), // must be the last register (see save/restore functions below)
+  RegisterSaver_LiveIntReg(   R31 )  // must be the last register (see save/restore functions below)
 };
 
+static const RegisterSaver::LiveRegType RegisterSaver_LiveVSRegs[] = {
+  //
+  // live vector scalar registers (optional, only these ones are used by C2):
+  //
+  RegisterSaver_LiveVSReg( VSR32 ),
+  RegisterSaver_LiveVSReg( VSR33 ),
+  RegisterSaver_LiveVSReg( VSR34 ),
+  RegisterSaver_LiveVSReg( VSR35 ),
+  RegisterSaver_LiveVSReg( VSR36 ),
+  RegisterSaver_LiveVSReg( VSR37 ),
+  RegisterSaver_LiveVSReg( VSR38 ),
+  RegisterSaver_LiveVSReg( VSR39 ),
+  RegisterSaver_LiveVSReg( VSR40 ),
+  RegisterSaver_LiveVSReg( VSR41 ),
+  RegisterSaver_LiveVSReg( VSR42 ),
+  RegisterSaver_LiveVSReg( VSR43 ),
+  RegisterSaver_LiveVSReg( VSR44 ),
+  RegisterSaver_LiveVSReg( VSR45 ),
+  RegisterSaver_LiveVSReg( VSR46 ),
+  RegisterSaver_LiveVSReg( VSR47 ),
+  RegisterSaver_LiveVSReg( VSR48 ),
+  RegisterSaver_LiveVSReg( VSR49 ),
+  RegisterSaver_LiveVSReg( VSR50 ),
+  RegisterSaver_LiveVSReg( VSR51 )
+};
+
+
 OopMap* RegisterSaver::push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,
                          int* out_frame_size_in_bytes,
                          bool generate_oop_map,
                          int return_pc_adjustment,
-                         ReturnPCLocation return_pc_location) {
+                         ReturnPCLocation return_pc_location,
+                         bool save_vectors) {
   // Push an abi_reg_args-frame and store all registers which may be live.
   // If requested, create an OopMap: Record volatile registers as
   // callee-save values in an OopMap so their save locations will be
@@ -218,15 +253,16 @@
   // If return_pc_adjustment != 0 adjust the return pc by return_pc_adjustment.
   // Updated return pc is returned in R31 (if not return_pc_is_pre_saved).
 
-  int i;
-  int offset;
-
   // calcualte frame size
   const int regstosave_num       = sizeof(RegisterSaver_LiveRegs) /
                                    sizeof(RegisterSaver::LiveRegType);
-  const int register_save_size   = regstosave_num * reg_size;
+  const int vsregstosave_num     = save_vectors ? (sizeof(RegisterSaver_LiveVSRegs) /
+                                                   sizeof(RegisterSaver::LiveRegType))
+                                                : 0;
+  const int register_save_size   = regstosave_num * reg_size + vsregstosave_num * vs_reg_size;
   const int frame_size_in_bytes  = align_up(register_save_size, frame::alignment_in_bytes)
                                    + frame::abi_reg_args_size;
+
   *out_frame_size_in_bytes       = frame_size_in_bytes;
   const int frame_size_in_slots  = frame_size_in_bytes / sizeof(jint);
   const int register_save_offset = frame_size_in_bytes - register_save_size;
@@ -236,17 +272,18 @@
 
   BLOCK_COMMENT("push_frame_reg_args_and_save_live_registers {");
 
-  // Save some registers in the last slots of the not yet pushed frame so that we
-  // can use them as scratch regs.
-  __ std(R31, -  reg_size, R1_SP);
-  __ std(R30, -2*reg_size, R1_SP);
-  assert(-reg_size == register_save_offset - frame_size_in_bytes + ((regstosave_num-1)*reg_size),
-         "consistency check");
+  // push a new frame
+  __ push_frame(frame_size_in_bytes, noreg);
+
+  // Save some registers in the last (non-vector) slots of the new frame so we
+  // can use them as scratch regs or to determine the return pc.
+  __ std(R31, frame_size_in_bytes -   reg_size - vsregstosave_num * vs_reg_size, R1_SP);
+  __ std(R30, frame_size_in_bytes - 2*reg_size - vsregstosave_num * vs_reg_size, R1_SP);
 
   // save the flags
   // Do the save_LR_CR by hand and adjust the return pc if requested.
   __ mfcr(R30);
-  __ std(R30, _abi(cr), R1_SP);
+  __ std(R30, frame_size_in_bytes + _abi(cr), R1_SP);
   switch (return_pc_location) {
     case return_pc_is_lr: __ mflr(R31); break;
     case return_pc_is_pre_saved: assert(return_pc_adjustment == 0, "unsupported"); break;
@@ -257,14 +294,12 @@
     if (return_pc_adjustment != 0) {
       __ addi(R31, R31, return_pc_adjustment);
     }
-    __ std(R31, _abi(lr), R1_SP);
+    __ std(R31, frame_size_in_bytes + _abi(lr), R1_SP);
   }
 
-  // push a new frame
-  __ push_frame(frame_size_in_bytes, R30);
-
   // save all registers (ints and floats)
-  offset = register_save_offset;
+  int offset = register_save_offset;
+
   for (int i = 0; i < regstosave_num; i++) {
     int reg_num  = RegisterSaver_LiveRegs[i].reg_num;
     int reg_type = RegisterSaver_LiveRegs[i].reg_type;
@@ -302,6 +337,22 @@
     offset += reg_size;
   }
 
+  for (int i = 0; i < vsregstosave_num; i++) {
+    int reg_num  = RegisterSaver_LiveVSRegs[i].reg_num;
+    int reg_type = RegisterSaver_LiveVSRegs[i].reg_type;
+
+    __ li(R30, offset);
+    __ stxvd2x(as_VectorSRegister(reg_num), R30, R1_SP);
+
+    if (generate_oop_map) {
+      map->set_callee_saved(VMRegImpl::stack2reg(offset>>2),
+                            RegisterSaver_LiveVSRegs[i].vmreg);
+    }
+    offset += vs_reg_size;
+  }
+
+  assert(offset == frame_size_in_bytes, "consistency check");
+
   BLOCK_COMMENT("} push_frame_reg_args_and_save_live_registers");
 
   // And we're done.
@@ -313,18 +364,22 @@
 // saved.
 void RegisterSaver::restore_live_registers_and_pop_frame(MacroAssembler* masm,
                                                          int frame_size_in_bytes,
-                                                         bool restore_ctr) {
-  int i;
-  int offset;
+                                                         bool restore_ctr,
+                                                         bool save_vectors) {
   const int regstosave_num       = sizeof(RegisterSaver_LiveRegs) /
                                    sizeof(RegisterSaver::LiveRegType);
-  const int register_save_size   = regstosave_num * reg_size;
+  const int vsregstosave_num     = save_vectors ? (sizeof(RegisterSaver_LiveVSRegs) /
+                                                   sizeof(RegisterSaver::LiveRegType))
+                                                : 0;
+  const int register_save_size   = regstosave_num * reg_size + vsregstosave_num * vs_reg_size;
+
   const int register_save_offset = frame_size_in_bytes - register_save_size;
 
   BLOCK_COMMENT("restore_live_registers_and_pop_frame {");
 
   // restore all registers (ints and floats)
-  offset = register_save_offset;
+  int offset = register_save_offset;
+
   for (int i = 0; i < regstosave_num; i++) {
     int reg_num  = RegisterSaver_LiveRegs[i].reg_num;
     int reg_type = RegisterSaver_LiveRegs[i].reg_type;
@@ -356,14 +411,30 @@
     offset += reg_size;
   }
 
+  for (int i = 0; i < vsregstosave_num; i++) {
+    int reg_num  = RegisterSaver_LiveVSRegs[i].reg_num;
+    int reg_type = RegisterSaver_LiveVSRegs[i].reg_type;
+
+    __ li(R31, offset);
+    __ lxvd2x(as_VectorSRegister(reg_num), R31, R1_SP);
+
+    offset += vs_reg_size;
+  }
+
+  assert(offset == frame_size_in_bytes, "consistency check");
+
+  // restore link and the flags
+  __ ld(R31, frame_size_in_bytes + _abi(lr), R1_SP);
+  __ mtlr(R31);
+
+  __ ld(R31, frame_size_in_bytes + _abi(cr), R1_SP);
+  __ mtcr(R31);
+
+  // restore scratch register's value
+  __ ld(R31, frame_size_in_bytes - reg_size - vsregstosave_num * vs_reg_size, R1_SP);
+
   // pop the frame
-  __ pop_frame();
-
-  // restore the flags
-  __ restore_LR_CR(R31);
-
-  // restore scratch register's value
-  __ ld(R31, -reg_size, R1_SP);
+  __ addi(R1_SP, R1_SP, frame_size_in_bytes);
 
   BLOCK_COMMENT("} restore_live_registers_and_pop_frame");
 }
@@ -447,15 +518,13 @@
 
 // Restore the registers that might be holding a result.
 void RegisterSaver::restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes) {
-  int i;
-  int offset;
   const int regstosave_num       = sizeof(RegisterSaver_LiveRegs) /
                                    sizeof(RegisterSaver::LiveRegType);
-  const int register_save_size   = regstosave_num * reg_size;
+  const int register_save_size   = regstosave_num * reg_size; // VS registers not relevant here.
   const int register_save_offset = frame_size_in_bytes - register_save_size;
 
   // restore all result registers (ints and floats)
-  offset = register_save_offset;
+  int offset = register_save_offset;
   for (int i = 0; i < regstosave_num; i++) {
     int reg_num  = RegisterSaver_LiveRegs[i].reg_num;
     int reg_type = RegisterSaver_LiveRegs[i].reg_type;
@@ -479,6 +548,8 @@
     }
     offset += reg_size;
   }
+
+  assert(offset == frame_size_in_bytes, "consistency check");
 }
 
 // Is vector's size (in bytes) bigger than a size saved by default?
@@ -3109,12 +3180,14 @@
     __ tabort_();
   }
 
+  bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
+
   // Save registers, fpu state, and flags. Set R31 = return pc.
   map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
                                                                    &frame_size_in_bytes,
                                                                    /*generate_oop_map=*/ true,
                                                                    /*return_pc_adjustment=*/0,
-                                                                   return_pc_location);
+                                                                   return_pc_location, save_vectors);
 
   // The following is basically a call_VM. However, we need the precise
   // address of the call in order to generate an oopmap. Hence, we do all the
@@ -3148,7 +3221,7 @@
   // Exception pending
   RegisterSaver::restore_live_registers_and_pop_frame(masm,
                                                       frame_size_in_bytes,
-                                                      /*restore_ctr=*/true);
+                                                      /*restore_ctr=*/true, save_vectors);
 
   BLOCK_COMMENT("  Jump to forward_exception_entry.");
   // Jump to forward_exception_entry, with the issuing PC in LR
@@ -3175,7 +3248,7 @@
   // Normal exit, restore registers and exit.
   RegisterSaver::restore_live_registers_and_pop_frame(masm,
                                                       frame_size_in_bytes,
-                                                      /*restore_ctr=*/true);
+                                                      /*restore_ctr=*/true, save_vectors);
 
   __ blr();
 
--- a/src/hotspot/cpu/ppc/vmreg_ppc.inline.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/vmreg_ppc.inline.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
+ * Copyright (c) 2002, 2018, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2018 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,16 +28,21 @@
 
 inline VMReg RegisterImpl::as_VMReg() {
   if (this == noreg) return VMRegImpl::Bad();
+  // Two halfs, multiply by 2.
   return VMRegImpl::as_VMReg(encoding() << 1);
 }
 
-// Since we don't have two halfs here, don't multiply by 2.
-inline VMReg ConditionRegisterImpl::as_VMReg() {
+inline VMReg FloatRegisterImpl::as_VMReg() {
+  // Two halfs, multiply by 2.
+  return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
+}
+
+inline VMReg VectorSRegisterImpl::as_VMReg() {
   return VMRegImpl::as_VMReg((encoding()) + ConcreteRegisterImpl::max_fpr);
 }
 
-inline VMReg FloatRegisterImpl::as_VMReg() {
-  return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
+inline VMReg ConditionRegisterImpl::as_VMReg() {
+  return VMRegImpl::as_VMReg((encoding()) + ConcreteRegisterImpl::max_vsr);
 }
 
 inline VMReg SpecialRegisterImpl::as_VMReg() {
--- a/src/hotspot/cpu/ppc/vtableStubs_ppc_64.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/ppc/vtableStubs_ppc_64.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -39,36 +39,39 @@
 
 #define __ masm->
 
-#ifdef PRODUCT
-#define BLOCK_COMMENT(str) // nothing
-#else
-#define BLOCK_COMMENT(str) __ block_comment(str)
-#endif
-#define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
-
 #ifndef PRODUCT
 extern "C" void bad_compiled_vtable_index(JavaThread* thread, oopDesc* receiver, int index);
 #endif
 
-// Used by compiler only; may use only caller saved, non-argument
-// registers.
+// Used by compiler only; may use only caller saved, non-argument registers.
 VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
-  // PPC port: use fixed size.
-  const int code_length = VtableStub::pd_code_size_limit(true);
-  VtableStub* s = new (code_length) VtableStub(true, vtable_index);
-
+  // Read "A word on VtableStub sizing" in share/code/vtableStubs.hpp for details on stub sizing.
+  const int stub_code_length = code_size_limit(true);
+  VtableStub* s = new(stub_code_length) VtableStub(true, vtable_index);
   // Can be NULL if there is no free space in the code cache.
   if (s == NULL) {
     return NULL;
   }
 
-  ResourceMark rm;
-  CodeBuffer cb(s->entry_point(), code_length);
+  // Count unused bytes in instruction sequences of variable size.
+  // We add them to the computed buffer size in order to avoid
+  // overflow in subsequently generated stubs.
+  address   start_pc;
+  int       slop_bytes = 8; // just a two-instruction safety net
+  int       slop_delta = 0;
+
+  ResourceMark    rm;
+  CodeBuffer      cb(s->entry_point(), stub_code_length);
   MacroAssembler* masm = new MacroAssembler(&cb);
 
-#ifndef PRODUCT
+#if (!defined(PRODUCT) && defined(COMPILER2))
   if (CountCompiledCalls) {
+    start_pc = __ pc();
+    int load_const_maxLen = 5*BytesPerInstWord;  // load_const generates 5 instructions. Assume that as max size for laod_const_optimized
     int offs = __ load_const_optimized(R11_scratch1, SharedRuntime::nof_megamorphic_calls_addr(), R12_scratch2, true);
+    slop_delta  = load_const_maxLen - (__ pc() - start_pc);
+    slop_bytes += slop_delta;
+    assert(slop_delta >= 0, "negative slop(%d) encountered, adjust code size estimate!", slop_delta);
     __ lwz(R12_scratch2, offs, R11_scratch1);
     __ addi(R12_scratch2, R12_scratch2, 1);
     __ stw(R12_scratch2, offs, R11_scratch1);
@@ -77,17 +80,13 @@
 
   assert(VtableStub::receiver_location() == R3_ARG1->as_VMReg(), "receiver expected in R3_ARG1");
 
+  const Register rcvr_klass = R11_scratch1;
+  address npe_addr = __ pc(); // npe = null pointer exception
+  // check if we must do an explicit check (implicit checks disabled, offset too large).
+  __ null_check(R3, oopDesc::klass_offset_in_bytes(), /*implicit only*/NULL);
   // Get receiver klass.
-  const Register rcvr_klass = R11_scratch1;
-
-  // We might implicit NULL fault here.
-  address npe_addr = __ pc(); // npe = null pointer exception
-  __ null_check(R3, oopDesc::klass_offset_in_bytes(), /*implicit only*/NULL);
   __ load_klass(rcvr_klass, R3);
 
- // Set method (in case of interpreted method), and destination address.
-  int entry_offset = in_bytes(Klass::vtable_start_offset()) + vtable_index*vtableEntry::size_in_bytes();
-
 #ifndef PRODUCT
   if (DebugVtables) {
     Label L;
@@ -102,7 +101,9 @@
   }
 #endif
 
-  int v_off = entry_offset + vtableEntry::method_offset_in_bytes();
+  int entry_offset = in_bytes(Klass::vtable_start_offset()) +
+                     vtable_index*vtableEntry::size_in_bytes();
+  int v_off        = entry_offset + vtableEntry::method_offset_in_bytes();
 
   __ ld(R19_method, (RegisterOrConstant)v_off, rcvr_klass);
 
@@ -116,40 +117,48 @@
   }
 #endif
 
-  // If the vtable entry is null, the method is abstract.
   address ame_addr = __ pc(); // ame = abstract method error
+                              // if the vtable entry is null, the method is abstract
+                              // NOTE: for vtable dispatches, the vtable entry will never be null.
+
   __ null_check(R19_method, in_bytes(Method::from_compiled_offset()), /*implicit only*/NULL);
   __ ld(R12_scratch2, in_bytes(Method::from_compiled_offset()), R19_method);
   __ mtctr(R12_scratch2);
   __ bctr();
 
   masm->flush();
-
-  guarantee(__ pc() <= s->code_end(), "overflowed buffer");
-
-  s->set_exception_points(npe_addr, ame_addr);
+  bookkeeping(masm, tty, s, npe_addr, ame_addr, true, vtable_index, slop_bytes, 0);
 
   return s;
 }
 
 VtableStub* VtableStubs::create_itable_stub(int itable_index) {
-  // PPC port: use fixed size.
-  const int code_length = VtableStub::pd_code_size_limit(false);
-  VtableStub* s = new (code_length) VtableStub(false, itable_index);
-
+  // Read "A word on VtableStub sizing" in share/code/vtableStubs.hpp for details on stub sizing.
+  const int stub_code_length = code_size_limit(false);
+  VtableStub* s = new(stub_code_length) VtableStub(false, itable_index);
   // Can be NULL if there is no free space in the code cache.
   if (s == NULL) {
     return NULL;
   }
+  // Count unused bytes in instruction sequences of variable size.
+  // We add them to the computed buffer size in order to avoid
+  // overflow in subsequently generated stubs.
+  address   start_pc;
+  int       slop_bytes = 8; // just a two-instruction safety net
+  int       slop_delta = 0;
 
-  ResourceMark rm;
-  CodeBuffer cb(s->entry_point(), code_length);
+  ResourceMark    rm;
+  CodeBuffer      cb(s->entry_point(), stub_code_length);
   MacroAssembler* masm = new MacroAssembler(&cb);
-  address start_pc;
+  int             load_const_maxLen = 5*BytesPerInstWord;  // load_const generates 5 instructions. Assume that as max size for laod_const_optimized
 
-#ifndef PRODUCT
+#if (!defined(PRODUCT) && defined(COMPILER2))
   if (CountCompiledCalls) {
+    start_pc = __ pc();
     int offs = __ load_const_optimized(R11_scratch1, SharedRuntime::nof_megamorphic_calls_addr(), R12_scratch2, true);
+    slop_delta  = load_const_maxLen - (__ pc() - start_pc);
+    slop_bytes += slop_delta;
+    assert(slop_delta >= 0, "negative slop(%d) encountered, adjust code size estimate!", slop_delta);
     __ lwz(R12_scratch2, offs, R11_scratch1);
     __ addi(R12_scratch2, R12_scratch2, 1);
     __ stw(R12_scratch2, offs, R11_scratch1);
@@ -209,33 +218,22 @@
   // wrong method" stub, and so let the interpreter runtime do all the
   // dirty work.
   __ bind(L_no_such_interface);
+  start_pc = __ pc();
   __ load_const_optimized(R11_scratch1, SharedRuntime::get_handle_wrong_method_stub(), R12_scratch2);
+  slop_delta  = load_const_maxLen - (__ pc() - start_pc);
+  slop_bytes += slop_delta;
+  assert(slop_delta >= 0, "negative slop(%d) encountered, adjust code size estimate!", slop_delta);
   __ mtctr(R11_scratch1);
   __ bctr();
 
   masm->flush();
+  bookkeeping(masm, tty, s, npe_addr, ame_addr, false, itable_index, slop_bytes, 0);
 
-  guarantee(__ pc() <= s->code_end(), "overflowed buffer");
-
-  s->set_exception_points(npe_addr, ame_addr);
   return s;
 }
 
-int VtableStub::pd_code_size_limit(bool is_vtable_stub) {
-  if (DebugVtables || CountCompiledCalls || VerifyOops) {
-    return 1000;
-  }
-  int size = is_vtable_stub ? 20 + 8 : 164 + 20; // Plain + safety
-  if (UseCompressedClassPointers) {
-    size += MacroAssembler::instr_size_for_decode_klass_not_null();
-  }
-  if (!ImplicitNullChecks || !os::zero_page_read_protected()) {
-    size += is_vtable_stub ? 8 : 12;
-  }
-  return size;
-}
-
 int VtableStub::pd_code_alignment() {
+  // Power cache line size is 128 bytes, but we want to limit alignment loss.
   const unsigned int icache_line_size = 32;
   return icache_line_size;
 }
--- a/src/hotspot/cpu/s390/macroAssembler_s390.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/s390/macroAssembler_s390.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -465,19 +465,8 @@
       z_xihf(r1, -1);
     }
   } else { // Distinct src and dst registers.
-    if (VM_Version::has_DistinctOpnds()) {
-      load_const_optimized(r1, -1);
-      z_xgrk(r1, r2, r1);
-    } else {
-      if (wide) {
-        z_lgr(r1, r2);
-        z_xilf(r1, -1);
-        z_xihf(r1, -1);
-      } else {
-        z_lr(r1, r2);
-        z_xilf(r1, -1);
-      }
-    }
+    load_const_optimized(r1, -1);
+    z_xgr(r1, r2);
   }
 }
 
@@ -1158,8 +1147,10 @@
 // Make sure to keep code size constant -> no value-dependent optimizations.
 // Do not kill condition code.
 void MacroAssembler::load_const(Register t, long x) {
-  Assembler::z_iihf(t, (int)(x >> 32));
-  Assembler::z_iilf(t, (int)(x & 0xffffffff));
+  // Note: Right shift is only cleanly defined for unsigned types
+  //       or for signed types with nonnegative values.
+  Assembler::z_iihf(t, (long)((unsigned long)x >> 32));
+  Assembler::z_iilf(t, (long)((unsigned long)x & 0xffffffffUL));
 }
 
 // Load a 32bit constant into a 64bit register, sign-extend or zero-extend.
@@ -1256,8 +1247,10 @@
 // CPU-version dependend patching of load_const.
 void MacroAssembler::patch_const(address a, long x) {
   assert(is_load_const(a), "not a load of a constant");
-  set_imm32((address)a, (int) ((x >> 32) & 0xffffffff));
-  set_imm32((address)(a + 6), (int)(x & 0xffffffff));
+  // Note: Right shift is only cleanly defined for unsigned types
+  //       or for signed types with nonnegative values.
+  set_imm32((address)a, (long)((unsigned long)x >> 32));
+  set_imm32((address)(a + 6), (long)((unsigned long)x & 0xffffffffUL));
 }
 
 // Patching the value of CPU version dependent load_const_32to64 sequence.
@@ -1461,13 +1454,17 @@
 
   // 64 bit value: | part1 | part2 | part3 | part4 |
   // At least one part is not zero!
-  int part1 = ((x >> 32) & 0xffff0000) >> 16;
-  int part2 = (x >> 32) & 0x0000ffff;
-  int part3 = (x & 0xffff0000) >> 16;
-  int part4 = (x & 0x0000ffff);
+  // Note: Right shift is only cleanly defined for unsigned types
+  //       or for signed types with nonnegative values.
+  int part1 = (int)((unsigned long)x >> 48) & 0x0000ffff;
+  int part2 = (int)((unsigned long)x >> 32) & 0x0000ffff;
+  int part3 = (int)((unsigned long)x >> 16) & 0x0000ffff;
+  int part4 = (int)x & 0x0000ffff;
+  int part12 = (int)((unsigned long)x >> 32);
+  int part34 = (int)x;
 
   // Lower word only (unsigned).
-  if ((part1 == 0) && (part2 == 0)) {
+  if (part12 == 0) {
     if (part3 == 0) {
       if (emit) z_llill(t, part4);
       return 4;
@@ -1476,12 +1473,12 @@
       if (emit) z_llilh(t, part3);
       return 4;
     }
-    if (emit) z_llilf(t, (int)(x & 0xffffffff));
+    if (emit) z_llilf(t, part34);
     return 6;
   }
 
   // Upper word only.
-  if ((part3 == 0) && (part4 == 0)) {
+  if (part34 == 0) {
     if (part1 == 0) {
       if (emit) z_llihl(t, part2);
       return 4;
@@ -1490,13 +1487,13 @@
       if (emit) z_llihh(t, part1);
       return 4;
     }
-    if (emit) z_llihf(t, (int)(x >> 32));
+    if (emit) z_llihf(t, part12);
     return 6;
   }
 
   // Lower word only (signed).
   if ((part1 == 0x0000ffff) && (part2 == 0x0000ffff) && ((part3 & 0x00008000) != 0)) {
-    if (emit) z_lgfi(t, (int)(x & 0xffffffff));
+    if (emit) z_lgfi(t, part34);
     return 6;
   }
 
@@ -1511,7 +1508,7 @@
       len += 4;
     }
   } else {
-    if (emit) z_llihf(t, (int)(x >> 32));
+    if (emit) z_llihf(t, part12);
     len += 6;
   }
 
@@ -1524,7 +1521,7 @@
       len += 4;
     }
   } else {
-    if (emit) z_iilf(t, (int)(x & 0xffffffff));
+    if (emit) z_iilf(t, part34);
     len += 6;
   }
   return len;
@@ -1904,7 +1901,7 @@
 
 // Only called when binding labels (share/vm/asm/assembler.cpp)
 // Pass arguments as intended. Do not pre-calculate distance.
-void MacroAssembler::pd_patch_instruction(address branch, address target) {
+void MacroAssembler::pd_patch_instruction(address branch, address target, const char* file, int line) {
   unsigned long stub_inst;
   int           inst_len = get_instruction(branch, &stub_inst);
 
@@ -3374,13 +3371,11 @@
   }
 
   // Handle existing monitor.
-  if ((EmitSync & 0x01) == 0) {
-    // The object has an existing monitor iff (mark & monitor_value) != 0.
-    guarantee(Immediate::is_uimm16(markOopDesc::monitor_value), "must be half-word");
-    z_lr(temp, displacedHeader);
-    z_nill(temp, markOopDesc::monitor_value);
-    z_brne(object_has_monitor);
-  }
+  // The object has an existing monitor iff (mark & monitor_value) != 0.
+  guarantee(Immediate::is_uimm16(markOopDesc::monitor_value), "must be half-word");
+  z_lr(temp, displacedHeader);
+  z_nill(temp, markOopDesc::monitor_value);
+  z_brne(object_has_monitor);
 
   // Set mark to markOop | markOopDesc::unlocked_value.
   z_oill(displacedHeader, markOopDesc::unlocked_value);
@@ -3411,28 +3406,26 @@
 
   z_bru(done);
 
-  if ((EmitSync & 0x01) == 0) {
-    Register zero = temp;
-    Register monitor_tagged = displacedHeader; // Tagged with markOopDesc::monitor_value.
-    bind(object_has_monitor);
-    // The object's monitor m is unlocked iff m->owner == NULL,
-    // otherwise m->owner may contain a thread or a stack address.
-    //
-    // Try to CAS m->owner from NULL to current thread.
-    z_lghi(zero, 0);
-    // If m->owner is null, then csg succeeds and sets m->owner=THREAD and CR=EQ.
-    z_csg(zero, Z_thread, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner), monitor_tagged);
-    // Store a non-null value into the box.
-    z_stg(box, BasicLock::displaced_header_offset_in_bytes(), box);
+  Register zero = temp;
+  Register monitor_tagged = displacedHeader; // Tagged with markOopDesc::monitor_value.
+  bind(object_has_monitor);
+  // The object's monitor m is unlocked iff m->owner == NULL,
+  // otherwise m->owner may contain a thread or a stack address.
+  //
+  // Try to CAS m->owner from NULL to current thread.
+  z_lghi(zero, 0);
+  // If m->owner is null, then csg succeeds and sets m->owner=THREAD and CR=EQ.
+  z_csg(zero, Z_thread, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner), monitor_tagged);
+  // Store a non-null value into the box.
+  z_stg(box, BasicLock::displaced_header_offset_in_bytes(), box);
 #ifdef ASSERT
-      z_brne(done);
-      // We've acquired the monitor, check some invariants.
-      // Invariant 1: _recursions should be 0.
-      asm_assert_mem8_is_zero(OM_OFFSET_NO_MONITOR_VALUE_TAG(recursions), monitor_tagged,
-                              "monitor->_recursions should be 0", -1);
-      z_ltgr(zero, zero); // Set CR=EQ.
+  z_brne(done);
+  // We've acquired the monitor, check some invariants.
+  // Invariant 1: _recursions should be 0.
+  asm_assert_mem8_is_zero(OM_OFFSET_NO_MONITOR_VALUE_TAG(recursions), monitor_tagged,
+                          "monitor->_recursions should be 0", -1);
+  z_ltgr(zero, zero); // Set CR=EQ.
 #endif
-  }
   bind(done);
 
   BLOCK_COMMENT("} compiler_fast_lock_object");
@@ -3461,13 +3454,11 @@
   z_bre(done);
 
   // Handle existing monitor.
-  if ((EmitSync & 0x02) == 0) {
-    // The object has an existing monitor iff (mark & monitor_value) != 0.
-    z_lg(currentHeader, oopDesc::mark_offset_in_bytes(), oop);
-    guarantee(Immediate::is_uimm16(markOopDesc::monitor_value), "must be half-word");
-    z_nill(currentHeader, markOopDesc::monitor_value);
-    z_brne(object_has_monitor);
-  }
+  // The object has an existing monitor iff (mark & monitor_value) != 0.
+  z_lg(currentHeader, oopDesc::mark_offset_in_bytes(), oop);
+  guarantee(Immediate::is_uimm16(markOopDesc::monitor_value), "must be half-word");
+  z_nill(currentHeader, markOopDesc::monitor_value);
+  z_brne(object_has_monitor);
 
   // Check if it is still a light weight lock, this is true if we see
   // the stack address of the basicLock in the markOop of the object
@@ -3477,20 +3468,18 @@
   z_bru(done); // Csg sets CR as desired.
 
   // Handle existing monitor.
-  if ((EmitSync & 0x02) == 0) {
-    bind(object_has_monitor);
-    z_lg(currentHeader, oopDesc::mark_offset_in_bytes(), oop);    // CurrentHeader is tagged with monitor_value set.
-    load_and_test_long(temp, Address(currentHeader, OM_OFFSET_NO_MONITOR_VALUE_TAG(recursions)));
-    z_brne(done);
-    load_and_test_long(temp, Address(currentHeader, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
-    z_brne(done);
-    load_and_test_long(temp, Address(currentHeader, OM_OFFSET_NO_MONITOR_VALUE_TAG(EntryList)));
-    z_brne(done);
-    load_and_test_long(temp, Address(currentHeader, OM_OFFSET_NO_MONITOR_VALUE_TAG(cxq)));
-    z_brne(done);
-    z_release();
-    z_stg(temp/*=0*/, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner), currentHeader);
-  }
+  bind(object_has_monitor);
+  z_lg(currentHeader, oopDesc::mark_offset_in_bytes(), oop);    // CurrentHeader is tagged with monitor_value set.
+  load_and_test_long(temp, Address(currentHeader, OM_OFFSET_NO_MONITOR_VALUE_TAG(recursions)));
+  z_brne(done);
+  load_and_test_long(temp, Address(currentHeader, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
+  z_brne(done);
+  load_and_test_long(temp, Address(currentHeader, OM_OFFSET_NO_MONITOR_VALUE_TAG(EntryList)));
+  z_brne(done);
+  load_and_test_long(temp, Address(currentHeader, OM_OFFSET_NO_MONITOR_VALUE_TAG(cxq)));
+  z_brne(done);
+  z_release();
+  z_stg(temp/*=0*/, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner), currentHeader);
 
   bind(done);
 
--- a/src/hotspot/cpu/s390/macroAssembler_s390.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/s390/macroAssembler_s390.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -360,7 +360,7 @@
   // Use one generic function for all branch patches.
   static unsigned long patched_branch(address dest_pos, unsigned long inst, address inst_pos);
 
-  void pd_patch_instruction(address branch, address target);
+  void pd_patch_instruction(address branch, address target, const char* file, int line);
 
   // Extract relative address from "relative" instructions.
   static long get_pcrel_offset(unsigned long inst);
--- a/src/hotspot/cpu/s390/vtableStubs_s390.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/s390/vtableStubs_s390.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2016, 2017, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2016, 2017 SAP SE. All rights reserved.
+ * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2016, 2018 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -37,9 +37,6 @@
 #include "opto/runtime.hpp"
 #endif
 
-// Machine-dependent part of VtableStubs: create vtableStub of correct
-// size and initialize its code.
-
 #define __ masm->
 
 #ifndef PRODUCT
@@ -48,123 +45,140 @@
 
 // Used by compiler only; may use only caller saved, non-argument registers.
 VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
-
-  const int   code_length = VtableStub::pd_code_size_limit(true);
-  VtableStub *s = new(code_length) VtableStub(true, vtable_index);
-  if (s == NULL) { // Indicates OOM In the code cache.
+  // Read "A word on VtableStub sizing" in share/code/vtableStubs.hpp for details on stub sizing.
+  const int stub_code_length = code_size_limit(true);
+  VtableStub* s = new(stub_code_length) VtableStub(true, vtable_index);
+  // Can be NULL if there is no free space in the code cache.
+  if (s == NULL) {
     return NULL;
   }
 
+  // Count unused bytes in instruction sequences of variable size.
+  // We add them to the computed buffer size in order to avoid
+  // overflow in subsequently generated stubs.
+  address   start_pc;
+  int       slop_bytes = 0;
+  int       slop_delta = 0;
+
   ResourceMark    rm;
-  CodeBuffer      cb(s->entry_point(), code_length);
-  MacroAssembler *masm = new MacroAssembler(&cb);
-  int     padding_bytes = 0;
+  CodeBuffer      cb(s->entry_point(), stub_code_length);
+  MacroAssembler* masm = new MacroAssembler(&cb);
 
 #if (!defined(PRODUCT) && defined(COMPILER2))
   if (CountCompiledCalls) {
-    // Count unused bytes
-    //                  worst case             actual size
-    padding_bytes += __ load_const_size() - __ load_const_optimized_rtn_len(Z_R1_scratch, (long)SharedRuntime::nof_megamorphic_calls_addr(), true);
-
+    //               worst case             actual size
+    slop_delta  = __ load_const_size() - __ load_const_optimized_rtn_len(Z_R1_scratch, (long)SharedRuntime::nof_megamorphic_calls_addr(), true);
+    slop_bytes += slop_delta;
+    assert(slop_delta >= 0, "negative slop(%d) encountered, adjust code size estimate!", slop_delta);
     // Use generic emitter for direct memory increment.
     // Abuse Z_method as scratch register for generic emitter.
     // It is loaded further down anyway before it is first used.
+    // No dynamic code size variance here, increment is 1, always.
     __ add2mem_32(Address(Z_R1_scratch), 1, Z_method);
   }
 #endif
 
   assert(VtableStub::receiver_location() == Z_R2->as_VMReg(), "receiver expected in Z_ARG1");
 
+  const Register rcvr_klass   = Z_R1_scratch;
+  address        npe_addr     = __ pc(); // npe == NULL ptr exception
+  // check if we must do an explicit check (implicit checks disabled, offset too large).
+  __ null_check(Z_ARG1, Z_R1_scratch, oopDesc::klass_offset_in_bytes());
   // Get receiver klass.
-  // Must do an explicit check if implicit checks are disabled.
-  address npe_addr = __ pc(); // npe == NULL ptr exception
-  __ null_check(Z_ARG1, Z_R1_scratch, oopDesc::klass_offset_in_bytes());
-  const Register rcvr_klass = Z_R1_scratch;
   __ load_klass(rcvr_klass, Z_ARG1);
 
-  // Set method (in case of interpreted method), and destination address.
-  int entry_offset = in_bytes(Klass::vtable_start_offset()) +
-                     vtable_index * vtableEntry::size_in_bytes();
-
 #ifndef PRODUCT
   if (DebugVtables) {
-    Label L;
+    NearLabel L;
     // Check offset vs vtable length.
     const Register vtable_idx = Z_R0_scratch;
 
-    // Count unused bytes.
-    //                  worst case             actual size
-    padding_bytes += __ load_const_size() - __ load_const_optimized_rtn_len(vtable_idx, vtable_index*vtableEntry::size_in_bytes(), true);
+    //               worst case             actual size
+    slop_delta  = __ load_const_size() - __ load_const_optimized_rtn_len(vtable_idx, vtable_index*vtableEntry::size(), true);
+    slop_bytes += slop_delta;
+    assert(slop_delta >= 0, "negative slop(%d) encountered, adjust code size estimate!", slop_delta);
 
-    assert(Immediate::is_uimm12(in_bytes(Klass::vtable_length_offset())), "disp to large");
+    assert(Displacement::is_shortDisp(in_bytes(Klass::vtable_length_offset())), "disp to large");
     __ z_cl(vtable_idx, in_bytes(Klass::vtable_length_offset()), rcvr_klass);
     __ z_brl(L);
     __ z_lghi(Z_ARG3, vtable_index);  // Debug code, don't optimize.
     __ call_VM(noreg, CAST_FROM_FN_PTR(address, bad_compiled_vtable_index), Z_ARG1, Z_ARG3, false);
     // Count unused bytes (assume worst case here).
-    padding_bytes += 12;
+    slop_bytes += 12;
     __ bind(L);
   }
 #endif
 
-  int v_off = entry_offset + vtableEntry::method_offset_in_bytes();
+  int entry_offset = in_bytes(Klass::vtable_start_offset()) +
+                     vtable_index * vtableEntry::size_in_bytes();
+  int v_off        = entry_offset + vtableEntry::method_offset_in_bytes();
 
+  // Set method (in case of interpreted method), and destination address.
   // Duplicate safety code from enc_class Java_Dynamic_Call_dynTOC.
   if (Displacement::is_validDisp(v_off)) {
     __ z_lg(Z_method/*method oop*/, v_off, rcvr_klass/*class oop*/);
     // Account for the load_const in the else path.
-    padding_bytes += __ load_const_size();
+    slop_delta  = __ load_const_size();
   } else {
     // Worse case, offset does not fit in displacement field.
-    __ load_const(Z_method, v_off); // Z_method temporarily holds the offset value.
+    //               worst case             actual size
+    slop_delta  = __ load_const_size() - __ load_const_optimized_rtn_len(Z_method, v_off, true);
     __ z_lg(Z_method/*method oop*/, 0, Z_method/*method offset*/, rcvr_klass/*class oop*/);
   }
+  slop_bytes += slop_delta;
 
 #ifndef PRODUCT
   if (DebugVtables) {
-    Label L;
+    NearLabel L;
     __ z_ltgr(Z_method, Z_method);
     __ z_brne(L);
-    __ stop("Vtable entry is ZERO",102);
+    __ stop("Vtable entry is ZERO", 102);
     __ bind(L);
   }
 #endif
 
-  address ame_addr = __ pc(); // ame = abstract method error
-
-  // Must do an explicit check if implicit checks are disabled.
+  // Must do an explicit check if offset too large or implicit checks are disabled.
+  address ame_addr = __ pc();
   __ null_check(Z_method, Z_R1_scratch, in_bytes(Method::from_compiled_offset()));
   __ z_lg(Z_R1_scratch, in_bytes(Method::from_compiled_offset()), Z_method);
   __ z_br(Z_R1_scratch);
 
   masm->flush();
-
-  s->set_exception_points(npe_addr, ame_addr);
+  bookkeeping(masm, tty, s, npe_addr, ame_addr, true, vtable_index, slop_bytes, 0);
 
   return s;
 }
 
 VtableStub* VtableStubs::create_itable_stub(int itable_index) {
-  const int   code_length = VtableStub::pd_code_size_limit(false);
-  VtableStub *s = new(code_length) VtableStub(false, itable_index);
-  if (s == NULL) { // Indicates OOM in the code cache.
+  // Read "A word on VtableStub sizing" in share/code/vtableStubs.hpp for details on stub sizing.
+  const int stub_code_length = code_size_limit(false);
+  VtableStub* s = new(stub_code_length) VtableStub(false, itable_index);
+  // Can be NULL if there is no free space in the code cache.
+  if (s == NULL) {
     return NULL;
   }
+  // Count unused bytes in instruction sequences of variable size.
+  // We add them to the computed buffer size in order to avoid
+  // overflow in subsequently generated stubs.
+  address   start_pc;
+  int       slop_bytes = 0;
+  int       slop_delta = 0;
 
   ResourceMark    rm;
-  CodeBuffer      cb(s->entry_point(), code_length);
-  MacroAssembler *masm = new MacroAssembler(&cb);
-  int     padding_bytes = 0;
+  CodeBuffer      cb(s->entry_point(), stub_code_length);
+  MacroAssembler* masm = new MacroAssembler(&cb);
 
 #if (!defined(PRODUCT) && defined(COMPILER2))
   if (CountCompiledCalls) {
-    // Count unused bytes
-    //                  worst case             actual size
-    padding_bytes += __ load_const_size() - __ load_const_optimized_rtn_len(Z_R1_scratch, (long)SharedRuntime::nof_megamorphic_calls_addr(), true);
-
+    //               worst case             actual size
+    slop_delta  = __ load_const_size() - __ load_const_optimized_rtn_len(Z_R1_scratch, (long)SharedRuntime::nof_megamorphic_calls_addr(), true);
+    slop_bytes += slop_delta;
+    assert(slop_delta >= 0, "negative slop(%d) encountered, adjust code size estimate!", slop_delta);
     // Use generic emitter for direct memory increment.
-    // Use Z_tmp_1 as scratch register for generic emitter.
-    __ add2mem_32((Z_R1_scratch), 1, Z_tmp_1);
+    // Abuse Z_method as scratch register for generic emitter.
+    // It is loaded further down anyway before it is first used.
+    // No dynamic code size variance here, increment is 1, always.
+    __ add2mem_32(Address(Z_R1_scratch), 1, Z_method);
   }
 #endif
 
@@ -178,7 +192,7 @@
                  interface  = Z_tmp_2;
 
   // Get receiver klass.
-  // Must do an explicit check if implicit checks are disabled.
+  // Must do an explicit check if offset too large or implicit checks are disabled.
   address npe_addr = __ pc(); // npe == NULL ptr exception
   __ null_check(Z_ARG1, Z_R1_scratch, oopDesc::klass_offset_in_bytes());
   __ load_klass(rcvr_klass, Z_ARG1);
@@ -195,10 +209,10 @@
 
 #ifndef PRODUCT
   if (DebugVtables) {
-    Label ok1;
+    NearLabel ok1;
     __ z_ltgr(Z_method, Z_method);
     __ z_brne(ok1);
-    __ stop("method is null",103);
+    __ stop("method is null", 103);
     __ bind(ok1);
   }
 #endif
@@ -213,39 +227,24 @@
 
   // Handle IncompatibleClassChangeError in itable stubs.
   __ bind(no_such_interface);
-  // Count unused bytes
-  //                  worst case          actual size
-  // We force resolving of the call site by jumping to
-  // the "handle wrong method" stub, and so let the
+  // more detailed IncompatibleClassChangeError
+  // we force re-resolving of the call site by jumping to
+  // the "handle wrong method" stub, thus letting the
   // interpreter runtime do all the dirty work.
-  padding_bytes += __ load_const_size() - __ load_const_optimized_rtn_len(Z_R1_scratch, (long)SharedRuntime::get_handle_wrong_method_stub(), true);
+  //               worst case          actual size
+  slop_delta  = __ load_const_size() - __ load_const_optimized_rtn_len(Z_R1_scratch, (long)SharedRuntime::get_handle_wrong_method_stub(), true);
+  slop_bytes += slop_delta;
+  assert(slop_delta >= 0, "negative slop(%d) encountered, adjust code size estimate!", slop_delta);
   __ z_br(Z_R1_scratch);
 
   masm->flush();
+  bookkeeping(masm, tty, s, npe_addr, ame_addr, false, itable_index, slop_bytes, 0);
 
-  s->set_exception_points(npe_addr, ame_addr);
   return s;
 }
 
-// In order to tune these parameters, run the JVM with VM options
-// +PrintMiscellaneous and +WizardMode to see information about
-// actual itable stubs. Run it with -Xmx31G -XX:+UseCompressedOops.
-int VtableStub::pd_code_size_limit(bool is_vtable_stub) {
-  int size = DebugVtables ? 216 : 0;
-  if (CountCompiledCalls) {
-    size += 6 * 4;
-  }
-  size += is_vtable_stub ? 36 : 140;
-  if (UseCompressedClassPointers) {
-    size += MacroAssembler::instr_size_for_decode_klass_not_null();
-  }
-  if (!ImplicitNullChecks) {
-    size += 36;
-  }
-  return size;
-}
-
 int VtableStub::pd_code_alignment() {
+  // System z cache line size is 256 bytes, but octoword-alignment is quite ok.
   const unsigned int icache_line_size = 32;
   return icache_line_size;
 }
--- a/src/hotspot/cpu/sparc/macroAssembler_sparc.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/sparc/macroAssembler_sparc.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -2648,195 +2648,92 @@
      inc_counter((address) counters->total_entry_count_addr(), Rmark, Rscratch);
    }
 
-   if (EmitSync & 1) {
-     mov(3, Rscratch);
-     st_ptr(Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
-     cmp(SP, G0);
-     return ;
-   }
-
-   if (EmitSync & 2) {
-
-     // Fetch object's markword
-     ld_ptr(mark_addr, Rmark);
-
-     if (try_bias) {
-        biased_locking_enter(Roop, Rmark, Rscratch, done, NULL, counters);
-     }
-
-     // Save Rbox in Rscratch to be used for the cas operation
-     mov(Rbox, Rscratch);
-
-     // set Rmark to markOop | markOopDesc::unlocked_value
-     or3(Rmark, markOopDesc::unlocked_value, Rmark);
-
-     // Initialize the box.  (Must happen before we update the object mark!)
-     st_ptr(Rmark, Rbox, BasicLock::displaced_header_offset_in_bytes());
-
-     // compare object markOop with Rmark and if equal exchange Rscratch with object markOop
-     assert(mark_addr.disp() == 0, "cas must take a zero displacement");
-     cas_ptr(mark_addr.base(), Rmark, Rscratch);
-
-     // if compare/exchange succeeded we found an unlocked object and we now have locked it
-     // hence we are done
-     cmp(Rmark, Rscratch);
-     sub(Rscratch, STACK_BIAS, Rscratch);
-     brx(Assembler::equal, false, Assembler::pt, done);
-     delayed()->sub(Rscratch, SP, Rscratch);  //pull next instruction into delay slot
-
-     // we did not find an unlocked object so see if this is a recursive case
-     // sub(Rscratch, SP, Rscratch);
-     assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
-     andcc(Rscratch, 0xfffff003, Rscratch);
-     st_ptr(Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
-     bind (done);
-     return ;
-   }
-
    Label Egress ;
 
-   if (EmitSync & 256) {
-      Label IsInflated ;
-
-      ld_ptr(mark_addr, Rmark);           // fetch obj->mark
-      // Triage: biased, stack-locked, neutral, inflated
-      if (try_bias) {
-        biased_locking_enter(Roop, Rmark, Rscratch, done, NULL, counters);
-        // Invariant: if control reaches this point in the emitted stream
-        // then Rmark has not been modified.
-      }
-
-      // Store mark into displaced mark field in the on-stack basic-lock "box"
-      // Critically, this must happen before the CAS
-      // Maximize the ST-CAS distance to minimize the ST-before-CAS penalty.
-      st_ptr(Rmark, Rbox, BasicLock::displaced_header_offset_in_bytes());
-      andcc(Rmark, 2, G0);
-      brx(Assembler::notZero, false, Assembler::pn, IsInflated);
-      delayed()->
-
-      // Try stack-lock acquisition.
-      // Beware: the 1st instruction is in a delay slot
-      mov(Rbox,  Rscratch);
-      or3(Rmark, markOopDesc::unlocked_value, Rmark);
-      assert(mark_addr.disp() == 0, "cas must take a zero displacement");
-      cas_ptr(mark_addr.base(), Rmark, Rscratch);
-      cmp(Rmark, Rscratch);
-      brx(Assembler::equal, false, Assembler::pt, done);
-      delayed()->sub(Rscratch, SP, Rscratch);
-
-      // Stack-lock attempt failed - check for recursive stack-lock.
-      // See the comments below about how we might remove this case.
-      sub(Rscratch, STACK_BIAS, Rscratch);
-      assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
-      andcc(Rscratch, 0xfffff003, Rscratch);
-      br(Assembler::always, false, Assembler::pt, done);
-      delayed()-> st_ptr(Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
-
-      bind(IsInflated);
-      if (EmitSync & 64) {
-         // If m->owner != null goto IsLocked
-         // Pessimistic form: Test-and-CAS vs CAS
-         // The optimistic form avoids RTS->RTO cache line upgrades.
-         ld_ptr(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner), Rscratch);
-         andcc(Rscratch, Rscratch, G0);
-         brx(Assembler::notZero, false, Assembler::pn, done);
-         delayed()->nop();
-         // m->owner == null : it's unlocked.
-      }
-
-      // Try to CAS m->owner from null to Self
-      // Invariant: if we acquire the lock then _recursions should be 0.
-      add(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner), Rmark);
-      mov(G2_thread, Rscratch);
-      cas_ptr(Rmark, G0, Rscratch);
-      cmp(Rscratch, G0);
-      // Intentional fall-through into done
-   } else {
-      // Aggressively avoid the Store-before-CAS penalty
-      // Defer the store into box->dhw until after the CAS
-      Label IsInflated, Recursive ;
+   // Aggressively avoid the Store-before-CAS penalty
+   // Defer the store into box->dhw until after the CAS
+   Label IsInflated, Recursive ;
 
 // Anticipate CAS -- Avoid RTS->RTO upgrade
 // prefetch (mark_addr, Assembler::severalWritesAndPossiblyReads);
 
-      ld_ptr(mark_addr, Rmark);           // fetch obj->mark
-      // Triage: biased, stack-locked, neutral, inflated
-
-      if (try_bias) {
-        biased_locking_enter(Roop, Rmark, Rscratch, done, NULL, counters);
-        // Invariant: if control reaches this point in the emitted stream
-        // then Rmark has not been modified.
-      }
-      andcc(Rmark, 2, G0);
-      brx(Assembler::notZero, false, Assembler::pn, IsInflated);
-      delayed()->                         // Beware - dangling delay-slot
-
-      // Try stack-lock acquisition.
-      // Transiently install BUSY (0) encoding in the mark word.
-      // if the CAS of 0 into the mark was successful then we execute:
-      //   ST box->dhw  = mark   -- save fetched mark in on-stack basiclock box
-      //   ST obj->mark = box    -- overwrite transient 0 value
-      // This presumes TSO, of course.
-
-      mov(0, Rscratch);
-      or3(Rmark, markOopDesc::unlocked_value, Rmark);
-      assert(mark_addr.disp() == 0, "cas must take a zero displacement");
-      cas_ptr(mark_addr.base(), Rmark, Rscratch);
+   ld_ptr(mark_addr, Rmark);           // fetch obj->mark
+   // Triage: biased, stack-locked, neutral, inflated
+
+   if (try_bias) {
+     biased_locking_enter(Roop, Rmark, Rscratch, done, NULL, counters);
+     // Invariant: if control reaches this point in the emitted stream
+     // then Rmark has not been modified.
+   }
+   andcc(Rmark, 2, G0);
+   brx(Assembler::notZero, false, Assembler::pn, IsInflated);
+   delayed()->                         // Beware - dangling delay-slot
+
+   // Try stack-lock acquisition.
+   // Transiently install BUSY (0) encoding in the mark word.
+   // if the CAS of 0 into the mark was successful then we execute:
+   //   ST box->dhw  = mark   -- save fetched mark in on-stack basiclock box
+   //   ST obj->mark = box    -- overwrite transient 0 value
+   // This presumes TSO, of course.
+
+   mov(0, Rscratch);
+   or3(Rmark, markOopDesc::unlocked_value, Rmark);
+   assert(mark_addr.disp() == 0, "cas must take a zero displacement");
+   cas_ptr(mark_addr.base(), Rmark, Rscratch);
 // prefetch (mark_addr, Assembler::severalWritesAndPossiblyReads);
-      cmp(Rscratch, Rmark);
-      brx(Assembler::notZero, false, Assembler::pn, Recursive);
-      delayed()->st_ptr(Rmark, Rbox, BasicLock::displaced_header_offset_in_bytes());
-      if (counters != NULL) {
-        cond_inc(Assembler::equal, (address) counters->fast_path_entry_count_addr(), Rmark, Rscratch);
-      }
-      ba(done);
-      delayed()->st_ptr(Rbox, mark_addr);
-
-      bind(Recursive);
-      // Stack-lock attempt failed - check for recursive stack-lock.
-      // Tests show that we can remove the recursive case with no impact
-      // on refworkload 0.83.  If we need to reduce the size of the code
-      // emitted by compiler_lock_object() the recursive case is perfect
-      // candidate.
-      //
-      // A more extreme idea is to always inflate on stack-lock recursion.
-      // This lets us eliminate the recursive checks in compiler_lock_object
-      // and compiler_unlock_object and the (box->dhw == 0) encoding.
-      // A brief experiment - requiring changes to synchronizer.cpp, interpreter,
-      // and showed a performance *increase*.  In the same experiment I eliminated
-      // the fast-path stack-lock code from the interpreter and always passed
-      // control to the "slow" operators in synchronizer.cpp.
-
-      // RScratch contains the fetched obj->mark value from the failed CAS.
-      sub(Rscratch, STACK_BIAS, Rscratch);
-      sub(Rscratch, SP, Rscratch);
-      assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
-      andcc(Rscratch, 0xfffff003, Rscratch);
-      if (counters != NULL) {
-        // Accounting needs the Rscratch register
-        st_ptr(Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
-        cond_inc(Assembler::equal, (address) counters->fast_path_entry_count_addr(), Rmark, Rscratch);
-        ba_short(done);
-      } else {
-        ba(done);
-        delayed()->st_ptr(Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
-      }
-
-      bind   (IsInflated);
-
-      // Try to CAS m->owner from null to Self
-      // Invariant: if we acquire the lock then _recursions should be 0.
-      add(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner), Rmark);
-      mov(G2_thread, Rscratch);
-      cas_ptr(Rmark, G0, Rscratch);
-      andcc(Rscratch, Rscratch, G0);             // set ICCs for done: icc.zf iff success
-      // set icc.zf : 1=success 0=failure
-      // ST box->displaced_header = NonZero.
-      // Any non-zero value suffices:
-      //    markOopDesc::unused_mark(), G2_thread, RBox, RScratch, rsp, etc.
-      st_ptr(Rbox, Rbox, BasicLock::displaced_header_offset_in_bytes());
-      // Intentional fall-through into done
+   cmp(Rscratch, Rmark);
+   brx(Assembler::notZero, false, Assembler::pn, Recursive);
+   delayed()->st_ptr(Rmark, Rbox, BasicLock::displaced_header_offset_in_bytes());
+   if (counters != NULL) {
+     cond_inc(Assembler::equal, (address) counters->fast_path_entry_count_addr(), Rmark, Rscratch);
    }
+   ba(done);
+   delayed()->st_ptr(Rbox, mark_addr);
+
+   bind(Recursive);
+   // Stack-lock attempt failed - check for recursive stack-lock.
+   // Tests show that we can remove the recursive case with no impact
+   // on refworkload 0.83.  If we need to reduce the size of the code
+   // emitted by compiler_lock_object() the recursive case is perfect
+   // candidate.
+   //
+   // A more extreme idea is to always inflate on stack-lock recursion.
+   // This lets us eliminate the recursive checks in compiler_lock_object
+   // and compiler_unlock_object and the (box->dhw == 0) encoding.
+   // A brief experiment - requiring changes to synchronizer.cpp, interpreter,
+   // and showed a performance *increase*.  In the same experiment I eliminated
+   // the fast-path stack-lock code from the interpreter and always passed
+   // control to the "slow" operators in synchronizer.cpp.
+
+   // RScratch contains the fetched obj->mark value from the failed CAS.
+   sub(Rscratch, STACK_BIAS, Rscratch);
+   sub(Rscratch, SP, Rscratch);
+   assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
+   andcc(Rscratch, 0xfffff003, Rscratch);
+   if (counters != NULL) {
+     // Accounting needs the Rscratch register
+     st_ptr(Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
+     cond_inc(Assembler::equal, (address) counters->fast_path_entry_count_addr(), Rmark, Rscratch);
+     ba_short(done);
+   } else {
+     ba(done);
+     delayed()->st_ptr(Rscratch, Rbox, BasicLock::displaced_header_offset_in_bytes());
+   }
+
+   bind   (IsInflated);
+
+   // Try to CAS m->owner from null to Self
+   // Invariant: if we acquire the lock then _recursions should be 0.
+   add(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner), Rmark);
+   mov(G2_thread, Rscratch);
+   cas_ptr(Rmark, G0, Rscratch);
+   andcc(Rscratch, Rscratch, G0);             // set ICCs for done: icc.zf iff success
+   // set icc.zf : 1=success 0=failure
+   // ST box->displaced_header = NonZero.
+   // Any non-zero value suffices:
+   //    markOopDesc::unused_mark(), G2_thread, RBox, RScratch, rsp, etc.
+   st_ptr(Rbox, Rbox, BasicLock::displaced_header_offset_in_bytes());
+   // Intentional fall-through into done
 
    bind   (done);
 }
@@ -2848,30 +2745,6 @@
 
    Label done ;
 
-   if (EmitSync & 4) {
-     cmp(SP, G0);
-     return ;
-   }
-
-   if (EmitSync & 8) {
-     if (try_bias) {
-        biased_locking_exit(mark_addr, Rscratch, done);
-     }
-
-     // Test first if it is a fast recursive unlock
-     ld_ptr(Rbox, BasicLock::displaced_header_offset_in_bytes(), Rmark);
-     br_null_short(Rmark, Assembler::pt, done);
-
-     // Check if it is still a light weight lock, this is is true if we see
-     // the stack address of the basicLock in the markOop of the object
-     assert(mark_addr.disp() == 0, "cas must take a zero displacement");
-     cas_ptr(mark_addr.base(), Rbox, Rmark);
-     ba(done);
-     delayed()->cmp(Rbox, Rmark);
-     bind(done);
-     return ;
-   }
-
    // Beware ... If the aggregate size of the code emitted by CLO and CUO is
    // is too large performance rolls abruptly off a cliff.
    // This could be related to inlining policies, code cache management, or
@@ -2902,105 +2775,39 @@
    // close the resultant (and rare) race by having contended threads in
    // monitorenter periodically poll _owner.
 
-   if (EmitSync & 1024) {
-     // Emit code to check that _owner == Self
-     // We could fold the _owner test into subsequent code more efficiently
-     // than using a stand-alone check, but since _owner checking is off by
-     // default we don't bother. We also might consider predicating the
-     // _owner==Self check on Xcheck:jni or running on a debug build.
-     ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)), Rscratch);
-     orcc(Rscratch, G0, G0);
-     brx(Assembler::notZero, false, Assembler::pn, done);
-     delayed()->nop();
-   }
-
-   if (EmitSync & 512) {
-     // classic lock release code absent 1-0 locking
-     //   m->Owner = null;
-     //   membar #storeload
-     //   if (m->cxq|m->EntryList) == null goto Success
-     //   if (m->succ != null) goto Success
-     //   if CAS (&m->Owner,0,Self) != 0 goto Success
-     //   goto SlowPath
-     ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(recursions)), Rbox);
-     orcc(Rbox, G0, G0);
-     brx(Assembler::notZero, false, Assembler::pn, done);
-     delayed()->nop();
-     st_ptr(G0, Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
-     if (os::is_MP()) { membar(StoreLoad); }
-     ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(EntryList)), Rscratch);
-     ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(cxq)), Rbox);
-     orcc(Rbox, Rscratch, G0);
-     brx(Assembler::zero, false, Assembler::pt, done);
-     delayed()->
-     ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(succ)), Rscratch);
-     andcc(Rscratch, Rscratch, G0);
-     brx(Assembler::notZero, false, Assembler::pt, done);
-     delayed()->andcc(G0, G0, G0);
-     add(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner), Rmark);
-     mov(G2_thread, Rscratch);
-     cas_ptr(Rmark, G0, Rscratch);
-     cmp(Rscratch, G0);
-     // invert icc.zf and goto done
-     brx(Assembler::notZero, false, Assembler::pt, done);
-     delayed()->cmp(G0, G0);
-     br(Assembler::always, false, Assembler::pt, done);
-     delayed()->cmp(G0, 1);
-   } else {
-     // 1-0 form : avoids CAS and MEMBAR in the common case
-     // Do not bother to ratify that m->Owner == Self.
-     ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(recursions)), Rbox);
-     orcc(Rbox, G0, G0);
-     brx(Assembler::notZero, false, Assembler::pn, done);
-     delayed()->
-     ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(EntryList)), Rscratch);
-     ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(cxq)), Rbox);
-     orcc(Rbox, Rscratch, G0);
-     if (EmitSync & 16384) {
-       // As an optional optimization, if (EntryList|cxq) != null and _succ is null then
-       // we should transfer control directly to the slow-path.
-       // This test makes the reacquire operation below very infrequent.
-       // The logic is equivalent to :
-       //   if (cxq|EntryList) == null : Owner=null; goto Success
-       //   if succ == null : goto SlowPath
-       //   Owner=null; membar #storeload
-       //   if succ != null : goto Success
-       //   if CAS(&Owner,null,Self) != null goto Success
-       //   goto SlowPath
-       brx(Assembler::zero, true, Assembler::pt, done);
-       delayed()->
-       st_ptr(G0, Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
-       ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(succ)), Rscratch);
-       andcc(Rscratch, Rscratch, G0) ;
-       brx(Assembler::zero, false, Assembler::pt, done);
-       delayed()->orcc(G0, 1, G0);
-       st_ptr(G0, Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
-     } else {
-       brx(Assembler::zero, false, Assembler::pt, done);
-       delayed()->
-       st_ptr(G0, Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
-     }
-     if (os::is_MP()) { membar(StoreLoad); }
-     // Check that _succ is (or remains) non-zero
-     ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(succ)), Rscratch);
-     andcc(Rscratch, Rscratch, G0);
-     brx(Assembler::notZero, false, Assembler::pt, done);
-     delayed()->andcc(G0, G0, G0);
-     add(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner), Rmark);
-     mov(G2_thread, Rscratch);
-     cas_ptr(Rmark, G0, Rscratch);
-     cmp(Rscratch, G0);
-     // invert icc.zf and goto done
-     // A slightly better v8+/v9 idiom would be the following:
-     //   movrnz Rscratch,1,Rscratch
-     //   ba done
-     //   xorcc Rscratch,1,G0
-     // In v8+ mode the idiom would be valid IFF Rscratch was a G or O register
-     brx(Assembler::notZero, false, Assembler::pt, done);
-     delayed()->cmp(G0, G0);
-     br(Assembler::always, false, Assembler::pt, done);
-     delayed()->cmp(G0, 1);
-   }
+   // 1-0 form : avoids CAS and MEMBAR in the common case
+   // Do not bother to ratify that m->Owner == Self.
+   ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(recursions)), Rbox);
+   orcc(Rbox, G0, G0);
+   brx(Assembler::notZero, false, Assembler::pn, done);
+   delayed()->
+   ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(EntryList)), Rscratch);
+   ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(cxq)), Rbox);
+   orcc(Rbox, Rscratch, G0);
+   brx(Assembler::zero, false, Assembler::pt, done);
+   delayed()->
+   st_ptr(G0, Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
+
+   if (os::is_MP()) { membar(StoreLoad); }
+   // Check that _succ is (or remains) non-zero
+   ld_ptr(Address(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(succ)), Rscratch);
+   andcc(Rscratch, Rscratch, G0);
+   brx(Assembler::notZero, false, Assembler::pt, done);
+   delayed()->andcc(G0, G0, G0);
+   add(Rmark, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner), Rmark);
+   mov(G2_thread, Rscratch);
+   cas_ptr(Rmark, G0, Rscratch);
+   cmp(Rscratch, G0);
+   // invert icc.zf and goto done
+   // A slightly better v8+/v9 idiom would be the following:
+   //   movrnz Rscratch,1,Rscratch
+   //   ba done
+   //   xorcc Rscratch,1,G0
+   // In v8+ mode the idiom would be valid IFF Rscratch was a G or O register
+   brx(Assembler::notZero, false, Assembler::pt, done);
+   delayed()->cmp(G0, G0);
+   br(Assembler::always, false, Assembler::pt, done);
+   delayed()->cmp(G0, 1);
 
    bind   (LStacked);
    // Consider: we could replace the expensive CAS in the exit
--- a/src/hotspot/cpu/sparc/macroAssembler_sparc.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/sparc/macroAssembler_sparc.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -659,7 +659,7 @@
 
   // Required platform-specific helpers for Label::patch_instructions.
   // They _shadow_ the declarations in AbstractAssembler, which are undefined.
-  void pd_patch_instruction(address branch, address target);
+  void pd_patch_instruction(address branch, address target, const char* file, int line);
 
   // sethi Macro handles optimizations and relocations
 private:
--- a/src/hotspot/cpu/sparc/macroAssembler_sparc.inline.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/sparc/macroAssembler_sparc.inline.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -38,7 +38,7 @@
 }
 
 
-inline void MacroAssembler::pd_patch_instruction(address branch, address target) {
+inline void MacroAssembler::pd_patch_instruction(address branch, address target, const char* file, int line) {
   jint& stub_inst = *(jint*) branch;
   stub_inst = patched_branch(target - branch, stub_inst, 0);
 }
--- a/src/hotspot/cpu/sparc/vtableStubs_sparc.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/sparc/vtableStubs_sparc.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -41,32 +41,38 @@
 
 #define __ masm->
 
-
 #ifndef PRODUCT
 extern "C" void bad_compiled_vtable_index(JavaThread* thread, oopDesc* receiver, int index);
 #endif
 
 
 // Used by compiler only; may use only caller saved, non-argument registers
-// NOTE:  %%%% if any change is made to this stub make sure that the function
-//             pd_code_size_limit is changed to ensure the correct size for VtableStub
 VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
-  const int sparc_code_length = VtableStub::pd_code_size_limit(true);
-  VtableStub* s = new(sparc_code_length) VtableStub(true, vtable_index);
+  // Read "A word on VtableStub sizing" in share/code/vtableStubs.hpp for details on stub sizing.
+  const int stub_code_length = code_size_limit(true);
+  VtableStub* s = new(stub_code_length) VtableStub(true, vtable_index);
   // Can be NULL if there is no free space in the code cache.
   if (s == NULL) {
     return NULL;
   }
 
-  ResourceMark rm;
-  CodeBuffer cb(s->entry_point(), sparc_code_length);
+  // Count unused bytes in instruction sequences of variable size.
+  // We add them to the computed buffer size in order to avoid
+  // overflow in subsequently generated stubs.
+  address   start_pc;
+  int       slop_bytes = 0;
+  int       slop_delta = 0;
+  const int index_dependent_slop     = ((vtable_index < 512) ? 2 : 0)*BytesPerInstWord; // code size change with transition from 13-bit to 32-bit constant (@index == 512?).
+
+  ResourceMark    rm;
+  CodeBuffer      cb(s->entry_point(), stub_code_length);
   MacroAssembler* masm = new MacroAssembler(&cb);
 
-#ifndef PRODUCT
+#if (!defined(PRODUCT) && defined(COMPILER2))
   if (CountCompiledCalls) {
     __ inc_counter(SharedRuntime::nof_megamorphic_calls_addr(), G5, G3_scratch);
   }
-#endif /* PRODUCT */
+#endif // PRODUCT
 
   assert(VtableStub::receiver_location() == O0->as_VMReg(), "receiver expected in O0");
 
@@ -74,20 +80,33 @@
   address npe_addr = __ pc();
   __ load_klass(O0, G3_scratch);
 
-  // set Method* (in case of interpreted method), and destination address
 #ifndef PRODUCT
   if (DebugVtables) {
     Label L;
     // check offset vs vtable length
     __ ld(G3_scratch, in_bytes(Klass::vtable_length_offset()), G5);
     __ cmp_and_br_short(G5, vtable_index*vtableEntry::size(), Assembler::greaterUnsigned, Assembler::pt, L);
+
+    // set generates 8 instructions (worst case), 1 instruction (best case)
+    start_pc = __ pc();
     __ set(vtable_index, O2);
+    slop_delta  = __ worst_case_insts_for_set()*BytesPerInstWord - (__ pc() - start_pc);
+    slop_bytes += slop_delta;
+    assert(slop_delta >= 0, "negative slop(%d) encountered, adjust code size estimate!", slop_delta);
+
+    // there is no variance in call_VM() emitted code.
     __ call_VM(noreg, CAST_FROM_FN_PTR(address, bad_compiled_vtable_index), O0, O2);
     __ bind(L);
   }
 #endif
 
+  // set Method* (in case of interpreted method), and destination address
+  start_pc = __ pc();
   __ lookup_virtual_method(G3_scratch, vtable_index, G5_method);
+  // lookup_virtual_method generates 3 instructions (worst case), 1 instruction (best case)
+  slop_delta  = 3*BytesPerInstWord - (int)(__ pc() - start_pc);
+  slop_bytes += slop_delta;
+  assert(slop_delta >= 0, "negative slop(%d) encountered, adjust code size estimate!", slop_delta);
 
 #ifndef PRODUCT
   if (DebugVtables) {
@@ -109,37 +128,41 @@
   __ delayed()->nop();
 
   masm->flush();
+  slop_bytes += index_dependent_slop; // add'l slop for size variance due to large itable offsets
+  bookkeeping(masm, tty, s, npe_addr, ame_addr, true, vtable_index, slop_bytes, index_dependent_slop);
 
-  if (PrintMiscellaneous && (WizardMode || Verbose)) {
-    tty->print_cr("vtable #%d at " PTR_FORMAT "[%d] left over: %d",
-                  vtable_index, p2i(s->entry_point()),
-                  (int)(s->code_end() - s->entry_point()),
-                  (int)(s->code_end() - __ pc()));
-  }
-  guarantee(__ pc() <= s->code_end(), "overflowed buffer");
-  // shut the door on sizing bugs
-  int slop = 2*BytesPerInstWord;  // 32-bit offset is this much larger than a 13-bit one
-  assert(vtable_index > 10 || __ pc() + slop <= s->code_end(), "room for sethi;add");
-
-  s->set_exception_points(npe_addr, ame_addr);
   return s;
 }
 
 
-// NOTE:  %%%% if any change is made to this stub make sure that the function
-//             pd_code_size_limit is changed to ensure the correct size for VtableStub
 VtableStub* VtableStubs::create_itable_stub(int itable_index) {
-  const int sparc_code_length = VtableStub::pd_code_size_limit(false);
-  VtableStub* s = new(sparc_code_length) VtableStub(false, itable_index);
+  // Read "A word on VtableStub sizing" in share/code/vtableStubs.hpp for details on stub sizing.
+  const int stub_code_length = code_size_limit(false);
+  VtableStub* s = new(stub_code_length) VtableStub(false, itable_index);
   // Can be NULL if there is no free space in the code cache.
   if (s == NULL) {
     return NULL;
   }
+  // Count unused bytes in instruction sequences of variable size.
+  // We add them to the computed buffer size in order to avoid
+  // overflow in subsequently generated stubs.
+  address   start_pc;
+  int       slop_bytes = 0;
+  int       slop_delta = 0;
+  const int index_dependent_slop     = ((itable_index < 512) ? 2 : 0)*BytesPerInstWord; // code size change with transition from 13-bit to 32-bit constant (@index == 512?).
 
-  ResourceMark rm;
-  CodeBuffer cb(s->entry_point(), sparc_code_length);
+  ResourceMark    rm;
+  CodeBuffer      cb(s->entry_point(), stub_code_length);
   MacroAssembler* masm = new MacroAssembler(&cb);
 
+#if (!defined(PRODUCT) && defined(COMPILER2))
+  if (CountCompiledCalls) {
+//  Use G3_scratch, G4_scratch as work regs for inc_counter.
+//  These are defined before use further down.
+    __ inc_counter(SharedRuntime::nof_megamorphic_calls_addr(), G3_scratch, G4_scratch);
+  }
+#endif // PRODUCT
+
   Register G3_Klass = G3_scratch;
   Register G5_icholder = G5;  // Passed in as an argument
   Register G4_interface = G4_scratch;
@@ -160,15 +183,10 @@
   // and so those registers are not available here.
   __ save(SP,-frame::register_save_words*wordSize,SP);
 
-#ifndef PRODUCT
-  if (CountCompiledCalls) {
-    __ inc_counter(SharedRuntime::nof_megamorphic_calls_addr(), L0, L1);
-  }
-#endif /* PRODUCT */
+  Label    L_no_such_interface;
+  Register L5_method = L5;
 
-  Label L_no_such_interface;
-
-  Register L5_method = L5;
+  start_pc = __ pc();
 
   // Receiver subtype check against REFC.
   __ ld_ptr(G5_icholder, CompiledICHolder::holder_klass_offset(), G4_interface);
@@ -179,6 +197,9 @@
                              L_no_such_interface,
                              /*return_method=*/ false);
 
+  const ptrdiff_t typecheckSize = __ pc() - start_pc;
+  start_pc = __ pc();
+
   // Get Method* and entrypoint for compiler
   __ ld_ptr(G5_icholder, CompiledICHolder::holder_metadata_offset(), G4_interface);
   __ lookup_interface_method(// inputs: rec. class, interface, itable index
@@ -187,6 +208,19 @@
                              L5_method, L2, L3,
                              L_no_such_interface);
 
+  const ptrdiff_t lookupSize = __ pc() - start_pc;
+
+  // Reduce "estimate" such that "padding" does not drop below 8.
+  // Do not target a left-over number of zero, because a very
+  // large vtable or itable offset (> 4K) will require an extra
+  // sethi/or pair of instructions.
+  // Found typecheck(60) + lookup(72) to exceed previous extimate (32*4).
+  const ptrdiff_t estimate = 36*BytesPerInstWord;
+  const ptrdiff_t codesize = typecheckSize + lookupSize + index_dependent_slop;
+  slop_delta  = (int)(estimate - codesize);
+  slop_bytes += slop_delta;
+  assert(slop_delta >= 0, "itable #%d: Code size estimate (%d) for lookup_interface_method too small, required: %d", itable_index, (int)estimate, (int)codesize);
+
 #ifndef PRODUCT
   if (DebugVtables) {
     Label L01;
@@ -222,88 +256,12 @@
   __ delayed()->restore();
 
   masm->flush();
+  slop_bytes += index_dependent_slop; // add'l slop for size variance due to large itable offsets
+  bookkeeping(masm, tty, s, npe_addr, ame_addr, false, itable_index, slop_bytes, index_dependent_slop);
 
-  if (PrintMiscellaneous && (WizardMode || Verbose)) {
-    tty->print_cr("itable #%d at " PTR_FORMAT "[%d] left over: %d",
-                  itable_index, p2i(s->entry_point()),
-                  (int)(s->code_end() - s->entry_point()),
-                  (int)(s->code_end() - __ pc()));
-  }
-  guarantee(__ pc() <= s->code_end(), "overflowed buffer");
-  // shut the door on sizing bugs
-  int slop = 2*BytesPerInstWord;  // 32-bit offset is this much larger than a 13-bit one
-  assert(itable_index > 10 || __ pc() + slop <= s->code_end(), "room for sethi;add");
-
-  s->set_exception_points(npe_addr, ame_addr);
   return s;
 }
 
-
-int VtableStub::pd_code_size_limit(bool is_vtable_stub) {
-  if (DebugVtables || CountCompiledCalls || VerifyOops) return 1000;
-  else {
-    const int slop = 2*BytesPerInstWord; // sethi;add  (needed for long offsets)
-    if (is_vtable_stub) {
-      // ld;ld;ld,jmp,nop
-      const int basic = 5*BytesPerInstWord +
-                        // shift;add for load_klass (only shift with zero heap based)
-                        (UseCompressedClassPointers ?
-                          MacroAssembler::instr_size_for_decode_klass_not_null() : 0);
-      return basic + slop;
-    } else {
-      const int basic = 54 * BytesPerInstWord +
-                        // shift;add for load_klass (only shift with zero heap based)
-                        (UseCompressedClassPointers ?
-                          MacroAssembler::instr_size_for_decode_klass_not_null() : 0);
-      return (basic + slop);
-    }
-  }
-
-  // In order to tune these parameters, run the JVM with VM options
-  // +PrintMiscellaneous and +WizardMode to see information about
-  // actual itable stubs.  Look for lines like this:
-  //   itable #1 at 0x5551212[116] left over: 8
-  // Reduce the constants so that the "left over" number is 8
-  // Do not aim at a left-over number of zero, because a very
-  // large vtable or itable offset (> 4K) will require an extra
-  // sethi/or pair of instructions.
-  //
-  // The JVM98 app. _202_jess has a megamorphic interface call.
-  // The itable code looks like this:
-  // Decoding VtableStub itbl[1]@16
-  //   ld  [ %o0 + 4 ], %g3
-  //   save  %sp, -64, %sp
-  //   ld  [ %g3 + 0xe8 ], %l2
-  //   sll  %l2, 2, %l2
-  //   add  %l2, 0x134, %l2
-  //   add  %g3, %l2, %l2
-  //   add  %g3, 4, %g3
-  //   ld  [ %l2 ], %l5
-  //   brz,pn   %l5, throw_icce
-  //   cmp  %l5, %g5
-  //   be  %icc, success
-  //   add  %l2, 8, %l2
-  // loop:
-  //   ld  [ %l2 ], %l5
-  //   brz,pn   %l5, throw_icce
-  //   cmp  %l5, %g5
-  //   bne,pn   %icc, loop
-  //   add  %l2, 8, %l2
-  // success:
-  //   ld  [ %l2 + -4 ], %l2
-  //   ld  [ %g3 + %l2 ], %l5
-  //   restore  %l5, 0, %g5
-  //   ld  [ %g5 + 0x44 ], %g3
-  //   jmp  %g3
-  //   nop
-  // throw_icce:
-  //   sethi  %hi(throw_ICCE_entry), %g3
-  //   ! 5 more instructions here, LP64_ONLY
-  //   jmp  %g3 + %lo(throw_ICCE_entry)
-  //   restore
-}
-
-
 int VtableStub::pd_code_alignment() {
   // UltraSPARC cache line size is 8 instructions:
   const unsigned int icache_line_size = 32;
--- a/src/hotspot/cpu/x86/assembler_x86.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/x86/assembler_x86.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -2041,7 +2041,7 @@
   }
 }
 
-void Assembler::jccb(Condition cc, Label& L) {
+void Assembler::jccb_0(Condition cc, Label& L, const char* file, int line) {
   if (L.is_bound()) {
     const int short_size = 2;
     address entry = target(L);
@@ -2051,7 +2051,7 @@
     if (delta != 0) {
       dist += (dist < 0 ? (-delta) :delta);
     }
-    assert(is8bit(dist), "Dispacement too large for a short jmp");
+    assert(is8bit(dist), "Dispacement too large for a short jmp at %s:%d", file, line);
 #endif
     intptr_t offs = (intptr_t)entry - (intptr_t)pc();
     // 0111 tttn #8-bit disp
@@ -2059,7 +2059,7 @@
     emit_int8((offs - short_size) & 0xFF);
   } else {
     InstructionMark im(this);
-    L.add_patch_at(code(), locator());
+    L.add_patch_at(code(), locator(), file, line);
     emit_int8(0x70 | cc);
     emit_int8(0);
   }
@@ -2114,7 +2114,7 @@
   emit_data(disp, rspec.reloc(), call32_operand);
 }
 
-void Assembler::jmpb(Label& L) {
+void Assembler::jmpb_0(Label& L, const char* file, int line) {
   if (L.is_bound()) {
     const int short_size = 2;
     address entry = target(L);
@@ -2125,14 +2125,14 @@
     if (delta != 0) {
       dist += (dist < 0 ? (-delta) :delta);
     }
-    assert(is8bit(dist), "Dispacement too large for a short jmp");
+    assert(is8bit(dist), "Dispacement too large for a short jmp at %s:%d", file, line);
 #endif
     intptr_t offs = entry - pc();
     emit_int8((unsigned char)0xEB);
     emit_int8((offs - short_size) & 0xFF);
   } else {
     InstructionMark im(this);
-    L.add_patch_at(code(), locator());
+    L.add_patch_at(code(), locator(), file, line);
     emit_int8((unsigned char)0xEB);
     emit_int8(0);
   }
--- a/src/hotspot/cpu/x86/assembler_x86.hpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/x86/assembler_x86.hpp	Thu Sep 13 22:05:54 2018 +0200
@@ -1302,7 +1302,11 @@
   // WARNING: be very careful using this for forward jumps.  If the label is
   // not bound within an 8-bit offset of this instruction, a run-time error
   // will occur.
-  void jccb(Condition cc, Label& L);
+
+  // Use macro to record file and line number.
+  #define jccb(cc, L) jccb_0(cc, L, __FILE__, __LINE__)
+
+  void jccb_0(Condition cc, Label& L, const char* file, int line);
 
   void jmp(Address entry);    // pc <- entry
 
@@ -1315,7 +1319,11 @@
   // WARNING: be very careful using this for forward jumps.  If the label is
   // not bound within an 8-bit offset of this instruction, a run-time error
   // will occur.
-  void jmpb(Label& L);
+
+  // Use macro to record file and line number.
+  #define jmpb(L) jmpb_0(L, __FILE__, __LINE__)
+
+  void jmpb_0(Label& L, const char* file, int line);
 
   void ldmxcsr( Address src );
 
--- a/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -3605,7 +3605,7 @@
     }
   } else {
     __ testptr(tmp, tmp);
-    __ jccb(Assembler::notZero, update);
+    __ jcc(Assembler::notZero, update);
     __ stop("unexpect null obj");
 #endif
   }
@@ -3620,7 +3620,7 @@
       __ push(tmp);
       __ mov_metadata(tmp, exact_klass->constant_encoding());
       __ cmpptr(tmp, Address(rsp, 0));
-      __ jccb(Assembler::equal, ok);
+      __ jcc(Assembler::equal, ok);
       __ stop("exact klass and actual klass differ");
       __ bind(ok);
       __ pop(tmp);
--- a/src/hotspot/cpu/x86/macroAssembler_x86.cpp	Thu Aug 30 22:06:18 2018 +0200
+++ b/src/hotspot/cpu/x86/macroAssembler_x86.cpp	Thu Sep 13 22:05:54 2018 +0200
@@ -1721,227 +1721,160 @@
   if (counters != NULL) {
     atomic_incl(ExternalAddress((address)counters->total_entry_count_addr()), scrReg);
   }
-  if (EmitSync & 1) {
-      // set box->dhw = markOopDesc::unused_mark()
-      // Force all sync thru slow-path: slow_enter() and slow_exit()
-      movptr (Address(boxReg, 0), (int32_t)intptr_t(markOopDesc::unused_mark()));
-      cmpptr (rsp, (int32_t)NULL_WORD);
-  } else {
-    // Possible cases that we'll encounter in fast_lock
-    // ------------------------------------------------
-    // * Inflated
-    //    -- unlocked
-    //    -- Locked
-    //       = by self
-    //       = by other
-    // * biased
-    //    -- by Self
-    //    -- by other
-    // * neutral
-    // * stack-locked
-    //    -- by self
-    //       = sp-proximity test hits
-    //       = sp-proximity test generates false-negative
-    //    -- by other
-    //
-
-    Label IsInflated, DONE_LABEL;
-
-    // it's stack-locked, biased or neutral
-    // TODO: optimize away redundant LDs of obj->mark and improve the markword triage
-    // order to reduce the number of conditional branches in the most common cases.
-    // Beware -- there's a subtle invariant that fetch of the markword
-    // at [FETCH], below, will never observe a biased encoding (*101b).
-    // If this invariant is not held we risk exclusion (safety) failure.
-    if (UseBiasedLocking && !UseOptoBiasInlining) {
-      biased_locking_enter(boxReg, objReg, tmpReg, scrReg, false, DONE_LABEL, NULL, counters);
-    }
+
+  // Possible cases that we'll encounter in fast_lock
+  // ------------------------------------------------
+  // * Inflated
+  //    -- unlocked
+  //    -- Locked
+  //       = by self
+  //       = by other
+  // * biased
+  //    -- by Self
+  //    -- by other
+  // * neutral
+  // * stack-locked
+  //    -- by self
+  //       = sp-proximity test hits
+  //       = sp-proximity test generates false-negative
+  //    -- by other
+  //
+
+  Label IsInflated, DONE_LABEL;
+
+  // it's stack-locked, biased or neutral
+  // TODO: optimize away redundant LDs of obj->mark and improve the markword triage
+  // order to reduce the number of conditional branches in the most common cases.
+  // Beware -- there's a subtle invariant that fetch of the markword
+  // at [FETCH], below, will never observe a biased encoding (*101b).
+  // If this invariant is not held we risk exclusion (safety) failure.
+  if (UseBiasedLocking && !UseOptoBiasInlining) {
+    biased_locking_enter(boxReg, objReg, tmpReg, scrReg, false, DONE_LABEL, NULL, counters);
+  }
 
 #if INCLUDE_RTM_OPT
-    if (UseRTMForStackLocks && use_rtm) {
-      rtm_stack_locking(objReg, tmpReg, scrReg, cx2Reg,
-                        stack_rtm_counters, method_data, profile_rtm,
-                        DONE_LABEL, IsInflated);
-    }
+  if (UseRTMForStackLocks && use_rtm) {
+    rtm_stack_locking(objReg, tmpReg, scrReg, cx2Reg,
+                      stack_rtm_counters, method_data, profile_rtm,
+                      DONE_LABEL, IsInflated);
+  }
 #endif // INCLUDE_RTM_OPT
 
-    movptr(tmpReg, Address(objReg, oopDesc::mark_offset_in_bytes()));          // [FETCH]
-    testptr(tmpReg, markOopDesc::monitor_value); // inflated vs stack-locked|neutral|biased
-    jccb(Assembler::notZero, IsInflated);
-
-    // Attempt stack-locking ...
-    orptr (tmpReg, markOopDesc::unlocked_value);
-    movptr(Address(boxReg, 0), tmpReg);          // Anticipate successful CAS
-    if (os::is_MP()) {
-      lock();
-    }
-    cmpxchgptr(boxReg, Address(objReg, oopDesc::mark_offset_in_bytes()));      // Updates tmpReg
-    if (counters != NULL) {
-      cond_inc32(Assembler::equal,
-                 ExternalAddress((address)counters->fast_path_entry_count_addr()));
-    }
-    jcc(Assembler::equal, DONE_LABEL);           // Success
-
-    // Recursive locking.
-    // The object is stack-locked: markword contains stack pointer to BasicLock.
-    // Locked by current thread if difference with current SP is less than one page.
-    subptr(tmpReg, rsp);
-    // Next instruction set ZFlag == 1 (Success) if difference is less then one page.
-    andptr(tmpReg, (int32_t) (NOT_LP64(0xFFFFF003) LP64_ONLY(7 - os::vm_page_size())) );
-    movptr(Address(boxReg, 0), tmpReg);
-    if (counters != NULL) {
-      cond_inc32(Assembler::equal,
-                 ExternalAddress((address)counters->fast_path_entry_count_addr()));
-    }
-    jmp(DONE_LABEL);
-
-    bind(IsInflated);
-    // The object is inflated. tmpReg contains pointer to ObjectMonitor* + markOopDesc::monitor_value
+  movptr(tmpReg, Address(objReg, oopDesc::mark_offset_in_bytes()));          // [FETCH]
+  testptr(tmpReg, markOopDesc::monitor_value); // inflated vs stack-locked|neutral|biased
+  jccb(Assembler::notZero, IsInflated);
+
+  // Attempt stack-locking ...
+  orptr (tmpReg, markOopDesc::unlocked_value);
+  movptr(Address(boxReg, 0), tmpReg);          // Anticipate successful CAS
+  if (os::is_MP()) {
+    lock();
+  }
+  cmpxchgptr(boxReg, Address(objReg, oopDesc::mark_offset_in_bytes()));      // Updates tmpReg
+  if (counters != NULL) {
+    cond_inc32(Assembler::equal,
+               ExternalAddress((address)counters->fast_path_entry_count_addr()));
+  }
+  jcc(Assembler::equal, DONE_LABEL);           // Success
+
+  // Recursive locking.
+  // The object is stack-locked: markword contains stack pointer to BasicLock.
+  // Locked by current thread if difference with current SP is less than one page.
+  subptr(tmpReg, rsp);
+  // Next instruction set ZFlag == 1 (Success) if difference is less then one page.
+  andptr(tmpReg, (int32_t) (NOT_LP64(0xFFFFF003) LP64_ONLY(7 - os::vm_page_size())) );
+  movptr(Address(boxReg, 0), tmpReg);
+  if (counters != NULL) {
+    cond_inc32(Assembler::equal,
+               ExternalAddress((address)counters->fast_path_entry_count_addr()));
+  }
+  jmp(DONE_LABEL);
+
+  bind(IsInflated);
+  // The object is inflated. tmpReg contains pointer to ObjectMonitor* + markOopDesc::monitor_value
 
 #if INCLUDE_RTM_OPT
-    // Use the same RTM locking code in 32- and 64-bit VM.
-    if (use_rtm) {
-      rtm_inflated_locking(objReg, boxReg, tmpReg, scrReg, cx1Reg, cx2Reg,
-                           rtm_counters, method_data, profile_rtm, DONE_LABEL);
-    } else {
+  // Use the same RTM locking code in 32- and 64-bit VM.
+  if (use_rtm) {
+    rtm_inflated_locking(objReg, boxReg, tmpReg, scrReg, cx1Reg, cx2Reg,
+                         rtm_counters, method_data, profile_rtm, DONE_LABEL);
+  } else {
 #endif // INCLUDE_RTM_OPT
 
 #ifndef _LP64
-    // The object is inflated.
-
-    // boxReg refers to the on-stack BasicLock in the current frame.
-    // We'd like to write:
-    //   set box->_displaced_header = markOopDesc::unused_mark().  Any non-0 value suffices.
-    // This is convenient but results a ST-before-CAS penalty.  The following CAS suffers
-    // additional latency as we have another ST in the store buffer that must drain.
-
-    if (EmitSync & 8192) {
-       movptr(Address(boxReg, 0), 3);            // results in ST-before-CAS penalty
-       get_thread (scrReg);
-       movptr(boxReg, tmpReg);                    // consider: LEA box, [tmp-2]
-       movptr(tmpReg, NULL_WORD);                 // consider: xor vs mov
-       if (os::is_MP()) {
-         lock();
-       }
-       cmpxchgptr(scrReg, Address(boxReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
-    } else
-    if ((EmitSync & 128) == 0) {                      // avoid ST-before-CAS
-       // register juggle because we need tmpReg for cmpxchgptr below
-       movptr(scrReg, boxReg);
-       movptr(boxReg, tmpReg);                   // consider: LEA box, [tmp-2]
-
-       // Using a prefetchw helps avoid later RTS->RTO upgrades and cache probes
-       if ((EmitSync & 2048) && VM_Version::supports_3dnow_prefetch() && os::is_MP()) {
-          // prefetchw [eax + Offset(_owner)-2]
-          prefetchw(Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
-       }
-
-       if ((EmitSync & 64) == 0) {
-         // Optimistic form: consider XORL tmpReg,tmpReg
-         movptr(tmpReg, NULL_WORD);
-       } else {
-         // Can suffer RTS->RTO upgrades on shared or cold $ lines
-         // Test-And-CAS instead of CAS
-         movptr(tmpReg, Address(tmpReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));   // rax, = m->_owner
-         testptr(tmpReg, tmpReg);                   // Locked ?
-         jccb  (Assembler::notZero, DONE_LABEL);
-       }
-
-       // Appears unlocked - try to swing _owner from null to non-null.
-       // Ideally, I'd manifest "Self" with get_thread and then attempt
-       // to CAS the register containing Self into m->Owner.
-       // But we don't have enough registers, so instead we can either try to CAS
-       // rsp or the address of the box (in scr) into &m->owner.  If the CAS succeeds
-       // we later store "Self" into m->Owner.  Transiently storing a stack address
-       // (rsp or the address of the box) into  m->owner is harmless.
-       // Invariant: tmpReg == 0.  tmpReg is EAX which is the implicit cmpxchg comparand.
-       if (os::is_MP()) {
-         lock();
-       }
-       cmpxchgptr(scrReg, Address(boxReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)));
-       movptr(Address(scrReg, 0), 3);          // box->_displaced_header = 3
-       // If we weren't able to swing _owner from NULL to the BasicLock
-       // then take the slow path.
-       jccb  (Assembler::notZero, DONE_LABEL);
-       // update _owner from BasicLock to thread
-       get_thread (scrReg);                    // beware: clobbers ICCs
-       movptr(Address(boxReg, OM_OFFSET_NO_MONITOR_VALUE_TAG(owner)), scrReg);
-       xorptr(boxReg, boxReg);                 // set icc.ZFlag = 1 to indicate success
-
-       // If the CAS fails we can either retry or pass control to the slow-path.
-       // We use the latter tactic.
-       // Pass the CAS result in the icc.ZFlag into DONE_LABEL
-       // If the CAS was successful ...
-       //   Self has acquired the lock
-       //   Invariant: m->_recursions should already be 0, so we don't need to explicitly set it.
-       // Intentional fall-through into DONE_LABEL ...
-    } else {
-       movptr(Address(boxReg, 0), intptr_t(markOopDesc::unused_mark()));  // results in ST-before-CAS penalty
-       movptr(boxReg, tmpReg);
-
-       // Using a prefetchw helps avoid later RTS->RTO upgrades and cache probes
-       if ((EmitSync & 2048) && VM_Version::supports_3d