annotate src/cpu/x86/vm/c1_CodeStubs_x86.cpp @ 2181:e4fee0bdaa85

7008809: should report the class in ArrayStoreExceptions from compiled code Reviewed-by: iveresov, twisti
author never
date Mon, 24 Jan 2011 13:34:18 -0800
parents ac637b7220d1
children c7f3d0b4570f
rev   line source
duke@0 1 /*
never@2181 2 * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved.
duke@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@0 4 *
duke@0 5 * This code is free software; you can redistribute it and/or modify it
duke@0 6 * under the terms of the GNU General Public License version 2 only, as
duke@0 7 * published by the Free Software Foundation.
duke@0 8 *
duke@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@0 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@0 13 * accompanied this code).
duke@0 14 *
duke@0 15 * You should have received a copy of the GNU General Public License version
duke@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@0 18 *
trims@1563 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1563 20 * or visit www.oracle.com if you need additional information or have any
trims@1563 21 * questions.
duke@0 22 *
duke@0 23 */
duke@0 24
stefank@1992 25 #include "precompiled.hpp"
stefank@1992 26 #include "c1/c1_CodeStubs.hpp"
stefank@1992 27 #include "c1/c1_FrameMap.hpp"
stefank@1992 28 #include "c1/c1_LIRAssembler.hpp"
stefank@1992 29 #include "c1/c1_MacroAssembler.hpp"
stefank@1992 30 #include "c1/c1_Runtime1.hpp"
stefank@1992 31 #include "nativeInst_x86.hpp"
stefank@1992 32 #include "runtime/sharedRuntime.hpp"
stefank@1992 33 #include "vmreg_x86.inline.hpp"
stefank@1992 34 #ifndef SERIALGC
stefank@1992 35 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp"
stefank@1992 36 #endif
duke@0 37
duke@0 38
duke@0 39 #define __ ce->masm()->
duke@0 40
duke@0 41 float ConversionStub::float_zero = 0.0;
duke@0 42 double ConversionStub::double_zero = 0.0;
duke@0 43
duke@0 44 void ConversionStub::emit_code(LIR_Assembler* ce) {
duke@0 45 __ bind(_entry);
duke@0 46 assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub");
duke@0 47
duke@0 48
duke@0 49 if (input()->is_single_xmm()) {
duke@0 50 __ comiss(input()->as_xmm_float_reg(),
duke@0 51 ExternalAddress((address)&float_zero));
duke@0 52 } else if (input()->is_double_xmm()) {
duke@0 53 __ comisd(input()->as_xmm_double_reg(),
duke@0 54 ExternalAddress((address)&double_zero));
duke@0 55 } else {
never@307 56 LP64_ONLY(ShouldNotReachHere());
never@307 57 __ push(rax);
duke@0 58 __ ftst();
duke@0 59 __ fnstsw_ax();
duke@0 60 __ sahf();
never@307 61 __ pop(rax);
duke@0 62 }
duke@0 63
duke@0 64 Label NaN, do_return;
duke@0 65 __ jccb(Assembler::parity, NaN);
duke@0 66 __ jccb(Assembler::below, do_return);
duke@0 67
duke@0 68 // input is > 0 -> return maxInt
duke@0 69 // result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff
duke@0 70 __ decrement(result()->as_register());
duke@0 71 __ jmpb(do_return);
duke@0 72
duke@0 73 // input is NaN -> return 0
duke@0 74 __ bind(NaN);
never@307 75 __ xorptr(result()->as_register(), result()->as_register());
duke@0 76
duke@0 77 __ bind(do_return);
duke@0 78 __ jmp(_continuation);
duke@0 79 }
duke@0 80
duke@0 81 void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
duke@0 82 __ bind(_entry);
iveresov@1805 83 ce->store_parameter(_method->as_register(), 1);
duke@0 84 ce->store_parameter(_bci, 0);
duke@0 85 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id)));
duke@0 86 ce->add_call_info_here(_info);
duke@0 87 ce->verify_oop_map(_info);
duke@0 88 __ jmp(_continuation);
duke@0 89 }
duke@0 90
duke@0 91 RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index,
duke@0 92 bool throw_index_out_of_bounds_exception)
duke@0 93 : _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception)
duke@0 94 , _index(index)
duke@0 95 {
roland@1841 96 assert(info != NULL, "must have info");
roland@1841 97 _info = new CodeEmitInfo(info);
duke@0 98 }
duke@0 99
duke@0 100
duke@0 101 void RangeCheckStub::emit_code(LIR_Assembler* ce) {
duke@0 102 __ bind(_entry);
duke@0 103 // pass the array index on stack because all registers must be preserved
duke@0 104 if (_index->is_cpu_register()) {
duke@0 105 ce->store_parameter(_index->as_register(), 0);
duke@0 106 } else {
duke@0 107 ce->store_parameter(_index->as_jint(), 0);
duke@0 108 }
duke@0 109 Runtime1::StubID stub_id;
duke@0 110 if (_throw_index_out_of_bounds_exception) {
duke@0 111 stub_id = Runtime1::throw_index_exception_id;
duke@0 112 } else {
duke@0 113 stub_id = Runtime1::throw_range_check_failed_id;
duke@0 114 }
duke@0 115 __ call(RuntimeAddress(Runtime1::entry_for(stub_id)));
duke@0 116 ce->add_call_info_here(_info);
duke@0 117 debug_only(__ should_not_reach_here());
duke@0 118 }
duke@0 119
duke@0 120
duke@0 121 void DivByZeroStub::emit_code(LIR_Assembler* ce) {
duke@0 122 if (_offset != -1) {
duke@0 123 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
duke@0 124 }
duke@0 125 __ bind(_entry);
duke@0 126 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id)));
duke@0 127 ce->add_call_info_here(_info);
duke@0 128 debug_only(__ should_not_reach_here());
duke@0 129 }
duke@0 130
duke@0 131
duke@0 132 // Implementation of NewInstanceStub
duke@0 133
duke@0 134 NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) {
duke@0 135 _result = result;
duke@0 136 _klass = klass;
duke@0 137 _klass_reg = klass_reg;
duke@0 138 _info = new CodeEmitInfo(info);
duke@0 139 assert(stub_id == Runtime1::new_instance_id ||
duke@0 140 stub_id == Runtime1::fast_new_instance_id ||
duke@0 141 stub_id == Runtime1::fast_new_instance_init_check_id,
duke@0 142 "need new_instance id");
duke@0 143 _stub_id = stub_id;
duke@0 144 }
duke@0 145
duke@0 146
duke@0 147 void NewInstanceStub::emit_code(LIR_Assembler* ce) {
duke@0 148 assert(__ rsp_offset() == 0, "frame size should be fixed");
duke@0 149 __ bind(_entry);
never@307 150 __ movptr(rdx, _klass_reg->as_register());
duke@0 151 __ call(RuntimeAddress(Runtime1::entry_for(_stub_id)));
duke@0 152 ce->add_call_info_here(_info);
duke@0 153 ce->verify_oop_map(_info);
duke@0 154 assert(_result->as_register() == rax, "result must in rax,");
duke@0 155 __ jmp(_continuation);
duke@0 156 }
duke@0 157
duke@0 158
duke@0 159 // Implementation of NewTypeArrayStub
duke@0 160
duke@0 161 NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
duke@0 162 _klass_reg = klass_reg;
duke@0 163 _length = length;
duke@0 164 _result = result;
duke@0 165 _info = new CodeEmitInfo(info);
duke@0 166 }
duke@0 167
duke@0 168
duke@0 169 void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
duke@0 170 assert(__ rsp_offset() == 0, "frame size should be fixed");
duke@0 171 __ bind(_entry);
duke@0 172 assert(_length->as_register() == rbx, "length must in rbx,");
duke@0 173 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
duke@0 174 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id)));
duke@0 175 ce->add_call_info_here(_info);
duke@0 176 ce->verify_oop_map(_info);
duke@0 177 assert(_result->as_register() == rax, "result must in rax,");
duke@0 178 __ jmp(_continuation);
duke@0 179 }
duke@0 180
duke@0 181
duke@0 182 // Implementation of NewObjectArrayStub
duke@0 183
duke@0 184 NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
duke@0 185 _klass_reg = klass_reg;
duke@0 186 _result = result;
duke@0 187 _length = length;
duke@0 188 _info = new CodeEmitInfo(info);
duke@0 189 }
duke@0 190
duke@0 191
duke@0 192 void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
duke@0 193 assert(__ rsp_offset() == 0, "frame size should be fixed");
duke@0 194 __ bind(_entry);
duke@0 195 assert(_length->as_register() == rbx, "length must in rbx,");
duke@0 196 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
duke@0 197 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id)));
duke@0 198 ce->add_call_info_here(_info);
duke@0 199 ce->verify_oop_map(_info);
duke@0 200 assert(_result->as_register() == rax, "result must in rax,");
duke@0 201 __ jmp(_continuation);
duke@0 202 }
duke@0 203
duke@0 204
duke@0 205 // Implementation of MonitorAccessStubs
duke@0 206
duke@0 207 MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info)
duke@0 208 : MonitorAccessStub(obj_reg, lock_reg)
duke@0 209 {
duke@0 210 _info = new CodeEmitInfo(info);
duke@0 211 }
duke@0 212
duke@0 213
duke@0 214 void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
duke@0 215 assert(__ rsp_offset() == 0, "frame size should be fixed");
duke@0 216 __ bind(_entry);
duke@0 217 ce->store_parameter(_obj_reg->as_register(), 1);
duke@0 218 ce->store_parameter(_lock_reg->as_register(), 0);
duke@0 219 Runtime1::StubID enter_id;
duke@0 220 if (ce->compilation()->has_fpu_code()) {
duke@0 221 enter_id = Runtime1::monitorenter_id;
duke@0 222 } else {
duke@0 223 enter_id = Runtime1::monitorenter_nofpu_id;
duke@0 224 }
duke@0 225 __ call(RuntimeAddress(Runtime1::entry_for(enter_id)));
duke@0 226 ce->add_call_info_here(_info);
duke@0 227 ce->verify_oop_map(_info);
duke@0 228 __ jmp(_continuation);
duke@0 229 }
duke@0 230
duke@0 231
duke@0 232 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
duke@0 233 __ bind(_entry);
duke@0 234 if (_compute_lock) {
duke@0 235 // lock_reg was destroyed by fast unlocking attempt => recompute it
duke@0 236 ce->monitor_address(_monitor_ix, _lock_reg);
duke@0 237 }
duke@0 238 ce->store_parameter(_lock_reg->as_register(), 0);
duke@0 239 // note: non-blocking leaf routine => no call info needed
duke@0 240 Runtime1::StubID exit_id;
duke@0 241 if (ce->compilation()->has_fpu_code()) {
duke@0 242 exit_id = Runtime1::monitorexit_id;
duke@0 243 } else {
duke@0 244 exit_id = Runtime1::monitorexit_nofpu_id;
duke@0 245 }
duke@0 246 __ call(RuntimeAddress(Runtime1::entry_for(exit_id)));
duke@0 247 __ jmp(_continuation);
duke@0 248 }
duke@0 249
duke@0 250
duke@0 251 // Implementation of patching:
duke@0 252 // - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes)
duke@0 253 // - Replace original code with a call to the stub
duke@0 254 // At Runtime:
duke@0 255 // - call to stub, jump to runtime
duke@0 256 // - in runtime: preserve all registers (rspecially objects, i.e., source and destination object)
duke@0 257 // - in runtime: after initializing class, restore original code, reexecute instruction
duke@0 258
duke@0 259 int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size;
duke@0 260
duke@0 261 void PatchingStub::align_patch_site(MacroAssembler* masm) {
duke@0 262 // We're patching a 5-7 byte instruction on intel and we need to
duke@0 263 // make sure that we don't see a piece of the instruction. It
duke@0 264 // appears mostly impossible on Intel to simply invalidate other
duke@0 265 // processors caches and since they may do aggressive prefetch it's
duke@0 266 // very hard to make a guess about what code might be in the icache.
duke@0 267 // Force the instruction to be double word aligned so that it
duke@0 268 // doesn't span a cache line.
duke@0 269 masm->align(round_to(NativeGeneralJump::instruction_size, wordSize));
duke@0 270 }
duke@0 271
duke@0 272 void PatchingStub::emit_code(LIR_Assembler* ce) {
duke@0 273 assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call");
duke@0 274
duke@0 275 Label call_patch;
duke@0 276
duke@0 277 // static field accesses have special semantics while the class
duke@0 278 // initializer is being run so we emit a test which can be used to
duke@0 279 // check that this code is being executed by the initializing
duke@0 280 // thread.
duke@0 281 address being_initialized_entry = __ pc();
duke@0 282 if (CommentedAssembly) {
duke@0 283 __ block_comment(" patch template");
duke@0 284 }
duke@0 285 if (_id == load_klass_id) {
duke@0 286 // produce a copy of the load klass instruction for use by the being initialized case
duke@0 287 address start = __ pc();
duke@0 288 jobject o = NULL;
duke@0 289 __ movoop(_obj, o);
duke@0 290 #ifdef ASSERT
duke@0 291 for (int i = 0; i < _bytes_to_copy; i++) {
duke@0 292 address ptr = (address)(_pc_start + i);
duke@0 293 int a_byte = (*ptr) & 0xFF;
duke@0 294 assert(a_byte == *start++, "should be the same code");
duke@0 295 }
duke@0 296 #endif
duke@0 297 } else {
duke@0 298 // make a copy the code which is going to be patched.
duke@0 299 for ( int i = 0; i < _bytes_to_copy; i++) {
duke@0 300 address ptr = (address)(_pc_start + i);
duke@0 301 int a_byte = (*ptr) & 0xFF;
duke@0 302 __ a_byte (a_byte);
duke@0 303 *ptr = 0x90; // make the site look like a nop
duke@0 304 }
duke@0 305 }
duke@0 306
duke@0 307 address end_of_patch = __ pc();
duke@0 308 int bytes_to_skip = 0;
duke@0 309 if (_id == load_klass_id) {
duke@0 310 int offset = __ offset();
duke@0 311 if (CommentedAssembly) {
duke@0 312 __ block_comment(" being_initialized check");
duke@0 313 }
duke@0 314 assert(_obj != noreg, "must be a valid register");
duke@0 315 Register tmp = rax;
duke@0 316 if (_obj == tmp) tmp = rbx;
never@307 317 __ push(tmp);
duke@0 318 __ get_thread(tmp);
never@307 319 __ cmpptr(tmp, Address(_obj, instanceKlass::init_thread_offset_in_bytes() + sizeof(klassOopDesc)));
never@307 320 __ pop(tmp);
duke@0 321 __ jcc(Assembler::notEqual, call_patch);
duke@0 322
duke@0 323 // access_field patches may execute the patched code before it's
duke@0 324 // copied back into place so we need to jump back into the main
duke@0 325 // code of the nmethod to continue execution.
duke@0 326 __ jmp(_patch_site_continuation);
duke@0 327
duke@0 328 // make sure this extra code gets skipped
duke@0 329 bytes_to_skip += __ offset() - offset;
duke@0 330 }
duke@0 331 if (CommentedAssembly) {
duke@0 332 __ block_comment("patch data encoded as movl");
duke@0 333 }
duke@0 334 // Now emit the patch record telling the runtime how to find the
duke@0 335 // pieces of the patch. We only need 3 bytes but for readability of
duke@0 336 // the disassembly we make the data look like a movl reg, imm32,
duke@0 337 // which requires 5 bytes
duke@0 338 int sizeof_patch_record = 5;
duke@0 339 bytes_to_skip += sizeof_patch_record;
duke@0 340
duke@0 341 // emit the offsets needed to find the code to patch
duke@0 342 int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record;
duke@0 343
duke@0 344 __ a_byte(0xB8);
duke@0 345 __ a_byte(0);
duke@0 346 __ a_byte(being_initialized_entry_offset);
duke@0 347 __ a_byte(bytes_to_skip);
duke@0 348 __ a_byte(_bytes_to_copy);
duke@0 349 address patch_info_pc = __ pc();
duke@0 350 assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
duke@0 351
duke@0 352 address entry = __ pc();
duke@0 353 NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
duke@0 354 address target = NULL;
duke@0 355 switch (_id) {
duke@0 356 case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break;
duke@0 357 case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); break;
duke@0 358 default: ShouldNotReachHere();
duke@0 359 }
duke@0 360 __ bind(call_patch);
duke@0 361
duke@0 362 if (CommentedAssembly) {
duke@0 363 __ block_comment("patch entry point");
duke@0 364 }
duke@0 365 __ call(RuntimeAddress(target));
duke@0 366 assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
duke@0 367 ce->add_call_info_here(_info);
duke@0 368 int jmp_off = __ offset();
duke@0 369 __ jmp(_patch_site_entry);
duke@0 370 // Add enough nops so deoptimization can overwrite the jmp above with a call
duke@0 371 // and not destroy the world.
duke@0 372 for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) {
duke@0 373 __ nop();
duke@0 374 }
duke@0 375 if (_id == load_klass_id) {
duke@0 376 CodeSection* cs = __ code_section();
duke@0 377 RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1));
duke@0 378 relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, relocInfo::oop_type, relocInfo::none);
duke@0 379 }
duke@0 380 }
duke@0 381
duke@0 382
twisti@1382 383 void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
twisti@1382 384 __ bind(_entry);
twisti@1382 385 __ call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack_with_reexecution()));
twisti@1382 386 ce->add_call_info_here(_info);
twisti@1382 387 debug_only(__ should_not_reach_here());
twisti@1382 388 }
twisti@1382 389
twisti@1382 390
duke@0 391 void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
duke@0 392 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
duke@0 393 __ bind(_entry);
duke@0 394 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id)));
duke@0 395 ce->add_call_info_here(_info);
duke@0 396 debug_only(__ should_not_reach_here());
duke@0 397 }
duke@0 398
duke@0 399
duke@0 400 void SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
duke@0 401 assert(__ rsp_offset() == 0, "frame size should be fixed");
duke@0 402
duke@0 403 __ bind(_entry);
duke@0 404 // pass the object on stack because all registers must be preserved
duke@0 405 if (_obj->is_cpu_register()) {
duke@0 406 ce->store_parameter(_obj->as_register(), 0);
duke@0 407 }
duke@0 408 __ call(RuntimeAddress(Runtime1::entry_for(_stub)));
duke@0 409 ce->add_call_info_here(_info);
duke@0 410 debug_only(__ should_not_reach_here());
duke@0 411 }
duke@0 412
duke@0 413
duke@0 414 void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
duke@0 415 //---------------slow case: call to native-----------------
duke@0 416 __ bind(_entry);
duke@0 417 // Figure out where the args should go
duke@0 418 // This should really convert the IntrinsicID to the methodOop and signature
duke@0 419 // but I don't know how to do that.
duke@0 420 //
duke@0 421 VMRegPair args[5];
duke@0 422 BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT};
duke@0 423 SharedRuntime::java_calling_convention(signature, args, 5, true);
duke@0 424
duke@0 425 // push parameters
duke@0 426 // (src, src_pos, dest, destPos, length)
duke@0 427 Register r[5];
duke@0 428 r[0] = src()->as_register();
duke@0 429 r[1] = src_pos()->as_register();
duke@0 430 r[2] = dst()->as_register();
duke@0 431 r[3] = dst_pos()->as_register();
duke@0 432 r[4] = length()->as_register();
duke@0 433
duke@0 434 // next registers will get stored on the stack
duke@0 435 for (int i = 0; i < 5 ; i++ ) {
duke@0 436 VMReg r_1 = args[i].first();
duke@0 437 if (r_1->is_stack()) {
duke@0 438 int st_off = r_1->reg2stack() * wordSize;
never@307 439 __ movptr (Address(rsp, st_off), r[i]);
duke@0 440 } else {
duke@0 441 assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg ");
duke@0 442 }
duke@0 443 }
duke@0 444
duke@0 445 ce->align_call(lir_static_call);
duke@0 446
duke@0 447 ce->emit_static_call_stub();
duke@0 448 AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(),
duke@0 449 relocInfo::static_call_type);
duke@0 450 __ call(resolve);
duke@0 451 ce->add_call_info_here(info());
duke@0 452
duke@0 453 #ifndef PRODUCT
never@307 454 __ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt));
duke@0 455 #endif
duke@0 456
duke@0 457 __ jmp(_continuation);
duke@0 458 }
duke@0 459
ysr@345 460 /////////////////////////////////////////////////////////////////////////////
ysr@345 461 #ifndef SERIALGC
ysr@345 462
ysr@345 463 void G1PreBarrierStub::emit_code(LIR_Assembler* ce) {
ysr@345 464
ysr@345 465 // At this point we know that marking is in progress
ysr@345 466
ysr@345 467 __ bind(_entry);
ysr@345 468 assert(pre_val()->is_register(), "Precondition.");
ysr@345 469
ysr@345 470 Register pre_val_reg = pre_val()->as_register();
ysr@345 471
iveresov@2022 472 ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/);
ysr@345 473
apetrusenko@365 474 __ cmpptr(pre_val_reg, (int32_t) NULL_WORD);
ysr@345 475 __ jcc(Assembler::equal, _continuation);
ysr@345 476 ce->store_parameter(pre_val()->as_register(), 0);
ysr@345 477 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id)));
ysr@345 478 __ jmp(_continuation);
ysr@345 479
ysr@345 480 }
ysr@345 481
ysr@345 482 jbyte* G1PostBarrierStub::_byte_map_base = NULL;
ysr@345 483
ysr@345 484 jbyte* G1PostBarrierStub::byte_map_base_slow() {
ysr@345 485 BarrierSet* bs = Universe::heap()->barrier_set();
ysr@345 486 assert(bs->is_a(BarrierSet::G1SATBCTLogging),
ysr@345 487 "Must be if we're using this.");
ysr@345 488 return ((G1SATBCardTableModRefBS*)bs)->byte_map_base;
ysr@345 489 }
ysr@345 490
ysr@345 491 void G1PostBarrierStub::emit_code(LIR_Assembler* ce) {
ysr@345 492 __ bind(_entry);
ysr@345 493 assert(addr()->is_register(), "Precondition.");
ysr@345 494 assert(new_val()->is_register(), "Precondition.");
ysr@345 495 Register new_val_reg = new_val()->as_register();
apetrusenko@365 496 __ cmpptr(new_val_reg, (int32_t) NULL_WORD);
ysr@345 497 __ jcc(Assembler::equal, _continuation);
never@1898 498 ce->store_parameter(addr()->as_pointer_register(), 0);
ysr@345 499 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id)));
ysr@345 500 __ jmp(_continuation);
ysr@345 501 }
ysr@345 502
ysr@345 503 #endif // SERIALGC
ysr@345 504 /////////////////////////////////////////////////////////////////////////////
duke@0 505
duke@0 506 #undef __