--- a/make/aix/Makefile	Thu Mar 20 13:44:05 2014 -0700
+++ b/make/aix/Makefile	Tue Mar 25 12:32:07 2014 -0700
@@ -70,6 +70,10 @@
     FORCE_TIERED=1
   endif
 endif
+# C1 is not ported on ppc64(le), so we cannot build a tiered VM:
+ifneq (,$(filter $(ARCH),ppc64 pp64le))
+  FORCE_TIERED=0
+endif
 
 ifdef LP64
   ifeq ("$(filter $(LP64_ARCH),$(BUILDARCH))","")

--- a/make/aix/makefiles/adjust-mflags.sh	Thu Mar 20 13:44:05 2014 -0700
+++ b/make/aix/makefiles/adjust-mflags.sh	Tue Mar 25 12:32:07 2014 -0700
@@ -1,6 +1,6 @@
 #! /bin/sh
 #
-# Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -64,7 +64,7 @@
 	echo "$MFLAGS" \
 	| sed '
 		s/^-/ -/
-		s/ -\([^ 	][^ 	]*\)j/ -\1 -j/
+		s/ -\([^ 	I][^ 	I]*\)j/ -\1 -j/
 		s/ -j[0-9][0-9]*/ -j/
 		s/ -j\([^ 	]\)/ -j -\1/
 		s/ -j/ -j'${HOTSPOT_BUILD_JOBS:-${default_build_jobs}}'/

--- a/make/bsd/makefiles/gcc.make	Thu Mar 20 13:44:05 2014 -0700
+++ b/make/bsd/makefiles/gcc.make	Tue Mar 25 12:32:07 2014 -0700
@@ -260,7 +260,7 @@
   WARNINGS_ARE_ERRORS += -Wno-empty-body
 endif
 
-WARNING_FLAGS = -Wpointer-arith -Wsign-compare -Wundef -Wunused-function -Wformat=2 -Wno-error=format-nonliteral
+WARNING_FLAGS = -Wpointer-arith -Wsign-compare -Wundef -Wunused-function -Wformat=2
 
 ifeq ($(USE_CLANG),)
   # Since GCC 4.3, -Wconversion has changed its meanings to warn these implicit

--- a/make/linux/Makefile	Thu Mar 20 13:44:05 2014 -0700
+++ b/make/linux/Makefile	Tue Mar 25 12:32:07 2014 -0700
@@ -66,6 +66,10 @@
     FORCE_TIERED=1
   endif
 endif
+# C1 is not ported on ppc64(le), so we cannot build a tiered VM:
+ifneq (,$(filter $(ARCH),ppc64 pp64le))
+  FORCE_TIERED=0
+endif
 
 ifdef LP64
   ifeq ("$(filter $(LP64_ARCH),$(BUILDARCH))","")

--- a/make/linux/makefiles/gcc.make	Thu Mar 20 13:44:05 2014 -0700
+++ b/make/linux/makefiles/gcc.make	Tue Mar 25 12:32:07 2014 -0700
@@ -215,7 +215,7 @@
   WARNINGS_ARE_ERRORS += -Wno-return-type -Wno-empty-body
 endif
 
-WARNING_FLAGS = -Wpointer-arith -Wsign-compare -Wundef -Wunused-function -Wunused-value -Wformat=2 -Wno-error=format-nonliteral
+WARNING_FLAGS = -Wpointer-arith -Wsign-compare -Wundef -Wunused-function -Wunused-value -Wformat=2
 
 ifeq ($(USE_CLANG),)
   # Since GCC 4.3, -Wconversion has changed its meanings to warn these implicit

--- a/make/linux/makefiles/zeroshark.make	Thu Mar 20 13:44:05 2014 -0700
+++ b/make/linux/makefiles/zeroshark.make	Tue Mar 25 12:32:07 2014 -0700
@@ -25,6 +25,9 @@
 
 # Setup common to Zero (non-Shark) and Shark versions of VM
 
+# override this from the main file because some version of llvm do not like -Wundef
+WARNING_FLAGS = -Wpointer-arith -Wsign-compare -Wunused-function -Wunused-value
+
 # The copied fdlibm routines in sharedRuntimeTrig.o must not be optimized
 OPT_CFLAGS/sharedRuntimeTrig.o = $(OPT_CFLAGS/NOOPT)
 # The copied fdlibm routines in sharedRuntimeTrans.o must not be optimized

--- a/make/solaris/makefiles/gcc.make	Thu Mar 20 13:44:05 2014 -0700
+++ b/make/solaris/makefiles/gcc.make	Tue Mar 25 12:32:07 2014 -0700
@@ -118,7 +118,7 @@
 # Compiler warnings are treated as errors 
 WARNINGS_ARE_ERRORS = -Werror 
 # Enable these warnings. See 'info gcc' about details on these options
-WARNING_FLAGS = -Wpointer-arith -Wconversion -Wsign-compare -Wundef -Wformat=2 -Wno-error=format-nonliteral
+WARNING_FLAGS = -Wpointer-arith -Wconversion -Wsign-compare -Wundef -Wformat=2
 CFLAGS_WARN/DEFAULT = $(WARNINGS_ARE_ERRORS) $(WARNING_FLAGS)
 # Special cases 
 CFLAGS_WARN/BYFILE = $(CFLAGS_WARN/$@)$(CFLAGS_WARN/DEFAULT$(CFLAGS_WARN/$@))  

--- a/src/cpu/ppc/vm/assembler_ppc.hpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/assembler_ppc.hpp	Tue Mar 25 12:32:07 2014 -0700
@@ -124,6 +124,7 @@
   }
 };
 
+#if !defined(ABI_ELFv2)
 // A ppc64 function descriptor.
 struct FunctionDescriptor VALUE_OBJ_CLASS_SPEC {
  private:
@@ -161,6 +162,7 @@
     _env   = (address) 0xbad;
   }
 };
+#endif
 
 class Assembler : public AbstractAssembler {
  protected:
@@ -1067,6 +1069,7 @@
   // Emit an address.
   inline address emit_addr(const address addr = NULL);
 
+#if !defined(ABI_ELFv2)
   // Emit a function descriptor with the specified entry point, TOC,
   // and ENV. If the entry point is NULL, the descriptor will point
   // just past the descriptor.
@@ -1074,6 +1077,7 @@
   inline address emit_fd(address entry = NULL,
                          address toc = (address) FunctionDescriptor::friend_toc,
                          address env = (address) FunctionDescriptor::friend_env);
+#endif
 
   /////////////////////////////////////////////////////////////////////////////////////
   // PPC instructions

--- a/src/cpu/ppc/vm/assembler_ppc.inline.hpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/assembler_ppc.inline.hpp	Tue Mar 25 12:32:07 2014 -0700
@@ -55,6 +55,7 @@
   return start;
 }
 
+#if !defined(ABI_ELFv2)
 // Emit a function descriptor with the specified entry point, TOC, and
 // ENV. If the entry point is NULL, the descriptor will point just
 // past the descriptor.
@@ -73,6 +74,7 @@
 
   return (address)fd;
 }
+#endif
 
 // Issue an illegal instruction. 0 is guaranteed to be an illegal instruction.
 inline void Assembler::illtrap() { Assembler::emit_int32(0); }

--- a/src/cpu/ppc/vm/cppInterpreter_ppc.cpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/cppInterpreter_ppc.cpp	Tue Mar 25 12:32:07 2014 -0700
@@ -1136,7 +1136,9 @@
   // (outgoing C args), R3_ARG1 to R10_ARG8, and F1_ARG1 to
   // F13_ARG13.
   __ mr(R3_ARG1, R18_locals);
+#if !defined(ABI_ELFv2)
   __ ld(signature_handler_fd, 0, signature_handler_fd);
+#endif
   __ call_stub(signature_handler_fd);
   // reload method
   __ ld(R19_method, state_(_method));
@@ -1295,8 +1297,13 @@
   // native result acrosss the call. No oop is present
 
   __ mr(R3_ARG1, R16_thread);
+#if defined(ABI_ELFv2)
+  __ call_c(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans),
+            relocInfo::none);
+#else
   __ call_c(CAST_FROM_FN_PTR(FunctionDescriptor*, JavaThread::check_special_condition_for_native_trans),
             relocInfo::none);
+#endif
   __ bind(sync_check_done);
 
   //=============================================================================
@@ -1346,9 +1353,9 @@
   // notify here, we'll drop it on the floor.
 
   __ notify_method_exit(true/*native method*/,
-                        ilgl /*illegal state (not used for native methods)*/);
-
-
+                        ilgl /*illegal state (not used for native methods)*/,
+                        InterpreterMacroAssembler::NotifyJVMTI,
+                        false /*check_exceptions*/);
 
   //=============================================================================
   // Handle exceptions
@@ -1413,7 +1420,7 @@
   // First, pop to caller's frame.
   __ pop_interpreter_frame(R11_scratch1, R12_scratch2, R21_tmp1  /* set to return pc */, R22_tmp2);
 
-  __ push_frame_abi112(0, R11_scratch1);
+  __ push_frame_reg_args(0, R11_scratch1);
   // Get the address of the exception handler.
   __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address),
                   R16_thread,
@@ -2545,7 +2552,7 @@
   __ mr(R4_ARG2, R3_ARG1);  // ARG2 := ARG1
 
   // Find the address of the "catch_exception" stub.
-  __ push_frame_abi112(0, R11_scratch1);
+  __ push_frame_reg_args(0, R11_scratch1);
   __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address),
                   R16_thread,
                   R4_ARG2);

--- a/src/cpu/ppc/vm/frame_ppc.cpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/frame_ppc.cpp	Tue Mar 25 12:32:07 2014 -0700
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -42,10 +42,6 @@
 #include "runtime/vframeArray.hpp"
 #endif
 
-#ifndef CC_INTERP
-#error "CC_INTERP must be defined on PPC64"
-#endif
-
 #ifdef ASSERT
 void RegisterMap::check_location_valid() {
 }
@@ -89,7 +85,10 @@
 
 frame frame::sender_for_interpreter_frame(RegisterMap *map) const {
   // Pass callers initial_caller_sp as unextended_sp.
-  return frame(sender_sp(), sender_pc(), (intptr_t*)((parent_ijava_frame_abi *)callers_abi())->initial_caller_sp);
+  return frame(sender_sp(), sender_pc(),
+               CC_INTERP_ONLY((intptr_t*)((parent_ijava_frame_abi *)callers_abi())->initial_caller_sp)
+               NOT_CC_INTERP((intptr_t*)get_ijava_state()->sender_sp)
+               );
 }
 
 frame frame::sender_for_compiled_frame(RegisterMap *map) const {
@@ -183,6 +182,9 @@
     interpreterState istate = get_interpreterState();
     address lresult = (address)istate + in_bytes(BytecodeInterpreter::native_lresult_offset());
     address fresult = (address)istate + in_bytes(BytecodeInterpreter::native_fresult_offset());
+#else
+    address lresult = (address)&(get_ijava_state()->lresult);
+    address fresult = (address)&(get_ijava_state()->fresult);
 #endif
 
     switch (method->result_type()) {
@@ -259,7 +261,21 @@
     values.describe(frame_no, (intptr_t*)&(istate->_native_fresult), " native_fresult");
     values.describe(frame_no, (intptr_t*)&(istate->_native_lresult), " native_lresult");
 #else
-    Unimplemented();
+#define DESCRIBE_ADDRESS(name) \
+  values.describe(frame_no, (intptr_t*)&(get_ijava_state()->name), #name);
+
+      DESCRIBE_ADDRESS(method);
+      DESCRIBE_ADDRESS(locals);
+      DESCRIBE_ADDRESS(monitors);
+      DESCRIBE_ADDRESS(cpoolCache);
+      DESCRIBE_ADDRESS(bcp);
+      DESCRIBE_ADDRESS(esp);
+      DESCRIBE_ADDRESS(mdx);
+      DESCRIBE_ADDRESS(top_frame_sp);
+      DESCRIBE_ADDRESS(sender_sp);
+      DESCRIBE_ADDRESS(oop_tmp);
+      DESCRIBE_ADDRESS(lresult);
+      DESCRIBE_ADDRESS(fresult);
 #endif
   }
 }

--- a/src/cpu/ppc/vm/frame_ppc.hpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/frame_ppc.hpp	Tue Mar 25 12:32:07 2014 -0700
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -29,10 +29,6 @@
 #include "runtime/synchronizer.hpp"
 #include "utilities/top.hpp"
 
-#ifndef CC_INTERP
-#error "CC_INTERP must be defined on PPC64"
-#endif
-
   //  C frame layout on PPC-64.
   //
   //  In this figure the stack grows upwards, while memory grows
@@ -50,7 +46,7 @@
   //            [C_FRAME]
   //
   //  C_FRAME:
-  //    0       [ABI_112]
+  //    0       [ABI_REG_ARGS]
   //    112     CARG_9: outgoing arg 9 (arg_1 ... arg_8 via gpr_3 ... gpr_{10})
   //            ...
   //    40+M*8  CARG_M: outgoing arg M (M is the maximum of outgoing args taken over all call sites in the procedure)
@@ -77,7 +73,7 @@
   //    32      reserved
   //    40      space for TOC (=R2) register for next call
   //
-  //  ABI_112:
+  //  ABI_REG_ARGS:
   //    0       [ABI_48]
   //    48      CARG_1: spill slot for outgoing arg 1. used by next callee.
   //    ...     ...
@@ -95,23 +91,25 @@
     log_2_of_alignment_in_bits = 7
   };
 
-  // ABI_48:
-  struct abi_48 {
+  // ABI_MINFRAME:
+  struct abi_minframe {
     uint64_t callers_sp;
     uint64_t cr;                                  //_16
     uint64_t lr;
+#if !defined(ABI_ELFv2)
     uint64_t reserved1;                           //_16
     uint64_t reserved2;
+#endif
     uint64_t toc;                                 //_16
     // nothing to add here!
     // aligned to frame::alignment_in_bytes (16)
   };
 
   enum {
-    abi_48_size = sizeof(abi_48)
+    abi_minframe_size = sizeof(abi_minframe)
   };
 
-  struct abi_112 : abi_48 {
+  struct abi_reg_args : abi_minframe {
     uint64_t carg_1;
     uint64_t carg_2;                              //_16
     uint64_t carg_3;
@@ -124,13 +122,13 @@
   };
 
   enum {
-    abi_112_size = sizeof(abi_112)
+    abi_reg_args_size = sizeof(abi_reg_args)
   };
 
   #define _abi(_component) \
-          (offset_of(frame::abi_112, _component))
+          (offset_of(frame::abi_reg_args, _component))
 
-  struct abi_112_spill : abi_112 {
+  struct abi_reg_args_spill : abi_reg_args {
     // additional spill slots
     uint64_t spill_ret;
     uint64_t spill_fret;                          //_16
@@ -138,11 +136,11 @@
   };
 
   enum {
-    abi_112_spill_size = sizeof(abi_112_spill)
+    abi_reg_args_spill_size = sizeof(abi_reg_args_spill)
   };
 
-  #define _abi_112_spill(_component) \
-          (offset_of(frame::abi_112_spill, _component))
+  #define _abi_reg_args_spill(_component) \
+          (offset_of(frame::abi_reg_args_spill, _component))
 
   // non-volatile GPRs:
 
@@ -195,7 +193,85 @@
   #define _spill_nonvolatiles_neg(_component) \
      (int)(-frame::spill_nonvolatiles_size + offset_of(frame::spill_nonvolatiles, _component))
 
-  //  Frame layout for the Java interpreter on PPC64.
+
+
+#ifndef CC_INTERP
+  //  Frame layout for the Java template interpreter on PPC64.
+  //
+  //  Diffs to the CC_INTERP are marked with 'X'.
+  //
+  //  TOP_IJAVA_FRAME:
+  //
+  //    0       [TOP_IJAVA_FRAME_ABI]
+  //            alignment (optional)
+  //            [operand stack]
+  //            [monitors] (optional)
+  //           X[IJAVA_STATE]
+  //            note: own locals are located in the caller frame.
+  //
+  //  PARENT_IJAVA_FRAME:
+  //
+  //    0       [PARENT_IJAVA_FRAME_ABI]
+  //            alignment (optional)
+  //            [callee's Java result]
+  //            [callee's locals w/o arguments]
+  //            [outgoing arguments]
+  //            [used part of operand stack w/o arguments]
+  //            [monitors]      (optional)
+  //           X[IJAVA_STATE]
+  //
+
+  struct parent_ijava_frame_abi : abi_minframe {
+  };
+
+  enum {
+    parent_ijava_frame_abi_size = sizeof(parent_ijava_frame_abi)
+  };
+
+#define _parent_ijava_frame_abi(_component) \
+        (offset_of(frame::parent_ijava_frame_abi, _component))
+
+  struct top_ijava_frame_abi : abi_reg_args {
+  };
+
+  enum {
+    top_ijava_frame_abi_size = sizeof(top_ijava_frame_abi)
+  };
+
+#define _top_ijava_frame_abi(_component) \
+        (offset_of(frame::top_ijava_frame_abi, _component))
+
+  struct ijava_state {
+#ifdef ASSERT
+    uint64_t ijava_reserved;  // Used for assertion.
+    uint64_t ijava_reserved2; // Inserted for alignment.
+#endif
+    uint64_t method;
+    uint64_t locals;
+    uint64_t monitors;
+    uint64_t cpoolCache;
+    uint64_t bcp;
+    uint64_t esp;
+    uint64_t mdx;
+    uint64_t top_frame_sp; // Maybe define parent_frame_abi and move there.
+    uint64_t sender_sp;
+    // Slots only needed for native calls. Maybe better to move elsewhere.
+    uint64_t oop_tmp;
+    uint64_t lresult;
+    uint64_t fresult;
+    // Aligned to frame::alignment_in_bytes (16).
+  };
+
+  enum {
+    ijava_state_size = sizeof(ijava_state)
+  };
+
+#define _ijava_state_neg(_component) \
+        (int) (-frame::ijava_state_size + offset_of(frame::ijava_state, _component))
+
+#else // CC_INTERP:
+
+  //  Frame layout for the Java C++ interpreter on PPC64.
   //
   //  This frame layout provides a C-like frame for every Java frame.
   //
@@ -242,7 +318,7 @@
   //            [ENTRY_FRAME_LOCALS]
   //
   //  PARENT_IJAVA_FRAME_ABI:
-  //    0       [ABI_48]
+  //    0       [ABI_MINFRAME]
   //            top_frame_sp
   //            initial_caller_sp
   //
@@ -258,7 +334,7 @@
 
   // PARENT_IJAVA_FRAME_ABI
 
-  struct parent_ijava_frame_abi : abi_48 {
+  struct parent_ijava_frame_abi : abi_minframe {
     // SOE registers.
     // C2i adapters spill their top-frame stack-pointer here.
     uint64_t top_frame_sp;                        //      carg_1
@@ -285,7 +361,7 @@
     uint64_t carg_6_unused;                       //_16   carg_6
     uint64_t carg_7_unused;                       //      carg_7
     // Use arg8 for storing frame_manager_lr. The size of
-    // top_ijava_frame_abi must match abi_112.
+    // top_ijava_frame_abi must match abi_reg_args.
     uint64_t frame_manager_lr;                    //_16   carg_8
     // nothing to add here!
     // aligned to frame::alignment_in_bytes (16)
@@ -298,6 +374,8 @@
   #define _top_ijava_frame_abi(_component) \
           (offset_of(frame::top_ijava_frame_abi, _component))
 
+#endif // CC_INTERP
+
   // ENTRY_FRAME
 
   struct entry_frame_locals {
@@ -395,8 +473,8 @@
   intptr_t* fp() const { return _fp; }
 
   // Accessors for ABIs
-  inline abi_48* own_abi()     const { return (abi_48*) _sp; }
-  inline abi_48* callers_abi() const { return (abi_48*) _fp; }
+  inline abi_minframe* own_abi()     const { return (abi_minframe*) _sp; }
+  inline abi_minframe* callers_abi() const { return (abi_minframe*) _fp; }
 
  private:
 
@@ -421,6 +499,14 @@
 #ifdef CC_INTERP
   // Additional interface for interpreter frames:
   inline interpreterState get_interpreterState() const;
+#else
+  inline ijava_state* get_ijava_state() const;
+  // Some convenient register frame setters/getters for deoptimization.
+  inline intptr_t* interpreter_frame_esp() const;
+  inline void interpreter_frame_set_cpcache(ConstantPoolCache* cp);
+  inline void interpreter_frame_set_esp(intptr_t* esp);
+  inline void interpreter_frame_set_top_frame_sp(intptr_t* top_frame_sp);
+  inline void interpreter_frame_set_sender_sp(intptr_t* sender_sp);
 #endif // CC_INTERP
 
   // Size of a monitor in bytes.

--- a/src/cpu/ppc/vm/frame_ppc.inline.hpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/frame_ppc.inline.hpp	Tue Mar 25 12:32:07 2014 -0700
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,10 +26,6 @@
 #ifndef CPU_PPC_VM_FRAME_PPC_INLINE_HPP
 #define CPU_PPC_VM_FRAME_PPC_INLINE_HPP
 
-#ifndef CC_INTERP
-#error "CC_INTERP must be defined on PPC64"
-#endif
-
 // Inline functions for ppc64 frames:
 
 // Find codeblob and set deopt_state.
@@ -199,6 +195,75 @@
   interpreterState istate = get_interpreterState();
   return &istate->_constants;
 }
+
+#else // !CC_INTERP
+
+// Template Interpreter frame value accessors.
+
+inline frame::ijava_state* frame::get_ijava_state() const {
+  return (ijava_state*) ((uintptr_t)fp() - ijava_state_size);
+}
+
+inline intptr_t** frame::interpreter_frame_locals_addr() const {
+  return (intptr_t**) &(get_ijava_state()->locals);
+}
+inline intptr_t* frame::interpreter_frame_bcx_addr() const {
+  return (intptr_t*) &(get_ijava_state()->bcp);
+}
+inline intptr_t* frame::interpreter_frame_mdx_addr() const {
+  return (intptr_t*) &(get_ijava_state()->mdx);
+}
+// Pointer beyond the "oldest/deepest" BasicObjectLock on stack.
+inline BasicObjectLock* frame::interpreter_frame_monitor_end() const {
+  return (BasicObjectLock *) get_ijava_state()->monitors;
+}
+
+inline BasicObjectLock* frame::interpreter_frame_monitor_begin() const {
+  return (BasicObjectLock *) get_ijava_state();
+}
+
+// SAPJVM ASc 2012-11-21. Return register stack slot addr at which currently interpreted method is found
+inline Method** frame::interpreter_frame_method_addr() const {
+  return (Method**) &(get_ijava_state()->method);
+}
+inline ConstantPoolCache** frame::interpreter_frame_cpoolcache_addr() const {
+  return (ConstantPoolCache**) &(get_ijava_state()->cpoolCache);
+}
+inline ConstantPoolCache** frame::interpreter_frame_cache_addr() const {
+  return (ConstantPoolCache**) &(get_ijava_state()->cpoolCache);
+}
+
+inline oop* frame::interpreter_frame_temp_oop_addr() const {
+  return (oop *) &(get_ijava_state()->oop_tmp);
+}
+inline intptr_t* frame::interpreter_frame_esp() const {
+  return (intptr_t*) get_ijava_state()->esp;
+}
+
+// Convenient setters
+inline void frame::interpreter_frame_set_monitor_end(BasicObjectLock* end)    { get_ijava_state()->monitors = (intptr_t) end;}
+inline void frame::interpreter_frame_set_cpcache(ConstantPoolCache* cp)       { *frame::interpreter_frame_cpoolcache_addr() = cp; }
+inline void frame::interpreter_frame_set_esp(intptr_t* esp)                   { get_ijava_state()->esp = (intptr_t) esp; }
+inline void frame::interpreter_frame_set_top_frame_sp(intptr_t* top_frame_sp) { get_ijava_state()->top_frame_sp = (intptr_t) top_frame_sp; }
+inline void frame::interpreter_frame_set_sender_sp(intptr_t* sender_sp)       { get_ijava_state()->sender_sp = (intptr_t) sender_sp; }
+
+inline intptr_t* frame::interpreter_frame_expression_stack() const {
+  return (intptr_t*)interpreter_frame_monitor_end() - 1;
+}
+
+inline jint frame::interpreter_frame_expression_stack_direction() {
+  return -1;
+}
+
+// top of expression stack
+inline intptr_t* frame::interpreter_frame_tos_address() const {
+  return ((intptr_t*) get_ijava_state()->esp) + Interpreter::stackElementWords;
+}
+
+inline intptr_t* frame::interpreter_frame_tos_at(jint offset) const {
+  return &interpreter_frame_tos_address()[offset];
+}
+
 #endif // CC_INTERP
 
 inline int frame::interpreter_frame_monitor_size() {

--- a/src/cpu/ppc/vm/interp_masm_ppc_64.cpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/interp_masm_ppc_64.cpp	Tue Mar 25 12:32:07 2014 -0700
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -29,6 +29,7 @@
 #include "asm/macroAssembler.inline.hpp"
 #include "interp_masm_ppc_64.hpp"
 #include "interpreter/interpreterRuntime.hpp"
+#include "prims/jvmtiThreadState.hpp"
 
 #ifdef PRODUCT
 #define BLOCK_COMMENT(str) // nothing
@@ -45,6 +46,691 @@
   MacroAssembler::null_check_throw(a, offset, temp_reg, exception_entry);
 }
 
+void InterpreterMacroAssembler::branch_to_entry(address entry, Register Rscratch) {
+  assert(entry, "Entry must have been generated by now");
+  if (is_within_range_of_b(entry, pc())) {
+    b(entry);
+  } else {
+    load_const_optimized(Rscratch, entry, R0);
+    mtctr(Rscratch);
+    bctr();
+  }
+}
+
+#ifndef CC_INTERP
+
+void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
+  Register bytecode = R12_scratch2;
+  if (bcp_incr != 0) {
+    lbzu(bytecode, bcp_incr, R14_bcp);
+  } else {
+    lbz(bytecode, 0, R14_bcp);
+  }
+
+  dispatch_Lbyte_code(state, bytecode, Interpreter::dispatch_table(state));
+}
+
+void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
+  // Load current bytecode.
+  Register bytecode = R12_scratch2;
+  lbz(bytecode, 0, R14_bcp);
+  dispatch_Lbyte_code(state, bytecode, table);
+}
+
+// Dispatch code executed in the prolog of a bytecode which does not do it's
+// own dispatch. The dispatch address is computed and placed in R24_dispatch_addr.
+void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) {
+  Register bytecode = R12_scratch2;
+  lbz(bytecode, bcp_incr, R14_bcp);
+
+  load_dispatch_table(R24_dispatch_addr, Interpreter::dispatch_table(state));
+
+  sldi(bytecode, bytecode, LogBytesPerWord);
+  ldx(R24_dispatch_addr, R24_dispatch_addr, bytecode);
+}
+
+// Dispatch code executed in the epilog of a bytecode which does not do it's
+// own dispatch. The dispatch address in R24_dispatch_addr is used for the
+// dispatch.
+void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
+  mtctr(R24_dispatch_addr);
+  addi(R14_bcp, R14_bcp, bcp_incr);
+  bctr();
+}
+
+void InterpreterMacroAssembler::check_and_handle_popframe(Register scratch_reg) {
+  assert(scratch_reg != R0, "can't use R0 as scratch_reg here");
+  if (JvmtiExport::can_pop_frame()) {
+    Label L;
+
+    // Check the "pending popframe condition" flag in the current thread.
+    lwz(scratch_reg, in_bytes(JavaThread::popframe_condition_offset()), R16_thread);
+
+    // Initiate popframe handling only if it is not already being
+    // processed. If the flag has the popframe_processing bit set, it
+    // means that this code is called *during* popframe handling - we
+    // don't want to reenter.
+    andi_(R0, scratch_reg, JavaThread::popframe_pending_bit);
+    beq(CCR0, L);
+
+    andi_(R0, scratch_reg, JavaThread::popframe_processing_bit);
+    bne(CCR0, L);
+
+    // Call the Interpreter::remove_activation_preserving_args_entry()
+    // func to get the address of the same-named entrypoint in the
+    // generated interpreter code.
+    call_c(CAST_FROM_FN_PTR(FunctionDescriptor*,
+                            Interpreter::remove_activation_preserving_args_entry),
+           relocInfo::none);
+
+    // Jump to Interpreter::_remove_activation_preserving_args_entry.
+    mtctr(R3_RET);
+    bctr();
+
+    align(32, 12);
+    bind(L);
+  }
+}
+
+void InterpreterMacroAssembler::check_and_handle_earlyret(Register scratch_reg) {
+  const Register Rthr_state_addr = scratch_reg;
+  if (JvmtiExport::can_force_early_return()) {
+    Label Lno_early_ret;
+    ld(Rthr_state_addr, in_bytes(JavaThread::jvmti_thread_state_offset()), R16_thread);
+    cmpdi(CCR0, Rthr_state_addr, 0);
+    beq(CCR0, Lno_early_ret);
+
+    lwz(R0, in_bytes(JvmtiThreadState::earlyret_state_offset()), Rthr_state_addr);
+    cmpwi(CCR0, R0, JvmtiThreadState::earlyret_pending);
+    bne(CCR0, Lno_early_ret);
+
+    // Jump to Interpreter::_earlyret_entry.
+    lwz(R3_ARG1, in_bytes(JvmtiThreadState::earlyret_tos_offset()), Rthr_state_addr);
+    call_VM_leaf(CAST_FROM_FN_PTR(address, Interpreter::remove_activation_early_entry));
+    mtlr(R3_RET);
+    blr();
+
+    align(32, 12);
+    bind(Lno_early_ret);
+  }
+}
+
+void InterpreterMacroAssembler::load_earlyret_value(TosState state, Register Rscratch1) {
+  const Register RjvmtiState = Rscratch1;
+  const Register Rscratch2   = R0;
+
+  ld(RjvmtiState, in_bytes(JavaThread::jvmti_thread_state_offset()), R16_thread);
+  li(Rscratch2, 0);
+
+  switch (state) {
+    case atos: ld(R17_tos, in_bytes(JvmtiThreadState::earlyret_oop_offset()), RjvmtiState);
+               std(Rscratch2, in_bytes(JvmtiThreadState::earlyret_oop_offset()), RjvmtiState);
+               break;
+    case ltos: ld(R17_tos, in_bytes(JvmtiThreadState::earlyret_value_offset()), RjvmtiState);
+               break;
+    case btos: // fall through
+    case ctos: // fall through
+    case stos: // fall through
+    case itos: lwz(R17_tos, in_bytes(JvmtiThreadState::earlyret_value_offset()), RjvmtiState);
+               break;
+    case ftos: lfs(F15_ftos, in_bytes(JvmtiThreadState::earlyret_value_offset()), RjvmtiState);
+               break;
+    case dtos: lfd(F15_ftos, in_bytes(JvmtiThreadState::earlyret_value_offset()), RjvmtiState);
+               break;
+    case vtos: break;
+    default  : ShouldNotReachHere();
+  }
+
+  // Clean up tos value in the jvmti thread state.
+  std(Rscratch2, in_bytes(JvmtiThreadState::earlyret_value_offset()), RjvmtiState);
+  // Set tos state field to illegal value.
+  li(Rscratch2, ilgl);
+  stw(Rscratch2, in_bytes(JvmtiThreadState::earlyret_tos_offset()), RjvmtiState);
+}
+
+// Common code to dispatch and dispatch_only.
+// Dispatch value in Lbyte_code and increment Lbcp.
+
+void InterpreterMacroAssembler::load_dispatch_table(Register dst, address* table) {
+  address table_base = (address)Interpreter::dispatch_table((TosState)0);
+  intptr_t table_offs = (intptr_t)table - (intptr_t)table_base;
+  if (is_simm16(table_offs)) {
+    addi(dst, R25_templateTableBase, (int)table_offs);
+  } else {
+    load_const_optimized(dst, table, R0);
+  }
+}
+
+void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, Register bytecode, address* table, bool verify) {
+  if (verify) {
+    unimplemented("dispatch_Lbyte_code: verify"); // See Sparc Implementation to implement this
+  }
+
+#ifdef FAST_DISPATCH
+  unimplemented("dispatch_Lbyte_code FAST_DISPATCH");
+#else
+  assert_different_registers(bytecode, R11_scratch1);
+
+  // Calc dispatch table address.
+  load_dispatch_table(R11_scratch1, table);
+
+  sldi(R12_scratch2, bytecode, LogBytesPerWord);
+  ldx(R11_scratch1, R11_scratch1, R12_scratch2);
+
+  // Jump off!
+  mtctr(R11_scratch1);
+  bctr();
+#endif
+}
+
+void InterpreterMacroAssembler::load_receiver(Register Rparam_count, Register Rrecv_dst) {
+  sldi(Rrecv_dst, Rparam_count, Interpreter::logStackElementSize);
+  ldx(Rrecv_dst, Rrecv_dst, R15_esp);
+}
+
+// helpers for expression stack
+
+void InterpreterMacroAssembler::pop_i(Register r) {
+  lwzu(r, Interpreter::stackElementSize, R15_esp);
+}
+
+void InterpreterMacroAssembler::pop_ptr(Register r) {
+  ldu(r, Interpreter::stackElementSize, R15_esp);
+}
+
+void InterpreterMacroAssembler::pop_l(Register r) {
+  ld(r, Interpreter::stackElementSize, R15_esp);
+  addi(R15_esp, R15_esp, 2 * Interpreter::stackElementSize);
+}
+
+void InterpreterMacroAssembler::pop_f(FloatRegister f) {
+  lfsu(f, Interpreter::stackElementSize, R15_esp);
+}
+
+void InterpreterMacroAssembler::pop_d(FloatRegister f) {
+  lfd(f, Interpreter::stackElementSize, R15_esp);
+  addi(R15_esp, R15_esp, 2 * Interpreter::stackElementSize);
+}
+
+void InterpreterMacroAssembler::push_i(Register r) {
+  stw(r, 0, R15_esp);
+  addi(R15_esp, R15_esp, - Interpreter::stackElementSize );
+}
+
+void InterpreterMacroAssembler::push_ptr(Register r) {
+  std(r, 0, R15_esp);
+  addi(R15_esp, R15_esp, - Interpreter::stackElementSize );
+}
+
+void InterpreterMacroAssembler::push_l(Register r) {
+  std(r, - Interpreter::stackElementSize, R15_esp);
+  addi(R15_esp, R15_esp, - 2 * Interpreter::stackElementSize );
+}
+
+void InterpreterMacroAssembler::push_f(FloatRegister f) {
+  stfs(f, 0, R15_esp);
+  addi(R15_esp, R15_esp, - Interpreter::stackElementSize );
+}
+
+void InterpreterMacroAssembler::push_d(FloatRegister f)   {
+  stfd(f, - Interpreter::stackElementSize, R15_esp);
+  addi(R15_esp, R15_esp, - 2 * Interpreter::stackElementSize );
+}
+
+void InterpreterMacroAssembler::push_2ptrs(Register first, Register second) {
+  std(first, 0, R15_esp);
+  std(second, -Interpreter::stackElementSize, R15_esp);
+  addi(R15_esp, R15_esp, - 2 * Interpreter::stackElementSize );
+}
+
+void InterpreterMacroAssembler::push_l_pop_d(Register l, FloatRegister d) {
+  std(l, 0, R15_esp);
+  lfd(d, 0, R15_esp);
+}
+
+void InterpreterMacroAssembler::push_d_pop_l(FloatRegister d, Register l) {
+  stfd(d, 0, R15_esp);
+  ld(l, 0, R15_esp);
+}
+
+void InterpreterMacroAssembler::push(TosState state) {
+  switch (state) {
+    case atos: push_ptr();                break;
+    case btos:
+    case ctos:
+    case stos:
+    case itos: push_i();                  break;
+    case ltos: push_l();                  break;
+    case ftos: push_f();                  break;
+    case dtos: push_d();                  break;
+    case vtos: /* nothing to do */        break;
+    default  : ShouldNotReachHere();
+  }
+}
+
+void InterpreterMacroAssembler::pop(TosState state) {
+  switch (state) {
+    case atos: pop_ptr();            break;
+    case btos:
+    case ctos:
+    case stos:
+    case itos: pop_i();              break;
+    case ltos: pop_l();              break;
+    case ftos: pop_f();              break;
+    case dtos: pop_d();              break;
+    case vtos: /* nothing to do */   break;
+    default  : ShouldNotReachHere();
+  }
+  verify_oop(R17_tos, state);
+}
+
+void InterpreterMacroAssembler::empty_expression_stack() {
+  addi(R15_esp, R26_monitor, - Interpreter::stackElementSize);
+}
+
+void InterpreterMacroAssembler::get_2_byte_integer_at_bcp(int         bcp_offset,
+                                                          Register    Rdst,
+                                                          signedOrNot is_signed) {
+  // Read Java big endian format.
+  if (is_signed == Signed) {
+    lha(Rdst, bcp_offset, R14_bcp);
+  } else {
+    lhz(Rdst, bcp_offset, R14_bcp);
+  }
+#if 0
+  assert(Rtmp != Rdst, "need separate temp register");
+  Register Rfirst = Rtmp;
+  lbz(Rfirst, bcp_offset, R14_bcp); // first byte
+  lbz(Rdst, bcp_offset+1, R14_bcp); // second byte
+
+  // Rdst = ((Rfirst<<8) & 0xFF00) | (Rdst &~ 0xFF00)
+  rldimi(/*RA=*/Rdst, /*RS=*/Rfirst, /*sh=*/8, /*mb=*/48);
+  if (is_signed == Signed) {
+    extsh(Rdst, Rdst);
+  }
+#endif
+}
+
+void InterpreterMacroAssembler::get_4_byte_integer_at_bcp(int         bcp_offset,
+                                                          Register    Rdst,
+                                                          signedOrNot is_signed) {
+  // Read Java big endian format.
+  if (bcp_offset & 3) { // Offset unaligned?
+    load_const_optimized(Rdst, bcp_offset);
+    if (is_signed == Signed) {
+      lwax(Rdst, R14_bcp, Rdst);
+    } else {
+      lwzx(Rdst, R14_bcp, Rdst);
+    }
+  } else {
+    if (is_signed == Signed) {
+      lwa(Rdst, bcp_offset, R14_bcp);
+    } else {
+      lwz(Rdst, bcp_offset, R14_bcp);
+    }
+  }
+}
+
+// Load the constant pool cache index from the bytecode stream.
+//
+// Kills / writes:
+//   - Rdst, Rscratch
+void InterpreterMacroAssembler::get_cache_index_at_bcp(Register Rdst, int bcp_offset, size_t index_size) {
+  assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
+  if (index_size == sizeof(u2)) {
+    get_2_byte_integer_at_bcp(bcp_offset, Rdst, Unsigned);
+  } else if (index_size == sizeof(u4)) {
+    assert(EnableInvokeDynamic, "giant index used only for JSR 292");
+    get_4_byte_integer_at_bcp(bcp_offset, Rdst, Signed);
+    assert(ConstantPool::decode_invokedynamic_index(~123) == 123, "else change next line");
+    nand(Rdst, Rdst, Rdst); // convert to plain index
+  } else if (index_size == sizeof(u1)) {
+    lbz(Rdst, bcp_offset, R14_bcp);
+  } else {
+    ShouldNotReachHere();
+  }
+  // Rdst now contains cp cache index.
+}
+
+void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, int bcp_offset, size_t index_size) {
+  get_cache_index_at_bcp(cache, bcp_offset, index_size);
+  sldi(cache, cache, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord));
+  add(cache, R27_constPoolCache, cache);
+}
+
+// Load object from cpool->resolved_references(index).
+void InterpreterMacroAssembler::load_resolved_reference_at_index(Register result, Register index) {
+  assert_different_registers(result, index);
+  get_constant_pool(result);
+
+  // Convert from field index to resolved_references() index and from
+  // word index to byte offset. Since this is a java object, it can be compressed.
+  Register tmp = index;  // reuse
+  sldi(tmp, index, LogBytesPerHeapOop);
+  // Load pointer for resolved_references[] objArray.
+  ld(result, ConstantPool::resolved_references_offset_in_bytes(), result);
+  // JNIHandles::resolve(result)
+  ld(result, 0, result);
+#ifdef ASSERT
+  Label index_ok;
+  lwa(R0, arrayOopDesc::length_offset_in_bytes(), result);
+  sldi(R0, R0, LogBytesPerHeapOop);
+  cmpd(CCR0, tmp, R0);
+  blt(CCR0, index_ok);
+  stop("resolved reference index out of bounds", 0x09256);
+  bind(index_ok);
+#endif
+  // Add in the index.
+  add(result, tmp, result);
+  load_heap_oop(result, arrayOopDesc::base_offset_in_bytes(T_OBJECT), result);
+}
+
+// Generate a subtype check: branch to ok_is_subtype if sub_klass is
+// a subtype of super_klass. Blows registers Rsub_klass, tmp1, tmp2.
+void InterpreterMacroAssembler::gen_subtype_check(Register Rsub_klass, Register Rsuper_klass, Register Rtmp1,
+                                                  Register Rtmp2, Register Rtmp3, Label &ok_is_subtype) {
+  // Profile the not-null value's klass.
+  profile_typecheck(Rsub_klass, Rtmp1, Rtmp2);
+  check_klass_subtype(Rsub_klass, Rsuper_klass, Rtmp1, Rtmp2, ok_is_subtype);
+  profile_typecheck_failed(Rtmp1, Rtmp2);
+}
+
+void InterpreterMacroAssembler::generate_stack_overflow_check_with_compare_and_throw(Register Rmem_frame_size, Register Rscratch1) {
+  Label done;
+  sub(Rmem_frame_size, R1_SP, Rmem_frame_size);
+  ld(Rscratch1, thread_(stack_overflow_limit));
+  cmpld(CCR0/*is_stack_overflow*/, Rmem_frame_size, Rscratch1);
+  bgt(CCR0/*is_stack_overflow*/, done);
+
+  // Load target address of the runtime stub.
+  assert(StubRoutines::throw_StackOverflowError_entry() != NULL, "generated in wrong order");
+  load_const_optimized(Rscratch1, (StubRoutines::throw_StackOverflowError_entry()), R0);
+  mtctr(Rscratch1);
+  // Restore caller_sp.
+#ifdef ASSERT
+  ld(Rscratch1, 0, R1_SP);
+  ld(R0, 0, R21_sender_SP);
+  cmpd(CCR0, R0, Rscratch1);
+  asm_assert_eq("backlink", 0x547);
+#endif // ASSERT
+  mr(R1_SP, R21_sender_SP);
+  bctr();
+
+  align(32, 12);
+  bind(done);
+}
+
+// Separate these two to allow for delay slot in middle.
+// These are used to do a test and full jump to exception-throwing code.
+
+// Check that index is in range for array, then shift index by index_shift,
+// and put arrayOop + shifted_index into res.
+// Note: res is still shy of address by array offset into object.
+
+void InterpreterMacroAssembler::index_check_without_pop(Register Rarray, Register Rindex, int index_shift, Register Rtmp, Register Rres) {
+  // Check that index is in range for array, then shift index by index_shift,
+  // and put arrayOop + shifted_index into res.
+  // Note: res is still shy of address by array offset into object.
+  // Kills:
+  //   - Rindex
+  // Writes:
+  //   - Rres: Address that corresponds to the array index if check was successful.
+  verify_oop(Rarray);
+  const Register Rlength   = R0;
+  const Register RsxtIndex = Rtmp;
+  Label LisNull, LnotOOR;
+
+  // Array nullcheck
+  if (!ImplicitNullChecks) {
+    cmpdi(CCR0, Rarray, 0);
+    beq(CCR0, LisNull);
+  } else {
+    null_check_throw(Rarray, arrayOopDesc::length_offset_in_bytes(), /*temp*/RsxtIndex);
+  }
+
+  // Rindex might contain garbage in upper bits (remember that we don't sign extend
+  // during integer arithmetic operations). So kill them and put value into same register
+  // where ArrayIndexOutOfBounds would expect the index in.
+  rldicl(RsxtIndex, Rindex, 0, 32); // zero extend 32 bit -> 64 bit
+
+  // Index check
+  lwz(Rlength, arrayOopDesc::length_offset_in_bytes(), Rarray);
+  cmplw(CCR0, Rindex, Rlength);
+  sldi(RsxtIndex, RsxtIndex, index_shift);
+  blt(CCR0, LnotOOR);
+  load_dispatch_table(Rtmp, (address*)Interpreter::_throw_ArrayIndexOutOfBoundsException_entry);
+  mtctr(Rtmp);
+  bctr();
+
+  if (!ImplicitNullChecks) {
+    bind(LisNull);
+    load_dispatch_table(Rtmp, (address*)Interpreter::_throw_NullPointerException_entry);
+    mtctr(Rtmp);
+    bctr();
+  }
+
+  align(32, 16);
+  bind(LnotOOR);
+
+  // Calc address
+  add(Rres, RsxtIndex, Rarray);
+}
+
+void InterpreterMacroAssembler::index_check(Register array, Register index, int index_shift, Register tmp, Register res) {
+  // pop array
+  pop_ptr(array);
+
+  // check array
+  index_check_without_pop(array, index, index_shift, tmp, res);
+}
+
+void InterpreterMacroAssembler::get_const(Register Rdst) {
+  ld(Rdst, in_bytes(Method::const_offset()), R19_method);
+}
+
+void InterpreterMacroAssembler::get_constant_pool(Register Rdst) {
+  get_const(Rdst);
+  ld(Rdst, in_bytes(ConstMethod::constants_offset()), Rdst);
+}
+
+void InterpreterMacroAssembler::get_constant_pool_cache(Register Rdst) {
+  get_constant_pool(Rdst);
+  ld(Rdst, ConstantPool::cache_offset_in_bytes(), Rdst);
+}
+
+void InterpreterMacroAssembler::get_cpool_and_tags(Register Rcpool, Register Rtags) {
+  get_constant_pool(Rcpool);
+  ld(Rtags, ConstantPool::tags_offset_in_bytes(), Rcpool);
+}
+
+// Unlock if synchronized method.
+//
+// Unlock the receiver if this is a synchronized method.
+// Unlock any Java monitors from synchronized blocks.
+//
+// If there are locked Java monitors
+//   If throw_monitor_exception
+//     throws IllegalMonitorStateException
+//   Else if install_monitor_exception
+//     installs IllegalMonitorStateException
+//   Else
+//     no error processing
+void InterpreterMacroAssembler::unlock_if_synchronized_method(TosState state,
+                                                              bool throw_monitor_exception,
+                                                              bool install_monitor_exception) {
+  Label Lunlocked, Lno_unlock;
+  {
+    Register Rdo_not_unlock_flag = R11_scratch1;
+    Register Raccess_flags       = R12_scratch2;
+
+    // Check if synchronized method or unlocking prevented by
+    // JavaThread::do_not_unlock_if_synchronized flag.
+    lbz(Rdo_not_unlock_flag, in_bytes(JavaThread::do_not_unlock_if_synchronized_offset()), R16_thread);
+    lwz(Raccess_flags, in_bytes(Method::access_flags_offset()), R19_method);
+    li(R0, 0);
+    stb(R0, in_bytes(JavaThread::do_not_unlock_if_synchronized_offset()), R16_thread); // reset flag
+
+    push(state);
+
+    // Skip if we don't have to unlock.
+    rldicl_(R0, Raccess_flags, 64-JVM_ACC_SYNCHRONIZED_BIT, 63); // Extract bit and compare to 0.
+    beq(CCR0, Lunlocked);
+
+    cmpwi(CCR0, Rdo_not_unlock_flag, 0);
+    bne(CCR0, Lno_unlock);
+  }
+
+  // Unlock
+  {
+    Register Rmonitor_base = R11_scratch1;
+
+    Label Lunlock;
+    // If it's still locked, everything is ok, unlock it.
+    ld(Rmonitor_base, 0, R1_SP);
+    addi(Rmonitor_base, Rmonitor_base, - (frame::ijava_state_size + frame::interpreter_frame_monitor_size_in_bytes())); // Monitor base
+
+    ld(R0, BasicObjectLock::obj_offset_in_bytes(), Rmonitor_base);
+    cmpdi(CCR0, R0, 0);
+    bne(CCR0, Lunlock);
+
+    // If it's already unlocked, throw exception.
+    if (throw_monitor_exception) {
+      call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
+      should_not_reach_here();
+    } else {
+      if (install_monitor_exception) {
+        call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
+        b(Lunlocked);
+      }
+    }
+
+    bind(Lunlock);
+    unlock_object(Rmonitor_base);
+  }
+
+  // Check that all other monitors are unlocked. Throw IllegelMonitorState exception if not.
+  bind(Lunlocked);
+  {
+    Label Lexception, Lrestart;
+    Register Rcurrent_obj_addr = R11_scratch1;
+    const int delta = frame::interpreter_frame_monitor_size_in_bytes();
+    assert((delta & LongAlignmentMask) == 0, "sizeof BasicObjectLock must be even number of doublewords");
+
+    bind(Lrestart);
+    // Set up search loop: Calc num of iterations.
+    {
+      Register Riterations = R12_scratch2;
+      Register Rmonitor_base = Rcurrent_obj_addr;
+      ld(Rmonitor_base, 0, R1_SP);
+      addi(Rmonitor_base, Rmonitor_base, - frame::ijava_state_size);  // Monitor base
+
+      subf_(Riterations, R26_monitor, Rmonitor_base);
+      ble(CCR0, Lno_unlock);
+
+      addi(Rcurrent_obj_addr, Rmonitor_base, BasicObjectLock::obj_offset_in_bytes() - frame::interpreter_frame_monitor_size_in_bytes());
+      // Check if any monitor is on stack, bail out if not
+      srdi(Riterations, Riterations, exact_log2(delta));
+      mtctr(Riterations);
+    }
+
+    // The search loop: Look for locked monitors.
+    {
+      const Register Rcurrent_obj = R0;
+      Label Lloop;
+
+      ld(Rcurrent_obj, 0, Rcurrent_obj_addr);
+      addi(Rcurrent_obj_addr, Rcurrent_obj_addr, -delta);
+      bind(Lloop);
+
+      // Check if current entry is used.
+      cmpdi(CCR0, Rcurrent_obj, 0);
+      bne(CCR0, Lexception);
+      // Preload next iteration's compare value.
+      ld(Rcurrent_obj, 0, Rcurrent_obj_addr);
+      addi(Rcurrent_obj_addr, Rcurrent_obj_addr, -delta);
+      bdnz(Lloop);
+    }
+    // Fell through: Everything's unlocked => finish.
+    b(Lno_unlock);
+
+    // An object is still locked => need to throw exception.
+    bind(Lexception);
+    if (throw_monitor_exception) {
+      call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
+      should_not_reach_here();
+    } else {
+      // Stack unrolling. Unlock object and if requested, install illegal_monitor_exception.
+      // Unlock does not block, so don't have to worry about the frame.
+      Register Rmonitor_addr = R11_scratch1;
+      addi(Rmonitor_addr, Rcurrent_obj_addr, -BasicObjectLock::obj_offset_in_bytes() + delta);
+      unlock_object(Rmonitor_addr);
+      if (install_monitor_exception) {
+        call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
+      }
+      b(Lrestart);
+    }
+  }
+
+  align(32, 12);
+  bind(Lno_unlock);
+  pop(state);
+}
+
+// Support function for remove_activation & Co.
+void InterpreterMacroAssembler::merge_frames(Register Rsender_sp, Register return_pc, Register Rscratch1, Register Rscratch2) {
+  // Pop interpreter frame.
+  ld(Rscratch1, 0, R1_SP); // *SP
+  ld(Rsender_sp, _ijava_state_neg(sender_sp), Rscratch1); // top_frame_sp
+  ld(Rscratch2, 0, Rscratch1); // **SP
+#ifdef ASSERT
+  {
+    Label Lok;
+    ld(R0, _ijava_state_neg(ijava_reserved), Rscratch1);
+    cmpdi(CCR0, R0, 0x5afe);
+    beq(CCR0, Lok);
+    stop("frame corrupted (remove activation)", 0x5afe);
+    bind(Lok);
+  }
+#endif
+  if (return_pc!=noreg) {
+    ld(return_pc, _abi(lr), Rscratch1); // LR
+  }
+
+  // Merge top frames.
+  subf(Rscratch1, R1_SP, Rsender_sp); // top_frame_sp - SP
+  stdux(Rscratch2, R1_SP, Rscratch1); // atomically set *(SP = top_frame_sp) = **SP
+}
+
+// Remove activation.
+//
+// Unlock the receiver if this is a synchronized method.
+// Unlock any Java monitors from synchronized blocks.
+// Remove the activation from the stack.
+//
+// If there are locked Java monitors
+//    If throw_monitor_exception
+//       throws IllegalMonitorStateException
+//    Else if install_monitor_exception
+//       installs IllegalMonitorStateException
+//    Else
+//       no error processing
+void InterpreterMacroAssembler::remove_activation(TosState state,
+                                                  bool throw_monitor_exception,
+                                                  bool install_monitor_exception) {
+  unlock_if_synchronized_method(state, throw_monitor_exception, install_monitor_exception);
+
+  // Save result (push state before jvmti call and pop it afterwards) and notify jvmti.
+  notify_method_exit(false, state, NotifyJVMTI, true);
+
+  verify_oop(R17_tos, state);
+  verify_thread();
+
+  merge_frames(/*top_frame_sp*/ R21_sender_SP, /*return_pc*/ R0, R11_scratch1, R12_scratch2);
+  mtlr(R0);
+}
+
+#endif // !CC_INTERP
+
 // Lock object
 //
 // Registers alive
@@ -81,7 +767,6 @@
 
     assert_different_registers(displaced_header, object_mark_addr, current_header, tmp);
 
-
     // markOop displaced_header = obj->mark().set_unlocked();
 
     // Load markOop from object into displaced_header.
@@ -94,7 +779,6 @@
     // Set displaced_header to be (markOop of object | UNLOCK_VALUE).
     ori(displaced_header, displaced_header, markOopDesc::unlocked_value);
 
-
     // monitor->lock()->set_displaced_header(displaced_header);
 
     // Initialize the box (Must happen before we update the object mark!).
@@ -147,7 +831,6 @@
         BasicLock::displaced_header_offset_in_bytes(), monitor);
     b(done);
 
-
     // } else {
     //   // Slow path.
     //   InterpreterRuntime::monitorenter(THREAD, monitor);
@@ -158,7 +841,7 @@
     call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter),
             monitor, /*check_for_exceptions=*/true CC_INTERP_ONLY(&& false));
     // }
-
+    align(32, 12);
     bind(done);
   }
 }
@@ -173,13 +856,13 @@
 void InterpreterMacroAssembler::unlock_object(Register monitor, bool check_for_exceptions) {
   if (UseHeavyMonitors) {
     call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit),
-            monitor, /*check_for_exceptions=*/false);
+            monitor, check_for_exceptions CC_INTERP_ONLY(&& false));
   } else {
 
     // template code:
     //
     // if ((displaced_header = monitor->displaced_header()) == NULL) {
-    //   // Recursive unlock.  Mark the monitor unlocked by setting the object field to NULL.
+    //   // Recursive unlock. Mark the monitor unlocked by setting the object field to NULL.
     //   monitor->set_obj(NULL);
     // } else if (Atomic::cmpxchg_ptr(displaced_header, obj->mark_addr(), monitor) == monitor) {
     //   // We swapped the unlocked mark in displaced_header into the object's mark word.
@@ -221,7 +904,7 @@
     // If we still have a lightweight lock, unlock the object and be done.
 
     // The object address from the monitor is in object.
-    if (!UseBiasedLocking) ld(object, BasicObjectLock::obj_offset_in_bytes(), monitor);
+    if (!UseBiasedLocking) { ld(object, BasicObjectLock::obj_offset_in_bytes(), monitor); }
     addi(object_mark_addr, object, oopDesc::mark_offset_in_bytes());
 
     // We have the displaced header in displaced_header. If the lock is still
@@ -261,6 +944,959 @@
   }
 }
 
+#ifndef CC_INTERP
+
+// Load compiled (i2c) or interpreter entry when calling from interpreted and
+// do the call. Centralized so that all interpreter calls will do the same actions.
+// If jvmti single stepping is on for a thread we must not call compiled code.
+//
+// Input:
+//   - Rtarget_method: method to call
+//   - Rret_addr:      return address
+//   - 2 scratch regs
+//
+void InterpreterMacroAssembler::call_from_interpreter(Register Rtarget_method, Register Rret_addr, Register Rscratch1, Register Rscratch2) {
+  assert_different_registers(Rscratch1, Rscratch2, Rtarget_method, Rret_addr);
+  // Assume we want to go compiled if available.
+  const Register Rtarget_addr = Rscratch1;
+  const Register Rinterp_only = Rscratch2;
+
+  ld(Rtarget_addr, in_bytes(Method::from_interpreted_offset()), Rtarget_method);
+
+  if (JvmtiExport::can_post_interpreter_events()) {
+    lwz(Rinterp_only, in_bytes(JavaThread::interp_only_mode_offset()), R16_thread);
+
+    // JVMTI events, such as single-stepping, are implemented partly by avoiding running
+    // compiled code in threads for which the event is enabled. Check here for
+    // interp_only_mode if these events CAN be enabled.
+    Label done;
+    verify_thread();
+    cmpwi(CCR0, Rinterp_only, 0);
+    beq(CCR0, done);
+    ld(Rtarget_addr, in_bytes(Method::interpreter_entry_offset()), Rtarget_method);
+    align(32, 12);
+    bind(done);
+  }
+
+#ifdef ASSERT
+  {
+    Label Lok;
+    cmpdi(CCR0, Rtarget_addr, 0);
+    bne(CCR0, Lok);
+    stop("null entry point");
+    bind(Lok);
+  }
+#endif // ASSERT
+
+  mr(R21_sender_SP, R1_SP);
+
+  // Calc a precise SP for the call. The SP value we calculated in
+  // generate_fixed_frame() is based on the max_stack() value, so we would waste stack space
+  // if esp is not max. Also, the i2c adapter extends the stack space without restoring
+  // our pre-calced value, so repeating calls via i2c would result in stack overflow.
+  // Since esp already points to an empty slot, we just have to sub 1 additional slot
+  // to meet the abi scratch requirements.
+  // The max_stack pointer will get restored by means of the GR_Lmax_stack local in
+  // the return entry of the interpreter.
+  addi(Rscratch2, R15_esp, Interpreter::stackElementSize - frame::abi_reg_args_size);
+  clrrdi(Rscratch2, Rscratch2, exact_log2(frame::alignment_in_bytes)); // round towards smaller address
+  resize_frame_absolute(Rscratch2, Rscratch2, R0);
+
+  mr_if_needed(R19_method, Rtarget_method);
+  mtctr(Rtarget_addr);
+  mtlr(Rret_addr);
+
+  save_interpreter_state(Rscratch2);
+#ifdef ASSERT
+  ld(Rscratch1, _ijava_state_neg(top_frame_sp), Rscratch2); // Rscratch2 contains fp
+  cmpd(CCR0, R21_sender_SP, Rscratch1);
+  asm_assert_eq("top_frame_sp incorrect", 0x951);
+#endif
+
+  bctr();
+}
+
+// Set the method data pointer for the current bcp.
+void InterpreterMacroAssembler::set_method_data_pointer_for_bcp() {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+  Label get_continue;
+  ld(R28_mdx, in_bytes(Method::method_data_offset()), R19_method);
+  test_method_data_pointer(get_continue);
+  call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::bcp_to_di), R19_method, R14_bcp);
+
+  addi(R28_mdx, R28_mdx, in_bytes(MethodData::data_offset()));
+  add(R28_mdx, R28_mdx, R3_RET);
+  bind(get_continue);
+}
+
+// Test ImethodDataPtr. If it is null, continue at the specified label.
+void InterpreterMacroAssembler::test_method_data_pointer(Label& zero_continue) {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+  cmpdi(CCR0, R28_mdx, 0);
+  beq(CCR0, zero_continue);
+}
+
+void InterpreterMacroAssembler::verify_method_data_pointer() {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+#ifdef ASSERT
+  Label verify_continue;
+  test_method_data_pointer(verify_continue);
+
+  // If the mdp is valid, it will point to a DataLayout header which is
+  // consistent with the bcp. The converse is highly probable also.
+  lhz(R11_scratch1, in_bytes(DataLayout::bci_offset()), R28_mdx);
+  ld(R12_scratch2, in_bytes(Method::const_offset()), R19_method);
+  addi(R11_scratch1, R11_scratch1, in_bytes(ConstMethod::codes_offset()));
+  add(R11_scratch1, R12_scratch2, R12_scratch2);
+  cmpd(CCR0, R11_scratch1, R14_bcp);
+  beq(CCR0, verify_continue);
+
+  call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::verify_mdp ), R19_method, R14_bcp, R28_mdx);
+
+  bind(verify_continue);
+#endif
+}
+
+void InterpreterMacroAssembler::test_invocation_counter_for_mdp(Register invocation_count,
+                                                                Register Rscratch,
+                                                                Label &profile_continue) {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+  // Control will flow to "profile_continue" if the counter is less than the
+  // limit or if we call profile_method().
+  Label done;
+
+  // If no method data exists, and the counter is high enough, make one.
+  int ipl_offs = load_const_optimized(Rscratch, &InvocationCounter::InterpreterProfileLimit, R0, true);
+  lwz(Rscratch, ipl_offs, Rscratch);
+
+  cmpdi(CCR0, R28_mdx, 0);
+  // Test to see if we should create a method data oop.
+  cmpd(CCR1, Rscratch /* InterpreterProfileLimit */, invocation_count);
+  bne(CCR0, done);
+  bge(CCR1, profile_continue);
+
+  // Build it now.
+  call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::profile_method));
+  set_method_data_pointer_for_bcp();
+  b(profile_continue);
+
+  align(32, 12);
+  bind(done);
+}
+
+void InterpreterMacroAssembler::test_backedge_count_for_osr(Register backedge_count, Register branch_bcp, Register Rtmp) {
+  assert_different_registers(backedge_count, Rtmp, branch_bcp);
+  assert(UseOnStackReplacement,"Must UseOnStackReplacement to test_backedge_count_for_osr");
+
+  Label did_not_overflow;
+  Label overflow_with_error;
+
+  int ibbl_offs = load_const_optimized(Rtmp, &InvocationCounter::InterpreterBackwardBranchLimit, R0, true);
+  lwz(Rtmp, ibbl_offs, Rtmp);
+  cmpw(CCR0, backedge_count, Rtmp);
+
+  blt(CCR0, did_not_overflow);
+
+  // When ProfileInterpreter is on, the backedge_count comes from the
+  // methodDataOop, which value does not get reset on the call to
+  // frequency_counter_overflow(). To avoid excessive calls to the overflow
+  // routine while the method is being compiled, add a second test to make sure
+  // the overflow function is called only once every overflow_frequency.
+  if (ProfileInterpreter) {
+    const int overflow_frequency = 1024;
+    li(Rtmp, overflow_frequency-1);
+    andr(Rtmp, Rtmp, backedge_count);
+    cmpwi(CCR0, Rtmp, 0);
+    bne(CCR0, did_not_overflow);
+  }
+
+  // Overflow in loop, pass branch bytecode.
+  call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), branch_bcp, true);
+
+  // Was an OSR adapter generated?
+  // O0 = osr nmethod
+  cmpdi(CCR0, R3_RET, 0);
+  beq(CCR0, overflow_with_error);
+
+  // Has the nmethod been invalidated already?
+  lwz(Rtmp, nmethod::entry_bci_offset(), R3_RET);
+  cmpwi(CCR0, Rtmp, InvalidOSREntryBci);
+  beq(CCR0, overflow_with_error);
+
+  // Migrate the interpreter frame off of the stack.
+  // We can use all registers because we will not return to interpreter from this point.
+
+  // Save nmethod.
+  const Register osr_nmethod = R31;
+  mr(osr_nmethod, R3_RET);
+  set_top_ijava_frame_at_SP_as_last_Java_frame(R1_SP, R11_scratch1);
+  call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::OSR_migration_begin), R16_thread);
+  reset_last_Java_frame();
+  // OSR buffer is in ARG1
+
+  // Remove the interpreter frame.
+  merge_frames(/*top_frame_sp*/ R21_sender_SP, /*return_pc*/ R0, R11_scratch1, R12_scratch2);
+
+  // Jump to the osr code.
+  ld(R11_scratch1, nmethod::osr_entry_point_offset(), osr_nmethod);
+  mtlr(R0);
+  mtctr(R11_scratch1);
+  bctr();
+
+  align(32, 12);
+  bind(overflow_with_error);
+  bind(did_not_overflow);
+}
+
+// Store a value at some constant offset from the method data pointer.
+void InterpreterMacroAssembler::set_mdp_data_at(int constant, Register value) {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+
+  std(value, constant, R28_mdx);
+}
+
+// Increment the value at some constant offset from the method data pointer.
+void InterpreterMacroAssembler::increment_mdp_data_at(int constant,
+                                                      Register counter_addr,
+                                                      Register Rbumped_count,
+                                                      bool decrement) {
+  // Locate the counter at a fixed offset from the mdp:
+  addi(counter_addr, R28_mdx, constant);
+  increment_mdp_data_at(counter_addr, Rbumped_count, decrement);
+}
+
+// Increment the value at some non-fixed (reg + constant) offset from
+// the method data pointer.
+void InterpreterMacroAssembler::increment_mdp_data_at(Register reg,
+                                                      int constant,
+                                                      Register scratch,
+                                                      Register Rbumped_count,
+                                                      bool decrement) {
+  // Add the constant to reg to get the offset.
+  add(scratch, R28_mdx, reg);
+  // Then calculate the counter address.
+  addi(scratch, scratch, constant);
+  increment_mdp_data_at(scratch, Rbumped_count, decrement);
+}
+
+void InterpreterMacroAssembler::increment_mdp_data_at(Register counter_addr,
+                                                      Register Rbumped_count,
+                                                      bool decrement) {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+
+  // Load the counter.
+  ld(Rbumped_count, 0, counter_addr);
+
+  if (decrement) {
+    // Decrement the register. Set condition codes.
+    addi(Rbumped_count, Rbumped_count, - DataLayout::counter_increment);
+    // Store the decremented counter, if it is still negative.
+    std(Rbumped_count, 0, counter_addr);
+    // Note: add/sub overflow check are not ported, since 64 bit
+    // calculation should never overflow.
+  } else {
+    // Increment the register. Set carry flag.
+    addi(Rbumped_count, Rbumped_count, DataLayout::counter_increment);
+    // Store the incremented counter.
+    std(Rbumped_count, 0, counter_addr);
+  }
+}
+
+// Set a flag value at the current method data pointer position.
+void InterpreterMacroAssembler::set_mdp_flag_at(int flag_constant,
+                                                Register scratch) {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+  // Load the data header.
+  lbz(scratch, in_bytes(DataLayout::flags_offset()), R28_mdx);
+  // Set the flag.
+  ori(scratch, scratch, flag_constant);
+  // Store the modified header.
+  stb(scratch, in_bytes(DataLayout::flags_offset()), R28_mdx);
+}
+
+// Test the location at some offset from the method data pointer.
+// If it is not equal to value, branch to the not_equal_continue Label.
+void InterpreterMacroAssembler::test_mdp_data_at(int offset,
+                                                 Register value,
+                                                 Label& not_equal_continue,
+                                                 Register test_out) {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+
+  ld(test_out, offset, R28_mdx);
+  cmpd(CCR0,  value, test_out);
+  bne(CCR0, not_equal_continue);
+}
+
+// Update the method data pointer by the displacement located at some fixed
+// offset from the method data pointer.
+void InterpreterMacroAssembler::update_mdp_by_offset(int offset_of_disp,
+                                                     Register scratch) {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+
+  ld(scratch, offset_of_disp, R28_mdx);
+  add(R28_mdx, scratch, R28_mdx);
+}
+
+// Update the method data pointer by the displacement located at the
+// offset (reg + offset_of_disp).
+void InterpreterMacroAssembler::update_mdp_by_offset(Register reg,
+                                                     int offset_of_disp,
+                                                     Register scratch) {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+
+  add(scratch, reg, R28_mdx);
+  ld(scratch, offset_of_disp, scratch);
+  add(R28_mdx, scratch, R28_mdx);
+}
+
+// Update the method data pointer by a simple constant displacement.
+void InterpreterMacroAssembler::update_mdp_by_constant(int constant) {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+  addi(R28_mdx, R28_mdx, constant);
+}
+
+// Update the method data pointer for a _ret bytecode whose target
+// was not among our cached targets.
+void InterpreterMacroAssembler::update_mdp_for_ret(TosState state,
+                                                   Register return_bci) {
+  assert(ProfileInterpreter, "must be profiling interpreter");
+
+  push(state);
+  assert(return_bci->is_nonvolatile(), "need to protect return_bci");
+  call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::update_mdp_for_ret), return_bci);
+  pop(state);
+}
+
+// Increments the backedge counter.
+// Returns backedge counter + invocation counter in Rdst.
+void InterpreterMacroAssembler::increment_backedge_counter(const Register Rcounters, const Register Rdst,
+                                                           const Register Rtmp1, Register Rscratch) {
+  assert(UseCompiler, "incrementing must be useful");
+  assert_different_registers(Rdst, Rtmp1);
+  const Register invocation_counter = Rtmp1;
+  const Register counter = Rdst;
+  // TODO ppc port assert(4 == InvocationCounter::sz_counter(), "unexpected field size.");
+
+  // Load backedge counter.
+  lwz(counter, in_bytes(MethodCounters::backedge_counter_offset()) +
+               in_bytes(InvocationCounter::counter_offset()), Rcounters);
+  // Load invocation counter.
+  lwz(invocation_counter, in_bytes(MethodCounters::invocation_counter_offset()) +
+                          in_bytes(InvocationCounter::counter_offset()), Rcounters);
+
+  // Add the delta to the backedge counter.
+  addi(counter, counter, InvocationCounter::count_increment);
+
+  // Mask the invocation counter.
+  li(Rscratch, InvocationCounter::count_mask_value);
+  andr(invocation_counter, invocation_counter, Rscratch);
+
+  // Store new counter value.
+  stw(counter, in_bytes(MethodCounters::backedge_counter_offset()) +
+               in_bytes(InvocationCounter::counter_offset()), Rcounters);
+  // Return invocation counter + backedge counter.
+  add(counter, counter, invocation_counter);
+}
+
+// Count a taken branch in the bytecodes.
+void InterpreterMacroAssembler::profile_taken_branch(Register scratch, Register bumped_count) {
+  if (ProfileInterpreter) {
+    Label profile_continue;
+
+    // If no method data exists, go to profile_continue.
+    test_method_data_pointer(profile_continue);
+
+    // We are taking a branch. Increment the taken count.
+    increment_mdp_data_at(in_bytes(JumpData::taken_offset()), scratch, bumped_count);
+
+    // The method data pointer needs to be updated to reflect the new target.
+    update_mdp_by_offset(in_bytes(JumpData::displacement_offset()), scratch);
+    bind (profile_continue);
+  }
+}
+
+// Count a not-taken branch in the bytecodes.
+void InterpreterMacroAssembler::profile_not_taken_branch(Register scratch1, Register scratch2) {
+  if (ProfileInterpreter) {
+    Label profile_continue;
+
+    // If no method data exists, go to profile_continue.
+    test_method_data_pointer(profile_continue);
+
+    // We are taking a branch. Increment the not taken count.
+    increment_mdp_data_at(in_bytes(BranchData::not_taken_offset()), scratch1, scratch2);
+
+    // The method data pointer needs to be updated to correspond to the
+    // next bytecode.
+    update_mdp_by_constant(in_bytes(BranchData::branch_data_size()));
+    bind (profile_continue);
+  }
+}
+
+// Count a non-virtual call in the bytecodes.
+void InterpreterMacroAssembler::profile_call(Register scratch1, Register scratch2) {
+  if (ProfileInterpreter) {
+    Label profile_continue;
+
+    // If no method data exists, go to profile_continue.
+    test_method_data_pointer(profile_continue);
+
+    // We are making a call. Increment the count.
+    increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch1, scratch2);
+
+    // The method data pointer needs to be updated to reflect the new target.
+    update_mdp_by_constant(in_bytes(CounterData::counter_data_size()));
+    bind (profile_continue);
+  }
+}
+
+// Count a final call in the bytecodes.
+void InterpreterMacroAssembler::profile_final_call(Register scratch1, Register scratch2) {
+  if (ProfileInterpreter) {
+    Label profile_continue;
+
+    // If no method data exists, go to profile_continue.
+    test_method_data_pointer(profile_continue);
+
+    // We are making a call. Increment the count.
+    increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch1, scratch2);
+
+    // The method data pointer needs to be updated to reflect the new target.
+    update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
+    bind (profile_continue);
+  }
+}
+
+// Count a virtual call in the bytecodes.
+void InterpreterMacroAssembler::profile_virtual_call(Register Rreceiver,
+                                                     Register Rscratch1,
+                                                     Register Rscratch2,
+                                                     bool receiver_can_be_null) {
+  if (!ProfileInterpreter) { return; }
+  Label profile_continue;
+
+  // If no method data exists, go to profile_continue.
+  test_method_data_pointer(profile_continue);
+
+  Label skip_receiver_profile;
+  if (receiver_can_be_null) {
+    Label not_null;
+    cmpdi(CCR0, Rreceiver, 0);
+    bne(CCR0, not_null);
+    // We are making a call. Increment the count for null receiver.
+    increment_mdp_data_at(in_bytes(CounterData::count_offset()), Rscratch1, Rscratch2);
+    b(skip_receiver_profile);
+    bind(not_null);
+  }
+
+  // Record the receiver type.
+  record_klass_in_profile(Rreceiver, Rscratch1, Rscratch2, true);
+  bind(skip_receiver_profile);
+
+  // The method data pointer needs to be updated to reflect the new target.
+  update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
+  bind (profile_continue);
+}
+
+void InterpreterMacroAssembler::profile_typecheck(Register Rklass, Register Rscratch1, Register Rscratch2) {
+  if (ProfileInterpreter) {
+    Label profile_continue;
+
+    // If no method data exists, go to profile_continue.
+    test_method_data_pointer(profile_continue);
+
+    int mdp_delta = in_bytes(BitData::bit_data_size());
+    if (TypeProfileCasts) {
+      mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
+
+      // Record the object type.
+      record_klass_in_profile(Rklass, Rscratch1, Rscratch2, false);
+    }
+
+    // The method data pointer needs to be updated.
+    update_mdp_by_constant(mdp_delta);
+
+    bind (profile_continue);
+  }
+}
+
+void InterpreterMacroAssembler::profile_typecheck_failed(Register Rscratch1, Register Rscratch2) {
+  if (ProfileInterpreter && TypeProfileCasts) {
+    Label profile_continue;
+
+    // If no method data exists, go to profile_continue.
+    test_method_data_pointer(profile_continue);
+
+    int count_offset = in_bytes(CounterData::count_offset());
+    // Back up the address, since we have already bumped the mdp.
+    count_offset -= in_bytes(VirtualCallData::virtual_call_data_size());
+
+    // *Decrement* the counter. We expect to see zero or small negatives.
+    increment_mdp_data_at(count_offset, Rscratch1, Rscratch2, true);
+
+    bind (profile_continue);
+  }
+}
+
+// Count a ret in the bytecodes.
+void InterpreterMacroAssembler::profile_ret(TosState state, Register return_bci, Register scratch1, Register scratch2) {
+  if (ProfileInterpreter) {
+    Label profile_continue;
+    uint row;
+
+    // If no method data exists, go to profile_continue.
+    test_method_data_pointer(profile_continue);
+
+    // Update the total ret count.
+    increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch1, scratch2 );
+
+    for (row = 0; row < RetData::row_limit(); row++) {
+      Label next_test;
+
+      // See if return_bci is equal to bci[n]:
+      test_mdp_data_at(in_bytes(RetData::bci_offset(row)), return_bci, next_test, scratch1);
+
+      // return_bci is equal to bci[n]. Increment the count.
+      increment_mdp_data_at(in_bytes(RetData::bci_count_offset(row)), scratch1, scratch2);
+
+      // The method data pointer needs to be updated to reflect the new target.
+      update_mdp_by_offset(in_bytes(RetData::bci_displacement_offset(row)), scratch1);
+      b(profile_continue);
+      bind(next_test);
+    }
+
+    update_mdp_for_ret(state, return_bci);
+
+    bind (profile_continue);
+  }
+}
+
+// Count the default case of a switch construct.
+void InterpreterMacroAssembler::profile_switch_default(Register scratch1,  Register scratch2) {
+  if (ProfileInterpreter) {
+    Label profile_continue;
+
+    // If no method data exists, go to profile_continue.
+    test_method_data_pointer(profile_continue);
+
+    // Update the default case count
+    increment_mdp_data_at(in_bytes(MultiBranchData::default_count_offset()),
+                          scratch1, scratch2);
+
+    // The method data pointer needs to be updated.
+    update_mdp_by_offset(in_bytes(MultiBranchData::default_displacement_offset()),
+                         scratch1);
+
+    bind (profile_continue);
+  }
+}
+
+// Count the index'th case of a switch construct.
+void InterpreterMacroAssembler::profile_switch_case(Register index,
+                                                    Register scratch1,
+                                                    Register scratch2,
+                                                    Register scratch3) {
+  if (ProfileInterpreter) {
+    assert_different_registers(index, scratch1, scratch2, scratch3);
+    Label profile_continue;
+
+    // If no method data exists, go to profile_continue.
+    test_method_data_pointer(profile_continue);
+
+    // Build the base (index * per_case_size_in_bytes()) + case_array_offset_in_bytes().
+    li(scratch3, in_bytes(MultiBranchData::case_array_offset()));
+
+    assert (in_bytes(MultiBranchData::per_case_size()) == 16, "so that shladd works");
+    sldi(scratch1, index, exact_log2(in_bytes(MultiBranchData::per_case_size())));
+    add(scratch1, scratch1, scratch3);
+
+    // Update the case count.
+    increment_mdp_data_at(scratch1, in_bytes(MultiBranchData::relative_count_offset()), scratch2, scratch3);
+
+    // The method data pointer needs to be updated.
+    update_mdp_by_offset(scratch1, in_bytes(MultiBranchData::relative_displacement_offset()), scratch2);
+
+    bind (profile_continue);
+  }
+}
+
+void InterpreterMacroAssembler::profile_null_seen(Register Rscratch1, Register Rscratch2) {
+  if (ProfileInterpreter) {
+    assert_different_registers(Rscratch1, Rscratch2);
+    Label profile_continue;
+
+    // If no method data exists, go to profile_continue.
+    test_method_data_pointer(profile_continue);
+
+    set_mdp_flag_at(BitData::null_seen_byte_constant(), Rscratch1);
+
+    // The method data pointer needs to be updated.
+    int mdp_delta = in_bytes(BitData::bit_data_size());
+    if (TypeProfileCasts) {
+      mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
+    }
+    update_mdp_by_constant(mdp_delta);
+
+    bind (profile_continue);
+  }
+}
+
+void InterpreterMacroAssembler::record_klass_in_profile(Register Rreceiver,
+                                                        Register Rscratch1, Register Rscratch2,
+                                                        bool is_virtual_call) {
+  assert(ProfileInterpreter, "must be profiling");
+  assert_different_registers(Rreceiver, Rscratch1, Rscratch2);
+
+  Label done;
+  record_klass_in_profile_helper(Rreceiver, Rscratch1, Rscratch2, 0, done, is_virtual_call);
+  bind (done);
+}
+
+void InterpreterMacroAssembler::record_klass_in_profile_helper(
+                                        Register receiver, Register scratch1, Register scratch2,
+                                        int start_row, Label& done, bool is_virtual_call) {
+  if (TypeProfileWidth == 0) {
+    if (is_virtual_call) {
+      increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch1, scratch2);
+    }
+    return;
+  }
+
+  int last_row = VirtualCallData::row_limit() - 1;
+  assert(start_row <= last_row, "must be work left to do");
+  // Test this row for both the receiver and for null.
+  // Take any of three different outcomes:
+  //   1. found receiver => increment count and goto done
+  //   2. found null => keep looking for case 1, maybe allocate this cell
+  //   3. found something else => keep looking for cases 1 and 2
+  // Case 3 is handled by a recursive call.
+  for (int row = start_row; row <= last_row; row++) {
+    Label next_test;
+    bool test_for_null_also = (row == start_row);
+
+    // See if the receiver is receiver[n].
+    int recvr_offset = in_bytes(VirtualCallData::receiver_offset(row));
+    test_mdp_data_at(recvr_offset, receiver, next_test, scratch1);
+    // delayed()->tst(scratch);
+
+    // The receiver is receiver[n]. Increment count[n].
+    int count_offset = in_bytes(VirtualCallData::receiver_count_offset(row));
+    increment_mdp_data_at(count_offset, scratch1, scratch2);
+    b(done);
+    bind(next_test);
+
+    if (test_for_null_also) {
+      Label found_null;
+      // Failed the equality check on receiver[n]... Test for null.
+      if (start_row == last_row) {
+        // The only thing left to do is handle the null case.
+        if (is_virtual_call) {
+          // Scratch1 contains test_out from test_mdp_data_at.
+          cmpdi(CCR0, scratch1, 0);
+          beq(CCR0, found_null);
+          // Receiver did not match any saved receiver and there is no empty row for it.
+          // Increment total counter to indicate polymorphic case.
+          increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch1, scratch2);
+          b(done);
+          bind(found_null);
+        } else {
+          cmpdi(CCR0, scratch1, 0);
+          bne(CCR0, done);
+        }
+        break;
+      }
+      // Since null is rare, make it be the branch-taken case.
+      cmpdi(CCR0, scratch1, 0);
+      beq(CCR0, found_null);
+
+      // Put all the "Case 3" tests here.
+      record_klass_in_profile_helper(receiver, scratch1, scratch2, start_row + 1, done, is_virtual_call);
+
+      // Found a null. Keep searching for a matching receiver,
+      // but remember that this is an empty (unused) slot.
+      bind(found_null);
+    }
+  }
+
+  // In the fall-through case, we found no matching receiver, but we
+  // observed the receiver[start_row] is NULL.
+
+  // Fill in the receiver field and increment the count.
+  int recvr_offset = in_bytes(VirtualCallData::receiver_offset(start_row));
+  set_mdp_data_at(recvr_offset, receiver);
+  int count_offset = in_bytes(VirtualCallData::receiver_count_offset(start_row));
+  li(scratch1, DataLayout::counter_increment);
+  set_mdp_data_at(count_offset, scratch1);
+  if (start_row > 0) {
+    b(done);
+  }
+}
+
+// Add a InterpMonitorElem to stack (see frame_sparc.hpp).
+void InterpreterMacroAssembler::add_monitor_to_stack(bool stack_is_empty, Register Rtemp1, Register Rtemp2) {
+
+  // Very-local scratch registers.
+  const Register esp  = Rtemp1;
+  const Register slot = Rtemp2;
+
+  // Extracted monitor_size.
+  int monitor_size = frame::interpreter_frame_monitor_size_in_bytes();
+  assert(Assembler::is_aligned((unsigned int)monitor_size,
+                               (unsigned int)frame::alignment_in_bytes),
+         "size of a monitor must respect alignment of SP");
+
+  resize_frame(-monitor_size, /*temp*/esp); // Allocate space for new monitor
+  std(R1_SP, _ijava_state_neg(top_frame_sp), esp); // esp contains fp
+
+  // Shuffle expression stack down. Recall that stack_base points
+  // just above the new expression stack bottom. Old_tos and new_tos
+  // are used to scan thru the old and new expression stacks.
+  if (!stack_is_empty) {
+    Label copy_slot, copy_slot_finished;
+    const Register n_slots = slot;
+
+    addi(esp, R15_esp, Interpreter::stackElementSize); // Point to first element (pre-pushed stack).
+    subf(n_slots, esp, R26_monitor);
+    srdi_(n_slots, n_slots, LogBytesPerWord);          // Compute number of slots to copy.
+    assert(LogBytesPerWord == 3, "conflicts assembler instructions");
+    beq(CCR0, copy_slot_finished);                     // Nothing to copy.
+
+    mtctr(n_slots);
+
+    // loop
+    bind(copy_slot);
+    ld(slot, 0, esp);              // Move expression stack down.
+    std(slot, -monitor_size, esp); // distance = monitor_size
+    addi(esp, esp, BytesPerWord);
+    bdnz(copy_slot);
+
+    bind(copy_slot_finished);
+  }
+
+  addi(R15_esp, R15_esp, -monitor_size);
+  addi(R26_monitor, R26_monitor, -monitor_size);
+
+  // Restart interpreter
+}
+
+// ============================================================================
+// Java locals access
+
+// Load a local variable at index in Rindex into register Rdst_value.
+// Also puts address of local into Rdst_address as a service.
+// Kills:
+//   - Rdst_value
+//   - Rdst_address
+void InterpreterMacroAssembler::load_local_int(Register Rdst_value, Register Rdst_address, Register Rindex) {
+  sldi(Rdst_address, Rindex, Interpreter::logStackElementSize);
+  subf(Rdst_address, Rdst_address, R18_locals);
+  lwz(Rdst_value, 0, Rdst_address);
+}
+
+// Load a local variable at index in Rindex into register Rdst_value.
+// Also puts address of local into Rdst_address as a service.
+// Kills:
+//   - Rdst_value
+//   - Rdst_address
+void InterpreterMacroAssembler::load_local_long(Register Rdst_value, Register Rdst_address, Register Rindex) {
+  sldi(Rdst_address, Rindex, Interpreter::logStackElementSize);
+  subf(Rdst_address, Rdst_address, R18_locals);
+  ld(Rdst_value, -8, Rdst_address);
+}
+
+// Load a local variable at index in Rindex into register Rdst_value.
+// Also puts address of local into Rdst_address as a service.
+// Input:
+//   - Rindex:      slot nr of local variable
+// Kills:
+//   - Rdst_value
+//   - Rdst_address
+void InterpreterMacroAssembler::load_local_ptr(Register Rdst_value, Register Rdst_address, Register Rindex) {
+  sldi(Rdst_address, Rindex, Interpreter::logStackElementSize);
+  subf(Rdst_address, Rdst_address, R18_locals);
+  ld(Rdst_value, 0, Rdst_address);
+}
+
+// Load a local variable at index in Rindex into register Rdst_value.
+// Also puts address of local into Rdst_address as a service.
+// Kills:
+//   - Rdst_value
+//   - Rdst_address
+void InterpreterMacroAssembler::load_local_float(FloatRegister Rdst_value, Register Rdst_address, Register Rindex) {
+  sldi(Rdst_address, Rindex, Interpreter::logStackElementSize);
+  subf(Rdst_address, Rdst_address, R18_locals);
+  lfs(Rdst_value, 0, Rdst_address);
+}
+
+// Load a local variable at index in Rindex into register Rdst_value.
+// Also puts address of local into Rdst_address as a service.
+// Kills:
+//   - Rdst_value
+//   - Rdst_address
+void InterpreterMacroAssembler::load_local_double(FloatRegister Rdst_value, Register Rdst_address, Register Rindex) {
+  sldi(Rdst_address, Rindex, Interpreter::logStackElementSize);
+  subf(Rdst_address, Rdst_address, R18_locals);
+  lfd(Rdst_value, -8, Rdst_address);
+}
+
+// Store an int value at local variable slot Rindex.
+// Kills:
+//   - Rindex
+void InterpreterMacroAssembler::store_local_int(Register Rvalue, Register Rindex) {
+  sldi(Rindex, Rindex, Interpreter::logStackElementSize);
+  subf(Rindex, Rindex, R18_locals);
+  stw(Rvalue, 0, Rindex);
+}
+
+// Store a long value at local variable slot Rindex.
+// Kills:
+//   - Rindex
+void InterpreterMacroAssembler::store_local_long(Register Rvalue, Register Rindex) {
+  sldi(Rindex, Rindex, Interpreter::logStackElementSize);
+  subf(Rindex, Rindex, R18_locals);
+  std(Rvalue, -8, Rindex);
+}
+
+// Store an oop value at local variable slot Rindex.
+// Kills:
+//   - Rindex
+void InterpreterMacroAssembler::store_local_ptr(Register Rvalue, Register Rindex) {
+  sldi(Rindex, Rindex, Interpreter::logStackElementSize);
+  subf(Rindex, Rindex, R18_locals);
+  std(Rvalue, 0, Rindex);
+}
+
+// Store an int value at local variable slot Rindex.
+// Kills:
+//   - Rindex
+void InterpreterMacroAssembler::store_local_float(FloatRegister Rvalue, Register Rindex) {
+  sldi(Rindex, Rindex, Interpreter::logStackElementSize);
+  subf(Rindex, Rindex, R18_locals);
+  stfs(Rvalue, 0, Rindex);
+}
+
+// Store an int value at local variable slot Rindex.
+// Kills:
+//   - Rindex
+void InterpreterMacroAssembler::store_local_double(FloatRegister Rvalue, Register Rindex) {
+  sldi(Rindex, Rindex, Interpreter::logStackElementSize);
+  subf(Rindex, Rindex, R18_locals);
+  stfd(Rvalue, -8, Rindex);
+}
+
+// Read pending exception from thread and jump to interpreter.
+// Throw exception entry if one if pending. Fall through otherwise.
+void InterpreterMacroAssembler::check_and_forward_exception(Register Rscratch1, Register Rscratch2) {
+  assert_different_registers(Rscratch1, Rscratch2, R3);
+  Register Rexception = Rscratch1;
+  Register Rtmp       = Rscratch2;
+  Label Ldone;
+  // Get pending exception oop.
+  ld(Rexception, thread_(pending_exception));
+  cmpdi(CCR0, Rexception, 0);
+  beq(CCR0, Ldone);
+  li(Rtmp, 0);
+  mr_if_needed(R3, Rexception);
+  std(Rtmp, thread_(pending_exception)); // Clear exception in thread
+  if (Interpreter::rethrow_exception_entry() != NULL) {
+    // Already got entry address.
+    load_dispatch_table(Rtmp, (address*)Interpreter::rethrow_exception_entry());
+  } else {
+    // Dynamically load entry address.
+    int simm16_rest = load_const_optimized(Rtmp, &Interpreter::_rethrow_exception_entry, R0, true);
+    ld(Rtmp, simm16_rest, Rtmp);
+  }
+  mtctr(Rtmp);
+  save_interpreter_state(Rtmp);
+  bctr();
+
+  align(32, 12);
+  bind(Ldone);
+}
+
+void InterpreterMacroAssembler::call_VM(Register oop_result, address entry_point, bool check_exceptions) {
+  save_interpreter_state(R11_scratch1);
+
+  MacroAssembler::call_VM(oop_result, entry_point, false);
+
+  restore_interpreter_state(R11_scratch1, /*bcp_and_mdx_only*/ true);
+
+  check_and_handle_popframe(R11_scratch1);
+  check_and_handle_earlyret(R11_scratch1);
+  // Now check exceptions manually.
+  if (check_exceptions) {
+    check_and_forward_exception(R11_scratch1, R12_scratch2);
+  }
+}
+
+void InterpreterMacroAssembler::call_VM(Register oop_result, address entry_point, Register arg_1, bool check_exceptions) {
+  // ARG1 is reserved for the thread.
+  mr_if_needed(R4_ARG2, arg_1);
+  call_VM(oop_result, entry_point, check_exceptions);
+}
+
+void InterpreterMacroAssembler::call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, bool check_exceptions) {
+  // ARG1 is reserved for the thread.
+  mr_if_needed(R4_ARG2, arg_1);
+  assert(arg_2 != R4_ARG2, "smashed argument");
+  mr_if_needed(R5_ARG3, arg_2);
+  call_VM(oop_result, entry_point, check_exceptions);
+}
+
+void InterpreterMacroAssembler::call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, Register arg_3, bool check_exceptions) {
+  // ARG1 is reserved for the thread.
+  mr_if_needed(R4_ARG2, arg_1);
+  assert(arg_2 != R4_ARG2, "smashed argument");
+  mr_if_needed(R5_ARG3, arg_2);
+  assert(arg_3 != R4_ARG2 && arg_3 != R5_ARG3, "smashed argument");
+  mr_if_needed(R6_ARG4, arg_3);
+  call_VM(oop_result, entry_point, check_exceptions);
+}
+
+void InterpreterMacroAssembler::save_interpreter_state(Register scratch) {
+  ld(scratch, 0, R1_SP);
+  std(R15_esp, _ijava_state_neg(esp), scratch);
+  std(R14_bcp, _ijava_state_neg(bcp), scratch);
+  std(R26_monitor, _ijava_state_neg(monitors), scratch);
+  if (ProfileInterpreter) { std(R28_mdx, _ijava_state_neg(mdx), scratch); }
+  // Other entries should be unchanged.
+}
+
+void InterpreterMacroAssembler::restore_interpreter_state(Register scratch, bool bcp_and_mdx_only) {
+  ld(scratch, 0, R1_SP);
+  ld(R14_bcp, _ijava_state_neg(bcp), scratch); // Changed by VM code (exception).
+  if (ProfileInterpreter) { ld(R28_mdx, _ijava_state_neg(mdx), scratch); } // Changed by VM code.
+  if (!bcp_and_mdx_only) {
+    // Following ones are Metadata.
+    ld(R19_method, _ijava_state_neg(method), scratch);
+    ld(R27_constPoolCache, _ijava_state_neg(cpoolCache), scratch);
+    // Following ones are stack addresses and don't require reload.
+    ld(R15_esp, _ijava_state_neg(esp), scratch);
+    ld(R18_locals, _ijava_state_neg(locals), scratch);
+    ld(R26_monitor, _ijava_state_neg(monitors), scratch);
+  }
+#ifdef ASSERT
+  {
+    Label Lok;
+    subf(R0, R1_SP, scratch);
+    cmpdi(CCR0, R0, frame::abi_reg_args_size + frame::ijava_state_size);
+    bge(CCR0, Lok);
+    stop("frame too small (restore istate)", 0x5432);
+    bind(Lok);
+  }
+  {
+    Label Lok;
+    ld(R0, _ijava_state_neg(ijava_reserved), scratch);
+    cmpdi(CCR0, R0, 0x5afe);
+    beq(CCR0, Lok);
+    stop("frame corrupted (restore istate)", 0x5afe);
+    bind(Lok);
+  }
+#endif
+}
+
+#endif // !CC_INTERP
+
 void InterpreterMacroAssembler::get_method_counters(Register method,
                                                     Register Rcounters,
                                                     Label& skip) {
@@ -321,6 +1957,66 @@
   if (state == atos) { MacroAssembler::verify_oop(reg); }
 }
 
+#ifndef CC_INTERP
+// Local helper function for the verify_oop_or_return_address macro.
+static bool verify_return_address(Method* m, int bci) {
+#ifndef PRODUCT
+  address pc = (address)(m->constMethod()) + in_bytes(ConstMethod::codes_offset()) + bci;
+  // Assume it is a valid return address if it is inside m and is preceded by a jsr.
+  if (!m->contains(pc))                                            return false;
+  address jsr_pc;
+  jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr);
+  if (*jsr_pc == Bytecodes::_jsr   && jsr_pc >= m->code_base())    return true;
+  jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr_w);
+  if (*jsr_pc == Bytecodes::_jsr_w && jsr_pc >= m->code_base())    return true;
+#endif // PRODUCT
+  return false;
+}
+
+void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
+  if (VerifyFPU) {
+    unimplemented("verfiyFPU");
+  }
+}
+
+void InterpreterMacroAssembler::verify_oop_or_return_address(Register reg, Register Rtmp) {
+  if (!VerifyOops) return;
+
+  // The VM documentation for the astore[_wide] bytecode allows
+  // the TOS to be not only an oop but also a return address.
+  Label test;
+  Label skip;
+  // See if it is an address (in the current method):
+
+  const int log2_bytecode_size_limit = 16;
+  srdi_(Rtmp, reg, log2_bytecode_size_limit);
+  bne(CCR0, test);
+
+  address fd = CAST_FROM_FN_PTR(address, verify_return_address);
+  unsigned int nbytes_save = 10*8; // 10 volatile gprs
+
+  save_LR_CR(Rtmp);
+  push_frame_reg_args(nbytes_save, Rtmp);
+  save_volatile_gprs(R1_SP, 112); // except R0
+
+  load_const_optimized(Rtmp, fd, R0);
+  mr_if_needed(R4_ARG2, reg);
+  mr(R3_ARG1, R19_method);
+  call_c(Rtmp); // call C
+
+  restore_volatile_gprs(R1_SP, 112); // except R0
+  pop_frame();
+  restore_LR_CR(Rtmp);
+  b(skip);
+
+  // Perform a more elaborate out-of-line call.
+  // Not an address; verify it:
+  bind(test);
+  verify_oop(reg);
+  bind(skip);
+}
+#endif // !CC_INTERP
+
 // Inline assembly for:
 //
 // if (thread is in interp_only_mode) {
@@ -343,13 +2039,12 @@
     cmpwi(CCR0, R0, 0);
     beq(CCR0, jvmti_post_done);
     call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_entry),
-            /*check_exceptions=*/false);
+            /*check_exceptions=*/true CC_INTERP_ONLY(&& false));
 
     bind(jvmti_post_done);
   }
 }
 
-
 // Inline assembly for:
 //
 // if (thread is in interp_only_mode) {
@@ -365,26 +2060,33 @@
 //
 // Native methods have their result stored in d_tmp and l_tmp.
 // Java methods have their result stored in the expression stack.
-void InterpreterMacroAssembler::notify_method_exit(bool is_native_method, TosState state) {
+void InterpreterMacroAssembler::notify_method_exit(bool is_native_method, TosState state,
+                                                   NotifyMethodExitMode mode, bool check_exceptions) {
   // JVMTI
   // Whenever JVMTI puts a thread in interp_only_mode, method
   // entry/exit events are sent for that thread to track stack
   // depth. If it is possible to enter interp_only_mode we add
   // the code to check if the event should be sent.
-  if (JvmtiExport::can_post_interpreter_events()) {
+  if (mode == NotifyJVMTI && JvmtiExport::can_post_interpreter_events()) {
     Label jvmti_post_done;
 
     lwz(R0, in_bytes(JavaThread::interp_only_mode_offset()), R16_thread);
     cmpwi(CCR0, R0, 0);
     beq(CCR0, jvmti_post_done);
+    CC_INTERP_ONLY(assert(is_native_method && !check_exceptions, "must not push state"));
+    if (!is_native_method) push(state); // Expose tos to GC.
     call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_exit),
-            /*check_exceptions=*/false);
+            /*check_exceptions=*/check_exceptions);
+    if (!is_native_method) pop(state);
 
     align(32, 12);
     bind(jvmti_post_done);
   }
+
+  // Dtrace support not implemented.
 }
 
+#ifdef CC_INTERP
 // Convert the current TOP_IJAVA_FRAME into a PARENT_IJAVA_FRAME
 // (using parent_frame_resize) and push a new interpreter
 // TOP_IJAVA_FRAME (using frame_size).
@@ -442,7 +2144,6 @@
   std(R1_SP, _top_ijava_frame_abi(top_frame_sp), R1_SP);
 }
 
-#ifdef CC_INTERP
 // Turn state's interpreter frame into the current TOP_IJAVA_FRAME.
 void InterpreterMacroAssembler::pop_interpreter_frame_to_state(Register state, Register tmp1, Register tmp2, Register tmp3) {
   assert_different_registers(R14_state, R15_prev_state, tmp1, tmp2, tmp3);
@@ -471,7 +2172,6 @@
   // Used for non-initial callers by unextended_sp().
   std(R1_SP, _top_ijava_frame_abi(initial_caller_sp), R1_SP);
 }
-#endif // CC_INTERP
 
 // Set SP to initial caller's sp, but before fix the back chain.
 void InterpreterMacroAssembler::resize_frame_to_initial_caller(Register tmp1, Register tmp2) {
@@ -481,7 +2181,6 @@
   mr(R1_SP, tmp1); // ... and resize to initial caller.
 }
 
-#ifdef CC_INTERP
 // Pop the current interpreter state (without popping the correspoding
 // frame) and restore R14_state and R15_prev_state accordingly.
 // Use prev_state_may_be_0 to indicate whether prev_state may be 0

--- a/src/cpu/ppc/vm/interp_masm_ppc_64.hpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/interp_masm_ppc_64.hpp	Tue Mar 25 12:32:07 2014 -0700
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -29,7 +29,7 @@
 #include "assembler_ppc.inline.hpp"
 #include "interpreter/invocationCounter.hpp"
 
-// This file specializes the assembler with interpreter-specific macros
+// This file specializes the assembler with interpreter-specific macros.
 
 
 class InterpreterMacroAssembler: public MacroAssembler {
@@ -39,15 +39,176 @@
 
   void null_check_throw(Register a, int offset, Register temp_reg);
 
-  // Handy address generation macros
+  void branch_to_entry(address entry, Register Rscratch);
+
+  // Handy address generation macros.
 #define thread_(field_name) in_bytes(JavaThread::field_name ## _offset()), R16_thread
 #define method_(field_name) in_bytes(Method::field_name ## _offset()), R19_method
 
 #ifdef CC_INTERP
 #define state_(field_name)  in_bytes(byte_offset_of(BytecodeInterpreter, field_name)), R14_state
 #define prev_state_(field_name)  in_bytes(byte_offset_of(BytecodeInterpreter, field_name)), R15_prev_state
+  void pop (TosState state) {};           // Not needed.
+  void push(TosState state) {};           // Not needed.
 #endif
 
+#ifndef CC_INTERP
+  virtual void check_and_handle_popframe(Register java_thread);
+  virtual void check_and_handle_earlyret(Register java_thread);
+
+  // Base routine for all dispatches.
+  void dispatch_base(TosState state, address* table);
+
+  void load_earlyret_value(TosState state, Register Rscratch1);
+
+  static const Address l_tmp;
+  static const Address d_tmp;
+
+  // dispatch routines
+  void dispatch_next(TosState state, int step = 0);
+  void dispatch_via (TosState state, address* table);
+  void load_dispatch_table(Register dst, address* table);
+  void dispatch_Lbyte_code(TosState state, Register bytecode, address* table, bool verify = false);
+
+  // Called by shared interpreter generator.
+  void dispatch_prolog(TosState state, int step = 0);
+  void dispatch_epilog(TosState state, int step = 0);
+
+  // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls.
+  void super_call_VM_leaf(Register thread_cache, address entry_point, Register arg_1);
+  void super_call_VM(Register thread_cache, Register oop_result, Register last_java_sp,
+                     address entry_point, Register arg_1, Register arg_2, bool check_exception = true);
+
+  // Generate a subtype check: branch to ok_is_subtype if sub_klass is
+  // a subtype of super_klass.  Blows registers tmp1, tmp2 and tmp3.
+  void gen_subtype_check(Register sub_klass, Register super_klass,
+                         Register tmp1, Register tmp2, Register tmp3, Label &ok_is_subtype);
+
+  // Load object from cpool->resolved_references(index).
+  void load_resolved_reference_at_index(Register result, Register index);
+
+  void generate_stack_overflow_check_with_compare_and_throw(Register Rmem_frame_size, Register Rscratch1);
+  void load_receiver(Register Rparam_count, Register Rrecv_dst);
+
+  // helpers for expression stack
+  void pop_i(     Register r = R17_tos);
+  void pop_ptr(   Register r = R17_tos);
+  void pop_l(     Register r = R17_tos);
+  void pop_f(FloatRegister f = F15_ftos);
+  void pop_d(FloatRegister f = F15_ftos );
+
+  void push_i(     Register r = R17_tos);
+  void push_ptr(   Register r = R17_tos);
+  void push_l(     Register r = R17_tos);
+  void push_f(FloatRegister f = F15_ftos );
+  void push_d(FloatRegister f = F15_ftos);
+
+  void push_2ptrs(Register first, Register second);
+
+  void push_l_pop_d(Register l = R17_tos, FloatRegister d = F15_ftos);
+  void push_d_pop_l(FloatRegister d = F15_ftos, Register l = R17_tos);
+
+  void pop (TosState state);           // transition vtos -> state
+  void push(TosState state);           // transition state -> vtos
+  void empty_expression_stack();       // Resets both Lesp and SP.
+
+ public:
+  // Load values from bytecode stream:
+
+  enum signedOrNot { Signed, Unsigned };
+  enum setCCOrNot  { set_CC, dont_set_CC };
+
+  void get_2_byte_integer_at_bcp(int         bcp_offset,
+                                 Register    Rdst,
+                                 signedOrNot is_signed);
+
+  void get_4_byte_integer_at_bcp(int         bcp_offset,
+                                 Register    Rdst,
+                                 signedOrNot is_signed = Unsigned);
+
+  void get_cache_index_at_bcp(Register Rdst, int bcp_offset, size_t index_size);
+
+  void get_cache_and_index_at_bcp(Register cache, int bcp_offset, size_t index_size = sizeof(u2));
+
+
+  // common code
+
+  void field_offset_at(int n, Register tmp, Register dest, Register base);
+  int  field_offset_at(Register object, address bcp, int offset);
+  void fast_iaaccess(int n, address bcp);
+  void fast_iagetfield(address bcp);
+  void fast_iaputfield(address bcp, bool do_store_check);
+
+  void index_check(Register array, Register index, int index_shift, Register tmp, Register res);
+  void index_check_without_pop(Register array, Register index, int index_shift, Register tmp, Register res);
+
+  void get_const(Register Rdst);
+  void get_constant_pool(Register Rdst);
+  void get_constant_pool_cache(Register Rdst);
+  void get_cpool_and_tags(Register Rcpool, Register Rtags);
+  void is_a(Label& L);
+
+  // Java Call Helpers
+  void call_from_interpreter(Register Rtarget_method, Register Rret_addr, Register Rscratch1, Register Rscratch2);
+
+  // --------------------------------------------------
+
+  void unlock_if_synchronized_method(TosState state, bool throw_monitor_exception = true,
+                                     bool install_monitor_exception = true);
+
+  // Removes the current activation (incl. unlocking of monitors).
+  // Additionally this code is used for earlyReturn in which case we
+  // want to skip throwing an exception and installing an exception.
+  void remove_activation(TosState state,
+                         bool throw_monitor_exception = true,
+                         bool install_monitor_exception = true);
+  void merge_frames(Register Rtop_frame_sp, Register return_pc, Register Rscratch1, Register Rscratch2); // merge top frames
+
+  void add_monitor_to_stack(bool stack_is_empty, Register Rtemp1, Register Rtemp2);
+
+  // Local variable access helpers
+  void load_local_int(Register Rdst_value, Register Rdst_address, Register Rindex);
+  void load_local_long(Register Rdst_value, Register Rdst_address, Register Rindex);
+  void load_local_ptr(Register Rdst_value, Register Rdst_address, Register Rindex);
+  void load_local_float(FloatRegister Rdst_value, Register Rdst_address, Register Rindex);
+  void load_local_double(FloatRegister Rdst_value, Register Rdst_address, Register Rindex);
+  void store_local_int(Register Rvalue, Register Rindex);
+  void store_local_long(Register Rvalue, Register Rindex);
+  void store_local_ptr(Register Rvalue, Register Rindex);
+  void store_local_float(FloatRegister Rvalue, Register Rindex);
+  void store_local_double(FloatRegister Rvalue, Register Rindex);
+
+  // Call VM for std frames
+  // Special call VM versions that check for exceptions and forward exception
+  // via short cut (not via expensive forward exception stub).
+  void check_and_forward_exception(Register Rscratch1, Register Rscratch2);
+  void call_VM(Register oop_result, address entry_point, bool check_exceptions = true);
+  void call_VM(Register oop_result, address entry_point, Register arg_1, bool check_exceptions = true);
+  void call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, bool check_exceptions = true);
+  void call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, Register arg_3, bool check_exceptions = true);
+  // Should not be used:
+  void call_VM(Register oop_result, Register last_java_sp, address entry_point, bool check_exceptions = true) {ShouldNotReachHere();}
+  void call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, bool check_exceptions = true) {ShouldNotReachHere();}
+  void call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, bool check_exceptions = true) {ShouldNotReachHere();}
+  void call_VM(Register oop_result, Register last_java_sp, address entry_point, Register arg_1, Register arg_2, Register arg_3, bool check_exceptions = true) {ShouldNotReachHere();}
+
+  Address first_local_in_stack();
+
+  enum LoadOrStore { load, store };
+  void static_iload_or_store(int which_local, LoadOrStore direction, Register Rtmp);
+  void static_aload_or_store(int which_local, LoadOrStore direction, Register Rtmp);
+  void static_dload_or_store(int which_local, LoadOrStore direction);
+
+  void save_interpreter_state(Register scratch);
+  void restore_interpreter_state(Register scratch, bool bcp_and_mdx_only = false);
+
+  void increment_backedge_counter(const Register Rcounters, Register Rtmp, Register Rtmp2, Register Rscratch);
+  void test_backedge_count_for_osr(Register backedge_count, Register branch_bcp, Register Rtmp);
+
+  void record_static_call_in_profile(Register Rentry, Register Rtmp);
+  void record_receiver_call_in_profile(Register Rklass, Register Rentry, Register Rtmp);
+#endif // !CC_INTERP
+
   void get_method_counters(Register method, Register Rcounters, Label& skip);
   void increment_invocation_counter(Register iv_be_count, Register Rtmp1, Register Rtmp2_r0);
 
@@ -55,12 +216,59 @@
   void lock_object  (Register lock_reg, Register obj_reg);
   void unlock_object(Register lock_reg, bool check_for_exceptions = true);
 
+#ifndef CC_INTERP
+
+  // Interpreter profiling operations
+  void set_method_data_pointer_for_bcp();
+  void test_method_data_pointer(Label& zero_continue);
+  void verify_method_data_pointer();
+  void test_invocation_counter_for_mdp(Register invocation_count, Register Rscratch, Label &profile_continue);
+
+  void set_mdp_data_at(int constant, Register value);
+
+  void increment_mdp_data_at(int constant, Register counter_addr, Register Rbumped_count, bool decrement = false);
+
+  void increment_mdp_data_at(Register counter_addr, Register Rbumped_count, bool decrement = false);
+  void increment_mdp_data_at(Register reg, int constant, Register scratch, Register Rbumped_count, bool decrement = false);
+
+  void set_mdp_flag_at(int flag_constant, Register scratch);
+  void test_mdp_data_at(int offset, Register value, Label& not_equal_continue, Register test_out);
+
+  void update_mdp_by_offset(int offset_of_disp, Register scratch);
+  void update_mdp_by_offset(Register reg, int offset_of_disp,
+                            Register scratch);
+  void update_mdp_by_constant(int constant);
+  void update_mdp_for_ret(TosState state, Register return_bci);
+
+  void profile_taken_branch(Register scratch, Register bumped_count);
+  void profile_not_taken_branch(Register scratch1, Register scratch2);
+  void profile_call(Register scratch1, Register scratch2);
+  void profile_final_call(Register scratch1, Register scratch2);
+  void profile_virtual_call(Register Rreceiver, Register Rscratch1, Register Rscratch2,  bool receiver_can_be_null);
+  void profile_typecheck(Register Rklass, Register Rscratch1, Register Rscratch2);
+  void profile_typecheck_failed(Register Rscratch1, Register Rscratch2);
+  void profile_ret(TosState state, Register return_bci, Register scratch1, Register scratch2);
+  void profile_switch_default(Register scratch1, Register scratch2);
+  void profile_switch_case(Register index, Register scratch1,Register scratch2, Register scratch3);
+  void profile_null_seen(Register Rscratch1, Register Rscratch2);
+  void record_klass_in_profile(Register receiver, Register scratch1, Register scratch2, bool is_virtual_call);
+  void record_klass_in_profile_helper(Register receiver, Register scratch1, Register scratch2, int start_row, Label& done, bool is_virtual_call);
+
+#endif // !CC_INTERP
+
   // Debugging
   void verify_oop(Register reg, TosState state = atos);    // only if +VerifyOops && state == atos
+#ifndef CC_INTERP
+  void verify_oop_or_return_address(Register reg, Register rtmp); // for astore
+  void verify_FPU(int stack_depth, TosState state = ftos);
+#endif // !CC_INTERP
 
-  // support for jvmdi/jvmpi
+  typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode;
+
+  // Support for jvmdi/jvmpi.
   void notify_method_entry();
-  void notify_method_exit(bool is_native_method, TosState state);
+  void notify_method_exit(bool is_native_method, TosState state,
+                          NotifyMethodExitMode mode, bool check_exceptions);
 
 #ifdef CC_INTERP
   // Convert the current TOP_IJAVA_FRAME into a PARENT_IJAVA_FRAME

--- a/src/cpu/ppc/vm/interpreterRT_ppc.cpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/interpreterRT_ppc.cpp	Tue Mar 25 12:32:07 2014 -0700
@@ -109,8 +109,10 @@
 }
 
 void InterpreterRuntime::SignatureHandlerGenerator::generate(uint64_t fingerprint) {
+#if !defined(ABI_ELFv2)
   // Emit fd for current codebuffer. Needs patching!
   __ emit_fd();
+#endif
 
   // Generate code to handle arguments.
   iterate(fingerprint);
@@ -127,11 +129,13 @@
 // Implementation of SignatureHandlerLibrary
 
 void SignatureHandlerLibrary::pd_set_handler(address handler) {
+#if !defined(ABI_ELFv2)
   // patch fd here.
   FunctionDescriptor* fd = (FunctionDescriptor*) handler;
 
   fd->set_entry(handler + (int)sizeof(FunctionDescriptor));
   assert(fd->toc() == (address)0xcafe, "need to adjust TOC here");
+#endif
 }
 
 

--- a/src/cpu/ppc/vm/interpreter_ppc.cpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/interpreter_ppc.cpp	Tue Mar 25 12:32:07 2014 -0700
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -51,10 +51,6 @@
 #include "c1/c1_Runtime1.hpp"
 #endif
 
-#ifndef CC_INTERP
-#error "CC_INTERP must be defined on PPC"
-#endif
-
 #define __ _masm->
 
 #ifdef PRODUCT
@@ -128,13 +124,13 @@
   const Register target_sp      = R28_tmp8;
   const FloatRegister floatSlot = F0;
 
-  address entry = __ emit_fd();
+  address entry = __ function_entry();
 
   __ save_LR_CR(R0);
   __ save_nonvolatile_gprs(R1_SP, _spill_nonvolatiles_neg(r14));
   // We use target_sp for storing arguments in the C frame.
   __ mr(target_sp, R1_SP);
-  __ push_frame_abi112_nonvolatiles(0, R11_scratch1);
+  __ push_frame_reg_args_nonvolatiles(0, R11_scratch1);
 
   __ mr(arg_java, R3_ARG1);
 
@@ -147,7 +143,8 @@
 #ifdef CC_INTERP
   __ ld(R19_method, state_(_method));
 #else
-  __ unimplemented("slow signature handler 1");
+  __ ld(R19_method, 0, target_sp);
+  __ ld(R19_method, _ijava_state_neg(method), R19_method);
 #endif
 
   // Get the result handler.
@@ -157,7 +154,8 @@
 #ifdef CC_INTERP
   __ ld(R19_method, state_(_method));
 #else
-  __ unimplemented("slow signature handler 2");
+  __ ld(R19_method, 0, target_sp);
+  __ ld(R19_method, _ijava_state_neg(method), R19_method);
 #endif
 
   {
@@ -453,7 +451,7 @@
   //
   // Registers alive
   //   R16_thread     - JavaThread*
-  //   R19_method     - callee's methodOop (method to be invoked)
+  //   R19_method     - callee's method (method to be invoked)
   //   R1_SP          - SP prepared such that caller's outgoing args are near top
   //   LR             - return address to caller
   //
@@ -474,7 +472,7 @@
 
   // Push a new C frame and save LR.
   __ save_LR_CR(R0);
-  __ push_frame_abi112(0, R11_scratch1);
+  __ push_frame_reg_args(0, R11_scratch1);
 
   // This is not a leaf but we have a JavaFrameAnchor now and we will
   // check (create) exceptions afterward so this is ok.
@@ -491,7 +489,12 @@
   // Return to frame manager, it will handle the pending exception.
   __ blr();
 #else
-  Unimplemented();
+  // We don't know our caller, so jump to the general forward exception stub,
+  // which will also pop our full frame off. Satisfy the interface of
+  // SharedRuntime::generate_forward_exception()
+  __ load_const_optimized(R11_scratch1, StubRoutines::forward_exception_entry(), R0);
+  __ mtctr(R11_scratch1);
+  __ bctr();
 #endif
 
   return entry;
@@ -500,8 +503,9 @@
 // Call an accessor method (assuming it is resolved, otherwise drop into
 // vanilla (slow path) entry.
 address InterpreterGenerator::generate_accessor_entry(void) {
-  if(!UseFastAccessorMethods && (!FLAG_IS_ERGO(UseFastAccessorMethods)))
+  if (!UseFastAccessorMethods && (!FLAG_IS_ERGO(UseFastAccessorMethods))) {
     return NULL;
+  }
 
   Label Lslow_path, Lacquire;
 
@@ -586,10 +590,14 @@
   // Load from branch table and dispatch (volatile case: one instruction ahead)
   __ sldi(Rflags, Rflags, LogBytesPerWord);
   __ cmpwi(CCR6, Rscratch, 1); // volatile?
-  __ sldi(Rscratch, Rscratch, exact_log2(BytesPerInstWord)); // volatile ? size of 1 instruction : 0
+  if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
+    __ sldi(Rscratch, Rscratch, exact_log2(BytesPerInstWord)); // volatile ? size of 1 instruction : 0
+  }
   __ ldx(Rbtable, Rbtable, Rflags);
 
-  __ subf(Rbtable, Rscratch, Rbtable); // point to volatile/non-volatile entry point
+  if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
+    __ subf(Rbtable, Rscratch, Rbtable); // point to volatile/non-volatile entry point
+  }
   __ mtctr(Rbtable);
   __ bctr();
 
@@ -605,7 +613,7 @@
   }
   assert(all_uninitialized != all_initialized, "consistency"); // either or
 
-  __ sync(); // volatile entry point (one instruction before non-volatile_entry point)
+  __ fence(); // volatile entry point (one instruction before non-volatile_entry point)
   if (branch_table[vtos] == 0) branch_table[vtos] = __ pc(); // non-volatile_entry point
   if (branch_table[dtos] == 0) branch_table[dtos] = __ pc(); // non-volatile_entry point
   if (branch_table[ftos] == 0) branch_table[ftos] = __ pc(); // non-volatile_entry point
@@ -614,7 +622,7 @@
 
   if (branch_table[itos] == 0) { // generate only once
     __ align(32, 28, 28); // align load
-    __ sync(); // volatile entry point (one instruction before non-volatile_entry point)
+    __ fence(); // volatile entry point (one instruction before non-volatile_entry point)
     branch_table[itos] = __ pc(); // non-volatile_entry point
     __ lwax(R3_RET, Rclass_or_obj, Roffset);
     __ beq(CCR6, Lacquire);
@@ -623,7 +631,7 @@
 
   if (branch_table[ltos] == 0) { // generate only once
     __ align(32, 28, 28); // align load
-    __ sync(); // volatile entry point (one instruction before non-volatile_entry point)
+    __ fence(); // volatile entry point (one instruction before non-volatile_entry point)
     branch_table[ltos] = __ pc(); // non-volatile_entry point
     __ ldx(R3_RET, Rclass_or_obj, Roffset);
     __ beq(CCR6, Lacquire);
@@ -632,7 +640,7 @@
 
   if (branch_table[btos] == 0) { // generate only once
     __ align(32, 28, 28); // align load
-    __ sync(); // volatile entry point (one instruction before non-volatile_entry point)
+    __ fence(); // volatile entry point (one instruction before non-volatile_entry point)
     branch_table[btos] = __ pc(); // non-volatile_entry point
     __ lbzx(R3_RET, Rclass_or_obj, Roffset);
     __ extsb(R3_RET, R3_RET);
@@ -642,7 +650,7 @@
 
   if (branch_table[ctos] == 0) { // generate only once
     __ align(32, 28, 28); // align load
-    __ sync(); // volatile entry point (one instruction before non-volatile_entry point)
+    __ fence(); // volatile entry point (one instruction before non-volatile_entry point)
     branch_table[ctos] = __ pc(); // non-volatile_entry point
     __ lhzx(R3_RET, Rclass_or_obj, Roffset);
     __ beq(CCR6, Lacquire);
@@ -651,7 +659,7 @@
 
   if (branch_table[stos] == 0) { // generate only once
     __ align(32, 28, 28); // align load
-    __ sync(); // volatile entry point (one instruction before non-volatile_entry point)
+    __ fence(); // volatile entry point (one instruction before non-volatile_entry point)
     branch_table[stos] = __ pc(); // non-volatile_entry point
     __ lhax(R3_RET, Rclass_or_obj, Roffset);
     __ beq(CCR6, Lacquire);
@@ -660,7 +668,7 @@
 
   if (branch_table[atos] == 0) { // generate only once
     __ align(32, 28, 28); // align load
-    __ sync(); // volatile entry point (one instruction before non-volatile_entry point)
+    __ fence(); // volatile entry point (one instruction before non-volatile_entry point)
     branch_table[atos] = __ pc(); // non-volatile_entry point
     __ load_heap_oop(R3_RET, (RegisterOrConstant)Roffset, Rclass_or_obj);
     __ verify_oop(R3_RET);
@@ -683,10 +691,7 @@
 #endif
 
   __ bind(Lslow_path);
-  assert(Interpreter::entry_for_kind(Interpreter::zerolocals), "Normal entry must have been generated by now");
-  __ load_const_optimized(Rscratch, Interpreter::entry_for_kind(Interpreter::zerolocals), R0);
-  __ mtctr(Rscratch);
-  __ bctr();
+  __ branch_to_entry(Interpreter::entry_for_kind(Interpreter::zerolocals), Rscratch);
   __ flush();
 
   return entry;
@@ -773,10 +778,7 @@
 
     // Generate regular method entry.
     __ bind(slow_path);
-    assert(Interpreter::entry_for_kind(Interpreter::zerolocals), "Normal entry must have been generated by now");
-    __ load_const_optimized(R11_scratch1, Interpreter::entry_for_kind(Interpreter::zerolocals), R0);
-    __ mtctr(R11_scratch1);
-    __ bctr();
+    __ branch_to_entry(Interpreter::entry_for_kind(Interpreter::zerolocals), R11_scratch1);
     __ flush();
 
     return entry;

--- a/src/cpu/ppc/vm/interpreter_ppc.hpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/interpreter_ppc.hpp	Tue Mar 25 12:32:07 2014 -0700
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -28,15 +28,23 @@
 
  public:
 
-  // Stack index relative to tos (which points at value)
+  // Stack index relative to tos (which points at value).
   static int expr_index_at(int i) {
     return stackElementWords * i;
   }
 
-  // Already negated by c++ interpreter
+  // Already negated by c++ interpreter.
   static int local_index_at(int i) {
     assert(i <= 0, "local direction already negated");
     return stackElementWords * i;
   }
 
+#ifndef CC_INTERP
+  // The offset in bytes to access a expression stack slot
+  // relative to the esp pointer.
+  static int expr_offset_in_bytes(int slot) {
+    return stackElementSize * slot + wordSize;
+  }
+#endif
+
 #endif // CPU_PPC_VM_INTERPRETER_PPC_PP

--- a/src/cpu/ppc/vm/javaFrameAnchor_ppc.hpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/javaFrameAnchor_ppc.hpp	Tue Mar 25 12:32:07 2014 -0700
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,10 +26,6 @@
 #ifndef CPU_PPC_VM_JAVAFRAMEANCHOR_PPC_HPP
 #define CPU_PPC_VM_JAVAFRAMEANCHOR_PPC_HPP
 
-#ifndef CC_INTERP
-#error "CC_INTERP must be defined on PPC64"
-#endif
-
 public:
   // Each arch must define reset, save, restore
   // These are used by objects that only care about:

--- a/src/cpu/ppc/vm/macroAssembler_ppc.cpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/macroAssembler_ppc.cpp	Tue Mar 25 12:32:07 2014 -0700
@@ -594,7 +594,13 @@
            "can't identify emitted call");
   } else {
     // variant 1:
-
+#if defined(ABI_ELFv2)
+    nop();
+    calculate_address_from_global_toc(R12, dest, true, true, false);
+    mtctr(R12);
+    nop();
+    nop();
+#else
     mr(R0, R11);  // spill R11 -> R0.
 
     // Load the destination address into CTR,
@@ -604,6 +610,7 @@
     mtctr(R11);
     mr(R11, R0);  // spill R11 <- R0.
     nop();
+#endif
 
     // do the call/jump
     if (link) {
@@ -912,16 +919,16 @@
   }
 }
 
-// Push a frame of size `bytes' plus abi112 on top.
-void MacroAssembler::push_frame_abi112(unsigned int bytes, Register tmp) {
-  push_frame(bytes + frame::abi_112_size, tmp);
+// Push a frame of size `bytes' plus abi_reg_args on top.
+void MacroAssembler::push_frame_reg_args(unsigned int bytes, Register tmp) {
+  push_frame(bytes + frame::abi_reg_args_size, tmp);
 }
 
 // Setup up a new C frame with a spill area for non-volatile GPRs and
 // additional space for local variables.
-void MacroAssembler::push_frame_abi112_nonvolatiles(unsigned int bytes,
-                                                    Register tmp) {
-  push_frame(bytes + frame::abi_112_size + frame::spill_nonvolatiles_size, tmp);
+void MacroAssembler::push_frame_reg_args_nonvolatiles(unsigned int bytes,
+                                                      Register tmp) {
+  push_frame(bytes + frame::abi_reg_args_size + frame::spill_nonvolatiles_size, tmp);
 }
 
 // Pop current C frame.
@@ -929,6 +936,42 @@
   ld(R1_SP, _abi(callers_sp), R1_SP);
 }
 
+#if defined(ABI_ELFv2)
+address MacroAssembler::branch_to(Register r_function_entry, bool and_link) {
+  // TODO(asmundak): make sure the caller uses R12 as function descriptor
+  // most of the times.
+  if (R12 != r_function_entry) {
+    mr(R12, r_function_entry);
+  }
+  mtctr(R12);
+  // Do a call or a branch.
+  if (and_link) {
+    bctrl();
+  } else {
+    bctr();
+  }
+  _last_calls_return_pc = pc();
+
+  return _last_calls_return_pc;
+}
+
+// Call a C function via a function descriptor and use full C
+// calling conventions. Updates and returns _last_calls_return_pc.
+address MacroAssembler::call_c(Register r_function_entry) {
+  return branch_to(r_function_entry, /*and_link=*/true);
+}
+
+// For tail calls: only branch, don't link, so callee returns to caller of this function.
+address MacroAssembler::call_c_and_return_to_caller(Register r_function_entry) {
+  return branch_to(r_function_entry, /*and_link=*/false);
+}
+
+address MacroAssembler::call_c(address function_entry, relocInfo::relocType rt) {
+  load_const(R12, function_entry, R0);
+  return branch_to(R12,  /*and_link=*/true);
+}
+
+#else
 // Generic version of a call to C function via a function descriptor
 // with variable support for C calling conventions (TOC, ENV, etc.).
 // Updates and returns _last_calls_return_pc.
@@ -1077,6 +1120,7 @@
   }
   return _last_calls_return_pc;
 }
+#endif
 
 void MacroAssembler::call_VM_base(Register oop_result,
                                   Register last_java_sp,
@@ -1091,8 +1135,11 @@
 
   // ARG1 must hold thread address.
   mr(R3_ARG1, R16_thread);
-
+#if defined(ABI_ELFv2)
+  address return_pc = call_c(entry_point, relocInfo::none);
+#else
   address return_pc = call_c((FunctionDescriptor*)entry_point, relocInfo::none);
+#endif
 
   reset_last_Java_frame();
 
@@ -1113,7 +1160,11 @@
 
 void MacroAssembler::call_VM_leaf_base(address entry_point) {
   BLOCK_COMMENT("call_VM_leaf {");
+#if defined(ABI_ELFv2)
+  call_c(entry_point, relocInfo::none);
+#else
   call_c(CAST_FROM_FN_PTR(FunctionDescriptor*, entry_point), relocInfo::none);
+#endif
   BLOCK_COMMENT("} call_VM_leaf");
 }
 
@@ -2227,7 +2278,7 @@
   // VM call need frame to access(write) O register.
   if (needs_frame) {
     save_LR_CR(Rtmp1);
-    push_frame_abi112(0, Rtmp2);
+    push_frame_reg_args(0, Rtmp2);
   }
 
   if (Rpre_val->is_volatile() && Robj == noreg) mr(R31, Rpre_val); // Save pre_val across C call if it was preloaded.
@@ -2361,7 +2412,8 @@
 #ifdef CC_INTERP
   ld(tmp1/*pc*/, _top_ijava_frame_abi(frame_manager_lr), sp);
 #else
-  Unimplemented();
+  address entry = pc();
+  load_const_optimized(tmp1, entry);
 #endif
 
   set_last_Java_frame(/*sp=*/sp, /*pc=*/tmp1);
@@ -2421,6 +2473,16 @@
   }
 }
 
+void MacroAssembler::store_klass_gap(Register dst_oop, Register val) {
+  if (UseCompressedClassPointers) {
+    if (val == noreg) {
+      val = R0;
+      li(val, 0);
+    }
+    stw(val, oopDesc::klass_gap_offset_in_bytes(), dst_oop); // klass gap if compressed
+  }
+}
+
 int MacroAssembler::instr_size_for_decode_klass_not_null() {
   if (!UseCompressedClassPointers) return 0;
   int num_instrs = 1;  // shift or move
@@ -3006,13 +3068,13 @@
   mr(R0, tmp);
   // kill tmp
   save_LR_CR(tmp);
-  push_frame_abi112(nbytes_save, tmp);
+  push_frame_reg_args(nbytes_save, tmp);
   // restore tmp
   mr(tmp, R0);
   save_volatile_gprs(R1_SP, 112); // except R0
-  // load FunctionDescriptor**
+  // load FunctionDescriptor** / entry_address *
   load_const(tmp, fd);
-  // load FunctionDescriptor*
+  // load FunctionDescriptor* / entry_address
   ld(tmp, 0, tmp);
   mr(R4_ARG2, oop);
   load_const(R3_ARG1, (address)msg);
@@ -3092,3 +3154,15 @@
 }
 
 #endif // !PRODUCT
+
+SkipIfEqualZero::SkipIfEqualZero(MacroAssembler* masm, Register temp, const bool* flag_addr) : _masm(masm), _label() {
+  int simm16_offset = masm->load_const_optimized(temp, (address)flag_addr, R0, true);
+  assert(sizeof(bool) == 1, "PowerPC ABI");
+  masm->lbz(temp, simm16_offset, temp);
+  masm->cmpwi(CCR0, temp, 0);
+  masm->beq(CCR0, _label);
+}
+
+SkipIfEqualZero::~SkipIfEqualZero() {
+  _masm->bind(_label);
+}

--- a/src/cpu/ppc/vm/macroAssembler_ppc.hpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/macroAssembler_ppc.hpp	Tue Mar 25 12:32:07 2014 -0700
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -279,12 +279,12 @@
   // Push a frame of size `bytes'. No abi space provided.
   void push_frame(unsigned int bytes, Register tmp);
 
-  // Push a frame of size `bytes' plus abi112 on top.
-  void push_frame_abi112(unsigned int bytes, Register tmp);
+  // Push a frame of size `bytes' plus abi_reg_args on top.
+  void push_frame_reg_args(unsigned int bytes, Register tmp);
 
   // Setup up a new C frame with a spill area for non-volatile GPRs and additional
   // space for local variables
-  void push_frame_abi112_nonvolatiles(unsigned int bytes, Register tmp);
+  void push_frame_reg_args_nonvolatiles(unsigned int bytes, Register tmp);
 
   // pop current C frame
   void pop_frame();
@@ -296,17 +296,31 @@
  private:
   address _last_calls_return_pc;
 
+#if defined(ABI_ELFv2)
+  // Generic version of a call to C function.
+  // Updates and returns _last_calls_return_pc.
+  address branch_to(Register function_entry, bool and_link);
+#else
   // Generic version of a call to C function via a function descriptor
   // with variable support for C calling conventions (TOC, ENV, etc.).
   // updates and returns _last_calls_return_pc.
   address branch_to(Register function_descriptor, bool and_link, bool save_toc_before_call,
                     bool restore_toc_after_call, bool load_toc_of_callee, bool load_env_of_callee);
+#endif
 
  public:
 
   // Get the pc where the last call will return to. returns _last_calls_return_pc.
   inline address last_calls_return_pc();
 
+#if defined(ABI_ELFv2)
+  // Call a C function via a function descriptor and use full C
+  // calling conventions. Updates and returns _last_calls_return_pc.
+  address call_c(Register function_entry);
+  // For tail calls: only branch, don't link, so callee returns to caller of this function.
+  address call_c_and_return_to_caller(Register function_entry);
+  address call_c(address function_entry, relocInfo::relocType rt);
+#else
   // Call a C function via a function descriptor and use full C
   // calling conventions. Updates and returns _last_calls_return_pc.
   address call_c(Register function_descriptor);
@@ -315,6 +329,7 @@
   address call_c(const FunctionDescriptor* function_descriptor, relocInfo::relocType rt);
   address call_c_using_toc(const FunctionDescriptor* function_descriptor, relocInfo::relocType rt,
                            Register toc);
+#endif
 
  protected:
 
@@ -551,12 +566,14 @@
 
   // Load heap oop and decompress. Loaded oop may not be null.
   inline void load_heap_oop_not_null(Register d, RegisterOrConstant offs, Register s1 = noreg);
+  inline void store_heap_oop_not_null(Register d, RegisterOrConstant offs, Register s1,
+                                      /*specify if d must stay uncompressed*/ Register tmp = noreg);
 
   // Null allowed.
   inline void load_heap_oop(Register d, RegisterOrConstant offs, Register s1 = noreg);
 
   // Encode/decode heap oop. Oop may not be null, else en/decoding goes wrong.
-  inline void encode_heap_oop_not_null(Register d);
+  inline Register encode_heap_oop_not_null(Register d, Register src = noreg);
   inline void decode_heap_oop_not_null(Register d);
 
   // Null allowed.
@@ -566,6 +583,7 @@
   void load_klass(Register dst, Register src);
   void load_klass_with_trap_null_check(Register dst, Register src);
   void store_klass(Register dst_oop, Register klass, Register tmp = R0);
+  void store_klass_gap(Register dst_oop, Register val = noreg); // Will store 0 if val not specified.
   static int instr_size_for_decode_klass_not_null();
   void decode_klass_not_null(Register dst, Register src = noreg);
   void encode_klass_not_null(Register dst, Register src = noreg);
@@ -649,6 +667,11 @@
   void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}
   void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line) {}
 
+  // Convenience method returning function entry. For the ELFv1 case
+  // creates function descriptor at the current address and returs
+  // the pointer to it. For the ELFv2 case returns the current address.
+  inline address function_entry();
+
 #define verify_method_ptr(reg) _verify_method_ptr(reg, "broken method " #reg, __FILE__, __LINE__)
 #define verify_klass_ptr(reg) _verify_klass_ptr(reg, "broken klass " #reg, __FILE__, __LINE__)
 
@@ -673,4 +696,21 @@
   void zap_from_to(Register low, int before, Register high, int after, Register val, Register addr) PRODUCT_RETURN;
 };
 
+// class SkipIfEqualZero:
+//
+// Instantiating this class will result in assembly code being output that will
+// jump around any code emitted between the creation of the instance and it's
+// automatic destruction at the end of a scope block, depending on the value of
+// the flag passed to the constructor, which will be checked at run-time.
+class SkipIfEqualZero : public StackObj {
+ private:
+  MacroAssembler* _masm;
+  Label _label;
+
+ public:
+   // 'Temp' is a temp register that this object can use (and trash).
+   explicit SkipIfEqualZero(MacroAssembler*, Register temp, const bool* flag_addr);
+   ~SkipIfEqualZero();
+};
+
 #endif // CPU_PPC_VM_MACROASSEMBLER_PPC_HPP

--- a/src/cpu/ppc/vm/macroAssembler_ppc.inline.hpp	Thu Mar 20 13:44:05 2014 -0700
+++ b/src/cpu/ppc/vm/macroAssembler_ppc.inline.hpp	Tue Mar 25 12:32:07 2014 -0700
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright 2012, 2014 SAP AG. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -321,6 +321,15 @@
   }
 }
 
+inline void MacroAssembler::store_heap_oop_not_null(Register d, RegisterOrConstant offs, Register s1, Register tmp) {
+  if (UseCompressedOops) {
+    Register compressedOop = encode_heap_oop_not_null((tmp != noreg) ? tmp : d, d);
+    stw(compressedOop, offs, s1);
+  } else {
+    std(d, offs, s1);
+  }
+}
+
 inline void MacroAssembler::load_heap_oop(Register d, RegisterOrConstant offs, Register s1) {
   if (UseCompressedOops) {
     lwz(d, offs, s1);
@@ -330,13 +339,17 @@
   }
 }
 
-inline void MacroAssembler::encode_heap_oop_not_null(Register d) {
+inline Register MacroAssembler::encode_heap_oop_not_null(Register d, Register src) {
+  Register current = (src!=noreg) ? src : d; // Compressed oop is in d if no src provided.
   if (Universe::narrow_oop_base() != NULL) {
-    sub(d, d, R30);
+    sub(d, current, R30);
+    current = d;
   }
   if (Universe::narrow_oop_shift() != 0) {
-    srdi(d, d, LogMinObjAlignmentInBytes);
+    srdi(d, current, LogMinObjAlignmentInBytes);
+    current = d;
   }
+  return current; // Encoded oop is in this register.
 }
 
 inline void MacroAssembler::decode_heap_oop_not_null(Register d) {
@@ -385,4 +398,10 @@
   twi(traptoEqual | traptoGreaterThanUnsigned, a/*reg a*/, si16);
 }
 
+#if defined(ABI_ELFv2)
+inline address MacroAssembler::function_entry() { return pc(); }
+#else
+inline address MacroAssembler::function_entry() { return emit_fd(); }
+#endif
+
 #endif // CPU_PPC_VM_MACROASSEMBLER_PPC_INLINE_HPP