changeset 8683:850b88dc0981

8071731: Better scaling for C1 Reviewed-by: kvn, iveresov
author roland
date Mon, 09 Mar 2015 09:59:53 +0100
parents d264a730c1f1
children 250c345b7698
files src/share/vm/c1/c1_LIRGenerator.cpp
diffstat 1 files changed, 9 insertions(+), 1 deletions(-) [+]
line wrap: on
line diff
--- a/src/share/vm/c1/c1_LIRGenerator.cpp	Thu Jul 09 22:46:16 2015 -0700
+++ b/src/share/vm/c1/c1_LIRGenerator.cpp	Mon Mar 09 09:59:53 2015 +0100
@@ -2208,7 +2208,15 @@
   if (log2_scale != 0) {
     // temporary fix (platform dependent code without shift on Intel would be better)
     // TODO: ARM also allows embedded shift in the address
-    __ shift_left(index_op, log2_scale, index_op);
+    LIR_Opr tmp = new_pointer_register();
+    if (TwoOperandLIRForm) {
+      __ move(index_op, tmp);
+      index_op = tmp;
+    }
+    __ shift_left(index_op, log2_scale, tmp);
+    if (!TwoOperandLIRForm) {
+      index_op = tmp;
+    }
   }
 
   LIR_Address* addr = new LIR_Address(base_op, index_op, x->basic_type());