annotate src/cpu/x86/vm/c1_MacroAssembler_x86.cpp @ 4731:1f114331df92

8023730: new hotspot build - hs24-b57 Reviewed-by: jcoomes
author amurillo
date Mon, 26 Aug 2013 12:06:09 -0700
parents 069ab3f976d3
children
rev   line source
duke@0 1 /*
phh@1993 2 * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved.
duke@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@0 4 *
duke@0 5 * This code is free software; you can redistribute it and/or modify it
duke@0 6 * under the terms of the GNU General Public License version 2 only, as
duke@0 7 * published by the Free Software Foundation.
duke@0 8 *
duke@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@0 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@0 13 * accompanied this code).
duke@0 14 *
duke@0 15 * You should have received a copy of the GNU General Public License version
duke@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@0 18 *
trims@1489 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1489 20 * or visit www.oracle.com if you need additional information or have any
trims@1489 21 * questions.
duke@0 22 *
duke@0 23 */
duke@0 24
stefank@1869 25 #include "precompiled.hpp"
stefank@1869 26 #include "c1/c1_MacroAssembler.hpp"
stefank@1869 27 #include "c1/c1_Runtime1.hpp"
stefank@1869 28 #include "classfile/systemDictionary.hpp"
stefank@1869 29 #include "gc_interface/collectedHeap.hpp"
stefank@1869 30 #include "interpreter/interpreter.hpp"
stefank@1869 31 #include "oops/arrayOop.hpp"
stefank@1869 32 #include "oops/markOop.hpp"
stefank@1869 33 #include "runtime/basicLock.hpp"
stefank@1869 34 #include "runtime/biasedLocking.hpp"
stefank@1869 35 #include "runtime/os.hpp"
stefank@1869 36 #include "runtime/stubRoutines.hpp"
duke@0 37
duke@0 38 int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Register scratch, Label& slow_case) {
never@297 39 const int aligned_mask = BytesPerWord -1;
duke@0 40 const int hdr_offset = oopDesc::mark_offset_in_bytes();
duke@0 41 assert(hdr == rax, "hdr must be rax, for the cmpxchg instruction");
duke@0 42 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
duke@0 43 Label done;
duke@0 44 int null_check_offset = -1;
duke@0 45
duke@0 46 verify_oop(obj);
duke@0 47
duke@0 48 // save object being locked into the BasicObjectLock
never@297 49 movptr(Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()), obj);
duke@0 50
duke@0 51 if (UseBiasedLocking) {
duke@0 52 assert(scratch != noreg, "should have scratch register at this point");
duke@0 53 null_check_offset = biased_locking_enter(disp_hdr, obj, hdr, scratch, false, done, &slow_case);
duke@0 54 } else {
duke@0 55 null_check_offset = offset();
duke@0 56 }
duke@0 57
duke@0 58 // Load object header
never@297 59 movptr(hdr, Address(obj, hdr_offset));
duke@0 60 // and mark it as unlocked
never@297 61 orptr(hdr, markOopDesc::unlocked_value);
duke@0 62 // save unlocked object header into the displaced header location on the stack
never@297 63 movptr(Address(disp_hdr, 0), hdr);
duke@0 64 // test if object header is still the same (i.e. unlocked), and if so, store the
duke@0 65 // displaced header address in the object header - if it is not the same, get the
duke@0 66 // object header instead
duke@0 67 if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
never@297 68 cmpxchgptr(disp_hdr, Address(obj, hdr_offset));
duke@0 69 // if the object header was the same, we're done
duke@0 70 if (PrintBiasedLockingStatistics) {
duke@0 71 cond_inc32(Assembler::equal,
duke@0 72 ExternalAddress((address)BiasedLocking::fast_path_entry_count_addr()));
duke@0 73 }
duke@0 74 jcc(Assembler::equal, done);
duke@0 75 // if the object header was not the same, it is now in the hdr register
duke@0 76 // => test if it is a stack pointer into the same stack (recursive locking), i.e.:
duke@0 77 //
duke@0 78 // 1) (hdr & aligned_mask) == 0
duke@0 79 // 2) rsp <= hdr
duke@0 80 // 3) hdr <= rsp + page_size
duke@0 81 //
duke@0 82 // these 3 tests can be done by evaluating the following expression:
duke@0 83 //
duke@0 84 // (hdr - rsp) & (aligned_mask - page_size)
duke@0 85 //
duke@0 86 // assuming both the stack pointer and page_size have their least
duke@0 87 // significant 2 bits cleared and page_size is a power of 2
never@297 88 subptr(hdr, rsp);
never@297 89 andptr(hdr, aligned_mask - os::vm_page_size());
duke@0 90 // for recursive locking, the result is zero => save it in the displaced header
duke@0 91 // location (NULL in the displaced hdr location indicates recursive locking)
never@297 92 movptr(Address(disp_hdr, 0), hdr);
duke@0 93 // otherwise we don't care about the result and handle locking via runtime call
duke@0 94 jcc(Assembler::notZero, slow_case);
duke@0 95 // done
duke@0 96 bind(done);
duke@0 97 return null_check_offset;
duke@0 98 }
duke@0 99
duke@0 100
duke@0 101 void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
never@297 102 const int aligned_mask = BytesPerWord -1;
duke@0 103 const int hdr_offset = oopDesc::mark_offset_in_bytes();
duke@0 104 assert(disp_hdr == rax, "disp_hdr must be rax, for the cmpxchg instruction");
duke@0 105 assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
duke@0 106 Label done;
duke@0 107
duke@0 108 if (UseBiasedLocking) {
duke@0 109 // load object
never@297 110 movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
duke@0 111 biased_locking_exit(obj, hdr, done);
duke@0 112 }
duke@0 113
duke@0 114 // load displaced header
never@297 115 movptr(hdr, Address(disp_hdr, 0));
duke@0 116 // if the loaded hdr is NULL we had recursive locking
never@297 117 testptr(hdr, hdr);
duke@0 118 // if we had recursive locking, we are done
duke@0 119 jcc(Assembler::zero, done);
duke@0 120 if (!UseBiasedLocking) {
duke@0 121 // load object
never@297 122 movptr(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
duke@0 123 }
duke@0 124 verify_oop(obj);
duke@0 125 // test if object header is pointing to the displaced header, and if so, restore
duke@0 126 // the displaced header in the object - if the object header is not pointing to
duke@0 127 // the displaced header, get the object header instead
duke@0 128 if (os::is_MP()) MacroAssembler::lock(); // must be immediately before cmpxchg!
never@297 129 cmpxchgptr(hdr, Address(obj, hdr_offset));
duke@0 130 // if the object header was not pointing to the displaced header,
duke@0 131 // we do unlocking via runtime call
duke@0 132 jcc(Assembler::notEqual, slow_case);
duke@0 133 // done
duke@0 134 bind(done);
duke@0 135 }
duke@0 136
duke@0 137
duke@0 138 // Defines obj, preserves var_size_in_bytes
duke@0 139 void C1_MacroAssembler::try_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2, Label& slow_case) {
duke@0 140 if (UseTLAB) {
duke@0 141 tlab_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, t2, slow_case);
duke@0 142 } else {
duke@0 143 eden_allocate(obj, var_size_in_bytes, con_size_in_bytes, t1, slow_case);
phh@1993 144 incr_allocated_bytes(noreg, var_size_in_bytes, con_size_in_bytes, t1);
duke@0 145 }
duke@0 146 }
duke@0 147
duke@0 148
duke@0 149 void C1_MacroAssembler::initialize_header(Register obj, Register klass, Register len, Register t1, Register t2) {
duke@0 150 assert_different_registers(obj, klass, len);
duke@0 151 if (UseBiasedLocking && !len->is_valid()) {
duke@0 152 assert_different_registers(obj, klass, len, t1, t2);
stefank@2953 153 movptr(t1, Address(klass, Klass::prototype_header_offset()));
never@297 154 movptr(Address(obj, oopDesc::mark_offset_in_bytes()), t1);
duke@0 155 } else {
never@297 156 // This assumes that all prototype bits fit in an int32_t
never@297 157 movptr(Address(obj, oopDesc::mark_offset_in_bytes ()), (int32_t)(intptr_t)markOopDesc::prototype());
duke@0 158 }
iveresov@1871 159 #ifdef _LP64
iveresov@1871 160 if (UseCompressedOops) { // Take care not to kill klass
iveresov@1871 161 movptr(t1, klass);
iveresov@1871 162 encode_heap_oop_not_null(t1);
iveresov@1871 163 movl(Address(obj, oopDesc::klass_offset_in_bytes()), t1);
iveresov@1871 164 } else
iveresov@1871 165 #endif
iveresov@1871 166 {
iveresov@1871 167 movptr(Address(obj, oopDesc::klass_offset_in_bytes()), klass);
iveresov@1871 168 }
duke@0 169
duke@0 170 if (len->is_valid()) {
duke@0 171 movl(Address(obj, arrayOopDesc::length_offset_in_bytes()), len);
duke@0 172 }
iveresov@1871 173 #ifdef _LP64
iveresov@1871 174 else if (UseCompressedOops) {
iveresov@1871 175 xorptr(t1, t1);
iveresov@1871 176 store_klass_gap(obj, t1);
iveresov@1871 177 }
iveresov@1871 178 #endif
duke@0 179 }
duke@0 180
duke@0 181
duke@0 182 // preserves obj, destroys len_in_bytes
duke@0 183 void C1_MacroAssembler::initialize_body(Register obj, Register len_in_bytes, int hdr_size_in_bytes, Register t1) {
duke@0 184 Label done;
duke@0 185 assert(obj != len_in_bytes && obj != t1 && t1 != len_in_bytes, "registers must be different");
duke@0 186 assert((hdr_size_in_bytes & (BytesPerWord - 1)) == 0, "header size is not a multiple of BytesPerWord");
duke@0 187 Register index = len_in_bytes;
never@297 188 // index is positive and ptr sized
never@297 189 subptr(index, hdr_size_in_bytes);
duke@0 190 jcc(Assembler::zero, done);
duke@0 191 // initialize topmost word, divide index by 2, check if odd and test if zero
duke@0 192 // note: for the remaining code to work, index must be a multiple of BytesPerWord
duke@0 193 #ifdef ASSERT
duke@0 194 { Label L;
never@297 195 testptr(index, BytesPerWord - 1);
duke@0 196 jcc(Assembler::zero, L);
duke@0 197 stop("index is not a multiple of BytesPerWord");
duke@0 198 bind(L);
duke@0 199 }
duke@0 200 #endif
never@297 201 xorptr(t1, t1); // use _zero reg to clear memory (shorter code)
duke@0 202 if (UseIncDec) {
never@297 203 shrptr(index, 3); // divide by 8/16 and set carry flag if bit 2 was set
duke@0 204 } else {
never@297 205 shrptr(index, 2); // use 2 instructions to avoid partial flag stall
never@297 206 shrptr(index, 1);
duke@0 207 }
never@297 208 #ifndef _LP64
duke@0 209 // index could have been not a multiple of 8 (i.e., bit 2 was set)
duke@0 210 { Label even;
duke@0 211 // note: if index was a multiple of 8, than it cannot
duke@0 212 // be 0 now otherwise it must have been 0 before
duke@0 213 // => if it is even, we don't need to check for 0 again
duke@0 214 jcc(Assembler::carryClear, even);
duke@0 215 // clear topmost word (no jump needed if conditional assignment would work here)
never@297 216 movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 0*BytesPerWord), t1);
duke@0 217 // index could be 0 now, need to check again
duke@0 218 jcc(Assembler::zero, done);
duke@0 219 bind(even);
duke@0 220 }
never@297 221 #endif // !_LP64
duke@0 222 // initialize remaining object fields: rdx is a multiple of 2 now
duke@0 223 { Label loop;
duke@0 224 bind(loop);
never@297 225 movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 1*BytesPerWord), t1);
never@297 226 NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - 2*BytesPerWord), t1);)
duke@0 227 decrement(index);
duke@0 228 jcc(Assembler::notZero, loop);
duke@0 229 }
duke@0 230
duke@0 231 // done
duke@0 232 bind(done);
duke@0 233 }
duke@0 234
duke@0 235
duke@0 236 void C1_MacroAssembler::allocate_object(Register obj, Register t1, Register t2, int header_size, int object_size, Register klass, Label& slow_case) {
duke@0 237 assert(obj == rax, "obj must be in rax, for cmpxchg");
phh@1993 238 assert_different_registers(obj, t1, t2); // XXX really?
duke@0 239 assert(header_size >= 0 && object_size >= header_size, "illegal sizes");
duke@0 240
duke@0 241 try_allocate(obj, noreg, object_size * BytesPerWord, t1, t2, slow_case);
duke@0 242
duke@0 243 initialize_object(obj, klass, noreg, object_size * HeapWordSize, t1, t2);
duke@0 244 }
duke@0 245
duke@0 246 void C1_MacroAssembler::initialize_object(Register obj, Register klass, Register var_size_in_bytes, int con_size_in_bytes, Register t1, Register t2) {
duke@0 247 assert((con_size_in_bytes & MinObjAlignmentInBytesMask) == 0,
duke@0 248 "con_size_in_bytes is not multiple of alignment");
iveresov@1871 249 const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
duke@0 250
duke@0 251 initialize_header(obj, klass, noreg, t1, t2);
duke@0 252
duke@0 253 // clear rest of allocated space
duke@0 254 const Register t1_zero = t1;
duke@0 255 const Register index = t2;
duke@0 256 const int threshold = 6 * BytesPerWord; // approximate break even point for code size (see comments below)
duke@0 257 if (var_size_in_bytes != noreg) {
never@297 258 mov(index, var_size_in_bytes);
duke@0 259 initialize_body(obj, index, hdr_size_in_bytes, t1_zero);
duke@0 260 } else if (con_size_in_bytes <= threshold) {
duke@0 261 // use explicit null stores
duke@0 262 // code size = 2 + 3*n bytes (n = number of fields to clear)
never@297 263 xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
duke@0 264 for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += BytesPerWord)
never@297 265 movptr(Address(obj, i), t1_zero);
duke@0 266 } else if (con_size_in_bytes > hdr_size_in_bytes) {
duke@0 267 // use loop to null out the fields
duke@0 268 // code size = 16 bytes for even n (n = number of fields to clear)
duke@0 269 // initialize last object field first if odd number of fields
never@297 270 xorptr(t1_zero, t1_zero); // use t1_zero reg to clear memory (shorter code)
never@297 271 movptr(index, (con_size_in_bytes - hdr_size_in_bytes) >> 3);
duke@0 272 // initialize last object field if constant size is odd
duke@0 273 if (((con_size_in_bytes - hdr_size_in_bytes) & 4) != 0)
never@297 274 movptr(Address(obj, con_size_in_bytes - (1*BytesPerWord)), t1_zero);
duke@0 275 // initialize remaining object fields: rdx is a multiple of 2
duke@0 276 { Label loop;
duke@0 277 bind(loop);
never@297 278 movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (1*BytesPerWord)),
never@297 279 t1_zero);
never@297 280 NOT_LP64(movptr(Address(obj, index, Address::times_8, hdr_size_in_bytes - (2*BytesPerWord)),
never@297 281 t1_zero);)
duke@0 282 decrement(index);
duke@0 283 jcc(Assembler::notZero, loop);
duke@0 284 }
duke@0 285 }
duke@0 286
kvn@762 287 if (CURRENT_ENV->dtrace_alloc_probes()) {
duke@0 288 assert(obj == rax, "must be");
duke@0 289 call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
duke@0 290 }
duke@0 291
duke@0 292 verify_oop(obj);
duke@0 293 }
duke@0 294
duke@0 295 void C1_MacroAssembler::allocate_array(Register obj, Register len, Register t1, Register t2, int header_size, Address::ScaleFactor f, Register klass, Label& slow_case) {
duke@0 296 assert(obj == rax, "obj must be in rax, for cmpxchg");
duke@0 297 assert_different_registers(obj, len, t1, t2, klass);
duke@0 298
duke@0 299 // determine alignment mask
never@297 300 assert(!(BytesPerWord & 1), "must be a multiple of 2 for masking code to work");
duke@0 301
duke@0 302 // check for negative or excessive length
never@297 303 cmpptr(len, (int32_t)max_array_allocation_length);
duke@0 304 jcc(Assembler::above, slow_case);
duke@0 305
duke@0 306 const Register arr_size = t2; // okay to be the same
duke@0 307 // align object end
never@297 308 movptr(arr_size, (int32_t)header_size * BytesPerWord + MinObjAlignmentInBytesMask);
never@297 309 lea(arr_size, Address(arr_size, len, f));
never@297 310 andptr(arr_size, ~MinObjAlignmentInBytesMask);
duke@0 311
duke@0 312 try_allocate(obj, arr_size, 0, t1, t2, slow_case);
duke@0 313
duke@0 314 initialize_header(obj, klass, len, t1, t2);
duke@0 315
duke@0 316 // clear rest of allocated space
duke@0 317 const Register len_zero = len;
duke@0 318 initialize_body(obj, arr_size, header_size * BytesPerWord, len_zero);
duke@0 319
kvn@762 320 if (CURRENT_ENV->dtrace_alloc_probes()) {
duke@0 321 assert(obj == rax, "must be");
duke@0 322 call(RuntimeAddress(Runtime1::entry_for(Runtime1::dtrace_object_alloc_id)));
duke@0 323 }
duke@0 324
duke@0 325 verify_oop(obj);
duke@0 326 }
duke@0 327
duke@0 328
duke@0 329
duke@0 330 void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
duke@0 331 verify_oop(receiver);
duke@0 332 // explicit NULL check not needed since load from [klass_offset] causes a trap
duke@0 333 // check against inline cache
duke@0 334 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()), "must add explicit null check");
duke@0 335 int start_offset = offset();
iveresov@1871 336
iveresov@1871 337 if (UseCompressedOops) {
iveresov@1871 338 load_klass(rscratch1, receiver);
iveresov@1871 339 cmpptr(rscratch1, iCache);
iveresov@1871 340 } else {
iveresov@1871 341 cmpptr(iCache, Address(receiver, oopDesc::klass_offset_in_bytes()));
iveresov@1871 342 }
duke@0 343 // if icache check fails, then jump to runtime routine
duke@0 344 // Note: RECEIVER must still contain the receiver!
duke@0 345 jump_cc(Assembler::notEqual,
duke@0 346 RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
never@297 347 const int ic_cmp_size = LP64_ONLY(10) NOT_LP64(9);
iveresov@1871 348 assert(UseCompressedOops || offset() - start_offset == ic_cmp_size, "check alignment in emit_method_entry");
duke@0 349 }
duke@0 350
duke@0 351
duke@0 352 void C1_MacroAssembler::build_frame(int frame_size_in_bytes) {
duke@0 353 // Make sure there is enough stack space for this method's activation.
duke@0 354 // Note that we do this before doing an enter(). This matches the
duke@0 355 // ordering of C2's stack overflow check / rsp decrement and allows
duke@0 356 // the SharedRuntime stack overflow handling to be consistent
duke@0 357 // between the two compilers.
duke@0 358 generate_stack_overflow_check(frame_size_in_bytes);
duke@0 359
twisti@1260 360 push(rbp);
duke@0 361 #ifdef TIERED
duke@0 362 // c2 leaves fpu stack dirty. Clean it on entry
duke@0 363 if (UseSSE < 2 ) {
duke@0 364 empty_FPU_stack();
duke@0 365 }
duke@0 366 #endif // TIERED
duke@0 367 decrement(rsp, frame_size_in_bytes); // does not emit code for frame_size == 0
duke@0 368 }
duke@0 369
duke@0 370
twisti@1260 371 void C1_MacroAssembler::remove_frame(int frame_size_in_bytes) {
twisti@1260 372 increment(rsp, frame_size_in_bytes); // Does not emit code for frame_size == 0
twisti@1260 373 pop(rbp);
twisti@1260 374 }
twisti@1260 375
twisti@1260 376
duke@0 377 void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
duke@0 378 if (C1Breakpoint) int3();
duke@0 379 inline_cache_check(receiver, ic_klass);
duke@0 380 }
duke@0 381
duke@0 382
duke@0 383 void C1_MacroAssembler::verified_entry() {
kvn@3138 384 if (C1Breakpoint || VerifyFPU || !UseStackBanging) {
kvn@3138 385 // Verified Entry first instruction should be 5 bytes long for correct
kvn@3138 386 // patching by patch_verified_entry().
kvn@3138 387 //
kvn@3138 388 // C1Breakpoint and VerifyFPU have one byte first instruction.
kvn@3138 389 // Also first instruction will be one byte "push(rbp)" if stack banging
kvn@3138 390 // code is not generated (see build_frame() above).
kvn@3138 391 // For all these cases generate long instruction first.
kvn@3138 392 fat_nop();
kvn@3138 393 }
duke@0 394 if (C1Breakpoint)int3();
duke@0 395 // build frame
duke@0 396 verify_FPU(0, "method_entry");
duke@0 397 }
duke@0 398
duke@0 399
duke@0 400 #ifndef PRODUCT
duke@0 401
duke@0 402 void C1_MacroAssembler::verify_stack_oop(int stack_offset) {
duke@0 403 if (!VerifyOops) return;
duke@0 404 verify_oop_addr(Address(rsp, stack_offset));
duke@0 405 }
duke@0 406
duke@0 407 void C1_MacroAssembler::verify_not_null_oop(Register r) {
duke@0 408 if (!VerifyOops) return;
duke@0 409 Label not_null;
never@297 410 testptr(r, r);
duke@0 411 jcc(Assembler::notZero, not_null);
duke@0 412 stop("non-null oop required");
duke@0 413 bind(not_null);
duke@0 414 verify_oop(r);
duke@0 415 }
duke@0 416
duke@0 417 void C1_MacroAssembler::invalidate_registers(bool inv_rax, bool inv_rbx, bool inv_rcx, bool inv_rdx, bool inv_rsi, bool inv_rdi) {
duke@0 418 #ifdef ASSERT
never@297 419 if (inv_rax) movptr(rax, 0xDEAD);
never@297 420 if (inv_rbx) movptr(rbx, 0xDEAD);
never@297 421 if (inv_rcx) movptr(rcx, 0xDEAD);
never@297 422 if (inv_rdx) movptr(rdx, 0xDEAD);
never@297 423 if (inv_rsi) movptr(rsi, 0xDEAD);
never@297 424 if (inv_rdi) movptr(rdi, 0xDEAD);
duke@0 425 #endif
duke@0 426 }
duke@0 427
duke@0 428 #endif // ifndef PRODUCT