annotate src/share/vm/c1/c1_LIRAssembler.cpp @ 0:a61af66fc99e

Initial load
author duke
date Sat, 01 Dec 2007 00:00:00 +0000
parents
children dc7f315e41f7 37f87013dfd8
rev   line source
duke@0 1 /*
duke@0 2 * Copyright 2000-2006 Sun Microsystems, Inc. All Rights Reserved.
duke@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@0 4 *
duke@0 5 * This code is free software; you can redistribute it and/or modify it
duke@0 6 * under the terms of the GNU General Public License version 2 only, as
duke@0 7 * published by the Free Software Foundation.
duke@0 8 *
duke@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@0 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@0 13 * accompanied this code).
duke@0 14 *
duke@0 15 * You should have received a copy of the GNU General Public License version
duke@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@0 18 *
duke@0 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
duke@0 20 * CA 95054 USA or visit www.sun.com if you need additional information or
duke@0 21 * have any questions.
duke@0 22 *
duke@0 23 */
duke@0 24
duke@0 25 # include "incls/_precompiled.incl"
duke@0 26 # include "incls/_c1_LIRAssembler.cpp.incl"
duke@0 27
duke@0 28
duke@0 29 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
duke@0 30 // we must have enough patching space so that call can be inserted
duke@0 31 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeCall::instruction_size) {
duke@0 32 _masm->nop();
duke@0 33 }
duke@0 34 patch->install(_masm, patch_code, obj, info);
duke@0 35 append_patching_stub(patch);
duke@0 36
duke@0 37 #ifdef ASSERT
duke@0 38 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->bci());
duke@0 39 if (patch->id() == PatchingStub::access_field_id) {
duke@0 40 switch (code) {
duke@0 41 case Bytecodes::_putstatic:
duke@0 42 case Bytecodes::_getstatic:
duke@0 43 case Bytecodes::_putfield:
duke@0 44 case Bytecodes::_getfield:
duke@0 45 break;
duke@0 46 default:
duke@0 47 ShouldNotReachHere();
duke@0 48 }
duke@0 49 } else if (patch->id() == PatchingStub::load_klass_id) {
duke@0 50 switch (code) {
duke@0 51 case Bytecodes::_putstatic:
duke@0 52 case Bytecodes::_getstatic:
duke@0 53 case Bytecodes::_new:
duke@0 54 case Bytecodes::_anewarray:
duke@0 55 case Bytecodes::_multianewarray:
duke@0 56 case Bytecodes::_instanceof:
duke@0 57 case Bytecodes::_checkcast:
duke@0 58 case Bytecodes::_ldc:
duke@0 59 case Bytecodes::_ldc_w:
duke@0 60 break;
duke@0 61 default:
duke@0 62 ShouldNotReachHere();
duke@0 63 }
duke@0 64 } else {
duke@0 65 ShouldNotReachHere();
duke@0 66 }
duke@0 67 #endif
duke@0 68 }
duke@0 69
duke@0 70
duke@0 71 //---------------------------------------------------------------
duke@0 72
duke@0 73
duke@0 74 LIR_Assembler::LIR_Assembler(Compilation* c):
duke@0 75 _compilation(c)
duke@0 76 , _masm(c->masm())
duke@0 77 , _frame_map(c->frame_map())
duke@0 78 , _current_block(NULL)
duke@0 79 , _pending_non_safepoint(NULL)
duke@0 80 , _pending_non_safepoint_offset(0)
duke@0 81 {
duke@0 82 _slow_case_stubs = new CodeStubList();
duke@0 83 }
duke@0 84
duke@0 85
duke@0 86 LIR_Assembler::~LIR_Assembler() {
duke@0 87 }
duke@0 88
duke@0 89
duke@0 90 void LIR_Assembler::append_patching_stub(PatchingStub* stub) {
duke@0 91 _slow_case_stubs->append(stub);
duke@0 92 }
duke@0 93
duke@0 94
duke@0 95 void LIR_Assembler::check_codespace() {
duke@0 96 CodeSection* cs = _masm->code_section();
duke@0 97 if (cs->remaining() < (int)(1*K)) {
duke@0 98 BAILOUT("CodeBuffer overflow");
duke@0 99 }
duke@0 100 }
duke@0 101
duke@0 102
duke@0 103 void LIR_Assembler::emit_code_stub(CodeStub* stub) {
duke@0 104 _slow_case_stubs->append(stub);
duke@0 105 }
duke@0 106
duke@0 107 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
duke@0 108 for (int m = 0; m < stub_list->length(); m++) {
duke@0 109 CodeStub* s = (*stub_list)[m];
duke@0 110
duke@0 111 check_codespace();
duke@0 112 CHECK_BAILOUT();
duke@0 113
duke@0 114 #ifndef PRODUCT
duke@0 115 if (CommentedAssembly) {
duke@0 116 stringStream st;
duke@0 117 s->print_name(&st);
duke@0 118 st.print(" slow case");
duke@0 119 _masm->block_comment(st.as_string());
duke@0 120 }
duke@0 121 #endif
duke@0 122 s->emit_code(this);
duke@0 123 #ifdef ASSERT
duke@0 124 s->assert_no_unbound_labels();
duke@0 125 #endif
duke@0 126 }
duke@0 127 }
duke@0 128
duke@0 129
duke@0 130 void LIR_Assembler::emit_slow_case_stubs() {
duke@0 131 emit_stubs(_slow_case_stubs);
duke@0 132 }
duke@0 133
duke@0 134
duke@0 135 bool LIR_Assembler::needs_icache(ciMethod* method) const {
duke@0 136 return !method->is_static();
duke@0 137 }
duke@0 138
duke@0 139
duke@0 140 int LIR_Assembler::code_offset() const {
duke@0 141 return _masm->offset();
duke@0 142 }
duke@0 143
duke@0 144
duke@0 145 address LIR_Assembler::pc() const {
duke@0 146 return _masm->pc();
duke@0 147 }
duke@0 148
duke@0 149
duke@0 150 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
duke@0 151 for (int i = 0; i < info_list->length(); i++) {
duke@0 152 XHandlers* handlers = info_list->at(i)->exception_handlers();
duke@0 153
duke@0 154 for (int j = 0; j < handlers->length(); j++) {
duke@0 155 XHandler* handler = handlers->handler_at(j);
duke@0 156 assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
duke@0 157 assert(handler->entry_code() == NULL ||
duke@0 158 handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
duke@0 159 handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
duke@0 160
duke@0 161 if (handler->entry_pco() == -1) {
duke@0 162 // entry code not emitted yet
duke@0 163 if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
duke@0 164 handler->set_entry_pco(code_offset());
duke@0 165 if (CommentedAssembly) {
duke@0 166 _masm->block_comment("Exception adapter block");
duke@0 167 }
duke@0 168 emit_lir_list(handler->entry_code());
duke@0 169 } else {
duke@0 170 handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
duke@0 171 }
duke@0 172
duke@0 173 assert(handler->entry_pco() != -1, "must be set now");
duke@0 174 }
duke@0 175 }
duke@0 176 }
duke@0 177 }
duke@0 178
duke@0 179
duke@0 180 void LIR_Assembler::emit_code(BlockList* hir) {
duke@0 181 if (PrintLIR) {
duke@0 182 print_LIR(hir);
duke@0 183 }
duke@0 184
duke@0 185 int n = hir->length();
duke@0 186 for (int i = 0; i < n; i++) {
duke@0 187 emit_block(hir->at(i));
duke@0 188 CHECK_BAILOUT();
duke@0 189 }
duke@0 190
duke@0 191 flush_debug_info(code_offset());
duke@0 192
duke@0 193 DEBUG_ONLY(check_no_unbound_labels());
duke@0 194 }
duke@0 195
duke@0 196
duke@0 197 void LIR_Assembler::emit_block(BlockBegin* block) {
duke@0 198 if (block->is_set(BlockBegin::backward_branch_target_flag)) {
duke@0 199 align_backward_branch_target();
duke@0 200 }
duke@0 201
duke@0 202 // if this block is the start of an exception handler, record the
duke@0 203 // PC offset of the first instruction for later construction of
duke@0 204 // the ExceptionHandlerTable
duke@0 205 if (block->is_set(BlockBegin::exception_entry_flag)) {
duke@0 206 block->set_exception_handler_pco(code_offset());
duke@0 207 }
duke@0 208
duke@0 209 #ifndef PRODUCT
duke@0 210 if (PrintLIRWithAssembly) {
duke@0 211 // don't print Phi's
duke@0 212 InstructionPrinter ip(false);
duke@0 213 block->print(ip);
duke@0 214 }
duke@0 215 #endif /* PRODUCT */
duke@0 216
duke@0 217 assert(block->lir() != NULL, "must have LIR");
duke@0 218 IA32_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
duke@0 219
duke@0 220 #ifndef PRODUCT
duke@0 221 if (CommentedAssembly) {
duke@0 222 stringStream st;
duke@0 223 st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->bci());
duke@0 224 _masm->block_comment(st.as_string());
duke@0 225 }
duke@0 226 #endif
duke@0 227
duke@0 228 emit_lir_list(block->lir());
duke@0 229
duke@0 230 IA32_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
duke@0 231 }
duke@0 232
duke@0 233
duke@0 234 void LIR_Assembler::emit_lir_list(LIR_List* list) {
duke@0 235 peephole(list);
duke@0 236
duke@0 237 int n = list->length();
duke@0 238 for (int i = 0; i < n; i++) {
duke@0 239 LIR_Op* op = list->at(i);
duke@0 240
duke@0 241 check_codespace();
duke@0 242 CHECK_BAILOUT();
duke@0 243
duke@0 244 #ifndef PRODUCT
duke@0 245 if (CommentedAssembly) {
duke@0 246 // Don't record out every op since that's too verbose. Print
duke@0 247 // branches since they include block and stub names. Also print
duke@0 248 // patching moves since they generate funny looking code.
duke@0 249 if (op->code() == lir_branch ||
duke@0 250 (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none)) {
duke@0 251 stringStream st;
duke@0 252 op->print_on(&st);
duke@0 253 _masm->block_comment(st.as_string());
duke@0 254 }
duke@0 255 }
duke@0 256 if (PrintLIRWithAssembly) {
duke@0 257 // print out the LIR operation followed by the resulting assembly
duke@0 258 list->at(i)->print(); tty->cr();
duke@0 259 }
duke@0 260 #endif /* PRODUCT */
duke@0 261
duke@0 262 op->emit_code(this);
duke@0 263
duke@0 264 if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
duke@0 265 process_debug_info(op);
duke@0 266 }
duke@0 267
duke@0 268 #ifndef PRODUCT
duke@0 269 if (PrintLIRWithAssembly) {
duke@0 270 _masm->code()->decode();
duke@0 271 }
duke@0 272 #endif /* PRODUCT */
duke@0 273 }
duke@0 274 }
duke@0 275
duke@0 276 #ifdef ASSERT
duke@0 277 void LIR_Assembler::check_no_unbound_labels() {
duke@0 278 CHECK_BAILOUT();
duke@0 279
duke@0 280 for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
duke@0 281 if (!_branch_target_blocks.at(i)->label()->is_bound()) {
duke@0 282 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
duke@0 283 assert(false, "unbound label");
duke@0 284 }
duke@0 285 }
duke@0 286 }
duke@0 287 #endif
duke@0 288
duke@0 289 //----------------------------------debug info--------------------------------
duke@0 290
duke@0 291
duke@0 292 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
duke@0 293 _masm->code_section()->relocate(pc(), relocInfo::poll_type);
duke@0 294 int pc_offset = code_offset();
duke@0 295 flush_debug_info(pc_offset);
duke@0 296 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
duke@0 297 if (info->exception_handlers() != NULL) {
duke@0 298 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
duke@0 299 }
duke@0 300 }
duke@0 301
duke@0 302
duke@0 303 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
duke@0 304 flush_debug_info(pc_offset);
duke@0 305 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
duke@0 306 if (cinfo->exception_handlers() != NULL) {
duke@0 307 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
duke@0 308 }
duke@0 309 }
duke@0 310
duke@0 311 static ValueStack* debug_info(Instruction* ins) {
duke@0 312 StateSplit* ss = ins->as_StateSplit();
duke@0 313 if (ss != NULL) return ss->state();
duke@0 314 return ins->lock_stack();
duke@0 315 }
duke@0 316
duke@0 317 void LIR_Assembler::process_debug_info(LIR_Op* op) {
duke@0 318 Instruction* src = op->source();
duke@0 319 if (src == NULL) return;
duke@0 320 int pc_offset = code_offset();
duke@0 321 if (_pending_non_safepoint == src) {
duke@0 322 _pending_non_safepoint_offset = pc_offset;
duke@0 323 return;
duke@0 324 }
duke@0 325 ValueStack* vstack = debug_info(src);
duke@0 326 if (vstack == NULL) return;
duke@0 327 if (_pending_non_safepoint != NULL) {
duke@0 328 // Got some old debug info. Get rid of it.
duke@0 329 if (_pending_non_safepoint->bci() == src->bci() &&
duke@0 330 debug_info(_pending_non_safepoint) == vstack) {
duke@0 331 _pending_non_safepoint_offset = pc_offset;
duke@0 332 return;
duke@0 333 }
duke@0 334 if (_pending_non_safepoint_offset < pc_offset) {
duke@0 335 record_non_safepoint_debug_info();
duke@0 336 }
duke@0 337 _pending_non_safepoint = NULL;
duke@0 338 }
duke@0 339 // Remember the debug info.
duke@0 340 if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
duke@0 341 _pending_non_safepoint = src;
duke@0 342 _pending_non_safepoint_offset = pc_offset;
duke@0 343 }
duke@0 344 }
duke@0 345
duke@0 346 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
duke@0 347 // Return NULL if n is too large.
duke@0 348 // Returns the caller_bci for the next-younger state, also.
duke@0 349 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
duke@0 350 ValueStack* t = s;
duke@0 351 for (int i = 0; i < n; i++) {
duke@0 352 if (t == NULL) break;
duke@0 353 t = t->caller_state();
duke@0 354 }
duke@0 355 if (t == NULL) return NULL;
duke@0 356 for (;;) {
duke@0 357 ValueStack* tc = t->caller_state();
duke@0 358 if (tc == NULL) return s;
duke@0 359 t = tc;
duke@0 360 bci_result = s->scope()->caller_bci();
duke@0 361 s = s->caller_state();
duke@0 362 }
duke@0 363 }
duke@0 364
duke@0 365 void LIR_Assembler::record_non_safepoint_debug_info() {
duke@0 366 int pc_offset = _pending_non_safepoint_offset;
duke@0 367 ValueStack* vstack = debug_info(_pending_non_safepoint);
duke@0 368 int bci = _pending_non_safepoint->bci();
duke@0 369
duke@0 370 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
duke@0 371 assert(debug_info->recording_non_safepoints(), "sanity");
duke@0 372
duke@0 373 debug_info->add_non_safepoint(pc_offset);
duke@0 374
duke@0 375 // Visit scopes from oldest to youngest.
duke@0 376 for (int n = 0; ; n++) {
duke@0 377 int s_bci = bci;
duke@0 378 ValueStack* s = nth_oldest(vstack, n, s_bci);
duke@0 379 if (s == NULL) break;
duke@0 380 IRScope* scope = s->scope();
duke@0 381 debug_info->describe_scope(pc_offset, scope->method(), s_bci);
duke@0 382 }
duke@0 383
duke@0 384 debug_info->end_non_safepoint(pc_offset);
duke@0 385 }
duke@0 386
duke@0 387
duke@0 388 void LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
duke@0 389 add_debug_info_for_null_check(code_offset(), cinfo);
duke@0 390 }
duke@0 391
duke@0 392 void LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
duke@0 393 ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
duke@0 394 emit_code_stub(stub);
duke@0 395 }
duke@0 396
duke@0 397 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
duke@0 398 add_debug_info_for_div0(code_offset(), info);
duke@0 399 }
duke@0 400
duke@0 401 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
duke@0 402 DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
duke@0 403 emit_code_stub(stub);
duke@0 404 }
duke@0 405
duke@0 406 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
duke@0 407 rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
duke@0 408 }
duke@0 409
duke@0 410
duke@0 411 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
duke@0 412 verify_oop_map(op->info());
duke@0 413
duke@0 414 if (os::is_MP()) {
duke@0 415 // must align calls sites, otherwise they can't be updated atomically on MP hardware
duke@0 416 align_call(op->code());
duke@0 417 }
duke@0 418
duke@0 419 // emit the static call stub stuff out of line
duke@0 420 emit_static_call_stub();
duke@0 421
duke@0 422 switch (op->code()) {
duke@0 423 case lir_static_call:
duke@0 424 call(op->addr(), relocInfo::static_call_type, op->info());
duke@0 425 break;
duke@0 426 case lir_optvirtual_call:
duke@0 427 call(op->addr(), relocInfo::opt_virtual_call_type, op->info());
duke@0 428 break;
duke@0 429 case lir_icvirtual_call:
duke@0 430 ic_call(op->addr(), op->info());
duke@0 431 break;
duke@0 432 case lir_virtual_call:
duke@0 433 vtable_call(op->vtable_offset(), op->info());
duke@0 434 break;
duke@0 435 default: ShouldNotReachHere();
duke@0 436 }
duke@0 437 #if defined(IA32) && defined(TIERED)
duke@0 438 // C2 leave fpu stack dirty clean it
duke@0 439 if (UseSSE < 2) {
duke@0 440 int i;
duke@0 441 for ( i = 1; i <= 7 ; i++ ) {
duke@0 442 ffree(i);
duke@0 443 }
duke@0 444 if (!op->result_opr()->is_float_kind()) {
duke@0 445 ffree(0);
duke@0 446 }
duke@0 447 }
duke@0 448 #endif // IA32 && TIERED
duke@0 449 }
duke@0 450
duke@0 451
duke@0 452 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
duke@0 453 _masm->bind (*(op->label()));
duke@0 454 }
duke@0 455
duke@0 456
duke@0 457 void LIR_Assembler::emit_op1(LIR_Op1* op) {
duke@0 458 switch (op->code()) {
duke@0 459 case lir_move:
duke@0 460 if (op->move_kind() == lir_move_volatile) {
duke@0 461 assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
duke@0 462 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
duke@0 463 } else {
duke@0 464 move_op(op->in_opr(), op->result_opr(), op->type(),
duke@0 465 op->patch_code(), op->info(), op->pop_fpu_stack(), op->move_kind() == lir_move_unaligned);
duke@0 466 }
duke@0 467 break;
duke@0 468
duke@0 469 case lir_prefetchr:
duke@0 470 prefetchr(op->in_opr());
duke@0 471 break;
duke@0 472
duke@0 473 case lir_prefetchw:
duke@0 474 prefetchw(op->in_opr());
duke@0 475 break;
duke@0 476
duke@0 477 case lir_roundfp: {
duke@0 478 LIR_OpRoundFP* round_op = op->as_OpRoundFP();
duke@0 479 roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
duke@0 480 break;
duke@0 481 }
duke@0 482
duke@0 483 case lir_return:
duke@0 484 return_op(op->in_opr());
duke@0 485 break;
duke@0 486
duke@0 487 case lir_safepoint:
duke@0 488 if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
duke@0 489 _masm->nop();
duke@0 490 }
duke@0 491 safepoint_poll(op->in_opr(), op->info());
duke@0 492 break;
duke@0 493
duke@0 494 case lir_fxch:
duke@0 495 fxch(op->in_opr()->as_jint());
duke@0 496 break;
duke@0 497
duke@0 498 case lir_fld:
duke@0 499 fld(op->in_opr()->as_jint());
duke@0 500 break;
duke@0 501
duke@0 502 case lir_ffree:
duke@0 503 ffree(op->in_opr()->as_jint());
duke@0 504 break;
duke@0 505
duke@0 506 case lir_branch:
duke@0 507 break;
duke@0 508
duke@0 509 case lir_push:
duke@0 510 push(op->in_opr());
duke@0 511 break;
duke@0 512
duke@0 513 case lir_pop:
duke@0 514 pop(op->in_opr());
duke@0 515 break;
duke@0 516
duke@0 517 case lir_neg:
duke@0 518 negate(op->in_opr(), op->result_opr());
duke@0 519 break;
duke@0 520
duke@0 521 case lir_leal:
duke@0 522 leal(op->in_opr(), op->result_opr());
duke@0 523 break;
duke@0 524
duke@0 525 case lir_null_check:
duke@0 526 if (GenerateCompilerNullChecks) {
duke@0 527 add_debug_info_for_null_check_here(op->info());
duke@0 528
duke@0 529 if (op->in_opr()->is_single_cpu()) {
duke@0 530 _masm->null_check(op->in_opr()->as_register());
duke@0 531 } else {
duke@0 532 Unimplemented();
duke@0 533 }
duke@0 534 }
duke@0 535 break;
duke@0 536
duke@0 537 case lir_monaddr:
duke@0 538 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
duke@0 539 break;
duke@0 540
duke@0 541 default:
duke@0 542 Unimplemented();
duke@0 543 break;
duke@0 544 }
duke@0 545 }
duke@0 546
duke@0 547
duke@0 548 void LIR_Assembler::emit_op0(LIR_Op0* op) {
duke@0 549 switch (op->code()) {
duke@0 550 case lir_word_align: {
duke@0 551 while (code_offset() % BytesPerWord != 0) {
duke@0 552 _masm->nop();
duke@0 553 }
duke@0 554 break;
duke@0 555 }
duke@0 556
duke@0 557 case lir_nop:
duke@0 558 assert(op->info() == NULL, "not supported");
duke@0 559 _masm->nop();
duke@0 560 break;
duke@0 561
duke@0 562 case lir_label:
duke@0 563 Unimplemented();
duke@0 564 break;
duke@0 565
duke@0 566 case lir_build_frame:
duke@0 567 build_frame();
duke@0 568 break;
duke@0 569
duke@0 570 case lir_std_entry:
duke@0 571 // init offsets
duke@0 572 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
duke@0 573 _masm->align(CodeEntryAlignment);
duke@0 574 if (needs_icache(compilation()->method())) {
duke@0 575 check_icache();
duke@0 576 }
duke@0 577 offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
duke@0 578 _masm->verified_entry();
duke@0 579 build_frame();
duke@0 580 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
duke@0 581 break;
duke@0 582
duke@0 583 case lir_osr_entry:
duke@0 584 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
duke@0 585 osr_entry();
duke@0 586 break;
duke@0 587
duke@0 588 case lir_24bit_FPU:
duke@0 589 set_24bit_FPU();
duke@0 590 break;
duke@0 591
duke@0 592 case lir_reset_FPU:
duke@0 593 reset_FPU();
duke@0 594 break;
duke@0 595
duke@0 596 case lir_breakpoint:
duke@0 597 breakpoint();
duke@0 598 break;
duke@0 599
duke@0 600 case lir_fpop_raw:
duke@0 601 fpop();
duke@0 602 break;
duke@0 603
duke@0 604 case lir_membar:
duke@0 605 membar();
duke@0 606 break;
duke@0 607
duke@0 608 case lir_membar_acquire:
duke@0 609 membar_acquire();
duke@0 610 break;
duke@0 611
duke@0 612 case lir_membar_release:
duke@0 613 membar_release();
duke@0 614 break;
duke@0 615
duke@0 616 case lir_get_thread:
duke@0 617 get_thread(op->result_opr());
duke@0 618 break;
duke@0 619
duke@0 620 default:
duke@0 621 ShouldNotReachHere();
duke@0 622 break;
duke@0 623 }
duke@0 624 }
duke@0 625
duke@0 626
duke@0 627 void LIR_Assembler::emit_op2(LIR_Op2* op) {
duke@0 628 switch (op->code()) {
duke@0 629 case lir_cmp:
duke@0 630 if (op->info() != NULL) {
duke@0 631 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
duke@0 632 "shouldn't be codeemitinfo for non-address operands");
duke@0 633 add_debug_info_for_null_check_here(op->info()); // exception possible
duke@0 634 }
duke@0 635 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
duke@0 636 break;
duke@0 637
duke@0 638 case lir_cmp_l2i:
duke@0 639 case lir_cmp_fd2i:
duke@0 640 case lir_ucmp_fd2i:
duke@0 641 comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
duke@0 642 break;
duke@0 643
duke@0 644 case lir_cmove:
duke@0 645 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr());
duke@0 646 break;
duke@0 647
duke@0 648 case lir_shl:
duke@0 649 case lir_shr:
duke@0 650 case lir_ushr:
duke@0 651 if (op->in_opr2()->is_constant()) {
duke@0 652 shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
duke@0 653 } else {
duke@0 654 shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp_opr());
duke@0 655 }
duke@0 656 break;
duke@0 657
duke@0 658 case lir_add:
duke@0 659 case lir_sub:
duke@0 660 case lir_mul:
duke@0 661 case lir_mul_strictfp:
duke@0 662 case lir_div:
duke@0 663 case lir_div_strictfp:
duke@0 664 case lir_rem:
duke@0 665 assert(op->fpu_pop_count() < 2, "");
duke@0 666 arith_op(
duke@0 667 op->code(),
duke@0 668 op->in_opr1(),
duke@0 669 op->in_opr2(),
duke@0 670 op->result_opr(),
duke@0 671 op->info(),
duke@0 672 op->fpu_pop_count() == 1);
duke@0 673 break;
duke@0 674
duke@0 675 case lir_abs:
duke@0 676 case lir_sqrt:
duke@0 677 case lir_sin:
duke@0 678 case lir_tan:
duke@0 679 case lir_cos:
duke@0 680 case lir_log:
duke@0 681 case lir_log10:
duke@0 682 intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
duke@0 683 break;
duke@0 684
duke@0 685 case lir_logic_and:
duke@0 686 case lir_logic_or:
duke@0 687 case lir_logic_xor:
duke@0 688 logic_op(
duke@0 689 op->code(),
duke@0 690 op->in_opr1(),
duke@0 691 op->in_opr2(),
duke@0 692 op->result_opr());
duke@0 693 break;
duke@0 694
duke@0 695 case lir_throw:
duke@0 696 case lir_unwind:
duke@0 697 throw_op(op->in_opr1(), op->in_opr2(), op->info(), op->code() == lir_unwind);
duke@0 698 break;
duke@0 699
duke@0 700 default:
duke@0 701 Unimplemented();
duke@0 702 break;
duke@0 703 }
duke@0 704 }
duke@0 705
duke@0 706
duke@0 707 void LIR_Assembler::build_frame() {
duke@0 708 _masm->build_frame(initial_frame_size_in_bytes());
duke@0 709 }
duke@0 710
duke@0 711
duke@0 712 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
duke@0 713 assert((src->is_single_fpu() && dest->is_single_stack()) ||
duke@0 714 (src->is_double_fpu() && dest->is_double_stack()),
duke@0 715 "round_fp: rounds register -> stack location");
duke@0 716
duke@0 717 reg2stack (src, dest, src->type(), pop_fpu_stack);
duke@0 718 }
duke@0 719
duke@0 720
duke@0 721 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned) {
duke@0 722 if (src->is_register()) {
duke@0 723 if (dest->is_register()) {
duke@0 724 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
duke@0 725 reg2reg(src, dest);
duke@0 726 } else if (dest->is_stack()) {
duke@0 727 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
duke@0 728 reg2stack(src, dest, type, pop_fpu_stack);
duke@0 729 } else if (dest->is_address()) {
duke@0 730 reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, unaligned);
duke@0 731 } else {
duke@0 732 ShouldNotReachHere();
duke@0 733 }
duke@0 734
duke@0 735 } else if (src->is_stack()) {
duke@0 736 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
duke@0 737 if (dest->is_register()) {
duke@0 738 stack2reg(src, dest, type);
duke@0 739 } else if (dest->is_stack()) {
duke@0 740 stack2stack(src, dest, type);
duke@0 741 } else {
duke@0 742 ShouldNotReachHere();
duke@0 743 }
duke@0 744
duke@0 745 } else if (src->is_constant()) {
duke@0 746 if (dest->is_register()) {
duke@0 747 const2reg(src, dest, patch_code, info); // patching is possible
duke@0 748 } else if (dest->is_stack()) {
duke@0 749 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
duke@0 750 const2stack(src, dest);
duke@0 751 } else if (dest->is_address()) {
duke@0 752 assert(patch_code == lir_patch_none, "no patching allowed here");
duke@0 753 const2mem(src, dest, type, info);
duke@0 754 } else {
duke@0 755 ShouldNotReachHere();
duke@0 756 }
duke@0 757
duke@0 758 } else if (src->is_address()) {
duke@0 759 mem2reg(src, dest, type, patch_code, info, unaligned);
duke@0 760
duke@0 761 } else {
duke@0 762 ShouldNotReachHere();
duke@0 763 }
duke@0 764 }
duke@0 765
duke@0 766
duke@0 767 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
duke@0 768 #ifndef PRODUCT
duke@0 769 if (VerifyOopMaps || VerifyOops) {
duke@0 770 bool v = VerifyOops;
duke@0 771 VerifyOops = true;
duke@0 772 OopMapStream s(info->oop_map());
duke@0 773 while (!s.is_done()) {
duke@0 774 OopMapValue v = s.current();
duke@0 775 if (v.is_oop()) {
duke@0 776 VMReg r = v.reg();
duke@0 777 if (!r->is_stack()) {
duke@0 778 stringStream st;
duke@0 779 st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
duke@0 780 #ifdef SPARC
duke@0 781 _masm->_verify_oop(r->as_Register(), strdup(st.as_string()), __FILE__, __LINE__);
duke@0 782 #else
duke@0 783 _masm->verify_oop(r->as_Register());
duke@0 784 #endif
duke@0 785 } else {
duke@0 786 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
duke@0 787 }
duke@0 788 }
duke@0 789 s.next();
duke@0 790 }
duke@0 791 VerifyOops = v;
duke@0 792 }
duke@0 793 #endif
duke@0 794 }