annotate src/cpu/x86/vm/c1_LIRGenerator_x86.cpp @ 3615:8a02ca5e5576

7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere Summary: C1 needs knowledge of T_METADATA at the LIR level. Reviewed-by: kvn, coleenp
author roland
date Tue, 11 Sep 2012 16:20:57 +0200
parents da91efe96a93
children 7eca5de9e0b6
rev   line source
duke@0 1 /*
coleenp@3601 2 * Copyright (c) 2005, 2012, Oracle and/or its affiliates. All rights reserved.
duke@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@0 4 *
duke@0 5 * This code is free software; you can redistribute it and/or modify it
duke@0 6 * under the terms of the GNU General Public License version 2 only, as
duke@0 7 * published by the Free Software Foundation.
duke@0 8 *
duke@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@0 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@0 13 * accompanied this code).
duke@0 14 *
duke@0 15 * You should have received a copy of the GNU General Public License version
duke@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@0 18 *
trims@1489 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1489 20 * or visit www.oracle.com if you need additional information or have any
trims@1489 21 * questions.
duke@0 22 *
duke@0 23 */
duke@0 24
stefank@1869 25 #include "precompiled.hpp"
stefank@1869 26 #include "c1/c1_Compilation.hpp"
stefank@1869 27 #include "c1/c1_FrameMap.hpp"
stefank@1869 28 #include "c1/c1_Instruction.hpp"
stefank@1869 29 #include "c1/c1_LIRAssembler.hpp"
stefank@1869 30 #include "c1/c1_LIRGenerator.hpp"
stefank@1869 31 #include "c1/c1_Runtime1.hpp"
stefank@1869 32 #include "c1/c1_ValueStack.hpp"
stefank@1869 33 #include "ci/ciArray.hpp"
stefank@1869 34 #include "ci/ciObjArrayKlass.hpp"
stefank@1869 35 #include "ci/ciTypeArrayKlass.hpp"
stefank@1869 36 #include "runtime/sharedRuntime.hpp"
stefank@1869 37 #include "runtime/stubRoutines.hpp"
stefank@1869 38 #include "vmreg_x86.inline.hpp"
duke@0 39
duke@0 40 #ifdef ASSERT
duke@0 41 #define __ gen()->lir(__FILE__, __LINE__)->
duke@0 42 #else
duke@0 43 #define __ gen()->lir()->
duke@0 44 #endif
duke@0 45
duke@0 46 // Item will be loaded into a byte register; Intel only
duke@0 47 void LIRItem::load_byte_item() {
duke@0 48 load_item();
duke@0 49 LIR_Opr res = result();
duke@0 50
duke@0 51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
duke@0 52 // make sure that it is a byte register
duke@0 53 assert(!value()->type()->is_float() && !value()->type()->is_double(),
duke@0 54 "can't load floats in byte register");
duke@0 55 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
duke@0 56 __ move(res, reg);
duke@0 57
duke@0 58 _result = reg;
duke@0 59 }
duke@0 60 }
duke@0 61
duke@0 62
duke@0 63 void LIRItem::load_nonconstant() {
duke@0 64 LIR_Opr r = value()->operand();
duke@0 65 if (r->is_constant()) {
duke@0 66 _result = r;
duke@0 67 } else {
duke@0 68 load_item();
duke@0 69 }
duke@0 70 }
duke@0 71
duke@0 72 //--------------------------------------------------------------
duke@0 73 // LIRGenerator
duke@0 74 //--------------------------------------------------------------
duke@0 75
duke@0 76
duke@0 77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
duke@0 78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
duke@0 79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
duke@0 80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
duke@0 81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
duke@0 82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
duke@0 83 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
duke@0 84 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
duke@0 85
duke@0 86
duke@0 87 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
duke@0 88 LIR_Opr opr;
duke@0 89 switch (type->tag()) {
duke@0 90 case intTag: opr = FrameMap::rax_opr; break;
duke@0 91 case objectTag: opr = FrameMap::rax_oop_opr; break;
never@297 92 case longTag: opr = FrameMap::long0_opr; break;
duke@0 93 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
duke@0 94 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
duke@0 95
duke@0 96 case addressTag:
duke@0 97 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
duke@0 98 }
duke@0 99
duke@0 100 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
duke@0 101 return opr;
duke@0 102 }
duke@0 103
duke@0 104
duke@0 105 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
duke@0 106 LIR_Opr reg = new_register(T_INT);
duke@0 107 set_vreg_flag(reg, LIRGenerator::byte_reg);
duke@0 108 return reg;
duke@0 109 }
duke@0 110
duke@0 111
duke@0 112 //--------- loading items into registers --------------------------------
duke@0 113
duke@0 114
duke@0 115 // i486 instructions can inline constants
duke@0 116 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
duke@0 117 if (type == T_SHORT || type == T_CHAR) {
duke@0 118 // there is no immediate move of word values in asembler_i486.?pp
duke@0 119 return false;
duke@0 120 }
duke@0 121 Constant* c = v->as_Constant();
roland@1718 122 if (c && c->state_before() == NULL) {
duke@0 123 // constants of any type can be stored directly, except for
duke@0 124 // unloaded object constants.
duke@0 125 return true;
duke@0 126 }
duke@0 127 return false;
duke@0 128 }
duke@0 129
duke@0 130
duke@0 131 bool LIRGenerator::can_inline_as_constant(Value v) const {
never@297 132 if (v->type()->tag() == longTag) return false;
duke@0 133 return v->type()->tag() != objectTag ||
duke@0 134 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
duke@0 135 }
duke@0 136
duke@0 137
duke@0 138 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
never@297 139 if (c->type() == T_LONG) return false;
duke@0 140 return c->type() != T_OBJECT || c->as_jobject() == NULL;
duke@0 141 }
duke@0 142
duke@0 143
duke@0 144 LIR_Opr LIRGenerator::safepoint_poll_register() {
duke@0 145 return LIR_OprFact::illegalOpr;
duke@0 146 }
duke@0 147
duke@0 148
duke@0 149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
duke@0 150 int shift, int disp, BasicType type) {
duke@0 151 assert(base->is_register(), "must be");
duke@0 152 if (index->is_constant()) {
duke@0 153 return new LIR_Address(base,
duke@0 154 (index->as_constant_ptr()->as_jint() << shift) + disp,
duke@0 155 type);
duke@0 156 } else {
duke@0 157 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
duke@0 158 }
duke@0 159 }
duke@0 160
duke@0 161
duke@0 162 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
duke@0 163 BasicType type, bool needs_card_mark) {
duke@0 164 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
duke@0 165
duke@0 166 LIR_Address* addr;
duke@0 167 if (index_opr->is_constant()) {
kvn@16 168 int elem_size = type2aelembytes(type);
duke@0 169 addr = new LIR_Address(array_opr,
duke@0 170 offset_in_bytes + index_opr->as_jint() * elem_size, type);
duke@0 171 } else {
never@297 172 #ifdef _LP64
never@297 173 if (index_opr->type() == T_INT) {
never@297 174 LIR_Opr tmp = new_register(T_LONG);
never@297 175 __ convert(Bytecodes::_i2l, index_opr, tmp);
never@297 176 index_opr = tmp;
never@297 177 }
never@297 178 #endif // _LP64
duke@0 179 addr = new LIR_Address(array_opr,
duke@0 180 index_opr,
duke@0 181 LIR_Address::scale(type),
duke@0 182 offset_in_bytes, type);
duke@0 183 }
duke@0 184 if (needs_card_mark) {
duke@0 185 // This store will need a precise card mark, so go ahead and
duke@0 186 // compute the full adddres instead of computing once for the
duke@0 187 // store and again for the card mark.
never@297 188 LIR_Opr tmp = new_pointer_register();
duke@0 189 __ leal(LIR_OprFact::address(addr), tmp);
iveresov@1471 190 return new LIR_Address(tmp, type);
duke@0 191 } else {
duke@0 192 return addr;
duke@0 193 }
duke@0 194 }
duke@0 195
duke@0 196
iveresov@1681 197 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
iveresov@1681 198 LIR_Opr r;
iveresov@1681 199 if (type == T_LONG) {
iveresov@1681 200 r = LIR_OprFact::longConst(x);
iveresov@1681 201 } else if (type == T_INT) {
iveresov@1681 202 r = LIR_OprFact::intConst(x);
iveresov@1681 203 } else {
iveresov@1681 204 ShouldNotReachHere();
iveresov@1681 205 }
iveresov@1681 206 return r;
iveresov@1681 207 }
iveresov@1681 208
iveresov@1681 209 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
never@297 210 LIR_Opr pointer = new_pointer_register();
never@297 211 __ move(LIR_OprFact::intptrConst(counter), pointer);
iveresov@1681 212 LIR_Address* addr = new LIR_Address(pointer, type);
duke@0 213 increment_counter(addr, step);
duke@0 214 }
duke@0 215
duke@0 216
duke@0 217 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
duke@0 218 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
duke@0 219 }
duke@0 220
duke@0 221 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
duke@0 222 __ cmp_mem_int(condition, base, disp, c, info);
duke@0 223 }
duke@0 224
duke@0 225
duke@0 226 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
duke@0 227 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
duke@0 228 }
duke@0 229
duke@0 230
duke@0 231 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
duke@0 232 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
duke@0 233 }
duke@0 234
duke@0 235
duke@0 236 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
duke@0 237 if (tmp->is_valid()) {
duke@0 238 if (is_power_of_2(c + 1)) {
duke@0 239 __ move(left, tmp);
duke@0 240 __ shift_left(left, log2_intptr(c + 1), left);
duke@0 241 __ sub(left, tmp, result);
duke@0 242 return true;
duke@0 243 } else if (is_power_of_2(c - 1)) {
duke@0 244 __ move(left, tmp);
duke@0 245 __ shift_left(left, log2_intptr(c - 1), left);
duke@0 246 __ add(left, tmp, result);
duke@0 247 return true;
duke@0 248 }
duke@0 249 }
duke@0 250 return false;
duke@0 251 }
duke@0 252
duke@0 253
duke@0 254 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
duke@0 255 BasicType type = item->type();
duke@0 256 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
duke@0 257 }
duke@0 258
duke@0 259 //----------------------------------------------------------------------
duke@0 260 // visitor functions
duke@0 261 //----------------------------------------------------------------------
duke@0 262
duke@0 263
duke@0 264 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
roland@1718 265 assert(x->is_pinned(),"");
duke@0 266 bool needs_range_check = true;
duke@0 267 bool use_length = x->length() != NULL;
duke@0 268 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
duke@0 269 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
iveresov@2716 270 !get_jobject_constant(x->value())->is_null_object() ||
iveresov@2716 271 x->should_profile());
duke@0 272
duke@0 273 LIRItem array(x->array(), this);
duke@0 274 LIRItem index(x->index(), this);
duke@0 275 LIRItem value(x->value(), this);
duke@0 276 LIRItem length(this);
duke@0 277
duke@0 278 array.load_item();
duke@0 279 index.load_nonconstant();
duke@0 280
duke@0 281 if (use_length) {
duke@0 282 needs_range_check = x->compute_needs_range_check();
duke@0 283 if (needs_range_check) {
duke@0 284 length.set_instruction(x->length());
duke@0 285 length.load_item();
duke@0 286 }
duke@0 287 }
duke@0 288 if (needs_store_check) {
duke@0 289 value.load_item();
duke@0 290 } else {
duke@0 291 value.load_for_store(x->elt_type());
duke@0 292 }
duke@0 293
duke@0 294 set_no_result(x);
duke@0 295
duke@0 296 // the CodeEmitInfo must be duplicated for each different
duke@0 297 // LIR-instruction because spilling can occur anywhere between two
duke@0 298 // instructions and so the debug information must be different
duke@0 299 CodeEmitInfo* range_check_info = state_for(x);
duke@0 300 CodeEmitInfo* null_check_info = NULL;
duke@0 301 if (x->needs_null_check()) {
duke@0 302 null_check_info = new CodeEmitInfo(range_check_info);
duke@0 303 }
duke@0 304
duke@0 305 // emit array address setup early so it schedules better
duke@0 306 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
duke@0 307
duke@0 308 if (GenerateRangeChecks && needs_range_check) {
duke@0 309 if (use_length) {
duke@0 310 __ cmp(lir_cond_belowEqual, length.result(), index.result());
duke@0 311 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
duke@0 312 } else {
duke@0 313 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
duke@0 314 // range_check also does the null check
duke@0 315 null_check_info = NULL;
duke@0 316 }
duke@0 317 }
duke@0 318
duke@0 319 if (GenerateArrayStoreCheck && needs_store_check) {
duke@0 320 LIR_Opr tmp1 = new_register(objectType);
duke@0 321 LIR_Opr tmp2 = new_register(objectType);
duke@0 322 LIR_Opr tmp3 = new_register(objectType);
duke@0 323
duke@0 324 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
iveresov@2716 325 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
duke@0 326 }
duke@0 327
duke@0 328 if (obj_store) {
ysr@344 329 // Needs GC write barriers.
johnc@2352 330 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
johnc@2352 331 true /* do_load */, false /* patch */, NULL);
duke@0 332 __ move(value.result(), array_addr, null_check_info);
duke@0 333 // Seems to be a precise
duke@0 334 post_barrier(LIR_OprFact::address(array_addr), value.result());
duke@0 335 } else {
duke@0 336 __ move(value.result(), array_addr, null_check_info);
duke@0 337 }
duke@0 338 }
duke@0 339
duke@0 340
duke@0 341 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
roland@1718 342 assert(x->is_pinned(),"");
duke@0 343 LIRItem obj(x->obj(), this);
duke@0 344 obj.load_item();
duke@0 345
duke@0 346 set_no_result(x);
duke@0 347
duke@0 348 // "lock" stores the address of the monitor stack slot, so this is not an oop
duke@0 349 LIR_Opr lock = new_register(T_INT);
duke@0 350 // Need a scratch register for biased locking on x86
duke@0 351 LIR_Opr scratch = LIR_OprFact::illegalOpr;
duke@0 352 if (UseBiasedLocking) {
duke@0 353 scratch = new_register(T_INT);
duke@0 354 }
duke@0 355
duke@0 356 CodeEmitInfo* info_for_exception = NULL;
duke@0 357 if (x->needs_null_check()) {
roland@1718 358 info_for_exception = state_for(x);
duke@0 359 }
duke@0 360 // this CodeEmitInfo must not have the xhandlers because here the
duke@0 361 // object is already locked (xhandlers expect object to be unlocked)
duke@0 362 CodeEmitInfo* info = state_for(x, x->state(), true);
duke@0 363 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
duke@0 364 x->monitor_no(), info_for_exception, info);
duke@0 365 }
duke@0 366
duke@0 367
duke@0 368 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
roland@1718 369 assert(x->is_pinned(),"");
duke@0 370
duke@0 371 LIRItem obj(x->obj(), this);
duke@0 372 obj.dont_load_item();
duke@0 373
duke@0 374 LIR_Opr lock = new_register(T_INT);
duke@0 375 LIR_Opr obj_temp = new_register(T_INT);
duke@0 376 set_no_result(x);
bobv@1600 377 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
duke@0 378 }
duke@0 379
duke@0 380
duke@0 381 // _ineg, _lneg, _fneg, _dneg
duke@0 382 void LIRGenerator::do_NegateOp(NegateOp* x) {
duke@0 383 LIRItem value(x->x(), this);
duke@0 384 value.set_destroys_register();
duke@0 385 value.load_item();
duke@0 386 LIR_Opr reg = rlock(x);
duke@0 387 __ negate(value.result(), reg);
duke@0 388
duke@0 389 set_result(x, round_item(reg));
duke@0 390 }
duke@0 391
duke@0 392
duke@0 393 // for _fadd, _fmul, _fsub, _fdiv, _frem
duke@0 394 // _dadd, _dmul, _dsub, _ddiv, _drem
duke@0 395 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
duke@0 396 LIRItem left(x->x(), this);
duke@0 397 LIRItem right(x->y(), this);
duke@0 398 LIRItem* left_arg = &left;
duke@0 399 LIRItem* right_arg = &right;
duke@0 400 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
duke@0 401 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
duke@0 402 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
duke@0 403 left.load_item();
duke@0 404 } else {
duke@0 405 left.dont_load_item();
duke@0 406 }
duke@0 407
duke@0 408 // do not load right operand if it is a constant. only 0 and 1 are
duke@0 409 // loaded because there are special instructions for loading them
duke@0 410 // without memory access (not needed for SSE2 instructions)
duke@0 411 bool must_load_right = false;
duke@0 412 if (right.is_constant()) {
duke@0 413 LIR_Const* c = right.result()->as_constant_ptr();
duke@0 414 assert(c != NULL, "invalid constant");
duke@0 415 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
duke@0 416
duke@0 417 if (c->type() == T_FLOAT) {
duke@0 418 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
duke@0 419 } else {
duke@0 420 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
duke@0 421 }
duke@0 422 }
duke@0 423
duke@0 424 if (must_load_both) {
duke@0 425 // frem and drem destroy also right operand, so move it to a new register
duke@0 426 right.set_destroys_register();
duke@0 427 right.load_item();
duke@0 428 } else if (right.is_register() || must_load_right) {
duke@0 429 right.load_item();
duke@0 430 } else {
duke@0 431 right.dont_load_item();
duke@0 432 }
duke@0 433 LIR_Opr reg = rlock(x);
duke@0 434 LIR_Opr tmp = LIR_OprFact::illegalOpr;
duke@0 435 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
duke@0 436 tmp = new_register(T_DOUBLE);
duke@0 437 }
duke@0 438
duke@0 439 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
duke@0 440 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
duke@0 441 LIR_Opr fpu0, fpu1;
duke@0 442 if (x->op() == Bytecodes::_frem) {
duke@0 443 fpu0 = LIR_OprFact::single_fpu(0);
duke@0 444 fpu1 = LIR_OprFact::single_fpu(1);
duke@0 445 } else {
duke@0 446 fpu0 = LIR_OprFact::double_fpu(0);
duke@0 447 fpu1 = LIR_OprFact::double_fpu(1);
duke@0 448 }
duke@0 449 __ move(right.result(), fpu1); // order of left and right operand is important!
duke@0 450 __ move(left.result(), fpu0);
duke@0 451 __ rem (fpu0, fpu1, fpu0);
duke@0 452 __ move(fpu0, reg);
duke@0 453
duke@0 454 } else {
duke@0 455 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
duke@0 456 }
duke@0 457
duke@0 458 set_result(x, round_item(reg));
duke@0 459 }
duke@0 460
duke@0 461
duke@0 462 // for _ladd, _lmul, _lsub, _ldiv, _lrem
duke@0 463 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
duke@0 464 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
duke@0 465 // long division is implemented as a direct call into the runtime
duke@0 466 LIRItem left(x->x(), this);
duke@0 467 LIRItem right(x->y(), this);
duke@0 468
duke@0 469 // the check for division by zero destroys the right operand
duke@0 470 right.set_destroys_register();
duke@0 471
duke@0 472 BasicTypeList signature(2);
duke@0 473 signature.append(T_LONG);
duke@0 474 signature.append(T_LONG);
duke@0 475 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
duke@0 476
duke@0 477 // check for division by zero (destroys registers of right operand!)
duke@0 478 CodeEmitInfo* info = state_for(x);
duke@0 479
duke@0 480 const LIR_Opr result_reg = result_register_for(x->type());
duke@0 481 left.load_item_force(cc->at(1));
duke@0 482 right.load_item();
duke@0 483
duke@0 484 __ move(right.result(), cc->at(0));
duke@0 485
duke@0 486 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
duke@0 487 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
duke@0 488
duke@0 489 address entry;
duke@0 490 switch (x->op()) {
duke@0 491 case Bytecodes::_lrem:
duke@0 492 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
duke@0 493 break; // check if dividend is 0 is done elsewhere
duke@0 494 case Bytecodes::_ldiv:
duke@0 495 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
duke@0 496 break; // check if dividend is 0 is done elsewhere
duke@0 497 case Bytecodes::_lmul:
duke@0 498 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
duke@0 499 break;
duke@0 500 default:
duke@0 501 ShouldNotReachHere();
duke@0 502 }
duke@0 503
duke@0 504 LIR_Opr result = rlock_result(x);
duke@0 505 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
duke@0 506 __ move(result_reg, result);
duke@0 507 } else if (x->op() == Bytecodes::_lmul) {
duke@0 508 // missing test if instr is commutative and if we should swap
duke@0 509 LIRItem left(x->x(), this);
duke@0 510 LIRItem right(x->y(), this);
duke@0 511
duke@0 512 // right register is destroyed by the long mul, so it must be
duke@0 513 // copied to a new register.
duke@0 514 right.set_destroys_register();
duke@0 515
duke@0 516 left.load_item();
duke@0 517 right.load_item();
duke@0 518
never@297 519 LIR_Opr reg = FrameMap::long0_opr;
duke@0 520 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
duke@0 521 LIR_Opr result = rlock_result(x);
duke@0 522 __ move(reg, result);
duke@0 523 } else {
duke@0 524 // missing test if instr is commutative and if we should swap
duke@0 525 LIRItem left(x->x(), this);
duke@0 526 LIRItem right(x->y(), this);
duke@0 527
duke@0 528 left.load_item();
twisti@580 529 // don't load constants to save register
duke@0 530 right.load_nonconstant();
duke@0 531 rlock_result(x);
duke@0 532 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
duke@0 533 }
duke@0 534 }
duke@0 535
duke@0 536
duke@0 537
duke@0 538 // for: _iadd, _imul, _isub, _idiv, _irem
duke@0 539 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
duke@0 540 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
duke@0 541 // The requirements for division and modulo
duke@0 542 // input : rax,: dividend min_int
duke@0 543 // reg: divisor (may not be rax,/rdx) -1
duke@0 544 //
duke@0 545 // output: rax,: quotient (= rax, idiv reg) min_int
duke@0 546 // rdx: remainder (= rax, irem reg) 0
duke@0 547
duke@0 548 // rax, and rdx will be destroyed
duke@0 549
duke@0 550 // Note: does this invalidate the spec ???
duke@0 551 LIRItem right(x->y(), this);
duke@0 552 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
duke@0 553
duke@0 554 // call state_for before load_item_force because state_for may
duke@0 555 // force the evaluation of other instructions that are needed for
duke@0 556 // correct debug info. Otherwise the live range of the fix
duke@0 557 // register might be too long.
duke@0 558 CodeEmitInfo* info = state_for(x);
duke@0 559
duke@0 560 left.load_item_force(divInOpr());
duke@0 561
duke@0 562 right.load_item();
duke@0 563
duke@0 564 LIR_Opr result = rlock_result(x);
duke@0 565 LIR_Opr result_reg;
duke@0 566 if (x->op() == Bytecodes::_idiv) {
duke@0 567 result_reg = divOutOpr();
duke@0 568 } else {
duke@0 569 result_reg = remOutOpr();
duke@0 570 }
duke@0 571
duke@0 572 if (!ImplicitDiv0Checks) {
duke@0 573 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
duke@0 574 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
duke@0 575 }
duke@0 576 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
duke@0 577 if (x->op() == Bytecodes::_irem) {
duke@0 578 __ irem(left.result(), right.result(), result_reg, tmp, info);
duke@0 579 } else if (x->op() == Bytecodes::_idiv) {
duke@0 580 __ idiv(left.result(), right.result(), result_reg, tmp, info);
duke@0 581 } else {
duke@0 582 ShouldNotReachHere();
duke@0 583 }
duke@0 584
duke@0 585 __ move(result_reg, result);
duke@0 586 } else {
duke@0 587 // missing test if instr is commutative and if we should swap
duke@0 588 LIRItem left(x->x(), this);
duke@0 589 LIRItem right(x->y(), this);
duke@0 590 LIRItem* left_arg = &left;
duke@0 591 LIRItem* right_arg = &right;
duke@0 592 if (x->is_commutative() && left.is_stack() && right.is_register()) {
duke@0 593 // swap them if left is real stack (or cached) and right is real register(not cached)
duke@0 594 left_arg = &right;
duke@0 595 right_arg = &left;
duke@0 596 }
duke@0 597
duke@0 598 left_arg->load_item();
duke@0 599
duke@0 600 // do not need to load right, as we can handle stack and constants
duke@0 601 if (x->op() == Bytecodes::_imul ) {
duke@0 602 // check if we can use shift instead
duke@0 603 bool use_constant = false;
duke@0 604 bool use_tmp = false;
duke@0 605 if (right_arg->is_constant()) {
duke@0 606 int iconst = right_arg->get_jint_constant();
duke@0 607 if (iconst > 0) {
duke@0 608 if (is_power_of_2(iconst)) {
duke@0 609 use_constant = true;
duke@0 610 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
duke@0 611 use_constant = true;
duke@0 612 use_tmp = true;
duke@0 613 }
duke@0 614 }
duke@0 615 }
duke@0 616 if (use_constant) {
duke@0 617 right_arg->dont_load_item();
duke@0 618 } else {
duke@0 619 right_arg->load_item();
duke@0 620 }
duke@0 621 LIR_Opr tmp = LIR_OprFact::illegalOpr;
duke@0 622 if (use_tmp) {
duke@0 623 tmp = new_register(T_INT);
duke@0 624 }
duke@0 625 rlock_result(x);
duke@0 626
duke@0 627 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
duke@0 628 } else {
duke@0 629 right_arg->dont_load_item();
duke@0 630 rlock_result(x);
duke@0 631 LIR_Opr tmp = LIR_OprFact::illegalOpr;
duke@0 632 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
duke@0 633 }
duke@0 634 }
duke@0 635 }
duke@0 636
duke@0 637
duke@0 638 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
duke@0 639 // when an operand with use count 1 is the left operand, then it is
duke@0 640 // likely that no move for 2-operand-LIR-form is necessary
duke@0 641 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
duke@0 642 x->swap_operands();
duke@0 643 }
duke@0 644
duke@0 645 ValueTag tag = x->type()->tag();
duke@0 646 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
duke@0 647 switch (tag) {
duke@0 648 case floatTag:
duke@0 649 case doubleTag: do_ArithmeticOp_FPU(x); return;
duke@0 650 case longTag: do_ArithmeticOp_Long(x); return;
duke@0 651 case intTag: do_ArithmeticOp_Int(x); return;
duke@0 652 }
duke@0 653 ShouldNotReachHere();
duke@0 654 }
duke@0 655
duke@0 656
duke@0 657 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
duke@0 658 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
duke@0 659 // count must always be in rcx
duke@0 660 LIRItem value(x->x(), this);
duke@0 661 LIRItem count(x->y(), this);
duke@0 662
duke@0 663 ValueTag elemType = x->type()->tag();
duke@0 664 bool must_load_count = !count.is_constant() || elemType == longTag;
duke@0 665 if (must_load_count) {
duke@0 666 // count for long must be in register
duke@0 667 count.load_item_force(shiftCountOpr());
duke@0 668 } else {
duke@0 669 count.dont_load_item();
duke@0 670 }
duke@0 671 value.load_item();
duke@0 672 LIR_Opr reg = rlock_result(x);
duke@0 673
duke@0 674 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
duke@0 675 }
duke@0 676
duke@0 677
duke@0 678 // _iand, _land, _ior, _lor, _ixor, _lxor
duke@0 679 void LIRGenerator::do_LogicOp(LogicOp* x) {
duke@0 680 // when an operand with use count 1 is the left operand, then it is
duke@0 681 // likely that no move for 2-operand-LIR-form is necessary
duke@0 682 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
duke@0 683 x->swap_operands();
duke@0 684 }
duke@0 685
duke@0 686 LIRItem left(x->x(), this);
duke@0 687 LIRItem right(x->y(), this);
duke@0 688
duke@0 689 left.load_item();
duke@0 690 right.load_nonconstant();
duke@0 691 LIR_Opr reg = rlock_result(x);
duke@0 692
duke@0 693 logic_op(x->op(), reg, left.result(), right.result());
duke@0 694 }
duke@0 695
duke@0 696
duke@0 697
duke@0 698 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
duke@0 699 void LIRGenerator::do_CompareOp(CompareOp* x) {
duke@0 700 LIRItem left(x->x(), this);
duke@0 701 LIRItem right(x->y(), this);
duke@0 702 ValueTag tag = x->x()->type()->tag();
duke@0 703 if (tag == longTag) {
duke@0 704 left.set_destroys_register();
duke@0 705 }
duke@0 706 left.load_item();
duke@0 707 right.load_item();
duke@0 708 LIR_Opr reg = rlock_result(x);
duke@0 709
duke@0 710 if (x->x()->type()->is_float_kind()) {
duke@0 711 Bytecodes::Code code = x->op();
duke@0 712 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
duke@0 713 } else if (x->x()->type()->tag() == longTag) {
duke@0 714 __ lcmp2int(left.result(), right.result(), reg);
duke@0 715 } else {
duke@0 716 Unimplemented();
duke@0 717 }
duke@0 718 }
duke@0 719
duke@0 720
duke@0 721 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
duke@0 722 assert(x->number_of_arguments() == 4, "wrong type");
duke@0 723 LIRItem obj (x->argument_at(0), this); // object
duke@0 724 LIRItem offset(x->argument_at(1), this); // offset of field
duke@0 725 LIRItem cmp (x->argument_at(2), this); // value to compare with field
duke@0 726 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
duke@0 727
duke@0 728 assert(obj.type()->tag() == objectTag, "invalid type");
never@297 729
never@297 730 // In 64bit the type can be long, sparc doesn't have this assert
never@297 731 // assert(offset.type()->tag() == intTag, "invalid type");
never@297 732
duke@0 733 assert(cmp.type()->tag() == type->tag(), "invalid type");
duke@0 734 assert(val.type()->tag() == type->tag(), "invalid type");
duke@0 735
duke@0 736 // get address of field
duke@0 737 obj.load_item();
duke@0 738 offset.load_nonconstant();
duke@0 739
duke@0 740 if (type == objectType) {
duke@0 741 cmp.load_item_force(FrameMap::rax_oop_opr);
duke@0 742 val.load_item();
duke@0 743 } else if (type == intType) {
duke@0 744 cmp.load_item_force(FrameMap::rax_opr);
duke@0 745 val.load_item();
duke@0 746 } else if (type == longType) {
never@297 747 cmp.load_item_force(FrameMap::long0_opr);
never@297 748 val.load_item_force(FrameMap::long1_opr);
duke@0 749 } else {
duke@0 750 ShouldNotReachHere();
duke@0 751 }
duke@0 752
never@1787 753 LIR_Opr addr = new_pointer_register();
roland@1045 754 LIR_Address* a;
roland@1045 755 if(offset.result()->is_constant()) {
roland@1045 756 a = new LIR_Address(obj.result(),
roland@1045 757 NOT_LP64(offset.result()->as_constant_ptr()->as_jint()) LP64_ONLY((int)offset.result()->as_constant_ptr()->as_jlong()),
roland@1045 758 as_BasicType(type));
roland@1045 759 } else {
roland@1045 760 a = new LIR_Address(obj.result(),
roland@1045 761 offset.result(),
roland@1045 762 LIR_Address::times_1,
roland@1045 763 0,
roland@1045 764 as_BasicType(type));
roland@1045 765 }
roland@1045 766 __ leal(LIR_OprFact::address(a), addr);
duke@0 767
ysr@344 768 if (type == objectType) { // Write-barrier needed for Object fields.
ysr@344 769 // Do the pre-write barrier, if any.
johnc@2352 770 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
johnc@2352 771 true /* do_load */, false /* patch */, NULL);
ysr@344 772 }
duke@0 773
duke@0 774 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
duke@0 775 if (type == objectType)
duke@0 776 __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
duke@0 777 else if (type == intType)
duke@0 778 __ cas_int(addr, cmp.result(), val.result(), ill, ill);
duke@0 779 else if (type == longType)
duke@0 780 __ cas_long(addr, cmp.result(), val.result(), ill, ill);
duke@0 781 else {
duke@0 782 ShouldNotReachHere();
duke@0 783 }
duke@0 784
duke@0 785 // generate conditional move of boolean result
duke@0 786 LIR_Opr result = rlock_result(x);
iveresov@1935 787 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
iveresov@1935 788 result, as_BasicType(type));
duke@0 789 if (type == objectType) { // Write-barrier needed for Object fields.
duke@0 790 // Seems to be precise
duke@0 791 post_barrier(addr, val.result());
duke@0 792 }
duke@0 793 }
duke@0 794
duke@0 795
duke@0 796 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
roland@3352 797 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
duke@0 798 LIRItem value(x->argument_at(0), this);
duke@0 799
duke@0 800 bool use_fpu = false;
duke@0 801 if (UseSSE >= 2) {
duke@0 802 switch(x->id()) {
duke@0 803 case vmIntrinsics::_dsin:
duke@0 804 case vmIntrinsics::_dcos:
duke@0 805 case vmIntrinsics::_dtan:
duke@0 806 case vmIntrinsics::_dlog:
duke@0 807 case vmIntrinsics::_dlog10:
roland@3352 808 case vmIntrinsics::_dexp:
roland@3352 809 case vmIntrinsics::_dpow:
duke@0 810 use_fpu = true;
duke@0 811 }
duke@0 812 } else {
duke@0 813 value.set_destroys_register();
duke@0 814 }
duke@0 815
duke@0 816 value.load_item();
duke@0 817
duke@0 818 LIR_Opr calc_input = value.result();
roland@3352 819 LIR_Opr calc_input2 = NULL;
roland@3352 820 if (x->id() == vmIntrinsics::_dpow) {
roland@3352 821 LIRItem extra_arg(x->argument_at(1), this);
roland@3352 822 if (UseSSE < 2) {
roland@3352 823 extra_arg.set_destroys_register();
roland@3352 824 }
roland@3352 825 extra_arg.load_item();
roland@3352 826 calc_input2 = extra_arg.result();
roland@3352 827 }
duke@0 828 LIR_Opr calc_result = rlock_result(x);
duke@0 829
roland@3352 830 // sin, cos, pow and exp need two free fpu stack slots, so register
roland@3352 831 // two temporary operands
duke@0 832 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0);
duke@0 833 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1);
duke@0 834
duke@0 835 if (use_fpu) {
duke@0 836 LIR_Opr tmp = FrameMap::fpu0_double_opr;
roland@3352 837 int tmp_start = 1;
roland@3352 838 if (calc_input2 != NULL) {
roland@3352 839 __ move(calc_input2, tmp);
roland@3352 840 tmp_start = 2;
roland@3352 841 calc_input2 = tmp;
roland@3352 842 }
duke@0 843 __ move(calc_input, tmp);
duke@0 844
duke@0 845 calc_input = tmp;
duke@0 846 calc_result = tmp;
roland@3352 847
roland@3352 848 tmp1 = FrameMap::caller_save_fpu_reg_at(tmp_start);
roland@3352 849 tmp2 = FrameMap::caller_save_fpu_reg_at(tmp_start + 1);
duke@0 850 }
duke@0 851
duke@0 852 switch(x->id()) {
duke@0 853 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
duke@0 854 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
duke@0 855 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break;
duke@0 856 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break;
duke@0 857 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break;
never@938 858 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, tmp1); break;
never@938 859 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break;
roland@3352 860 case vmIntrinsics::_dexp: __ exp (calc_input, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;
roland@3352 861 case vmIntrinsics::_dpow: __ pow (calc_input, calc_input2, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;
duke@0 862 default: ShouldNotReachHere();
duke@0 863 }
duke@0 864
duke@0 865 if (use_fpu) {
duke@0 866 __ move(calc_result, x->operand());
duke@0 867 }
duke@0 868 }
duke@0 869
duke@0 870
duke@0 871 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
duke@0 872 assert(x->number_of_arguments() == 5, "wrong type");
never@1874 873
never@1874 874 // Make all state_for calls early since they can emit code
never@1874 875 CodeEmitInfo* info = state_for(x, x->state());
never@1874 876
duke@0 877 LIRItem src(x->argument_at(0), this);
duke@0 878 LIRItem src_pos(x->argument_at(1), this);
duke@0 879 LIRItem dst(x->argument_at(2), this);
duke@0 880 LIRItem dst_pos(x->argument_at(3), this);
duke@0 881 LIRItem length(x->argument_at(4), this);
duke@0 882
duke@0 883 // operands for arraycopy must use fixed registers, otherwise
duke@0 884 // LinearScan will fail allocation (because arraycopy always needs a
duke@0 885 // call)
never@297 886
never@297 887 #ifndef _LP64
duke@0 888 src.load_item_force (FrameMap::rcx_oop_opr);
duke@0 889 src_pos.load_item_force (FrameMap::rdx_opr);
duke@0 890 dst.load_item_force (FrameMap::rax_oop_opr);
duke@0 891 dst_pos.load_item_force (FrameMap::rbx_opr);
duke@0 892 length.load_item_force (FrameMap::rdi_opr);
duke@0 893 LIR_Opr tmp = (FrameMap::rsi_opr);
never@297 894 #else
never@297 895
never@297 896 // The java calling convention will give us enough registers
never@297 897 // so that on the stub side the args will be perfect already.
never@297 898 // On the other slow/special case side we call C and the arg
never@297 899 // positions are not similar enough to pick one as the best.
never@297 900 // Also because the java calling convention is a "shifted" version
never@297 901 // of the C convention we can process the java args trivially into C
never@297 902 // args without worry of overwriting during the xfer
never@297 903
never@297 904 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
never@297 905 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
never@297 906 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
never@297 907 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
never@297 908 length.load_item_force (FrameMap::as_opr(j_rarg4));
never@297 909
never@297 910 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
never@297 911 #endif // LP64
never@297 912
duke@0 913 set_no_result(x);
duke@0 914
duke@0 915 int flags;
duke@0 916 ciArrayKlass* expected_type;
duke@0 917 arraycopy_helper(x, &flags, &expected_type);
duke@0 918
duke@0 919 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
duke@0 920 }
duke@0 921
duke@0 922
duke@0 923 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
duke@0 924 // _i2b, _i2c, _i2s
duke@0 925 LIR_Opr fixed_register_for(BasicType type) {
duke@0 926 switch (type) {
duke@0 927 case T_FLOAT: return FrameMap::fpu0_float_opr;
duke@0 928 case T_DOUBLE: return FrameMap::fpu0_double_opr;
duke@0 929 case T_INT: return FrameMap::rax_opr;
never@297 930 case T_LONG: return FrameMap::long0_opr;
duke@0 931 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
duke@0 932 }
duke@0 933 }
duke@0 934
duke@0 935 void LIRGenerator::do_Convert(Convert* x) {
duke@0 936 // flags that vary for the different operations and different SSE-settings
duke@0 937 bool fixed_input, fixed_result, round_result, needs_stub;
duke@0 938
duke@0 939 switch (x->op()) {
duke@0 940 case Bytecodes::_i2l: // fall through
duke@0 941 case Bytecodes::_l2i: // fall through
duke@0 942 case Bytecodes::_i2b: // fall through
duke@0 943 case Bytecodes::_i2c: // fall through
duke@0 944 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
duke@0 945
duke@0 946 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
duke@0 947 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
duke@0 948 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
duke@0 949 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
duke@0 950 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
duke@0 951 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
duke@0 952 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
duke@0 953 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
duke@0 954 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
duke@0 955 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
duke@0 956 default: ShouldNotReachHere();
duke@0 957 }
duke@0 958
duke@0 959 LIRItem value(x->value(), this);
duke@0 960 value.load_item();
duke@0 961 LIR_Opr input = value.result();
duke@0 962 LIR_Opr result = rlock(x);
duke@0 963
duke@0 964 // arguments of lir_convert
duke@0 965 LIR_Opr conv_input = input;
duke@0 966 LIR_Opr conv_result = result;
duke@0 967 ConversionStub* stub = NULL;
duke@0 968
duke@0 969 if (fixed_input) {
duke@0 970 conv_input = fixed_register_for(input->type());
duke@0 971 __ move(input, conv_input);
duke@0 972 }
duke@0 973
duke@0 974 assert(fixed_result == false || round_result == false, "cannot set both");
duke@0 975 if (fixed_result) {
duke@0 976 conv_result = fixed_register_for(result->type());
duke@0 977 } else if (round_result) {
duke@0 978 result = new_register(result->type());
duke@0 979 set_vreg_flag(result, must_start_in_memory);
duke@0 980 }
duke@0 981
duke@0 982 if (needs_stub) {
duke@0 983 stub = new ConversionStub(x->op(), conv_input, conv_result);
duke@0 984 }
duke@0 985
duke@0 986 __ convert(x->op(), conv_input, conv_result, stub);
duke@0 987
duke@0 988 if (result != conv_result) {
duke@0 989 __ move(conv_result, result);
duke@0 990 }
duke@0 991
duke@0 992 assert(result->is_virtual(), "result must be virtual register");
duke@0 993 set_result(x, result);
duke@0 994 }
duke@0 995
duke@0 996
duke@0 997 void LIRGenerator::do_NewInstance(NewInstance* x) {
roland@1718 998 #ifndef PRODUCT
duke@0 999 if (PrintNotLoaded && !x->klass()->is_loaded()) {
roland@1718 1000 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
duke@0 1001 }
roland@1718 1002 #endif
duke@0 1003 CodeEmitInfo* info = state_for(x, x->state());
duke@0 1004 LIR_Opr reg = result_register_for(x->type());
duke@0 1005 new_instance(reg, x->klass(),
duke@0 1006 FrameMap::rcx_oop_opr,
duke@0 1007 FrameMap::rdi_oop_opr,
duke@0 1008 FrameMap::rsi_oop_opr,
duke@0 1009 LIR_OprFact::illegalOpr,
roland@3615 1010 FrameMap::rdx_metadata_opr, info);
duke@0 1011 LIR_Opr result = rlock_result(x);
duke@0 1012 __ move(reg, result);
duke@0 1013 }
duke@0 1014
duke@0 1015
duke@0 1016 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
duke@0 1017 CodeEmitInfo* info = state_for(x, x->state());
duke@0 1018
duke@0 1019 LIRItem length(x->length(), this);
duke@0 1020 length.load_item_force(FrameMap::rbx_opr);
duke@0 1021
duke@0 1022 LIR_Opr reg = result_register_for(x->type());
duke@0 1023 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
duke@0 1024 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
duke@0 1025 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
duke@0 1026 LIR_Opr tmp4 = reg;
roland@3615 1027 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
duke@0 1028 LIR_Opr len = length.result();
duke@0 1029 BasicType elem_type = x->elt_type();
duke@0 1030
roland@3615 1031 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
duke@0 1032
duke@0 1033 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
duke@0 1034 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
duke@0 1035
duke@0 1036 LIR_Opr result = rlock_result(x);
duke@0 1037 __ move(reg, result);
duke@0 1038 }
duke@0 1039
duke@0 1040
duke@0 1041 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
duke@0 1042 LIRItem length(x->length(), this);
duke@0 1043 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
duke@0 1044 // and therefore provide the state before the parameters have been consumed
duke@0 1045 CodeEmitInfo* patching_info = NULL;
duke@0 1046 if (!x->klass()->is_loaded() || PatchALot) {
duke@0 1047 patching_info = state_for(x, x->state_before());
duke@0 1048 }
duke@0 1049
duke@0 1050 CodeEmitInfo* info = state_for(x, x->state());
duke@0 1051
duke@0 1052 const LIR_Opr reg = result_register_for(x->type());
duke@0 1053 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
duke@0 1054 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
duke@0 1055 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
duke@0 1056 LIR_Opr tmp4 = reg;
roland@3615 1057 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
duke@0 1058
duke@0 1059 length.load_item_force(FrameMap::rbx_opr);
duke@0 1060 LIR_Opr len = length.result();
duke@0 1061
duke@0 1062 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
coleenp@3601 1063 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
duke@0 1064 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
duke@0 1065 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
duke@0 1066 }
coleenp@3601 1067 klass2reg_with_patching(klass_reg, obj, patching_info);
duke@0 1068 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
duke@0 1069
duke@0 1070 LIR_Opr result = rlock_result(x);
duke@0 1071 __ move(reg, result);
duke@0 1072 }
duke@0 1073
duke@0 1074
duke@0 1075 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
duke@0 1076 Values* dims = x->dims();
duke@0 1077 int i = dims->length();
duke@0 1078 LIRItemList* items = new LIRItemList(dims->length(), NULL);
duke@0 1079 while (i-- > 0) {
duke@0 1080 LIRItem* size = new LIRItem(dims->at(i), this);
duke@0 1081 items->at_put(i, size);
duke@0 1082 }
duke@0 1083
never@915 1084 // Evaluate state_for early since it may emit code.
duke@0 1085 CodeEmitInfo* patching_info = NULL;
duke@0 1086 if (!x->klass()->is_loaded() || PatchALot) {
duke@0 1087 patching_info = state_for(x, x->state_before());
duke@0 1088
twisti@3413 1089 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
twisti@3413 1090 // clone all handlers (NOTE: Usually this is handled transparently
twisti@3413 1091 // by the CodeEmitInfo cloning logic in CodeStub constructors but
twisti@3413 1092 // is done explicitly here because a stub isn't being used).
duke@0 1093 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
duke@0 1094 }
duke@0 1095 CodeEmitInfo* info = state_for(x, x->state());
duke@0 1096
duke@0 1097 i = dims->length();
duke@0 1098 while (i-- > 0) {
duke@0 1099 LIRItem* size = items->at(i);
duke@0 1100 size->load_nonconstant();
duke@0 1101
duke@0 1102 store_stack_parameter(size->result(), in_ByteSize(i*4));
duke@0 1103 }
duke@0 1104
roland@3615 1105 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
roland@3615 1106 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
duke@0 1107
duke@0 1108 LIR_Opr rank = FrameMap::rbx_opr;
duke@0 1109 __ move(LIR_OprFact::intConst(x->rank()), rank);
duke@0 1110 LIR_Opr varargs = FrameMap::rcx_opr;
duke@0 1111 __ move(FrameMap::rsp_opr, varargs);
duke@0 1112 LIR_OprList* args = new LIR_OprList(3);
roland@3615 1113 args->append(klass_reg);
duke@0 1114 args->append(rank);
duke@0 1115 args->append(varargs);
roland@3615 1116 LIR_Opr reg = result_register_for(x->type());
duke@0 1117 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
duke@0 1118 LIR_OprFact::illegalOpr,
duke@0 1119 reg, args, info);
duke@0 1120
duke@0 1121 LIR_Opr result = rlock_result(x);
duke@0 1122 __ move(reg, result);
duke@0 1123 }
duke@0 1124
duke@0 1125
duke@0 1126 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
duke@0 1127 // nothing to do for now
duke@0 1128 }
duke@0 1129
duke@0 1130
duke@0 1131 void LIRGenerator::do_CheckCast(CheckCast* x) {
duke@0 1132 LIRItem obj(x->obj(), this);
duke@0 1133
duke@0 1134 CodeEmitInfo* patching_info = NULL;
duke@0 1135 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
duke@0 1136 // must do this before locking the destination register as an oop register,
duke@0 1137 // and before the obj is loaded (the latter is for deoptimization)
duke@0 1138 patching_info = state_for(x, x->state_before());
duke@0 1139 }
duke@0 1140 obj.load_item();
duke@0 1141
duke@0 1142 // info for exceptions
roland@1718 1143 CodeEmitInfo* info_for_exception = state_for(x);
duke@0 1144
duke@0 1145 CodeStub* stub;
duke@0 1146 if (x->is_incompatible_class_change_check()) {
duke@0 1147 assert(patching_info == NULL, "can't patch this");
duke@0 1148 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
duke@0 1149 } else {
duke@0 1150 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
duke@0 1151 }
duke@0 1152 LIR_Opr reg = rlock_result(x);
iveresov@1871 1153 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
iveresov@1871 1154 if (!x->klass()->is_loaded() || UseCompressedOops) {
iveresov@1871 1155 tmp3 = new_register(objectType);
iveresov@1871 1156 }
duke@0 1157 __ checkcast(reg, obj.result(), x->klass(),
iveresov@1871 1158 new_register(objectType), new_register(objectType), tmp3,
duke@0 1159 x->direct_compare(), info_for_exception, patching_info, stub,
duke@0 1160 x->profiled_method(), x->profiled_bci());
duke@0 1161 }
duke@0 1162
duke@0 1163
duke@0 1164 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
duke@0 1165 LIRItem obj(x->obj(), this);
duke@0 1166
duke@0 1167 // result and test object may not be in same register
duke@0 1168 LIR_Opr reg = rlock_result(x);
duke@0 1169 CodeEmitInfo* patching_info = NULL;
duke@0 1170 if ((!x->klass()->is_loaded() || PatchALot)) {
duke@0 1171 // must do this before locking the destination register as an oop register
duke@0 1172 patching_info = state_for(x, x->state_before());
duke@0 1173 }
duke@0 1174 obj.load_item();
iveresov@1871 1175 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
iveresov@1871 1176 if (!x->klass()->is_loaded() || UseCompressedOops) {
iveresov@1871 1177 tmp3 = new_register(objectType);
iveresov@1871 1178 }
duke@0 1179 __ instanceof(reg, obj.result(), x->klass(),
iveresov@1871 1180 new_register(objectType), new_register(objectType), tmp3,
iveresov@1689 1181 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
duke@0 1182 }
duke@0 1183
duke@0 1184
duke@0 1185 void LIRGenerator::do_If(If* x) {
duke@0 1186 assert(x->number_of_sux() == 2, "inconsistency");
duke@0 1187 ValueTag tag = x->x()->type()->tag();
duke@0 1188 bool is_safepoint = x->is_safepoint();
duke@0 1189
duke@0 1190 If::Condition cond = x->cond();
duke@0 1191
duke@0 1192 LIRItem xitem(x->x(), this);
duke@0 1193 LIRItem yitem(x->y(), this);
duke@0 1194 LIRItem* xin = &xitem;
duke@0 1195 LIRItem* yin = &yitem;
duke@0 1196
duke@0 1197 if (tag == longTag) {
duke@0 1198 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
duke@0 1199 // mirror for other conditions
duke@0 1200 if (cond == If::gtr || cond == If::leq) {
duke@0 1201 cond = Instruction::mirror(cond);
duke@0 1202 xin = &yitem;
duke@0 1203 yin = &xitem;
duke@0 1204 }
duke@0 1205 xin->set_destroys_register();
duke@0 1206 }
duke@0 1207 xin->load_item();
duke@0 1208 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
duke@0 1209 // inline long zero
duke@0 1210 yin->dont_load_item();
duke@0 1211 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
duke@0 1212 // longs cannot handle constants at right side
duke@0 1213 yin->load_item();
duke@0 1214 } else {
duke@0 1215 yin->dont_load_item();
duke@0 1216 }
duke@0 1217
duke@0 1218 // add safepoint before generating condition code so it can be recomputed
duke@0 1219 if (x->is_safepoint()) {
duke@0 1220 // increment backedge counter if needed
iveresov@1681 1221 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
duke@0 1222 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
duke@0 1223 }
duke@0 1224 set_no_result(x);
duke@0 1225
duke@0 1226 LIR_Opr left = xin->result();
duke@0 1227 LIR_Opr right = yin->result();
duke@0 1228 __ cmp(lir_cond(cond), left, right);
iveresov@1681 1229 // Generate branch profiling. Profiling code doesn't kill flags.
duke@0 1230 profile_branch(x, cond);
duke@0 1231 move_to_phi(x->state());
duke@0 1232 if (x->x()->type()->is_float_kind()) {
duke@0 1233 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
duke@0 1234 } else {
duke@0 1235 __ branch(lir_cond(cond), right->type(), x->tsux());
duke@0 1236 }
duke@0 1237 assert(x->default_sux() == x->fsux(), "wrong destination above");
duke@0 1238 __ jump(x->default_sux());
duke@0 1239 }
duke@0 1240
duke@0 1241
duke@0 1242 LIR_Opr LIRGenerator::getThreadPointer() {
never@297 1243 #ifdef _LP64
never@297 1244 return FrameMap::as_pointer_opr(r15_thread);
never@297 1245 #else
duke@0 1246 LIR_Opr result = new_register(T_INT);
duke@0 1247 __ get_thread(result);
duke@0 1248 return result;
never@297 1249 #endif //
duke@0 1250 }
duke@0 1251
duke@0 1252 void LIRGenerator::trace_block_entry(BlockBegin* block) {
duke@0 1253 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
duke@0 1254 LIR_OprList* args = new LIR_OprList();
duke@0 1255 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
duke@0 1256 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
duke@0 1257 }
duke@0 1258
duke@0 1259
duke@0 1260 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
duke@0 1261 CodeEmitInfo* info) {
duke@0 1262 if (address->type() == T_LONG) {
duke@0 1263 address = new LIR_Address(address->base(),
duke@0 1264 address->index(), address->scale(),
duke@0 1265 address->disp(), T_DOUBLE);
duke@0 1266 // Transfer the value atomically by using FP moves. This means
duke@0 1267 // the value has to be moved between CPU and FPU registers. It
duke@0 1268 // always has to be moved through spill slot since there's no
duke@0 1269 // quick way to pack the value into an SSE register.
duke@0 1270 LIR_Opr temp_double = new_register(T_DOUBLE);
duke@0 1271 LIR_Opr spill = new_register(T_LONG);
duke@0 1272 set_vreg_flag(spill, must_start_in_memory);
duke@0 1273 __ move(value, spill);
duke@0 1274 __ volatile_move(spill, temp_double, T_LONG);
duke@0 1275 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
duke@0 1276 } else {
duke@0 1277 __ store(value, address, info);
duke@0 1278 }
duke@0 1279 }
duke@0 1280
duke@0 1281
duke@0 1282
duke@0 1283 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
duke@0 1284 CodeEmitInfo* info) {
duke@0 1285 if (address->type() == T_LONG) {
duke@0 1286 address = new LIR_Address(address->base(),
duke@0 1287 address->index(), address->scale(),
duke@0 1288 address->disp(), T_DOUBLE);
duke@0 1289 // Transfer the value atomically by using FP moves. This means
duke@0 1290 // the value has to be moved between CPU and FPU registers. In
duke@0 1291 // SSE0 and SSE1 mode it has to be moved through spill slot but in
duke@0 1292 // SSE2+ mode it can be moved directly.
duke@0 1293 LIR_Opr temp_double = new_register(T_DOUBLE);
duke@0 1294 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
duke@0 1295 __ volatile_move(temp_double, result, T_LONG);
duke@0 1296 if (UseSSE < 2) {
duke@0 1297 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
duke@0 1298 set_vreg_flag(result, must_start_in_memory);
duke@0 1299 }
duke@0 1300 } else {
duke@0 1301 __ load(address, result, info);
duke@0 1302 }
duke@0 1303 }
duke@0 1304
duke@0 1305 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
duke@0 1306 BasicType type, bool is_volatile) {
duke@0 1307 if (is_volatile && type == T_LONG) {
duke@0 1308 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
duke@0 1309 LIR_Opr tmp = new_register(T_DOUBLE);
duke@0 1310 __ load(addr, tmp);
duke@0 1311 LIR_Opr spill = new_register(T_LONG);
duke@0 1312 set_vreg_flag(spill, must_start_in_memory);
duke@0 1313 __ move(tmp, spill);
duke@0 1314 __ move(spill, dst);
duke@0 1315 } else {
duke@0 1316 LIR_Address* addr = new LIR_Address(src, offset, type);
duke@0 1317 __ load(addr, dst);
duke@0 1318 }
duke@0 1319 }
duke@0 1320
duke@0 1321
duke@0 1322 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
duke@0 1323 BasicType type, bool is_volatile) {
duke@0 1324 if (is_volatile && type == T_LONG) {
duke@0 1325 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
duke@0 1326 LIR_Opr tmp = new_register(T_DOUBLE);
duke@0 1327 LIR_Opr spill = new_register(T_DOUBLE);
duke@0 1328 set_vreg_flag(spill, must_start_in_memory);
duke@0 1329 __ move(data, spill);
duke@0 1330 __ move(spill, tmp);
duke@0 1331 __ move(tmp, addr);
duke@0 1332 } else {
duke@0 1333 LIR_Address* addr = new LIR_Address(src, offset, type);
duke@0 1334 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
duke@0 1335 if (is_obj) {
ysr@344 1336 // Do the pre-write barrier, if any.
johnc@2352 1337 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
johnc@2352 1338 true /* do_load */, false /* patch */, NULL);
duke@0 1339 __ move(data, addr);
duke@0 1340 assert(src->is_register(), "must be register");
duke@0 1341 // Seems to be a precise address
duke@0 1342 post_barrier(LIR_OprFact::address(addr), data);
duke@0 1343 } else {
duke@0 1344 __ move(data, addr);
duke@0 1345 }
duke@0 1346 }
duke@0 1347 }