changeset 47697:5a69ba3a4fd1

8190781: ppc64 + s390: Fix CriticalJNINatives Reviewed-by: goetz
author mdoerr
date Mon, 06 Nov 2017 17:56:29 +0100
parents e84aa2c71241
children 47629b00daa9 b140fe4ff916
files src/hotspot/cpu/ppc/assembler_ppc.inline.hpp src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp src/hotspot/cpu/ppc/vm_version_ppc.cpp src/hotspot/cpu/s390/sharedRuntime_s390.cpp
diffstat 4 files changed, 59 insertions(+), 8 deletions(-) [+]
line wrap: on
line diff
--- a/src/hotspot/cpu/ppc/assembler_ppc.inline.hpp	Mon Nov 06 12:53:55 2017 +0100
+++ b/src/hotspot/cpu/ppc/assembler_ppc.inline.hpp	Mon Nov 06 17:56:29 2017 +0100
@@ -941,7 +941,7 @@
 inline void Assembler::vpmsumw(  VectorRegister d, VectorRegister a, VectorRegister b) { emit_int32( VPMSUMW_OPCODE | vrt(d) | vra(a) | vrb(b)); }
 
 // Vector Permute and Xor (introduced with Power 8)
-inline void Assembler::vpermxor( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c) { emit_int32( VPMSUMW_OPCODE | vrt(d) | vra(a) | vrb(b) | vrc(c)); }
+inline void Assembler::vpermxor( VectorRegister d, VectorRegister a, VectorRegister b, VectorRegister c) { emit_int32( VPERMXOR_OPCODE | vrt(d) | vra(a) | vrb(b) | vrc(c)); }
 
 // Transactional Memory instructions (introduced with Power 8)
 inline void Assembler::tbegin_()                                { emit_int32( TBEGIN_OPCODE | rc(1)); }
--- a/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp	Mon Nov 06 12:53:55 2017 +0100
+++ b/src/hotspot/cpu/ppc/sharedRuntime_ppc.cpp	Mon Nov 06 17:56:29 2017 +0100
@@ -1469,8 +1469,31 @@
   }
   // Save or restore single word registers.
   for (int i = 0; i < total_in_args; i++) {
-    // PPC64: pass ints as longs: must only deal with floats here.
-    if (in_regs[i].first()->is_FloatRegister()) {
+    if (in_regs[i].first()->is_Register()) {
+      int offset = slot * VMRegImpl::stack_slot_size;
+      // Value lives in an input register. Save it on stack.
+      switch (in_sig_bt[i]) {
+        case T_BOOLEAN:
+        case T_CHAR:
+        case T_BYTE:
+        case T_SHORT:
+        case T_INT:
+          if (map != NULL) {
+            __ stw(in_regs[i].first()->as_Register(), offset, R1_SP);
+          } else {
+            __ lwa(in_regs[i].first()->as_Register(), offset, R1_SP);
+          }
+          slot++;
+          assert(slot <= stack_slots, "overflow (after INT or smaller stack slot)");
+          break;
+        case T_ARRAY:
+        case T_LONG:
+          // handled above
+          break;
+        case T_OBJECT:
+        default: ShouldNotReachHere();
+      }
+    } else if (in_regs[i].first()->is_FloatRegister()) {
       if (in_sig_bt[i] == T_FLOAT) {
         int offset = slot * VMRegImpl::stack_slot_size;
         slot++;
--- a/src/hotspot/cpu/ppc/vm_version_ppc.cpp	Mon Nov 06 12:53:55 2017 +0100
+++ b/src/hotspot/cpu/ppc/vm_version_ppc.cpp	Mon Nov 06 17:56:29 2017 +0100
@@ -109,7 +109,8 @@
 
   if (PowerArchitecturePPC64 >= 8) {
     if (FLAG_IS_DEFAULT(SuperwordUseVSX)) {
-      FLAG_SET_ERGO(bool, SuperwordUseVSX, true);
+      // TODO: Switch on when it works stable. Currently, MachSpillCopyNode::implementation code is missing.
+      //FLAG_SET_ERGO(bool, SuperwordUseVSX, true);
     }
   } else {
     if (SuperwordUseVSX) {
--- a/src/hotspot/cpu/s390/sharedRuntime_s390.cpp	Mon Nov 06 12:53:55 2017 +0100
+++ b/src/hotspot/cpu/s390/sharedRuntime_s390.cpp	Mon Nov 06 17:56:29 2017 +0100
@@ -1309,15 +1309,42 @@
         }
       } else {
         __ z_lg(reg, offset, Z_SP);
-        slot += VMRegImpl::slots_per_word;
-        assert(slot <= stack_slots, "overflow (after LONG/ARRAY stack slot)");
       }
+      slot += VMRegImpl::slots_per_word;
+      assert(slot <= stack_slots, "overflow (after LONG/ARRAY stack slot)");
     }
   }
 
   // Save or restore single word registers.
   for (int i = 0; i < total_in_args; i++) {
-    if (in_regs[i].first()->is_FloatRegister()) {
+    if (in_regs[i].first()->is_Register()) {
+      int offset = slot * VMRegImpl::stack_slot_size;
+      // Value lives in an input register. Save it on stack.
+      switch (in_sig_bt[i]) {
+        case T_BOOLEAN:
+        case T_CHAR:
+        case T_BYTE:
+        case T_SHORT:
+        case T_INT: {
+          const Register   reg = in_regs[i].first()->as_Register();
+          Address   stackaddr(Z_SP, offset);
+          if (map != NULL) {
+            __ z_st(reg, stackaddr);
+          } else {
+            __ z_lgf(reg, stackaddr);
+          }
+          slot++;
+          assert(slot <= stack_slots, "overflow (after INT or smaller stack slot)");
+          break;
+        }
+        case T_ARRAY:
+        case T_LONG:
+          // handled above
+          break;
+        case T_OBJECT:
+        default: ShouldNotReachHere();
+      }
+    } else if (in_regs[i].first()->is_FloatRegister()) {
       if (in_sig_bt[i] == T_FLOAT) {
         int offset = slot * VMRegImpl::stack_slot_size;
         slot++;
@@ -1908,7 +1935,7 @@
       case T_ARRAY:
         if (is_critical_native) {
           int body_arg = cix;
-          cix -= 2; // Point to length arg.
+          cix -= 1; // Point to length arg.
           unpack_array_argument(masm, in_regs[jix], in_elem_bt[jix], out_regs[body_arg], out_regs[cix], stack_slots);
           break;
         }