changeset 35738:e6dad7431dd1

Merge
author duke
date Wed, 05 Jul 2017 21:19:26 +0200
parents 3977b3940b92 9656b32cd0cf
children db483b34fa71
files hotspot/make/gensrc/Gensrc-jdk.vm.ci.gmk hotspot/src/cpu/aarch64/vm/interpreter_aarch64.cpp hotspot/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp hotspot/src/cpu/ppc/vm/interpreter_ppc.cpp hotspot/src/cpu/ppc/vm/templateInterpreter_ppc.cpp hotspot/src/cpu/ppc/vm/templateInterpreter_ppc.hpp hotspot/src/cpu/sparc/vm/interpreter_sparc.cpp hotspot/src/cpu/sparc/vm/templateInterpreter_sparc.cpp hotspot/src/cpu/x86/vm/interpreterGenerator_x86.cpp hotspot/src/cpu/x86/vm/interpreter_x86_32.cpp hotspot/src/cpu/x86/vm/interpreter_x86_64.cpp hotspot/src/cpu/x86/vm/macroAssembler_x86_libm.cpp hotspot/src/cpu/x86/vm/templateInterpreter_x86.cpp hotspot/src/cpu/zero/vm/interp_masm_zero.cpp hotspot/src/cpu/zero/vm/interpreter_zero.cpp hotspot/src/cpu/zero/vm/register_definitions_zero.cpp hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.code/src/jdk/vm/ci/code/CompilationResult.java hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.code/src/jdk/vm/ci/code/DataSection.java hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.code/src/jdk/vm/ci/code/InfopointReason.java hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.service.processor/src/META-INF/services/javax.annotation.processing.Processor hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.service.processor/src/jdk/vm/ci/service/processor/ServiceProviderProcessor.java hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.service/.checkstyle_checks.xml hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.service/src/jdk/vm/ci/service/ServiceProvider.java hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.service/src/jdk/vm/ci/service/Services.java hotspot/src/share/vm/oops/typeArrayOop.cpp hotspot/test/gc/6581734/Test6581734.java hotspot/test/gc/6845368/bigobj.java hotspot/test/gc/7072527/TestFullGCCount.java jdk/src/java.base/share/classes/sun/misc/Cleaner.java jdk/src/java.desktop/share/classes/sun/awt/DefaultMouseInfoPeer.java jdk/test/jdk/internal/misc/JavaLangAccess/FormatUnsigned.java jdk/test/sun/misc/Cleaner/ExitOnThrow.java jdk/test/sun/misc/Cleaner/exitOnThrow.sh
diffstat 1574 files changed, 124732 insertions(+), 103890 deletions(-) [+]
line wrap: on
line diff
--- a/.hgtags-top-repo	Thu Feb 04 16:50:04 2016 -0800
+++ b/.hgtags-top-repo	Wed Jul 05 21:19:26 2017 +0200
@@ -346,3 +346,4 @@
 c4d72a1620835b5d657b7b6792c2879367d0154f jdk-9+101
 6406ecf5d39482623225bb1b3098c2cac6f7d450 jdk-9+102
 47d6462e514b2097663305a57d9c844c15d5b609 jdk-9+103
+9a38f8b4ba220708db198d08d82fd2144a64777d jdk-9+104
--- a/common/autoconf/basics.m4	Thu Feb 04 16:50:04 2016 -0800
+++ b/common/autoconf/basics.m4	Wed Jul 05 21:19:26 2017 +0200
@@ -573,6 +573,11 @@
 
   # Locate the directory of this script.
   AUTOCONF_DIR=$TOPDIR/common/autoconf
+
+  # Setup username (for use in adhoc version strings etc)
+  # Outer [ ] to quote m4.
+  [ USERNAME=`$ECHO "$USER" | $TR -d -c '[a-z][A-Z][0-9]'` ]
+  AC_SUBST(USERNAME)
 ])
 
 # Evaluates platform specific overrides for devkit variables.
--- a/common/autoconf/flags.m4	Thu Feb 04 16:50:04 2016 -0800
+++ b/common/autoconf/flags.m4	Wed Jul 05 21:19:26 2017 +0200
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2011, 2015, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2011, 2016, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -80,8 +80,9 @@
       if test "x$OPENJDK_TARGET_OS" = xsolaris; then
         # Solaris Studio does not have a concept of sysroot. Instead we must
         # make sure the default include and lib dirs are appended to each
-        # compile and link command line.
-        $1SYSROOT_CFLAGS="-I[$]$1SYSROOT/usr/include"
+        # compile and link command line. Must also add -I-xbuiltin to enable
+        # inlining of system functions and intrinsics.
+        $1SYSROOT_CFLAGS="-I-xbuiltin -I[$]$1SYSROOT/usr/include"
         $1SYSROOT_LDFLAGS="-L[$]$1SYSROOT/usr/lib$OPENJDK_TARGET_CPU_ISADIR \
             -L[$]$1SYSROOT/lib$OPENJDK_TARGET_CPU_ISADIR \
             -L[$]$1SYSROOT/usr/ccs/lib$OPENJDK_TARGET_CPU_ISADIR"
@@ -425,7 +426,7 @@
       # Add runtime stack smashing and undefined behavior checks.
       # Not all versions of gcc support -fstack-protector
       STACK_PROTECTOR_CFLAG="-fstack-protector-all"
-      FLAGS_COMPILER_CHECK_ARGUMENTS(ARGUMENT: [$STACK_PROTECTOR_CFLAG], IF_FALSE: [STACK_PROTECTOR_CFLAG=""])
+      FLAGS_COMPILER_CHECK_ARGUMENTS(ARGUMENT: [$STACK_PROTECTOR_CFLAG -Werror], IF_FALSE: [STACK_PROTECTOR_CFLAG=""])
 
       CFLAGS_DEBUG_OPTIONS="$STACK_PROTECTOR_CFLAG --param ssp-buffer-size=1"
       CXXFLAGS_DEBUG_OPTIONS="$STACK_PROTECTOR_CFLAG --param ssp-buffer-size=1"
@@ -601,22 +602,22 @@
     esac
   elif test "x$TOOLCHAIN_TYPE" = xclang; then
     if test "x$OPENJDK_TARGET_OS" = xlinux; then
-	    if test "x$OPENJDK_TARGET_CPU" = xx86; then
-	      # Force compatibility with i586 on 32 bit intel platforms.
-	      COMMON_CCXXFLAGS="${COMMON_CCXXFLAGS} -march=i586"
-	    fi
-	    COMMON_CCXXFLAGS_JDK="$COMMON_CCXXFLAGS $COMMON_CCXXFLAGS_JDK -Wall -Wextra -Wno-unused -Wno-unused-parameter -Wformat=2 \
-	        -pipe -D_GNU_SOURCE -D_REENTRANT -D_LARGEFILE64_SOURCE"
-	    case $OPENJDK_TARGET_CPU_ARCH in
-	      ppc )
-	        # on ppc we don't prevent gcc to omit frame pointer but do prevent strict aliasing
-	        CFLAGS_JDK="${CFLAGS_JDK} -fno-strict-aliasing"
-	        ;;
-	      * )
-	        COMMON_CCXXFLAGS_JDK="$COMMON_CCXXFLAGS_JDK -fno-omit-frame-pointer"
-	        CFLAGS_JDK="${CFLAGS_JDK} -fno-strict-aliasing"
-	        ;;
-	    esac
+      if test "x$OPENJDK_TARGET_CPU" = xx86; then
+        # Force compatibility with i586 on 32 bit intel platforms.
+        COMMON_CCXXFLAGS="${COMMON_CCXXFLAGS} -march=i586"
+      fi
+      COMMON_CCXXFLAGS_JDK="$COMMON_CCXXFLAGS $COMMON_CCXXFLAGS_JDK -Wall -Wextra -Wno-unused -Wno-unused-parameter -Wformat=2 \
+          -pipe -D_GNU_SOURCE -D_REENTRANT -D_LARGEFILE64_SOURCE"
+      case $OPENJDK_TARGET_CPU_ARCH in
+        ppc )
+          # on ppc we don't prevent gcc to omit frame pointer but do prevent strict aliasing
+          CFLAGS_JDK="${CFLAGS_JDK} -fno-strict-aliasing"
+          ;;
+        * )
+          COMMON_CCXXFLAGS_JDK="$COMMON_CCXXFLAGS_JDK -fno-omit-frame-pointer"
+          CFLAGS_JDK="${CFLAGS_JDK} -fno-strict-aliasing"
+          ;;
+      esac
     fi
   elif test "x$TOOLCHAIN_TYPE" = xsolstudio; then
     COMMON_CCXXFLAGS_JDK="$COMMON_CCXXFLAGS $COMMON_CCXXFLAGS_JDK -DTRACING -DMACRO_MEMSYS_OPS -DBREAKPTS"
--- a/common/autoconf/generated-configure.sh	Thu Feb 04 16:50:04 2016 -0800
+++ b/common/autoconf/generated-configure.sh	Wed Jul 05 21:19:26 2017 +0200
@@ -917,6 +917,7 @@
 JVM_INTERPRETER
 JDK_VARIANT
 SET_OPENJDK
+USERNAME
 CANONICAL_TOPDIR
 ORIGINAL_TOPDIR
 TOPDIR
@@ -3834,7 +3835,7 @@
 
 
 #
-# Copyright (c) 2011, 2015, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2011, 2016, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -4835,7 +4836,7 @@
 #CUSTOM_AUTOCONF_INCLUDE
 
 # Do not change or remove the following line, it is needed for consistency checks:
-DATE_WHEN_GENERATED=1454146111
+DATE_WHEN_GENERATED=1454926898
 
 ###############################################################################
 #
@@ -15652,6 +15653,11 @@
   # Locate the directory of this script.
   AUTOCONF_DIR=$TOPDIR/common/autoconf
 
+  # Setup username (for use in adhoc version strings etc)
+  # Outer [ ] to quote m4.
+   USERNAME=`$ECHO "$USER" | $TR -d -c '[a-z][A-Z][0-9]'`
+
+
 
 # Check if it's a pure open build or if custom sources are to be used.
 
@@ -23429,9 +23435,8 @@
       # Default is to calculate a string like this <timestamp>.<username>.<base dir name>
       timestamp=`$DATE '+%Y-%m-%d-%H%M%S'`
       # Outer [ ] to quote m4.
-       username=`$ECHO "$USER" | $TR -d -c '[a-z][A-Z][0-9]'`
        basedirname=`$BASENAME "$TOPDIR" | $TR -d -c '[a-z][A-Z][0-9].-'`
-      VERSION_OPT="$timestamp.$username.$basedirname"
+      VERSION_OPT="$timestamp.$USERNAME.$basedirname"
     fi
   fi
 
@@ -29968,8 +29973,9 @@
       if test "x$OPENJDK_TARGET_OS" = xsolaris; then
         # Solaris Studio does not have a concept of sysroot. Instead we must
         # make sure the default include and lib dirs are appended to each
-        # compile and link command line.
-        SYSROOT_CFLAGS="-I$SYSROOT/usr/include"
+        # compile and link command line. Must also add -I-xbuiltin to enable
+        # inlining of system functions and intrinsics.
+        SYSROOT_CFLAGS="-I-xbuiltin -I$SYSROOT/usr/include"
         SYSROOT_LDFLAGS="-L$SYSROOT/usr/lib$OPENJDK_TARGET_CPU_ISADIR \
             -L$SYSROOT/lib$OPENJDK_TARGET_CPU_ISADIR \
             -L$SYSROOT/usr/ccs/lib$OPENJDK_TARGET_CPU_ISADIR"
@@ -42361,8 +42367,9 @@
       if test "x$OPENJDK_TARGET_OS" = xsolaris; then
         # Solaris Studio does not have a concept of sysroot. Instead we must
         # make sure the default include and lib dirs are appended to each
-        # compile and link command line.
-        BUILD_SYSROOT_CFLAGS="-I$BUILD_SYSROOT/usr/include"
+        # compile and link command line. Must also add -I-xbuiltin to enable
+        # inlining of system functions and intrinsics.
+        BUILD_SYSROOT_CFLAGS="-I-xbuiltin -I$BUILD_SYSROOT/usr/include"
         BUILD_SYSROOT_LDFLAGS="-L$BUILD_SYSROOT/usr/lib$OPENJDK_TARGET_CPU_ISADIR \
             -L$BUILD_SYSROOT/lib$OPENJDK_TARGET_CPU_ISADIR \
             -L$BUILD_SYSROOT/usr/ccs/lib$OPENJDK_TARGET_CPU_ISADIR"
@@ -46191,12 +46198,12 @@
 
     # Execute function body
 
-  { $as_echo "$as_me:${as_lineno-$LINENO}: checking if compiler supports \"$STACK_PROTECTOR_CFLAG\"" >&5
-$as_echo_n "checking if compiler supports \"$STACK_PROTECTOR_CFLAG\"... " >&6; }
+  { $as_echo "$as_me:${as_lineno-$LINENO}: checking if compiler supports \"$STACK_PROTECTOR_CFLAG -Werror\"" >&5
+$as_echo_n "checking if compiler supports \"$STACK_PROTECTOR_CFLAG -Werror\"... " >&6; }
   supports=yes
 
   saved_cflags="$CFLAGS"
-  CFLAGS="$CFLAGS $STACK_PROTECTOR_CFLAG"
+  CFLAGS="$CFLAGS $STACK_PROTECTOR_CFLAG -Werror"
   ac_ext=c
 ac_cpp='$CPP $CPPFLAGS'
 ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
@@ -46222,7 +46229,7 @@
   CFLAGS="$saved_cflags"
 
   saved_cxxflags="$CXXFLAGS"
-  CXXFLAGS="$CXXFLAG $STACK_PROTECTOR_CFLAG"
+  CXXFLAGS="$CXXFLAG $STACK_PROTECTOR_CFLAG -Werror"
   ac_ext=cpp
 ac_cpp='$CXXCPP $CPPFLAGS'
 ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5'
@@ -46441,22 +46448,22 @@
     esac
   elif test "x$TOOLCHAIN_TYPE" = xclang; then
     if test "x$OPENJDK_TARGET_OS" = xlinux; then
-	    if test "x$OPENJDK_TARGET_CPU" = xx86; then
-	      # Force compatibility with i586 on 32 bit intel platforms.
-	      COMMON_CCXXFLAGS="${COMMON_CCXXFLAGS} -march=i586"
-	    fi
-	    COMMON_CCXXFLAGS_JDK="$COMMON_CCXXFLAGS $COMMON_CCXXFLAGS_JDK -Wall -Wextra -Wno-unused -Wno-unused-parameter -Wformat=2 \
-	        -pipe -D_GNU_SOURCE -D_REENTRANT -D_LARGEFILE64_SOURCE"
-	    case $OPENJDK_TARGET_CPU_ARCH in
-	      ppc )
-	        # on ppc we don't prevent gcc to omit frame pointer but do prevent strict aliasing
-	        CFLAGS_JDK="${CFLAGS_JDK} -fno-strict-aliasing"
-	        ;;
-	      * )
-	        COMMON_CCXXFLAGS_JDK="$COMMON_CCXXFLAGS_JDK -fno-omit-frame-pointer"
-	        CFLAGS_JDK="${CFLAGS_JDK} -fno-strict-aliasing"
-	        ;;
-	    esac
+      if test "x$OPENJDK_TARGET_CPU" = xx86; then
+        # Force compatibility with i586 on 32 bit intel platforms.
+        COMMON_CCXXFLAGS="${COMMON_CCXXFLAGS} -march=i586"
+      fi
+      COMMON_CCXXFLAGS_JDK="$COMMON_CCXXFLAGS $COMMON_CCXXFLAGS_JDK -Wall -Wextra -Wno-unused -Wno-unused-parameter -Wformat=2 \
+          -pipe -D_GNU_SOURCE -D_REENTRANT -D_LARGEFILE64_SOURCE"
+      case $OPENJDK_TARGET_CPU_ARCH in
+        ppc )
+          # on ppc we don't prevent gcc to omit frame pointer but do prevent strict aliasing
+          CFLAGS_JDK="${CFLAGS_JDK} -fno-strict-aliasing"
+          ;;
+        * )
+          COMMON_CCXXFLAGS_JDK="$COMMON_CCXXFLAGS_JDK -fno-omit-frame-pointer"
+          CFLAGS_JDK="${CFLAGS_JDK} -fno-strict-aliasing"
+          ;;
+      esac
     fi
   elif test "x$TOOLCHAIN_TYPE" = xsolstudio; then
     COMMON_CCXXFLAGS_JDK="$COMMON_CCXXFLAGS $COMMON_CCXXFLAGS_JDK -DTRACING -DMACRO_MEMSYS_OPS -DBREAKPTS"
--- a/common/autoconf/jdk-version.m4	Thu Feb 04 16:50:04 2016 -0800
+++ b/common/autoconf/jdk-version.m4	Wed Jul 05 21:19:26 2017 +0200
@@ -162,9 +162,8 @@
       # Default is to calculate a string like this <timestamp>.<username>.<base dir name>
       timestamp=`$DATE '+%Y-%m-%d-%H%M%S'`
       # Outer [ ] to quote m4.
-      [ username=`$ECHO "$USER" | $TR -d -c '[a-z][A-Z][0-9]'` ]
       [ basedirname=`$BASENAME "$TOPDIR" | $TR -d -c '[a-z][A-Z][0-9].-'` ]
-      VERSION_OPT="$timestamp.$username.$basedirname"
+      VERSION_OPT="$timestamp.$USERNAME.$basedirname"
     fi
   fi
 
--- a/common/autoconf/spec.gmk.in	Thu Feb 04 16:50:04 2016 -0800
+++ b/common/autoconf/spec.gmk.in	Wed Jul 05 21:19:26 2017 +0200
@@ -184,6 +184,7 @@
 COMPANY_NAME:=@COMPANY_NAME@
 MACOSX_BUNDLE_NAME_BASE=@MACOSX_BUNDLE_NAME_BASE@
 MACOSX_BUNDLE_ID_BASE=@MACOSX_BUNDLE_ID_BASE@
+USERNAME:=@USERNAME@
 
 # Different naming strings generated from the above information.
 RUNTIME_NAME=$(PRODUCT_NAME) $(PRODUCT_SUFFIX)
--- a/corba/.hgtags	Thu Feb 04 16:50:04 2016 -0800
+++ b/corba/.hgtags	Wed Jul 05 21:19:26 2017 +0200
@@ -346,3 +346,4 @@
 30dfb3bd3d06b4bb80a087babc0d1841edba187b jdk-9+101
 9c4662334d933d299928d1f599d02ff50777cbf8 jdk-9+102
 0680fb7dae4da1ee6cf783c4b74184e3e08d3179 jdk-9+103
+e385e95e6101711d5c63e7b1a827e99b6ec7a1cc jdk-9+104
--- a/hotspot/.hgtags	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/.hgtags	Wed Jul 05 21:19:26 2017 +0200
@@ -506,3 +506,4 @@
 9f45d3d57d6948cf526fbc2e2891a9a74ac6941a jdk-9+101
 d5239fc1b69749ae50793c61b899fcdacf3df857 jdk-9+102
 c5f55130b1b69510d9a6f4a3105b58e21cd7ffe1 jdk-9+103
+534c50395957c6025fb6627e93b35756f8d48a08 jdk-9+104
--- a/hotspot/.mx.jvmci/mx_jvmci.py	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/.mx.jvmci/mx_jvmci.py	Wed Jul 05 21:19:26 2017 +0200
@@ -40,6 +40,8 @@
 
 _suite = mx.suite('jvmci')
 
+JVMCI_VERSION = 9
+
 """
 Top level directory of the JDK source workspace.
 """
@@ -153,11 +155,17 @@
     def deploy(self, jdkDir):
         mx.nyi('deploy', self)
 
+    def post_parse_cmd_line(self):
+        self.set_archiveparticipant()
+
+    def set_archiveparticipant(self):
+        dist = self.dist()
+        dist.set_archiveparticipant(JVMCIArchiveParticipant(dist))
+
 class ExtJDKDeployedDist(JvmciJDKDeployedDist):
     def __init__(self, name):
         JvmciJDKDeployedDist.__init__(self, name)
 
-
 """
 The monolithic JVMCI distribution is deployed through use of -Xbootclasspath/p
 so that it's not necessary to run JDK make after editing JVMCI sources.
@@ -186,7 +194,7 @@
         # JDK9 must be bootstrapped with a JDK8
         compliance = mx.JavaCompliance('8')
         jdk8 = mx.get_jdk(compliance.exactMatch, versionDescription=compliance.value)
-        cmd = ['sh', 'configure', '--with-debug-level=' + _vm.debugLevel, '--disable-debug-symbols', '--disable-precompiled-headers',
+        cmd = ['sh', 'configure', '--with-debug-level=' + _vm.debugLevel, '--with-native-debug-symbols=none', '--disable-precompiled-headers',
                '--with-jvm-variants=' + _vm.jvmVariant, '--disable-warnings-as-errors', '--with-boot-jdk=' + jdk8.home]
         mx.run(cmd, cwd=_jdkSourceRoot)
     cmd = [mx.gmake_cmd(), 'CONF=' + _vm.debugLevel]
@@ -205,7 +213,15 @@
     mx.run(cmd, cwd=_jdkSourceRoot)
 
     if 'images' in cmd:
-        _create_jdk_bundle(jdkBuildDir)
+        jdkImageDir = join(jdkBuildDir, 'images', 'jdk')
+
+        # The OpenJDK build creates an empty cacerts file so copy one from
+        # the default JDK (which is assumed to be an OracleJDK)
+        srcCerts = join(mx.get_jdk(tag='default').home, 'jre', 'lib', 'security', 'cacerts')
+        dstCerts = join(jdkImageDir, 'lib', 'security', 'cacerts')
+        shutil.copyfile(srcCerts, dstCerts)
+
+        _create_jdk_bundle(jdkBuildDir, _vm.debugLevel, jdkImageDir)
 
 def _get_jdk_bundle_arches():
     """
@@ -220,15 +236,14 @@
         return ['sparcv9']
     mx.abort('Unsupported JDK bundle arch: ' + cpu)
 
-def _create_jdk_bundle(jdkBuildDir):
+def _create_jdk_bundle(jdkBuildDir, debugLevel, jdkImageDir):
     """
     Creates a tar.gz JDK archive, an accompanying tar.gz.sha1 file with its
     SHA1 signature plus symlinks to the archive for non-canonical architecture names.
     """
-    jdkImageDir = join(jdkBuildDir, 'images', 'jdk')
 
     arches = _get_jdk_bundle_arches()
-    jdkTgzPath = join(_suite.get_output_root(), 'jdk-bundles', 'jdk9-{}-{}.tar.gz'.format(_get_openjdk_os(), arches[0]))
+    jdkTgzPath = join(_suite.get_output_root(), 'jdk-bundles', 'jdk9-{}-{}-{}.tar.gz'.format(debugLevel, _get_openjdk_os(), arches[0]))
     with mx.Archiver(jdkTgzPath, kind='tgz') as arc:
         mx.log('Creating ' + jdkTgzPath)
         for root, _, filenames in os.walk(jdkImageDir):
@@ -236,10 +251,6 @@
                 f = join(root, name)
                 arcname = 'jdk1.9.0/' + os.path.relpath(f, jdkImageDir)
                 arc.zf.add(name=f, arcname=arcname, recursive=False)
-        # The OpenJDK build creates an empty cacerts file so grab one from
-        # the default JDK which is assumed to be an OracleJDK
-        cacerts = join(mx.get_jdk(tag='default').home, 'jre', 'lib', 'security', 'cacerts')
-        arc.zf.add(name=cacerts, arcname='jdk1.9.0/lib/security/cacerts')
 
     with open(jdkTgzPath + '.sha1', 'w') as fp:
         mx.log('Creating ' + jdkTgzPath + '.sha1')
@@ -252,7 +263,7 @@
         os.symlink(source, link_name)
 
     for arch in arches[1:]:
-        link_name = join(_suite.get_output_root(), 'jdk-bundles', 'jdk9-{}-{}.tar.gz'.format(_get_openjdk_os(), arch))
+        link_name = join(_suite.get_output_root(), 'jdk-bundles', 'jdk9-{}-{}-{}.tar.gz'.format(debugLevel, _get_openjdk_os(), arch))
         jdkTgzName = os.path.basename(jdkTgzPath)
         _create_link(jdkTgzName, link_name)
         _create_link(jdkTgzName + '.sha1', link_name + '.sha1')
@@ -668,15 +679,10 @@
 
     def __opened__(self, arc, srcArc, services):
         self.services = services
+        self.jvmciServices = services
         self.arc = arc
 
     def __add__(self, arcname, contents):
-        if arcname.startswith('META-INF/jvmci.providers/'):
-            provider = arcname[len('META-INF/jvmci.providers/'):]
-            for service in contents.strip().split(os.linesep):
-                assert service
-                self.services.setdefault(service, []).append(provider)
-            return True
         return False
 
     def __addsrc__(self, arcname, contents):
@@ -757,6 +763,14 @@
 
         args = ['-Xbootclasspath/p:' + dep.classpath_repr() for dep in _jvmci_bootclasspath_prepends] + args
 
+        # Remove JVMCI jars from class path. They are only necessary when
+        # compiling with a javac from JDK8 or earlier.
+        cpIndex, cp = mx.find_classpath_arg(args)
+        if cp:
+            excluded = frozenset([dist.path for dist in _suite.dists])
+            cp = os.pathsep.join([e for e in cp.split(os.pathsep) if e not in excluded])
+            args[cpIndex] = cp
+
         jvmciModeArgs = _jvmciModes[_vm.jvmciMode]
         if jvmciModeArgs:
             bcpDeps = [jdkDist.dist() for jdkDist in jdkDeployedDists]
@@ -812,7 +826,7 @@
         _jvmci_jdks[debugLevel] = jdk
     return jdk
 
-class JVMCIJDKFactory(mx.JDKFactory):
+class JVMCI9JDKFactory(mx.JDKFactory):
     def getJDKConfig(self):
         jdk = get_jvmci_jdk(_vm.debugLevel)
         return jdk
@@ -836,8 +850,9 @@
 mx.add_argument('--jdk-debug-level', '--vmbuild', action='store', choices=_jdkDebugLevels + sorted(_legacyVmbuilds.viewkeys()), help='the JDK debug level to build/run (default: ' + _vm.debugLevel + ')')
 mx.add_argument('-I', '--use-jdk-image', action='store_true', help='build/run JDK image instead of exploded JDK')
 
+mx.addJDKFactory(_JVMCI_JDK_TAG, mx.JavaCompliance('9'), JVMCI9JDKFactory())
+
 def mx_post_parse_cmd_line(opts):
-    mx.addJDKFactory(_JVMCI_JDK_TAG, mx.JavaCompliance('9'), JVMCIJDKFactory())
     mx.set_java_command_default_jdk_tag(_JVMCI_JDK_TAG)
 
     jdkTag = mx.get_jdk_option().tag
@@ -864,6 +879,39 @@
     _vm.update(jvmVariant, debugLevel, jvmciMode)
 
     for jdkDist in jdkDeployedDists:
-        dist = jdkDist.dist()
-        if isinstance(jdkDist, JvmciJDKDeployedDist):
-            dist.set_archiveparticipant(JVMCIArchiveParticipant(dist))
+        jdkDist.post_parse_cmd_line()
+
+def _update_JDK9_STUBS_library():
+    """
+    Sets the "path" and "sha1" attributes of the "JDK9_STUBS" library.
+    """
+    jdk9InternalLib = _suite.suiteDict['libraries']['JDK9_STUBS']
+    jarInputDir = join(_suite.get_output_root(), 'jdk9-stubs')
+    jarPath = join(_suite.get_output_root(), 'jdk9-stubs.jar')
+
+    stubs = [
+        ('jdk.internal.misc', 'VM', """package jdk.internal.misc;
+public class VM {
+    public static String getSavedProperty(String key) {
+        throw new InternalError("should not reach here");
+    }
+}
+""")
+    ]
+
+    if not exists(jarPath):
+        sourceFiles = []
+        for (package, className, source) in stubs:
+            sourceFile = join(jarInputDir, package.replace('.', os.sep), className + '.java')
+            mx.ensure_dir_exists(os.path.dirname(sourceFile))
+            with open(sourceFile, 'w') as fp:
+                fp.write(source)
+            sourceFiles.append(sourceFile)
+        jdk = mx.get_jdk(tag='default')
+        mx.run([jdk.javac, '-d', jarInputDir] + sourceFiles)
+        mx.run([jdk.jar, 'cf', jarPath, '.'], cwd=jarInputDir)
+
+    jdk9InternalLib['path'] = jarPath
+    jdk9InternalLib['sha1'] = mx.sha1OfFile(jarPath)
+
+_update_JDK9_STUBS_library()
--- a/hotspot/.mx.jvmci/suite.py	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/.mx.jvmci/suite.py	Wed Jul 05 21:19:26 2017 +0200
@@ -1,5 +1,5 @@
 suite = {
-  "mxversion" : "5.5.12",
+  "mxversion" : "5.6.11",
   "name" : "jvmci",
   "url" : "http://openjdk.java.net/projects/graal",
   "developer" : {
@@ -24,7 +24,7 @@
 
   "defaultLicense" : "GPLv2-CPE",
 
-  # This puts mx/ as a sibiling of the JDK build configuration directories
+  # This puts mx/ as a sibling of the JDK build configuration directories
   # (e.g., macosx-x86_64-normal-server-release).
   "outputRoot" : "../build/mx/hotspot",
 
@@ -32,8 +32,6 @@
 
   "libraries" : {
 
-    # ------------- Libraries -------------
-
     "HCFDIS" : {
       "urls" : ["https://lafo.ssw.uni-linz.ac.at/pub/hcfdis-3.jar"],
       "sha1" : "a71247c6ddb90aad4abf7c77e501acc60674ef57",
@@ -53,34 +51,32 @@
       "sha1" : "122b87ca88e41a415cf8b523fd3d03b4325134a3",
       "urls" : ["https://lafo.ssw.uni-linz.ac.at/pub/graal-external-deps/batik-all-1.7.jar"],
     },
+
+    # Stubs for classes introduced in JDK9 that allow compilation with a JDK8 javac and Eclipse.
+    # The "path" and "sha1" attributes are added when mx_jvmci is loaded
+    # (see mx_jvmci._update_JDK9_STUBS_library()).
+    "JDK9_STUBS" : {
+        "license" : "GPLv2-CPE",
+     },
   },
 
   "projects" : {
 
     # ------------- JVMCI:Service -------------
 
-    "jdk.vm.ci.service" : {
+    "jdk.vm.ci.services" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
 
-    "jdk.vm.ci.service.processor" : {
-      "subDir" : "src/jdk.vm.ci/share/classes",
-      "sourceDirs" : ["src"],
-      "dependencies" : ["jdk.vm.ci.service"],
-      "checkstyle" : "jdk.vm.ci.service",
-      "javaCompliance" : "1.8",
-      "workingSets" : "JVMCI,Codegen,HotSpot",
-    },
-
     # ------------- JVMCI:API -------------
 
     "jdk.vm.ci.common" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
@@ -88,7 +84,7 @@
     "jdk.vm.ci.meta" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
@@ -97,7 +93,7 @@
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
       "dependencies" : ["jdk.vm.ci.meta"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
@@ -108,7 +104,7 @@
       "dependencies" : [
         "jdk.vm.ci.code",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
@@ -121,7 +117,7 @@
         "jdk.vm.ci.common",
         "jdk.vm.ci.runtime",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
@@ -129,7 +125,7 @@
     "jdk.vm.ci.inittimer" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI",
     },
@@ -140,7 +136,7 @@
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
       "dependencies" : ["jdk.vm.ci.code"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,AArch64",
     },
@@ -149,7 +145,7 @@
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
       "dependencies" : ["jdk.vm.ci.code"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,AMD64",
     },
@@ -158,7 +154,7 @@
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
       "dependencies" : ["jdk.vm.ci.code"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,SPARC",
     },
@@ -171,9 +167,10 @@
         "jdk.vm.ci.common",
         "jdk.vm.ci.inittimer",
         "jdk.vm.ci.runtime",
-        "jdk.vm.ci.service",
+        "jdk.vm.ci.services",
+        "JDK9_STUBS",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI",
     },
@@ -181,7 +178,7 @@
     "jdk.vm.ci.hotspotvmconfig" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,HotSpot",
     },
@@ -193,10 +190,7 @@
         "jdk.vm.ci.aarch64",
         "jdk.vm.ci.hotspot",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
-      "annotationProcessors" : [
-        "JVMCI_SERVICE_PROCESSOR",
-      ],
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,HotSpot,AArch64",
     },
@@ -208,10 +202,7 @@
         "jdk.vm.ci.amd64",
         "jdk.vm.ci.hotspot",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
-      "annotationProcessors" : [
-        "JVMCI_SERVICE_PROCESSOR",
-      ],
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,HotSpot,AMD64",
     },
@@ -223,10 +214,7 @@
         "jdk.vm.ci.sparc",
         "jdk.vm.ci.hotspot",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
-      "annotationProcessors" : [
-        "JVMCI_SERVICE_PROCESSOR",
-      ],
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,HotSpot,SPARC",
     },
@@ -241,9 +229,9 @@
 
     # ------------- Distributions -------------
 
-    "JVMCI_SERVICE" : {
+    "JVMCI_SERVICES" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
-      "dependencies" : ["jdk.vm.ci.service"],
+      "dependencies" : ["jdk.vm.ci.services"],
     },
 
     "JVMCI_API" : {
@@ -257,7 +245,7 @@
         "jdk.vm.ci.sparc",
       ],
       "distDependencies" : [
-        "JVMCI_SERVICE",
+        "JVMCI_SERVICES",
       ],
     },
 
@@ -277,7 +265,7 @@
       ],
       "distDependencies" : [
         "JVMCI_HOTSPOTVMCONFIG",
-        "JVMCI_SERVICE",
+        "JVMCI_SERVICES",
         "JVMCI_API",
       ],
     },
@@ -293,28 +281,18 @@
       "exclude" : ["mx:JUNIT"],
     },
 
-
-    "JVMCI_SERVICE_PROCESSOR" : {
-      "subDir" : "src/jdk.vm.ci/share/classes",
-      "dependencies" : ["jdk.vm.ci.service.processor"],
-      "distDependencies" : [
-        "JVMCI_SERVICE",
-      ],
-    },
-
     # This exists to have a monolithic jvmci.jar file which simplifies
     # using the -Xoverride option in JDK9.
     "JVMCI" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "overlaps" : [
         "JVMCI_API",
-        "JVMCI_SERVICE",
+        "JVMCI_SERVICES",
         "JVMCI_HOTSPOT",
         "JVMCI_HOTSPOTVMCONFIG",
-        "JVMCI_SERVICE_PROCESSOR",
       ],
       "dependencies" : [
-        "jdk.vm.ci.service",
+        "jdk.vm.ci.services",
         "jdk.vm.ci.inittimer",
         "jdk.vm.ci.runtime",
         "jdk.vm.ci.common",
@@ -325,8 +303,8 @@
         "jdk.vm.ci.hotspot.aarch64",
         "jdk.vm.ci.hotspot.amd64",
         "jdk.vm.ci.hotspot.sparc",
-        "jdk.vm.ci.service.processor"
       ],
+      "exclude" : ["JDK9_STUBS"]
     },
   },
 }
--- a/hotspot/make/aix/Makefile	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/Makefile	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2015 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2015 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/buildtree.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/buildtree.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/compiler2.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/compiler2.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/debug.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/debug.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/defs.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/defs.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2006, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/fastdebug.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/fastdebug.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/jsig.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/jsig.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2005, 2014, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/jvmti.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/jvmti.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/ppc64.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/ppc64.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2004, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2015 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2015 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/product.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/product.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/tiered.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/tiered.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2006, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2015 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2015 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/vm.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/vm.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/xlc.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/aix/makefiles/xlc.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright (c) 2012, 2015 SAP. All rights reserved.
+# Copyright (c) 2012, 2015 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/gensrc/Gensrc-jdk.vm.ci.gmk	Thu Feb 04 16:50:04 2016 -0800
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,105 +0,0 @@
-#
-# Copyright (c) 2015, Oracle and/or its affiliates. All rights reserved.
-# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
-#
-# This code is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License version 2 only, as
-# published by the Free Software Foundation.  Oracle designates this
-# particular file as subject to the "Classpath" exception as provided
-# by Oracle in the LICENSE file that accompanied this code.
-#
-# This code is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-# version 2 for more details (a copy is included in the LICENSE file that
-# accompanied this code).
-#
-# You should have received a copy of the GNU General Public License version
-# 2 along with this work; if not, write to the Free Software Foundation,
-# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
-#
-# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
-# or visit www.oracle.com if you need additional information or have any
-# questions.
-#
-
-default: all
-
-include $(SPEC)
-include MakeBase.gmk
-include JavaCompilation.gmk
-include SetupJavaCompilers.gmk
-
-GENSRC_DIR := $(SUPPORT_OUTPUTDIR)/gensrc/jdk.vm.ci
-SRC_DIR := $(HOTSPOT_TOPDIR)/src/jdk.vm.ci/share/classes
-
-################################################################################
-# Compile the annotation processor
-
-$(eval $(call SetupJavaCompilation, BUILD_JVMCI_SERVICE, \
-    SETUP := GENERATE_OLDBYTECODE, \
-    SRC := $(SRC_DIR)/jdk.vm.ci.service/src \
-        $(SRC_DIR)/jdk.vm.ci.service.processor/src, \
-    BIN := $(BUILDTOOLS_OUTPUTDIR)/jvmci_service, \
-    JAR := $(BUILDTOOLS_OUTPUTDIR)/jdk.vm.ci.service.jar, \
-))
-
-################################################################################
-
-PROC_SRC_SUBDIRS := \
-    jdk.vm.ci.hotspot \
-    jdk.vm.ci.hotspot.aarch64 \
-    jdk.vm.ci.hotspot.amd64 \
-    jdk.vm.ci.hotspot.sparc \
-    jdk.vm.ci.runtime \
-    #
-
-PROC_SRC_DIRS := $(patsubst %, $(SRC_DIR)/%/src, $(PROC_SRC_SUBDIRS))
-
-PROC_SRCS := $(filter %.java, $(call CacheFind, $(PROC_SRC_DIRS)))
-
-ALL_SRC_DIRS := $(wildcard $(SRC_DIR)/*/src)
-SOURCEPATH := $(call PathList, $(ALL_SRC_DIRS))
-PROCESSOR_PATH := $(call PathList, \
-    $(BUILDTOOLS_OUTPUTDIR)/jdk.vm.ci.service.jar)
-
-$(GENSRC_DIR)/_gensrc_proc_done: $(PROC_SRCS) \
-    $(BUILD_JVMCI_SERVICE)
-	$(MKDIR) -p $(@D)
-	$(eval $(call ListPathsSafely,PROC_SRCS,$(@D)/_gensrc_proc_files))
-	$(JAVA_SMALL) $(NEW_JAVAC) \
-	    -XDignore.symbol.file \
-            -bootclasspath $(JDK_OUTPUTDIR)/modules/java.base \
-	    -sourcepath $(SOURCEPATH) \
-	    -implicit:none \
-	    -proc:only \
-	    -processorpath $(PROCESSOR_PATH) \
-	    -d $(GENSRC_DIR) \
-	    -s $(GENSRC_DIR) \
-	    @$(@D)/_gensrc_proc_files
-	$(TOUCH) $@
-
-TARGETS += $(GENSRC_DIR)/_gensrc_proc_done
-
-################################################################################
-
-$(GENSRC_DIR)/_providers_converted: $(GENSRC_DIR)/_gensrc_proc_done
-	$(MKDIR) -p $(GENSRC_DIR)/META-INF/services
-	($(CD) $(GENSRC_DIR)/META-INF/jvmci.providers && \
-	    for i in $$($(LS)); do \
-	      c=$$($(CAT) $$i | $(TR) -d '\n\r'); \
-	      $(ECHO) $$i >> $(GENSRC_DIR)/META-INF/services/$$c.tmp; \
-	    done)
-	($(CD) $(GENSRC_DIR)/META-INF/services && \
-	    for i in $$($(LS) *.tmp); do \
-	      $(MV) $$i $${i%.tmp}; \
-	    done)
-	$(TOUCH) $@
-
-TARGETS += $(GENSRC_DIR)/_providers_converted
-
-################################################################################
-
-all: $(TARGETS)
-
-.PHONY: default all
--- a/hotspot/make/linux/makefiles/ppc64.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/linux/makefiles/ppc64.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2004, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/share/makefiles/mapfile-vers	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/share/makefiles/mapfile-vers	Wed Jul 05 21:19:26 2017 +0200
@@ -13,6 +13,7 @@
                 JVM_Clone;
                 JVM_ConstantPoolGetClassAt;
                 JVM_ConstantPoolGetClassAtIfLoaded;
+                JVM_ConstantPoolGetClassRefIndexAt;
                 JVM_ConstantPoolGetDoubleAt;
                 JVM_ConstantPoolGetFieldAt;
                 JVM_ConstantPoolGetFieldAtIfLoaded;
@@ -22,8 +23,11 @@
                 JVM_ConstantPoolGetMethodAt;
                 JVM_ConstantPoolGetMethodAtIfLoaded;
                 JVM_ConstantPoolGetMemberRefInfoAt;
+                JVM_ConstantPoolGetNameAndTypeRefInfoAt;
+                JVM_ConstantPoolGetNameAndTypeRefIndexAt;
                 JVM_ConstantPoolGetSize;
                 JVM_ConstantPoolGetStringAt;
+                JVM_ConstantPoolGetTagAt;
                 JVM_ConstantPoolGetUTF8At;
                 JVM_CountStackFrames;
                 JVM_CurrentClassLoader;
--- a/hotspot/make/solaris/makefiles/sparcWorks.make	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/make/solaris/makefiles/sparcWorks.make	Wed Jul 05 21:19:26 2017 +0200
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 1998, 2015, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 1998, 2016, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -48,9 +48,9 @@
 $(shell $(CC) -V 2>&1 | sed -n 's/^.*[ ,\t]C[ ,\t]\([1-9]\.[0-9][0-9]*\).*/\1/p')
 
 # Pick which compiler is validated
-# Validated compiler for JDK9 is SS12.3 (5.12)
-VALIDATED_COMPILER_REVS   := 5.12
-VALIDATED_CC_COMPILER_REVS := 5.12
+# Validated compiler for JDK9 is SS12.4 (5.13)
+VALIDATED_COMPILER_REVS   := 5.13
+VALIDATED_CC_COMPILER_REVS := 5.13
 
 # Warning messages about not using the above validated versions
 ENFORCE_COMPILER_REV${ENFORCE_COMPILER_REV} := $(strip ${VALIDATED_COMPILER_REVS})
--- a/hotspot/src/cpu/aarch64/vm/aarch64.ad	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/aarch64/vm/aarch64.ad	Wed Jul 05 21:19:26 2017 +0200
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
 // Copyright (c) 2014, Red Hat Inc. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
@@ -577,7 +577,7 @@
     R26
  /* R27, */                     // heapbase
  /* R28, */                     // thread
-    R29,                        // fp
+ /* R29, */                     // fp
  /* R30, */                     // lr
  /* R31 */                      // sp
 );
@@ -646,7 +646,7 @@
     R26, R26_H,
  /* R27, R27_H, */              // heapbase
  /* R28, R28_H, */              // thread
-    R29, R29_H,                 // fp
+ /* R29, R29_H, */              // fp
  /* R30, R30_H, */              // lr
  /* R31, R31_H */               // sp
 );
@@ -4442,11 +4442,7 @@
 
   enc_class aarch64_enc_mov_byte_map_base(iRegP dst, immByteMapBase src) %{
     MacroAssembler _masm(&cbuf);
-    address page = (address)$src$$constant;
-    Register dst_reg = as_Register($dst$$reg);
-    unsigned long off;
-    __ adrp(dst_reg, ExternalAddress(page), off);
-    assert(off == 0, "assumed offset == 0");
+    __ load_byte_map_base($dst$$Register);
   %}
 
   enc_class aarch64_enc_mov_n(iRegN dst, immN src) %{
@@ -6673,6 +6669,14 @@
 
 //----------PIPELINE-----------------------------------------------------------
 // Rules which define the behavior of the target architectures pipeline.
+
+// For specific pipelines, eg A53, define the stages of that pipeline
+//pipe_desc(ISS, EX1, EX2, WR);
+#define ISS S0
+#define EX1 S1
+#define EX2 S2
+#define WR  S3
+
 // Integer ALU reg operation
 pipeline %{
 
@@ -6707,12 +6711,499 @@
 //----------PIPELINE DESCRIPTION-----------------------------------------------
 // Pipeline Description specifies the stages in the machine's pipeline
 
-pipe_desc(ISS, EX1, EX2, WR);
+// Define the pipeline as a generic 6 stage pipeline
+pipe_desc(S0, S1, S2, S3, S4, S5);
 
 //----------PIPELINE CLASSES---------------------------------------------------
 // Pipeline Classes describe the stages in which input and output are
 // referenced by the hardware pipeline.
 
+pipe_class fp_dop_reg_reg_s(vRegF dst, vRegF src1, vRegF src2)
+%{
+  single_instruction;
+  src1   : S1(read);
+  src2   : S2(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_dop_reg_reg_d(vRegD dst, vRegD src1, vRegD src2)
+%{
+  single_instruction;
+  src1   : S1(read);
+  src2   : S2(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_uop_s(vRegF dst, vRegF src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_uop_d(vRegD dst, vRegD src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_d2f(vRegF dst, vRegD src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_f2d(vRegD dst, vRegF src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_f2i(iRegINoSp dst, vRegF src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_f2l(iRegLNoSp dst, vRegF src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_i2f(vRegF dst, iRegIorL2I src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_l2f(vRegF dst, iRegL src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_d2i(iRegINoSp dst, vRegD src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_d2l(iRegLNoSp dst, vRegD src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_i2d(vRegD dst, iRegIorL2I src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_l2d(vRegD dst, iRegIorL2I src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_div_s(vRegF dst, vRegF src1, vRegF src2)
+%{
+  single_instruction;
+  src1   : S1(read);
+  src2   : S2(read);
+  dst    : S5(write);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_div_d(vRegD dst, vRegD src1, vRegD src2)
+%{
+  single_instruction;
+  src1   : S1(read);
+  src2   : S2(read);
+  dst    : S5(write);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_cond_reg_reg_s(vRegF dst, vRegF src1, vRegF src2, rFlagsReg cr)
+%{
+  single_instruction;
+  cr     : S1(read);
+  src1   : S1(read);
+  src2   : S1(read);
+  dst    : S3(write);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class fp_cond_reg_reg_d(vRegD dst, vRegD src1, vRegD src2, rFlagsReg cr)
+%{
+  single_instruction;
+  cr     : S1(read);
+  src1   : S1(read);
+  src2   : S1(read);
+  dst    : S3(write);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class fp_imm_s(vRegF dst)
+%{
+  single_instruction;
+  dst    : S3(write);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class fp_imm_d(vRegD dst)
+%{
+  single_instruction;
+  dst    : S3(write);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class fp_load_constant_s(vRegF dst)
+%{
+  single_instruction;
+  dst    : S4(write);
+  INS01  : ISS;
+  NEON_FP : S4;
+%}
+
+pipe_class fp_load_constant_d(vRegD dst)
+%{
+  single_instruction;
+  dst    : S4(write);
+  INS01  : ISS;
+  NEON_FP : S4;
+%}
+
+pipe_class vmul64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vmul128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vmla64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  dst    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vmla128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  dst    : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vdop64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S4(write);
+  src1   : S2(read);
+  src2   : S2(read);
+  INS01  : ISS;
+  NEON_FP : S4;
+%}
+
+pipe_class vdop128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S4(write);
+  src1   : S2(read);
+  src2   : S2(read);
+  INS0   : ISS;
+  NEON_FP : S4;
+%}
+
+pipe_class vlogical64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src1   : S2(read);
+  src2   : S2(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vlogical128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src1   : S2(read);
+  src2   : S2(read);
+  INS0   : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vshift64(vecD dst, vecD src, vecX shift)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  shift  : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vshift128(vecX dst, vecX src, vecX shift)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  shift  : S1(read);
+  INS0   : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vshift64_imm(vecD dst, vecD src, immI shift)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vshift128_imm(vecX dst, vecX src, immI shift)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS0   : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vdop_fp64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vdop_fp128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vmuldiv_fp64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vmuldiv_fp128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vsqrt_fp128(vecX dst, vecX src)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src    : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vunop_fp64(vecD dst, vecD src)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vunop_fp128(vecX dst, vecX src)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src    : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vdup_reg_reg64(vecD dst, iRegI src)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vdup_reg_reg128(vecX dst, iRegI src)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vdup_reg_freg64(vecD dst, vRegF src)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vdup_reg_freg128(vecX dst, vRegF src)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vdup_reg_dreg128(vecX dst, vRegD src)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vmovi_reg_imm64(vecD dst)
+%{
+  single_instruction;
+  dst    : S3(write);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vmovi_reg_imm128(vecX dst)
+%{
+  single_instruction;
+  dst    : S3(write);
+  INS0   : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vload_reg_mem64(vecD dst, vmem mem)
+%{
+  single_instruction;
+  dst    : S5(write);
+  mem    : ISS(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vload_reg_mem128(vecX dst, vmem mem)
+%{
+  single_instruction;
+  dst    : S5(write);
+  mem    : ISS(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vstore_reg_mem64(vecD src, vmem mem)
+%{
+  single_instruction;
+  mem    : ISS(read);
+  src    : S2(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vstore_reg_mem128(vecD src, vmem mem)
+%{
+  single_instruction;
+  mem    : ISS(read);
+  src    : S2(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
 //------- Integer ALU operations --------------------------
 
 // Integer ALU reg-reg operation
@@ -7559,7 +8050,7 @@
     __ fmovs(as_FloatRegister($dst$$reg), (double)$con$$constant);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_imm_s);
 %}
 
 // Load Float Constant
@@ -7577,7 +8068,7 @@
     __ ldrs(as_FloatRegister($dst$$reg), $constantaddress($con));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_load_constant_s);
 %}
 
 // Load Packed Double Constant
@@ -7590,7 +8081,7 @@
     __ fmovd(as_FloatRegister($dst$$reg), $con$$constant);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_imm_d);
 %}
 
 // Load Double Constant
@@ -7607,7 +8098,7 @@
     __ ldrd(as_FloatRegister($dst$$reg), $constantaddress($con));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_load_constant_d);
 %}
 
 // Store Instructions
@@ -9615,7 +10106,7 @@
               cond);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_cond_reg_reg_s);
 %}
 
 instruct cmovUF_reg(cmpOpU cmp, rFlagsRegU cr, vRegF dst, vRegF src1,  vRegF src2)
@@ -9633,7 +10124,7 @@
               cond);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_cond_reg_reg_s);
 %}
 
 instruct cmovD_reg(cmpOp cmp, rFlagsReg cr, vRegD dst, vRegD src1,  vRegD src2)
@@ -9651,7 +10142,7 @@
               cond);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_cond_reg_reg_d);
 %}
 
 instruct cmovUD_reg(cmpOpU cmp, rFlagsRegU cr, vRegD dst, vRegD src1,  vRegD src2)
@@ -9669,7 +10160,7 @@
               cond);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_cond_reg_reg_d);
 %}
 
 // ============================================================================
@@ -12033,7 +12524,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_s);
 %}
 
 instruct addD_reg_reg(vRegD dst, vRegD src1, vRegD src2) %{
@@ -12048,7 +12539,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_d);
 %}
 
 instruct subF_reg_reg(vRegF dst, vRegF src1, vRegF src2) %{
@@ -12063,7 +12554,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_s);
 %}
 
 instruct subD_reg_reg(vRegD dst, vRegD src1, vRegD src2) %{
@@ -12078,7 +12569,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_d);
 %}
 
 instruct mulF_reg_reg(vRegF dst, vRegF src1, vRegF src2) %{
@@ -12093,7 +12584,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_s);
 %}
 
 instruct mulD_reg_reg(vRegD dst, vRegD src1, vRegD src2) %{
@@ -12108,7 +12599,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_d);
 %}
 
 // We cannot use these fused mul w add/sub ops because they don't
@@ -12256,7 +12747,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_div_s);
 %}
 
 instruct divD_reg_reg(vRegD dst, vRegD src1, vRegD src2) %{
@@ -12271,7 +12762,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_div_d);
 %}
 
 instruct negF_reg_reg(vRegF dst, vRegF src) %{
@@ -12285,7 +12776,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_uop_s);
 %}
 
 instruct negD_reg_reg(vRegD dst, vRegD src) %{
@@ -12299,7 +12790,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_uop_d);
 %}
 
 instruct absF_reg(vRegF dst, vRegF src) %{
@@ -12312,7 +12803,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_uop_s);
 %}
 
 instruct absD_reg(vRegD dst, vRegD src) %{
@@ -12325,7 +12816,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_uop_d);
 %}
 
 instruct sqrtD_reg(vRegD dst, vRegD src) %{
@@ -12338,7 +12829,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_div_s);
 %}
 
 instruct sqrtF_reg(vRegF dst, vRegF src) %{
@@ -12351,7 +12842,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_div_d);
 %}
 
 // ============================================================================
@@ -12638,7 +13129,7 @@
     __ fcvtd(as_FloatRegister($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_d2f);
 %}
 
 instruct convF2D_reg(vRegD dst, vRegF src) %{
@@ -12651,7 +13142,7 @@
     __ fcvts(as_FloatRegister($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_f2d);
 %}
 
 instruct convF2I_reg_reg(iRegINoSp dst, vRegF src) %{
@@ -12664,7 +13155,7 @@
     __ fcvtzsw(as_Register($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_f2i);
 %}
 
 instruct convF2L_reg_reg(iRegLNoSp dst, vRegF src) %{
@@ -12677,7 +13168,7 @@
     __ fcvtzs(as_Register($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_f2l);
 %}
 
 instruct convI2F_reg_reg(vRegF dst, iRegIorL2I src) %{
@@ -12690,7 +13181,7 @@
     __ scvtfws(as_FloatRegister($dst$$reg), as_Register($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_i2f);
 %}
 
 instruct convL2F_reg_reg(vRegF dst, iRegL src) %{
@@ -12703,7 +13194,7 @@
     __ scvtfs(as_FloatRegister($dst$$reg), as_Register($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_l2f);
 %}
 
 instruct convD2I_reg_reg(iRegINoSp dst, vRegD src) %{
@@ -12716,7 +13207,7 @@
     __ fcvtzdw(as_Register($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_d2i);
 %}
 
 instruct convD2L_reg_reg(iRegLNoSp dst, vRegD src) %{
@@ -12729,7 +13220,7 @@
     __ fcvtzd(as_Register($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_d2l);
 %}
 
 instruct convI2D_reg_reg(vRegD dst, iRegIorL2I src) %{
@@ -12742,7 +13233,7 @@
     __ scvtfwd(as_FloatRegister($dst$$reg), as_Register($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_i2d);
 %}
 
 instruct convL2D_reg_reg(vRegD dst, iRegL src) %{
@@ -12755,7 +13246,7 @@
     __ scvtfd(as_FloatRegister($dst$$reg), as_Register($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_l2d);
 %}
 
 // stack <-> reg and reg <-> reg shuffles with no conversion
@@ -14500,7 +14991,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "ldrs   $dst,$mem\t# vector (32 bits)" %}
   ins_encode( aarch64_enc_ldrvS(dst, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vload_reg_mem64);
 %}
 
 // Load vector (64 bits)
@@ -14511,7 +15002,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "ldrd   $dst,$mem\t# vector (64 bits)" %}
   ins_encode( aarch64_enc_ldrvD(dst, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vload_reg_mem64);
 %}
 
 // Load Vector (128 bits)
@@ -14522,7 +15013,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "ldrq   $dst,$mem\t# vector (128 bits)" %}
   ins_encode( aarch64_enc_ldrvQ(dst, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vload_reg_mem128);
 %}
 
 // Store Vector (32 bits)
@@ -14533,7 +15024,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "strs   $mem,$src\t# vector (32 bits)" %}
   ins_encode( aarch64_enc_strvS(src, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vstore_reg_mem64);
 %}
 
 // Store Vector (64 bits)
@@ -14544,7 +15035,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "strd   $mem,$src\t# vector (64 bits)" %}
   ins_encode( aarch64_enc_strvD(src, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vstore_reg_mem64);
 %}
 
 // Store Vector (128 bits)
@@ -14555,7 +15046,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "strq   $mem,$src\t# vector (128 bits)" %}
   ins_encode( aarch64_enc_strvQ(src, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vstore_reg_mem128);
 %}
 
 instruct replicate8B(vecD dst, iRegIorL2I src)
@@ -14568,7 +15059,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T8B, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg64);
 %}
 
 instruct replicate16B(vecX dst, iRegIorL2I src)
@@ -14580,7 +15071,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T16B, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 instruct replicate8B_imm(vecD dst, immI con)
@@ -14593,7 +15084,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T8B, $con$$constant & 0xff);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm64);
 %}
 
 instruct replicate16B_imm(vecX dst, immI con)
@@ -14605,7 +15096,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T16B, $con$$constant & 0xff);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm128);
 %}
 
 instruct replicate4S(vecD dst, iRegIorL2I src)
@@ -14618,7 +15109,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T4H, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg64);
 %}
 
 instruct replicate8S(vecX dst, iRegIorL2I src)
@@ -14630,7 +15121,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T8H, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 instruct replicate4S_imm(vecD dst, immI con)
@@ -14643,7 +15134,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T4H, $con$$constant & 0xffff);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm64);
 %}
 
 instruct replicate8S_imm(vecX dst, immI con)
@@ -14655,7 +15146,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T8H, $con$$constant & 0xffff);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm128);
 %}
 
 instruct replicate2I(vecD dst, iRegIorL2I src)
@@ -14667,7 +15158,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T2S, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg64);
 %}
 
 instruct replicate4I(vecX dst, iRegIorL2I src)
@@ -14679,7 +15170,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T4S, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 instruct replicate2I_imm(vecD dst, immI con)
@@ -14691,7 +15182,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T2S, $con$$constant);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm64);
 %}
 
 instruct replicate4I_imm(vecX dst, immI con)
@@ -14703,7 +15194,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T4S, $con$$constant);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm128);
 %}
 
 instruct replicate2L(vecX dst, iRegL src)
@@ -14715,7 +15206,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T2D, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 instruct replicate2L_zero(vecX dst, immI0 zero)
@@ -14729,7 +15220,7 @@
            as_FloatRegister($dst$$reg),
            as_FloatRegister($dst$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm128);
 %}
 
 instruct replicate2F(vecD dst, vRegF src)
@@ -14742,7 +15233,7 @@
     __ dup(as_FloatRegister($dst$$reg), __ T2S,
            as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_freg64);
 %}
 
 instruct replicate4F(vecX dst, vRegF src)
@@ -14755,7 +15246,7 @@
     __ dup(as_FloatRegister($dst$$reg), __ T4S,
            as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_freg128);
 %}
 
 instruct replicate2D(vecX dst, vRegD src)
@@ -14768,7 +15259,7 @@
     __ dup(as_FloatRegister($dst$$reg), __ T2D,
            as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_dreg128);
 %}
 
 // ====================REDUCTION ARITHMETIC====================================
@@ -15014,7 +15505,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vadd16B(vecX dst, vecX src1, vecX src2)
@@ -15028,7 +15519,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vadd4S(vecD dst, vecD src1, vecD src2)
@@ -15043,7 +15534,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vadd8S(vecX dst, vecX src1, vecX src2)
@@ -15057,7 +15548,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vadd2I(vecD dst, vecD src1, vecD src2)
@@ -15071,7 +15562,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vadd4I(vecX dst, vecX src1, vecX src2)
@@ -15085,7 +15576,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vadd2L(vecX dst, vecX src1, vecX src2)
@@ -15099,7 +15590,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vadd2F(vecD dst, vecD src1, vecD src2)
@@ -15113,7 +15604,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp64);
 %}
 
 instruct vadd4F(vecX dst, vecX src1, vecX src2)
@@ -15127,7 +15618,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp128);
 %}
 
 instruct vadd2D(vecX dst, vecX src1, vecX src2)
@@ -15140,7 +15631,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp128);
 %}
 
 // --------------------------------- SUB --------------------------------------
@@ -15157,7 +15648,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vsub16B(vecX dst, vecX src1, vecX src2)
@@ -15171,7 +15662,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vsub4S(vecD dst, vecD src1, vecD src2)
@@ -15186,7 +15677,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vsub8S(vecX dst, vecX src1, vecX src2)
@@ -15200,7 +15691,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vsub2I(vecD dst, vecD src1, vecD src2)
@@ -15214,7 +15705,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vsub4I(vecX dst, vecX src1, vecX src2)
@@ -15228,7 +15719,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vsub2L(vecX dst, vecX src1, vecX src2)
@@ -15242,7 +15733,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vsub2F(vecD dst, vecD src1, vecD src2)
@@ -15256,7 +15747,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp64);
 %}
 
 instruct vsub4F(vecX dst, vecX src1, vecX src2)
@@ -15270,7 +15761,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp128);
 %}
 
 instruct vsub2D(vecX dst, vecX src1, vecX src2)
@@ -15284,7 +15775,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp128);
 %}
 
 // --------------------------------- MUL --------------------------------------
@@ -15301,7 +15792,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmul64);
 %}
 
 instruct vmul8S(vecX dst, vecX src1, vecX src2)
@@ -15315,7 +15806,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmul128);
 %}
 
 instruct vmul2I(vecD dst, vecD src1, vecD src2)
@@ -15329,7 +15820,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmul64);
 %}
 
 instruct vmul4I(vecX dst, vecX src1, vecX src2)
@@ -15343,7 +15834,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmul128);
 %}
 
 instruct vmul2F(vecD dst, vecD src1, vecD src2)
@@ -15357,7 +15848,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp64);
 %}
 
 instruct vmul4F(vecX dst, vecX src1, vecX src2)
@@ -15371,7 +15862,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp128);
 %}
 
 instruct vmul2D(vecX dst, vecX src1, vecX src2)
@@ -15385,7 +15876,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp128);
 %}
 
 // --------------------------------- MLA --------------------------------------
@@ -15402,7 +15893,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla64);
 %}
 
 instruct vmla8S(vecX dst, vecX src1, vecX src2)
@@ -15416,7 +15907,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla128);
 %}
 
 instruct vmla2I(vecD dst, vecD src1, vecD src2)
@@ -15430,7 +15921,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla64);
 %}
 
 instruct vmla4I(vecX dst, vecX src1, vecX src2)
@@ -15444,7 +15935,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla128);
 %}
 
 // --------------------------------- MLS --------------------------------------
@@ -15461,7 +15952,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla64);
 %}
 
 instruct vmls8S(vecX dst, vecX src1, vecX src2)
@@ -15475,7 +15966,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla128);
 %}
 
 instruct vmls2I(vecD dst, vecD src1, vecD src2)
@@ -15489,7 +15980,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla64);
 %}
 
 instruct vmls4I(vecX dst, vecX src1, vecX src2)
@@ -15503,7 +15994,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla128);
 %}
 
 // --------------------------------- DIV --------------------------------------
@@ -15519,7 +16010,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp64);
 %}
 
 instruct vdiv4F(vecX dst, vecX src1, vecX src2)
@@ -15533,7 +16024,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp128);
 %}
 
 instruct vdiv2D(vecX dst, vecX src1, vecX src2)
@@ -15547,7 +16038,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp128);
 %}
 
 // --------------------------------- SQRT -------------------------------------
@@ -15561,7 +16052,7 @@
     __ fsqrt(as_FloatRegister($dst$$reg), __ T2D,
              as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vsqrt_fp128);
 %}
 
 // --------------------------------- ABS --------------------------------------
@@ -15576,7 +16067,7 @@
     __ fabs(as_FloatRegister($dst$$reg), __ T2S,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp64);
 %}
 
 instruct vabs4F(vecX dst, vecX src)
@@ -15589,7 +16080,7 @@
     __ fabs(as_FloatRegister($dst$$reg), __ T4S,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp128);
 %}
 
 instruct vabs2D(vecX dst, vecX src)
@@ -15602,7 +16093,7 @@
     __ fabs(as_FloatRegister($dst$$reg), __ T2D,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp128);
 %}
 
 // --------------------------------- NEG --------------------------------------
@@ -15617,7 +16108,7 @@
     __ fneg(as_FloatRegister($dst$$reg), __ T2S,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp64);
 %}
 
 instruct vneg4F(vecX dst, vecX src)
@@ -15630,7 +16121,7 @@
     __ fneg(as_FloatRegister($dst$$reg), __ T4S,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp128);
 %}
 
 instruct vneg2D(vecX dst, vecX src)
@@ -15643,7 +16134,7 @@
     __ fneg(as_FloatRegister($dst$$reg), __ T2D,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp128);
 %}
 
 // --------------------------------- AND --------------------------------------
@@ -15660,7 +16151,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical64);
 %}
 
 instruct vand16B(vecX dst, vecX src1, vecX src2)
@@ -15674,7 +16165,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical128);
 %}
 
 // --------------------------------- OR ---------------------------------------
@@ -15691,7 +16182,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical64);
 %}
 
 instruct vor16B(vecX dst, vecX src1, vecX src2)
@@ -15705,7 +16196,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical128);
 %}
 
 // --------------------------------- XOR --------------------------------------
@@ -15722,7 +16213,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical64);
 %}
 
 instruct vxor16B(vecX dst, vecX src1, vecX src2)
@@ -15736,7 +16227,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical128);
 %}
 
 // ------------------------------ Shift ---------------------------------------
@@ -15747,7 +16238,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T16B, as_Register($cnt$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 // Right shifts on aarch64 SIMD are implemented as left shift by -ve amount
@@ -15758,7 +16249,7 @@
     __ dup(as_FloatRegister($dst$$reg), __ T16B, as_Register($cnt$$reg));
     __ negr(as_FloatRegister($dst$$reg), __ T16B, as_FloatRegister($dst$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 instruct vsll8B(vecD dst, vecD src, vecX shift) %{
@@ -15773,7 +16264,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64);
 %}
 
 instruct vsll16B(vecX dst, vecX src, vecX shift) %{
@@ -15787,7 +16278,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsrl8B(vecD dst, vecD src, vecX shift) %{
@@ -15801,7 +16292,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64);
 %}
 
 instruct vsrl16B(vecX dst, vecX src, vecX shift) %{
@@ -15814,7 +16305,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsll8B_imm(vecD dst, vecD src, immI shift) %{
@@ -15834,7 +16325,7 @@
              as_FloatRegister($src$$reg), sh);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsll16B_imm(vecX dst, vecX src, immI shift) %{
@@ -15853,7 +16344,7 @@
              as_FloatRegister($src$$reg), sh);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsra8B_imm(vecD dst, vecD src, immI shift) %{
@@ -15869,7 +16360,7 @@
     __ sshr(as_FloatRegister($dst$$reg), __ T8B,
            as_FloatRegister($src$$reg), sh);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsra16B_imm(vecX dst, vecX src, immI shift) %{
@@ -15884,7 +16375,7 @@
     __ sshr(as_FloatRegister($dst$$reg), __ T16B,
            as_FloatRegister($src$$reg), sh);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsrl8B_imm(vecD dst, vecD src, immI shift) %{
@@ -15904,7 +16395,7 @@
              as_FloatRegister($src$$reg), -sh & 7);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsrl16B_imm(vecX dst, vecX src, immI shift) %{
@@ -15923,7 +16414,7 @@
              as_FloatRegister($src$$reg), -sh & 7);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsll4S(vecD dst, vecD src, vecX shift) %{
@@ -15938,7 +16429,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64);
 %}
 
 instruct vsll8S(vecX dst, vecX src, vecX shift) %{
@@ -15952,7 +16443,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsrl4S(vecD dst, vecD src, vecX shift) %{
@@ -15966,7 +16457,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64);
 %}
 
 instruct vsrl8S(vecX dst, vecX src, vecX shift) %{
@@ -15979,7 +16470,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsll4S_imm(vecD dst, vecD src, immI shift) %{
@@ -15999,7 +16490,7 @@
              as_FloatRegister($src$$reg), sh);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsll8S_imm(vecX dst, vecX src, immI shift) %{
@@ -16018,7 +16509,7 @@
              as_FloatRegister($src$$reg), sh);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsra4S_imm(vecD dst, vecD src, immI shift) %{
@@ -16034,7 +16525,7 @@
     __ sshr(as_FloatRegister($dst$$reg), __ T4H,
            as_FloatRegister($src$$reg), sh);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsra8S_imm(vecX dst, vecX src, immI shift) %{
@@ -16049,7 +16540,7 @@
     __ sshr(as_FloatRegister($dst$$reg), __ T8H,
            as_FloatRegister($src$$reg), sh);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsrl4S_imm(vecD dst, vecD src, immI shift) %{
@@ -16069,7 +16560,7 @@
              as_FloatRegister($src$$reg), -sh & 15);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsrl8S_imm(vecX dst, vecX src, immI shift) %{
@@ -16088,7 +16579,7 @@
              as_FloatRegister($src$$reg), -sh & 15);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsll2I(vecD dst, vecD src, vecX shift) %{
@@ -16102,7 +16593,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsll4I(vecX dst, vecX src, vecX shift) %{
@@ -16116,7 +16607,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsrl2I(vecD dst, vecD src, vecX shift) %{
@@ -16129,7 +16620,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsrl4I(vecX dst, vecX src, vecX shift) %{
@@ -16142,7 +16633,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsll2I_imm(vecD dst, vecD src, immI shift) %{
@@ -16155,7 +16646,7 @@
            as_FloatRegister($src$$reg),
            (int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsll4I_imm(vecX dst, vecX src, immI shift) %{
@@ -16168,7 +16659,7 @@
            as_FloatRegister($src$$reg),
            (int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsra2I_imm(vecD dst, vecD src, immI shift) %{
@@ -16181,7 +16672,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsra4I_imm(vecX dst, vecX src, immI shift) %{
@@ -16194,7 +16685,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsrl2I_imm(vecD dst, vecD src, immI shift) %{
@@ -16207,7 +16698,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsrl4I_imm(vecX dst, vecX src, immI shift) %{
@@ -16220,7 +16711,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsll2L(vecX dst, vecX src, vecX shift) %{
@@ -16234,7 +16725,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsrl2L(vecX dst, vecX src, vecX shift) %{
@@ -16247,7 +16738,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsll2L_imm(vecX dst, vecX src, immI shift) %{
@@ -16260,7 +16751,7 @@
            as_FloatRegister($src$$reg),
            (int)$shift$$constant & 63);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsra2L_imm(vecX dst, vecX src, immI shift) %{
@@ -16273,7 +16764,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 63);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsrl2L_imm(vecX dst, vecX src, immI shift) %{
@@ -16286,7 +16777,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 63);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 //----------PEEPHOLE RULES-----------------------------------------------------
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/hotspot/src/cpu/aarch64/vm/abstractInterpreter_aarch64.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -0,0 +1,180 @@
+/*
+ * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+#include "precompiled.hpp"
+#include "interpreter/interpreter.hpp"
+#include "oops/constMethod.hpp"
+#include "oops/method.hpp"
+#include "runtime/frame.inline.hpp"
+#include "utilities/debug.hpp"
+#include "utilities/macros.hpp"
+
+
+int AbstractInterpreter::BasicType_as_index(BasicType type) {
+  int i = 0;
+  switch (type) {
+    case T_BOOLEAN: i = 0; break;
+    case T_CHAR   : i = 1; break;
+    case T_BYTE   : i = 2; break;
+    case T_SHORT  : i = 3; break;
+    case T_INT    : i = 4; break;
+    case T_LONG   : i = 5; break;
+    case T_VOID   : i = 6; break;
+    case T_FLOAT  : i = 7; break;
+    case T_DOUBLE : i = 8; break;
+    case T_OBJECT : i = 9; break;
+    case T_ARRAY  : i = 9; break;
+    default       : ShouldNotReachHere();
+  }
+  assert(0 <= i && i < AbstractInterpreter::number_of_result_handlers,
+         "index out of bounds");
+  return i;
+}
+
+// These should never be compiled since the interpreter will prefer
+// the compiled version to the intrinsic version.
+bool AbstractInterpreter::can_be_compiled(methodHandle m) {
+  switch (method_kind(m)) {
+    case Interpreter::java_lang_math_sin     : // fall thru
+    case Interpreter::java_lang_math_cos     : // fall thru
+    case Interpreter::java_lang_math_tan     : // fall thru
+    case Interpreter::java_lang_math_abs     : // fall thru
+    case Interpreter::java_lang_math_log     : // fall thru
+    case Interpreter::java_lang_math_log10   : // fall thru
+    case Interpreter::java_lang_math_sqrt    : // fall thru
+    case Interpreter::java_lang_math_pow     : // fall thru
+    case Interpreter::java_lang_math_exp     :
+      return false;
+    default:
+      return true;
+  }
+}
+
+// How much stack a method activation needs in words.
+int AbstractInterpreter::size_top_interpreter_activation(Method* method) {
+  const int entry_size = frame::interpreter_frame_monitor_size();
+
+  // total overhead size: entry_size + (saved rfp thru expr stack
+  // bottom).  be sure to change this if you add/subtract anything
+  // to/from the overhead area
+  const int overhead_size =
+    -(frame::interpreter_frame_initial_sp_offset) + entry_size;
+
+  const int stub_code = frame::entry_frame_after_call_words;
+  const int method_stack = (method->max_locals() + method->max_stack()) *
+                           Interpreter::stackElementWords;
+  return (overhead_size + method_stack + stub_code);
+}
+
+// asm based interpreter deoptimization helpers
+int AbstractInterpreter::size_activation(int max_stack,
+                                         int temps,
+                                         int extra_args,
+                                         int monitors,
+                                         int callee_params,
+                                         int callee_locals,
+                                         bool is_top_frame) {
+  // Note: This calculation must exactly parallel the frame setup
+  // in TemplateInterpreterGenerator::generate_method_entry.
+
+  // fixed size of an interpreter frame:
+  int overhead = frame::sender_sp_offset -
+                 frame::interpreter_frame_initial_sp_offset;
+  // Our locals were accounted for by the caller (or last_frame_adjust
+  // on the transistion) Since the callee parameters already account
+  // for the callee's params we only need to account for the extra
+  // locals.
+  int size = overhead +
+         (callee_locals - callee_params)*Interpreter::stackElementWords +
+         monitors * frame::interpreter_frame_monitor_size() +
+         temps* Interpreter::stackElementWords + extra_args;
+
+  // On AArch64 we always keep the stack pointer 16-aligned, so we
+  // must round up here.
+  size = round_to(size, 2);
+
+  return size;
+}
+
+void AbstractInterpreter::layout_activation(Method* method,
+                                            int tempcount,
+                                            int popframe_extra_args,
+                                            int moncount,
+                                            int caller_actual_parameters,
+                                            int callee_param_count,
+                                            int callee_locals,
+                                            frame* caller,
+                                            frame* interpreter_frame,
+                                            bool is_top_frame,
+                                            bool is_bottom_frame) {
+  // The frame interpreter_frame is guaranteed to be the right size,
+  // as determined by a previous call to the size_activation() method.
+  // It is also guaranteed to be walkable even though it is in a
+  // skeletal state
+
+  int max_locals = method->max_locals() * Interpreter::stackElementWords;
+  int extra_locals = (method->max_locals() - method->size_of_parameters()) *
+    Interpreter::stackElementWords;
+
+#ifdef ASSERT
+  assert(caller->sp() == interpreter_frame->sender_sp(), "Frame not properly walkable");
+#endif
+
+  interpreter_frame->interpreter_frame_set_method(method);
+  // NOTE the difference in using sender_sp and
+  // interpreter_frame_sender_sp interpreter_frame_sender_sp is
+  // the original sp of the caller (the unextended_sp) and
+  // sender_sp is fp+8/16 (32bit/64bit) XXX
+  intptr_t* locals = interpreter_frame->sender_sp() + max_locals - 1;
+
+#ifdef ASSERT
+  if (caller->is_interpreted_frame()) {
+    assert(locals < caller->fp() + frame::interpreter_frame_initial_sp_offset, "bad placement");
+  }
+#endif
+
+  interpreter_frame->interpreter_frame_set_locals(locals);
+  BasicObjectLock* montop = interpreter_frame->interpreter_frame_monitor_begin();
+  BasicObjectLock* monbot = montop - moncount;
+  interpreter_frame->interpreter_frame_set_monitor_end(monbot);
+
+  // Set last_sp
+  intptr_t*  esp = (intptr_t*) monbot -
+    tempcount*Interpreter::stackElementWords -
+    popframe_extra_args;
+  interpreter_frame->interpreter_frame_set_last_sp(esp);
+
+  // All frames but the initial (oldest) interpreter frame we fill in have
+  // a value for sender_sp that allows walking the stack but isn't
+  // truly correct. Correct the value here.
+  if (extra_locals != 0 &&
+      interpreter_frame->sender_sp() ==
+      interpreter_frame->interpreter_frame_sender_sp()) {
+    interpreter_frame->set_interpreter_frame_sender_sp(caller->sp() +
+                                                       extra_locals);
+  }
+  *interpreter_frame->interpreter_frame_cache_addr() =
+    method->constants()->cache();
+}
--- a/hotspot/src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -256,6 +256,7 @@
 
 void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
   __ bind(_entry);
+  ce->store_parameter(_trap_request, 0);
   __ far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::deoptimize_id)));
   ce->add_call_info_here(_info);
   DEBUG_ONLY(__ should_not_reach_here());
--- a/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -3169,7 +3169,8 @@
       Register obj = as_reg(data);
       Register dst = as_reg(dest);
       if (is_oop && UseCompressedOops) {
-        __ encode_heap_oop(obj);
+        __ encode_heap_oop(rscratch1, obj);
+        obj = rscratch1;
       }
       assert_different_registers(obj, addr.base(), tmp, rscratch2, dst);
       Label again;
--- a/hotspot/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1066,7 +1066,9 @@
       {
         StubFrame f(sasm, "deoptimize", dont_gc_arguments);
         OopMap* oop_map = save_live_registers(sasm);
-        int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize));
+        f.load_argument(0, c_rarg1);
+        int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), c_rarg1);
+
         oop_maps = new OopMapSet();
         oop_maps->add_gc_map(call_offset, oop_map);
         restore_live_registers(sasm);
@@ -1148,9 +1150,6 @@
 
 #if INCLUDE_ALL_GCS
 
-// Registers to be saved around calls to g1_wb_pre or g1_wb_post
-#define G1_SAVE_REGS (RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2))
-
     case g1_pre_barrier_slow_id:
       {
         StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments);
@@ -1192,10 +1191,10 @@
         __ b(done);
 
         __ bind(runtime);
-        __ push(G1_SAVE_REGS, sp);
+        __ push_call_clobbered_registers();
         f.load_argument(0, pre_val);
         __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread);
-        __ pop(G1_SAVE_REGS, sp);
+        __ pop_call_clobbered_registers();
         __ bind(done);
       }
       break;
@@ -1223,45 +1222,49 @@
         Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() +
                                         DirtyCardQueue::byte_offset_of_buf()));
 
-        const Register card_addr = rscratch2;
-        ExternalAddress cardtable((address) ct->byte_map_base);
+        const Register card_offset = rscratch2;
+        // LR is free here, so we can use it to hold the byte_map_base.
+        const Register byte_map_base = lr;
 
-        f.load_argument(0, card_addr);
-        __ lsr(card_addr, card_addr, CardTableModRefBS::card_shift);
-        unsigned long offset;
-        __ adrp(rscratch1, cardtable, offset);
-        __ add(card_addr, card_addr, rscratch1);
-        __ ldrb(rscratch1, Address(card_addr, offset));
+        assert_different_registers(card_offset, byte_map_base, rscratch1);
+
+        f.load_argument(0, card_offset);
+        __ lsr(card_offset, card_offset, CardTableModRefBS::card_shift);
+        __ load_byte_map_base(byte_map_base);
+        __ ldrb(rscratch1, Address(byte_map_base, card_offset));
         __ cmpw(rscratch1, (int)G1SATBCardTableModRefBS::g1_young_card_val());
         __ br(Assembler::EQ, done);
 
         assert((int)CardTableModRefBS::dirty_card_val() == 0, "must be 0");
 
         __ membar(Assembler::StoreLoad);
-        __ ldrb(rscratch1, Address(card_addr, offset));
+        __ ldrb(rscratch1, Address(byte_map_base, card_offset));
         __ cbzw(rscratch1, done);
 
         // storing region crossing non-NULL, card is clean.
         // dirty card and log.
-        __ strb(zr, Address(card_addr, offset));
+        __ strb(zr, Address(byte_map_base, card_offset));
+
+        // Convert card offset into an address in card_addr
+        Register card_addr = card_offset;
+        __ add(card_addr, byte_map_base, card_addr);
 
         __ ldr(rscratch1, queue_index);
         __ cbz(rscratch1, runtime);
         __ sub(rscratch1, rscratch1, wordSize);
         __ str(rscratch1, queue_index);
 
-        const Register buffer_addr = r0;
+        // Reuse LR to hold buffer_addr
+        const Register buffer_addr = lr;
 
-        __ push(RegSet::of(r0, r1), sp);
         __ ldr(buffer_addr, buffer);
         __ str(card_addr, Address(buffer_addr, rscratch1));
-        __ pop(RegSet::of(r0, r1), sp);
         __ b(done);
 
         __ bind(runtime);
-        __ push(G1_SAVE_REGS, sp);
+        __ push_call_clobbered_registers();
         __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread);
-        __ pop(G1_SAVE_REGS, sp);
+        __ pop_call_clobbered_registers();
         __ bind(done);
 
       }
--- a/hotspot/src/cpu/aarch64/vm/interpreter_aarch64.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,261 +0,0 @@
-/*
- * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2014, Red Hat Inc. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- *
- */
-
-#include "precompiled.hpp"
-#include "asm/macroAssembler.hpp"
-#include "interpreter/bytecodeHistogram.hpp"
-#include "interpreter/interpreter.hpp"
-#include "interpreter/interpreterRuntime.hpp"
-#include "interpreter/interp_masm.hpp"
-#include "interpreter/templateInterpreterGenerator.hpp"
-#include "interpreter/templateTable.hpp"
-#include "oops/arrayOop.hpp"
-#include "oops/methodData.hpp"
-#include "oops/method.hpp"
-#include "oops/oop.inline.hpp"
-#include "prims/jvmtiExport.hpp"
-#include "prims/jvmtiThreadState.hpp"
-#include "prims/methodHandles.hpp"
-#include "runtime/arguments.hpp"
-#include "runtime/frame.inline.hpp"
-#include "runtime/sharedRuntime.hpp"
-#include "runtime/stubRoutines.hpp"
-#include "runtime/synchronizer.hpp"
-#include "runtime/timer.hpp"
-#include "runtime/vframeArray.hpp"
-#include "utilities/debug.hpp"
-#ifdef COMPILER1
-#include "c1/c1_Runtime1.hpp"
-#endif
-
-#define __ _masm->
-
-
-address AbstractInterpreterGenerator::generate_slow_signature_handler() {
-  address entry = __ pc();
-
-  __ andr(esp, esp, -16);
-  __ mov(c_rarg3, esp);
-  // rmethod
-  // rlocals
-  // c_rarg3: first stack arg - wordSize
-
-  // adjust sp
-  __ sub(sp, c_rarg3, 18 * wordSize);
-  __ str(lr, Address(__ pre(sp, -2 * wordSize)));
-  __ call_VM(noreg,
-             CAST_FROM_FN_PTR(address,
-                              InterpreterRuntime::slow_signature_handler),
-             rmethod, rlocals, c_rarg3);
-
-  // r0: result handler
-
-  // Stack layout:
-  // rsp: return address           <- sp
-  //      1 garbage
-  //      8 integer args (if static first is unused)
-  //      1 float/double identifiers
-  //      8 double args
-  //        stack args              <- esp
-  //        garbage
-  //        expression stack bottom
-  //        bcp (NULL)
-  //        ...
-
-  // Restore LR
-  __ ldr(lr, Address(__ post(sp, 2 * wordSize)));
-
-  // Do FP first so we can use c_rarg3 as temp
-  __ ldrw(c_rarg3, Address(sp, 9 * wordSize)); // float/double identifiers
-
-  for (int i = 0; i < Argument::n_float_register_parameters_c; i++) {
-    const FloatRegister r = as_FloatRegister(i);
-
-    Label d, done;
-
-    __ tbnz(c_rarg3, i, d);
-    __ ldrs(r, Address(sp, (10 + i) * wordSize));
-    __ b(done);
-    __ bind(d);
-    __ ldrd(r, Address(sp, (10 + i) * wordSize));
-    __ bind(done);
-  }
-
-  // c_rarg0 contains the result from the call of
-  // InterpreterRuntime::slow_signature_handler so we don't touch it
-  // here.  It will be loaded with the JNIEnv* later.
-  __ ldr(c_rarg1, Address(sp, 1 * wordSize));
-  for (int i = c_rarg2->encoding(); i <= c_rarg7->encoding(); i += 2) {
-    Register rm = as_Register(i), rn = as_Register(i+1);
-    __ ldp(rm, rn, Address(sp, i * wordSize));
-  }
-
-  __ add(sp, sp, 18 * wordSize);
-  __ ret(lr);
-
-  return entry;
-}
-
-
-//
-// Various method entries
-//
-
-address TemplateInterpreterGenerator::generate_math_entry(AbstractInterpreter::MethodKind kind) {
-  // rmethod: Method*
-  // r13: sender sp
-  // esp: args
-
-  if (!InlineIntrinsics) return NULL; // Generate a vanilla entry
-
-  // These don't need a safepoint check because they aren't virtually
-  // callable. We won't enter these intrinsics from compiled code.
-  // If in the future we added an intrinsic which was virtually callable
-  // we'd have to worry about how to safepoint so that this code is used.
-
-  // mathematical functions inlined by compiler
-  // (interpreter must provide identical implementation
-  // in order to avoid monotonicity bugs when switching
-  // from interpreter to compiler in the middle of some
-  // computation)
-  //
-  // stack:
-  //        [ arg ] <-- esp
-  //        [ arg ]
-  // retaddr in lr
-
-  address entry_point = NULL;
-  Register continuation = lr;
-  switch (kind) {
-  case Interpreter::java_lang_math_abs:
-    entry_point = __ pc();
-    __ ldrd(v0, Address(esp));
-    __ fabsd(v0, v0);
-    __ mov(sp, r13); // Restore caller's SP
-    break;
-  case Interpreter::java_lang_math_sqrt:
-    entry_point = __ pc();
-    __ ldrd(v0, Address(esp));
-    __ fsqrtd(v0, v0);
-    __ mov(sp, r13);
-    break;
-  case Interpreter::java_lang_math_sin :
-  case Interpreter::java_lang_math_cos :
-  case Interpreter::java_lang_math_tan :
-  case Interpreter::java_lang_math_log :
-  case Interpreter::java_lang_math_log10 :
-  case Interpreter::java_lang_math_exp :
-    entry_point = __ pc();
-    __ ldrd(v0, Address(esp));
-    __ mov(sp, r13);
-    __ mov(r19, lr);
-    continuation = r19;  // The first callee-saved register
-    generate_transcendental_entry(kind, 1);
-    break;
-  case Interpreter::java_lang_math_pow :
-    entry_point = __ pc();
-    __ mov(r19, lr);
-    continuation = r19;
-    __ ldrd(v0, Address(esp, 2 * Interpreter::stackElementSize));
-    __ ldrd(v1, Address(esp));
-    __ mov(sp, r13);
-    generate_transcendental_entry(kind, 2);
-    break;
-  default:
-    ;
-  }
-  if (entry_point) {
-    __ br(continuation);
-  }
-
-  return entry_point;
-}
-
-  // double trigonometrics and transcendentals
-  // static jdouble dsin(jdouble x);
-  // static jdouble dcos(jdouble x);
-  // static jdouble dtan(jdouble x);
-  // static jdouble dlog(jdouble x);
-  // static jdouble dlog10(jdouble x);
-  // static jdouble dexp(jdouble x);
-  // static jdouble dpow(jdouble x, jdouble y);
-
-void TemplateInterpreterGenerator::generate_transcendental_entry(AbstractInterpreter::MethodKind kind, int fpargs) {
-  address fn;
-  switch (kind) {
-  case Interpreter::java_lang_math_sin :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
-    break;
-  case Interpreter::java_lang_math_cos :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
-    break;
-  case Interpreter::java_lang_math_tan :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
-    break;
-  case Interpreter::java_lang_math_log :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
-    break;
-  case Interpreter::java_lang_math_log10 :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
-    break;
-  case Interpreter::java_lang_math_exp :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
-    break;
-  case Interpreter::java_lang_math_pow :
-    fpargs = 2;
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
-    break;
-  default:
-    ShouldNotReachHere();
-    fn = NULL;  // unreachable
-  }
-  const int gpargs = 0, rtype = 3;
-  __ mov(rscratch1, fn);
-  __ blrt(rscratch1, gpargs, fpargs, rtype);
-}
-
-// Abstract method entry
-// Attempt to execute abstract method. Throw exception
-address TemplateInterpreterGenerator::generate_abstract_entry(void) {
-  // rmethod: Method*
-  // r13: sender SP
-
-  address entry_point = __ pc();
-
-  // abstract method entry
-
-  //  pop return address, reset last_sp to NULL
-  __ empty_expression_stack();
-  __ restore_bcp();      // bcp must be correct for exception handler   (was destroyed)
-  __ restore_locals();   // make sure locals pointer is correct as well (was destroyed)
-
-  // throw exception
-  __ call_VM(noreg, CAST_FROM_FN_PTR(address,
-                             InterpreterRuntime::throw_AbstractMethodError));
-  // the call_VM checks for exception, so we should never return here.
-  __ should_not_reach_here();
-
-  return entry_point;
-}
--- a/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -2301,6 +2301,30 @@
 }
 #endif
 
+void MacroAssembler::push_call_clobbered_registers() {
+  push(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
+
+  // Push v0-v7, v16-v31.
+  for (int i = 30; i >= 0; i -= 2) {
+    if (i <= v7->encoding() || i >= v16->encoding()) {
+        stpd(as_FloatRegister(i), as_FloatRegister(i+1),
+             Address(pre(sp, -2 * wordSize)));
+    }
+  }
+}
+
+void MacroAssembler::pop_call_clobbered_registers() {
+
+  for (int i = 0; i < 32; i += 2) {
+    if (i <= v7->encoding() || i >= v16->encoding()) {
+      ldpd(as_FloatRegister(i), as_FloatRegister(i+1),
+           Address(post(sp, 2 * wordSize)));
+    }
+  }
+
+  pop(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
+}
+
 void MacroAssembler::push_CPU_state(bool save_vectors) {
   push(0x3fffffff, sp);         // integer registers except lr & sp
 
@@ -3099,12 +3123,7 @@
 
   assert(CardTableModRefBS::dirty_card_val() == 0, "must be");
 
-  {
-    ExternalAddress cardtable((address) ct->byte_map_base);
-    unsigned long offset;
-    adrp(rscratch1, cardtable, offset);
-    assert(offset == 0, "byte_map_base is misaligned");
-  }
+  load_byte_map_base(rscratch1);
 
   if (UseCondCardMark) {
     Label L_already_dirty;
@@ -3596,12 +3615,10 @@
 
   lsr(card_addr, store_addr, CardTableModRefBS::card_shift);
 
-  unsigned long offset;
-  adrp(tmp2, cardtable, offset);
-
   // get the address of the card
+  load_byte_map_base(tmp2);
   add(card_addr, card_addr, tmp2);
-  ldrb(tmp2, Address(card_addr, offset));
+  ldrb(tmp2, Address(card_addr));
   cmpw(tmp2, (int)G1SATBCardTableModRefBS::g1_young_card_val());
   br(Assembler::EQ, done);
 
@@ -3609,13 +3626,13 @@
 
   membar(Assembler::StoreLoad);
 
-  ldrb(tmp2, Address(card_addr, offset));
+  ldrb(tmp2, Address(card_addr));
   cbzw(tmp2, done);
 
   // storing a region crossing, non-NULL oop, card is clean.
   // dirty card and log.
 
-  strb(zr, Address(card_addr, offset));
+  strb(zr, Address(card_addr));
 
   ldr(rscratch1, queue_index);
   cbz(rscratch1, runtime);
@@ -3938,7 +3955,7 @@
   // was post-decremented.)  Skip this address by starting at i=1, and
   // touch a few more pages below.  N.B.  It is important to touch all
   // the way down to and including i=StackShadowPages.
-  for (int i = 0; i < (JavaThread::stack_shadow_zone_size() / os::vm_page_size()) - 1; i++) {
+  for (int i = 0; i < (int)(JavaThread::stack_shadow_zone_size() / os::vm_page_size()) - 1; i++) {
     // this could be any sized move but this is can be a debugging crumb
     // so the bigger the better.
     lea(tmp, Address(tmp, -os::vm_page_size()));
@@ -3971,6 +3988,9 @@
   long offset_low = dest_page - low_page;
   long offset_high = dest_page - high_page;
 
+  assert(is_valid_AArch64_address(dest.target()), "bad address");
+  assert(dest.getMode() == Address::literal, "ADRP must be applied to a literal address");
+
   InstructionMark im(this);
   code_section()->relocate(inst_mark(), dest.rspec());
   // 8143067: Ensure that the adrp can reach the dest from anywhere within
@@ -3982,11 +4002,26 @@
     long offset = dest_page - pc_page;
     offset = (offset & ((1<<20)-1)) << 12;
     _adrp(reg1, pc()+offset);
-    movk(reg1, ((unsigned long)dest.target() >> 32) & 0xffff, 32);
+    movk(reg1, (unsigned long)dest.target() >> 32, 32);
   }
   byte_offset = (unsigned long)dest.target() & 0xfff;
 }
 
+void MacroAssembler::load_byte_map_base(Register reg) {
+  jbyte *byte_map_base =
+    ((CardTableModRefBS*)(Universe::heap()->barrier_set()))->byte_map_base;
+
+  if (is_valid_AArch64_address((address)byte_map_base)) {
+    // Strictly speaking the byte_map_base isn't an address at all,
+    // and it might even be negative.
+    unsigned long offset;
+    adrp(reg, ExternalAddress((address)byte_map_base), offset);
+    assert(offset == 0, "misaligned card table base");
+  } else {
+    mov(reg, (uint64_t)byte_map_base);
+  }
+}
+
 void MacroAssembler::build_frame(int framesize) {
   assert(framesize > 0, "framesize must be > 0");
   if (framesize < ((1 << 9) + 2 * wordSize)) {
--- a/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -437,6 +437,13 @@
   void push(RegSet regs, Register stack) { if (regs.bits()) push(regs.bits(), stack); }
   void pop(RegSet regs, Register stack) { if (regs.bits()) pop(regs.bits(), stack); }
 
+  // Push and pop everything that might be clobbered by a native
+  // runtime call except rscratch1 and rscratch2.  (They are always
+  // scratch, so we don't have to protect them.)  Only save the lower
+  // 64 bits of each vector register.
+  void push_call_clobbered_registers();
+  void pop_call_clobbered_registers();
+
   // now mov instructions for loading absolute addresses and 32 or
   // 64 bit integers
 
@@ -1116,6 +1123,15 @@
   // of your data.
   Address form_address(Register Rd, Register base, long byte_offset, int shift);
 
+  // Return true iff an address is within the 48-bit AArch64 address
+  // space.
+  bool is_valid_AArch64_address(address a) {
+    return ((uint64_t)a >> 48) == 0;
+  }
+
+  // Load the base of the cardtable byte map into reg.
+  void load_byte_map_base(Register reg);
+
   // Prolog generator routines to support switch between x86 code and
   // generated ARM code
 
--- a/hotspot/src/cpu/aarch64/vm/relocInfo_aarch64.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/aarch64/vm/relocInfo_aarch64.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -87,7 +87,6 @@
       return;
     }
   }
-  assert(addr() != x, "call instruction in an infinite loop");
   MacroAssembler::pd_patch_instruction(addr(), x);
   assert(pd_call_destination(addr()) == x, "fail in reloc");
 }
--- a/hotspot/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1090,7 +1090,7 @@
 }
 
 
-// Check GC_locker::needs_gc and enter the runtime if it's true.  This
+// Check GCLocker::needs_gc and enter the runtime if it's true.  This
 // keeps a new JNI critical region from starting until a GC has been
 // forced.  Save down any oops in registers and describe them in an
 // OopMap.
@@ -1272,14 +1272,14 @@
 // GetPrimtiveArrayCritical and disallow the use of any other JNI
 // functions.  The wrapper is expected to unpack the arguments before
 // passing them to the callee and perform checks before and after the
-// native call to ensure that they GC_locker
+// native call to ensure that they GCLocker
 // lock_critical/unlock_critical semantics are followed.  Some other
 // parts of JNI setup are skipped like the tear down of the JNI handle
 // block and the check for pending exceptions it's impossible for them
 // to be thrown.
 //
 // They are roughly structured like this:
-//    if (GC_locker::needs_gc())
+//    if (GCLocker::needs_gc())
 //      SharedRuntime::block_for_jni_critical();
 //    tranistion to thread_in_native
 //    unpack arrray arguments and call native entry point
--- a/hotspot/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -744,7 +744,7 @@
            __ sub(end, end, start); // number of bytes to copy
 
           const Register count = end; // 'end' register contains bytes count now
-          __ mov(scratch, (address)ct->byte_map_base);
+          __ load_byte_map_base(scratch);
           __ add(start, start, scratch);
           if (UseConcMarkSweepGC) {
             __ membar(__ StoreStore);
--- a/hotspot/src/cpu/aarch64/vm/templateInterpreterGenerator_aarch64.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/aarch64/vm/templateInterpreterGenerator_aarch64.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -57,6 +57,13 @@
 #include "../../../../../../simulator/simulator.hpp"
 #endif
 
+// Size of interpreter code.  Increase if too small.  Interpreter will
+// fail with a guarantee ("not enough space for interpreter generation");
+// if too small.
+// Run with +PrintInterpreter to get the VM to print out the size.
+// Max size with JVMTI
+int TemplateInterpreter::InterpreterCodeSize = 200 * 1024;
+
 #define __ _masm->
 
 //-----------------------------------------------------------------------------
@@ -65,6 +72,213 @@
 
 //-----------------------------------------------------------------------------
 
+address TemplateInterpreterGenerator::generate_slow_signature_handler() {
+  address entry = __ pc();
+
+  __ andr(esp, esp, -16);
+  __ mov(c_rarg3, esp);
+  // rmethod
+  // rlocals
+  // c_rarg3: first stack arg - wordSize
+
+  // adjust sp
+  __ sub(sp, c_rarg3, 18 * wordSize);
+  __ str(lr, Address(__ pre(sp, -2 * wordSize)));
+  __ call_VM(noreg,
+             CAST_FROM_FN_PTR(address,
+                              InterpreterRuntime::slow_signature_handler),
+             rmethod, rlocals, c_rarg3);
+
+  // r0: result handler
+
+  // Stack layout:
+  // rsp: return address           <- sp
+  //      1 garbage
+  //      8 integer args (if static first is unused)
+  //      1 float/double identifiers
+  //      8 double args
+  //        stack args              <- esp
+  //        garbage
+  //        expression stack bottom
+  //        bcp (NULL)
+  //        ...
+
+  // Restore LR
+  __ ldr(lr, Address(__ post(sp, 2 * wordSize)));
+
+  // Do FP first so we can use c_rarg3 as temp
+  __ ldrw(c_rarg3, Address(sp, 9 * wordSize)); // float/double identifiers
+
+  for (int i = 0; i < Argument::n_float_register_parameters_c; i++) {
+    const FloatRegister r = as_FloatRegister(i);
+
+    Label d, done;
+
+    __ tbnz(c_rarg3, i, d);
+    __ ldrs(r, Address(sp, (10 + i) * wordSize));
+    __ b(done);
+    __ bind(d);
+    __ ldrd(r, Address(sp, (10 + i) * wordSize));
+    __ bind(done);
+  }
+
+  // c_rarg0 contains the result from the call of
+  // InterpreterRuntime::slow_signature_handler so we don't touch it
+  // here.  It will be loaded with the JNIEnv* later.
+  __ ldr(c_rarg1, Address(sp, 1 * wordSize));
+  for (int i = c_rarg2->encoding(); i <= c_rarg7->encoding(); i += 2) {
+    Register rm = as_Register(i), rn = as_Register(i+1);
+    __ ldp(rm, rn, Address(sp, i * wordSize));
+  }
+
+  __ add(sp, sp, 18 * wordSize);
+  __ ret(lr);
+
+  return entry;
+}
+
+
+//
+// Various method entries
+//
+
+address TemplateInterpreterGenerator::generate_math_entry(AbstractInterpreter::MethodKind kind) {
+  // rmethod: Method*
+  // r13: sender sp
+  // esp: args
+
+  if (!InlineIntrinsics) return NULL; // Generate a vanilla entry
+
+  // These don't need a safepoint check because they aren't virtually
+  // callable. We won't enter these intrinsics from compiled code.
+  // If in the future we added an intrinsic which was virtually callable
+  // we'd have to worry about how to safepoint so that this code is used.
+
+  // mathematical functions inlined by compiler
+  // (interpreter must provide identical implementation
+  // in order to avoid monotonicity bugs when switching
+  // from interpreter to compiler in the middle of some
+  // computation)
+  //
+  // stack:
+  //        [ arg ] <-- esp
+  //        [ arg ]
+  // retaddr in lr
+
+  address entry_point = NULL;
+  Register continuation = lr;
+  switch (kind) {
+  case Interpreter::java_lang_math_abs:
+    entry_point = __ pc();
+    __ ldrd(v0, Address(esp));
+    __ fabsd(v0, v0);
+    __ mov(sp, r13); // Restore caller's SP
+    break;
+  case Interpreter::java_lang_math_sqrt:
+    entry_point = __ pc();
+    __ ldrd(v0, Address(esp));
+    __ fsqrtd(v0, v0);
+    __ mov(sp, r13);
+    break;
+  case Interpreter::java_lang_math_sin :
+  case Interpreter::java_lang_math_cos :
+  case Interpreter::java_lang_math_tan :
+  case Interpreter::java_lang_math_log :
+  case Interpreter::java_lang_math_log10 :
+  case Interpreter::java_lang_math_exp :
+    entry_point = __ pc();
+    __ ldrd(v0, Address(esp));
+    __ mov(sp, r13);
+    __ mov(r19, lr);
+    continuation = r19;  // The first callee-saved register
+    generate_transcendental_entry(kind, 1);
+    break;
+  case Interpreter::java_lang_math_pow :
+    entry_point = __ pc();
+    __ mov(r19, lr);
+    continuation = r19;
+    __ ldrd(v0, Address(esp, 2 * Interpreter::stackElementSize));
+    __ ldrd(v1, Address(esp));
+    __ mov(sp, r13);
+    generate_transcendental_entry(kind, 2);
+    break;
+  default:
+    ;
+  }
+  if (entry_point) {
+    __ br(continuation);
+  }
+
+  return entry_point;
+}
+
+  // double trigonometrics and transcendentals
+  // static jdouble dsin(jdouble x);
+  // static jdouble dcos(jdouble x);
+  // static jdouble dtan(jdouble x);
+  // static jdouble dlog(jdouble x);
+  // static jdouble dlog10(jdouble x);
+  // static jdouble dexp(jdouble x);
+  // static jdouble dpow(jdouble x, jdouble y);
+
+void TemplateInterpreterGenerator::generate_transcendental_entry(AbstractInterpreter::MethodKind kind, int fpargs) {
+  address fn;
+  switch (kind) {
+  case Interpreter::java_lang_math_sin :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
+    break;
+  case Interpreter::java_lang_math_cos :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
+    break;
+  case Interpreter::java_lang_math_tan :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
+    break;
+  case Interpreter::java_lang_math_log :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
+    break;
+  case Interpreter::java_lang_math_log10 :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
+    break;
+  case Interpreter::java_lang_math_exp :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
+    break;
+  case Interpreter::java_lang_math_pow :
+    fpargs = 2;
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
+    break;
+  default:
+    ShouldNotReachHere();
+    fn = NULL;  // unreachable
+  }
+  const int gpargs = 0, rtype = 3;
+  __ mov(rscratch1, fn);
+  __ blrt(rscratch1, gpargs, fpargs, rtype);
+}
+
+// Abstract method entry
+// Attempt to execute abstract method. Throw exception
+address TemplateInterpreterGenerator::generate_abstract_entry(void) {
+  // rmethod: Method*
+  // r13: sender SP
+
+  address entry_point = __ pc();
+
+  // abstract method entry
+
+  //  pop return address, reset last_sp to NULL
+  __ empty_expression_stack();
+  __ restore_bcp();      // bcp must be correct for exception handler   (was destroyed)
+  __ restore_locals();   // make sure locals pointer is correct as well (was destroyed)
+
+  // throw exception
+  __ call_VM(noreg, CAST_FROM_FN_PTR(address,
+                             InterpreterRuntime::throw_AbstractMethodError));
+  // the call_VM checks for exception, so we should never return here.
+  __ should_not_reach_here();
+
+  return entry_point;
+}
+
 address TemplateInterpreterGenerator::generate_StackOverflowError_handler() {
   address entry = __ pc();
 
@@ -716,7 +930,7 @@
 
   // If G1 is not enabled then attempt to go through the accessor entry point
   // Reference.get is an accessor
-  return generate_accessor_entry();
+  return NULL;
 }
 
 /**
@@ -842,7 +1056,7 @@
   // an interpreter frame with greater than a page of locals, so each page
   // needs to be checked.  Only true for non-native.
   if (UseStackBanging) {
-    const int size_t n_shadow_pages = JavaThread::stack_shadow_zone_size() / os::vm_page_size();
+    const int n_shadow_pages = JavaThread::stack_shadow_zone_size() / os::vm_page_size();
     const int start_page = native_call ? n_shadow_pages : 1;
     const int page_size = os::vm_page_size();
     for (int pages = start_page; pages <= n_shadow_pages ; pages++) {
@@ -1184,8 +1398,8 @@
   {
     Label no_reguard;
     __ lea(rscratch1, Address(rthread, in_bytes(JavaThread::stack_guard_state_offset())));
-    __ ldrb(rscratch1, Address(rscratch1));
-    __ cmp(rscratch1, JavaThread::stack_guard_yellow_disabled);
+    __ ldrw(rscratch1, Address(rscratch1));
+    __ cmp(rscratch1, JavaThread::stack_guard_yellow_reserved_disabled);
     __ br(Assembler::NE, no_reguard);
 
     __ pusha(); // XXX only save smashed registers
--- a/hotspot/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,186 +0,0 @@
-/*
- * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2014, Red Hat Inc. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- *
- */
-
-#include "precompiled.hpp"
-#include "interpreter/interpreter.hpp"
-#include "oops/constMethod.hpp"
-#include "oops/method.hpp"
-#include "runtime/frame.inline.hpp"
-#include "utilities/debug.hpp"
-#include "utilities/macros.hpp"
-
-// Size of interpreter code.  Increase if too small.  Interpreter will
-// fail with a guarantee ("not enough space for interpreter generation");
-// if too small.
-// Run with +PrintInterpreter to get the VM to print out the size.
-// Max size with JVMTI
-int TemplateInterpreter::InterpreterCodeSize = 200 * 1024;
-
-int AbstractInterpreter::BasicType_as_index(BasicType type) {
-  int i = 0;
-  switch (type) {
-    case T_BOOLEAN: i = 0; break;
-    case T_CHAR   : i = 1; break;
-    case T_BYTE   : i = 2; break;
-    case T_SHORT  : i = 3; break;
-    case T_INT    : i = 4; break;
-    case T_LONG   : i = 5; break;
-    case T_VOID   : i = 6; break;
-    case T_FLOAT  : i = 7; break;
-    case T_DOUBLE : i = 8; break;
-    case T_OBJECT : i = 9; break;
-    case T_ARRAY  : i = 9; break;
-    default       : ShouldNotReachHere();
-  }
-  assert(0 <= i && i < AbstractInterpreter::number_of_result_handlers,
-         "index out of bounds");
-  return i;
-}
-
-// These should never be compiled since the interpreter will prefer
-// the compiled version to the intrinsic version.
-bool AbstractInterpreter::can_be_compiled(methodHandle m) {
-  switch (method_kind(m)) {
-    case Interpreter::java_lang_math_sin     : // fall thru
-    case Interpreter::java_lang_math_cos     : // fall thru
-    case Interpreter::java_lang_math_tan     : // fall thru
-    case Interpreter::java_lang_math_abs     : // fall thru
-    case Interpreter::java_lang_math_log     : // fall thru
-    case Interpreter::java_lang_math_log10   : // fall thru
-    case Interpreter::java_lang_math_sqrt    : // fall thru
-    case Interpreter::java_lang_math_pow     : // fall thru
-    case Interpreter::java_lang_math_exp     :
-      return false;
-    default:
-      return true;
-  }
-}
-
-// How much stack a method activation needs in words.
-int AbstractInterpreter::size_top_interpreter_activation(Method* method) {
-  const int entry_size = frame::interpreter_frame_monitor_size();
-
-  // total overhead size: entry_size + (saved rfp thru expr stack
-  // bottom).  be sure to change this if you add/subtract anything
-  // to/from the overhead area
-  const int overhead_size =
-    -(frame::interpreter_frame_initial_sp_offset) + entry_size;
-
-  const int stub_code = frame::entry_frame_after_call_words;
-  const int method_stack = (method->max_locals() + method->max_stack()) *
-                           Interpreter::stackElementWords;
-  return (overhead_size + method_stack + stub_code);
-}
-
-// asm based interpreter deoptimization helpers
-int AbstractInterpreter::size_activation(int max_stack,
-                                         int temps,
-                                         int extra_args,
-                                         int monitors,
-                                         int callee_params,
-                                         int callee_locals,
-                                         bool is_top_frame) {
-  // Note: This calculation must exactly parallel the frame setup
-  // in TemplateInterpreterGenerator::generate_method_entry.
-
-  // fixed size of an interpreter frame:
-  int overhead = frame::sender_sp_offset -
-                 frame::interpreter_frame_initial_sp_offset;
-  // Our locals were accounted for by the caller (or last_frame_adjust
-  // on the transistion) Since the callee parameters already account
-  // for the callee's params we only need to account for the extra
-  // locals.
-  int size = overhead +
-         (callee_locals - callee_params)*Interpreter::stackElementWords +
-         monitors * frame::interpreter_frame_monitor_size() +
-         temps* Interpreter::stackElementWords + extra_args;
-
-  // On AArch64 we always keep the stack pointer 16-aligned, so we
-  // must round up here.
-  size = round_to(size, 2);
-
-  return size;
-}
-
-void AbstractInterpreter::layout_activation(Method* method,
-                                            int tempcount,
-                                            int popframe_extra_args,
-                                            int moncount,
-                                            int caller_actual_parameters,
-                                            int callee_param_count,
-                                            int callee_locals,
-                                            frame* caller,
-                                            frame* interpreter_frame,
-                                            bool is_top_frame,
-                                            bool is_bottom_frame) {
-  // The frame interpreter_frame is guaranteed to be the right size,
-  // as determined by a previous call to the size_activation() method.
-  // It is also guaranteed to be walkable even though it is in a
-  // skeletal state
-
-  int max_locals = method->max_locals() * Interpreter::stackElementWords;
-  int extra_locals = (method->max_locals() - method->size_of_parameters()) *
-    Interpreter::stackElementWords;
-
-#ifdef ASSERT
-  assert(caller->sp() == interpreter_frame->sender_sp(), "Frame not properly walkable");
-#endif
-
-  interpreter_frame->interpreter_frame_set_method(method);
-  // NOTE the difference in using sender_sp and
-  // interpreter_frame_sender_sp interpreter_frame_sender_sp is
-  // the original sp of the caller (the unextended_sp) and
-  // sender_sp is fp+8/16 (32bit/64bit) XXX
-  intptr_t* locals = interpreter_frame->sender_sp() + max_locals - 1;
-
-#ifdef ASSERT
-  if (caller->is_interpreted_frame()) {
-    assert(locals < caller->fp() + frame::interpreter_frame_initial_sp_offset, "bad placement");
-  }
-#endif
-
-  interpreter_frame->interpreter_frame_set_locals(locals);
-  BasicObjectLock* montop = interpreter_frame->interpreter_frame_monitor_begin();
-  BasicObjectLock* monbot = montop - moncount;
-  interpreter_frame->interpreter_frame_set_monitor_end(monbot);
-
-  // Set last_sp
-  intptr_t*  esp = (intptr_t*) monbot -
-    tempcount*Interpreter::stackElementWords -
-    popframe_extra_args;
-  interpreter_frame->interpreter_frame_set_last_sp(esp);
-
-  // All frames but the initial (oldest) interpreter frame we fill in have
-  // a value for sender_sp that allows walking the stack but isn't
-  // truly correct. Correct the value here.
-  if (extra_locals != 0 &&
-      interpreter_frame->sender_sp() ==
-      interpreter_frame->interpreter_frame_sender_sp()) {
-    interpreter_frame->set_interpreter_frame_sender_sp(caller->sp() +
-                                                       extra_locals);
-  }
-  *interpreter_frame->interpreter_frame_cache_addr() =
-    method->constants()->cache();
-}
--- a/hotspot/src/cpu/aarch64/vm/vm_version_aarch64.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/aarch64/vm/vm_version_aarch64.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -121,7 +121,6 @@
   FLAG_SET_DEFAULT(PrefetchScanIntervalInBytes, 256);
   FLAG_SET_DEFAULT(PrefetchFieldsAhead, 256);
   FLAG_SET_DEFAULT(PrefetchCopyIntervalInBytes, 256);
-  FLAG_SET_DEFAULT(UseSSE42Intrinsics, true);
 
   unsigned long auxv = getauxval(AT_HWCAP);
 
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/hotspot/src/cpu/ppc/vm/abstractInterpreter_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -0,0 +1,163 @@
+/*
+ * Copyright (c) 2014, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015 SAP SE. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+#include "precompiled.hpp"
+#include "interpreter/interpreter.hpp"
+#include "oops/constMethod.hpp"
+#include "oops/method.hpp"
+#include "runtime/frame.inline.hpp"
+#include "utilities/debug.hpp"
+#include "utilities/macros.hpp"
+
+int AbstractInterpreter::BasicType_as_index(BasicType type) {
+  int i = 0;
+  switch (type) {
+    case T_BOOLEAN: i = 0; break;
+    case T_CHAR   : i = 1; break;
+    case T_BYTE   : i = 2; break;
+    case T_SHORT  : i = 3; break;
+    case T_INT    : i = 4; break;
+    case T_LONG   : i = 5; break;
+    case T_VOID   : i = 6; break;
+    case T_FLOAT  : i = 7; break;
+    case T_DOUBLE : i = 8; break;
+    case T_OBJECT : i = 9; break;
+    case T_ARRAY  : i = 9; break;
+    default       : ShouldNotReachHere();
+  }
+  assert(0 <= i && i < AbstractInterpreter::number_of_result_handlers, "index out of bounds");
+  return i;
+}
+
+// Support abs and sqrt like in compiler.
+// For others we can use a normal (native) entry.
+bool AbstractInterpreter::math_entry_available(AbstractInterpreter::MethodKind kind) {
+  if (!InlineIntrinsics) return false;
+
+  return ((kind==Interpreter::java_lang_math_sqrt && VM_Version::has_fsqrt()) ||
+          (kind==Interpreter::java_lang_math_abs));
+}
+
+// These should never be compiled since the interpreter will prefer
+// the compiled version to the intrinsic version.
+bool AbstractInterpreter::can_be_compiled(methodHandle m) {
+  return !math_entry_available(method_kind(m));
+}
+
+// How much stack a method activation needs in stack slots.
+// We must calc this exactly like in generate_fixed_frame.
+// Note: This returns the conservative size assuming maximum alignment.
+int AbstractInterpreter::size_top_interpreter_activation(Method* method) {
+  const int max_alignment_size = 2;
+  const int abi_scratch = frame::abi_reg_args_size;
+  return method->max_locals() + method->max_stack() +
+         frame::interpreter_frame_monitor_size() + max_alignment_size + abi_scratch;
+}
+
+// Returns number of stackElementWords needed for the interpreter frame with the
+// given sections.
+// This overestimates the stack by one slot in case of alignments.
+int AbstractInterpreter::size_activation(int max_stack,
+                                         int temps,
+                                         int extra_args,
+                                         int monitors,
+                                         int callee_params,
+                                         int callee_locals,
+                                         bool is_top_frame) {
+  // Note: This calculation must exactly parallel the frame setup
+  // in TemplateInterpreterGenerator::generate_fixed_frame.
+  assert(Interpreter::stackElementWords == 1, "sanity");
+  const int max_alignment_space = StackAlignmentInBytes / Interpreter::stackElementSize;
+  const int abi_scratch = is_top_frame ? (frame::abi_reg_args_size / Interpreter::stackElementSize) :
+                                         (frame::abi_minframe_size / Interpreter::stackElementSize);
+  const int size =
+    max_stack                                                +
+    (callee_locals - callee_params)                          +
+    monitors * frame::interpreter_frame_monitor_size()       +
+    max_alignment_space                                      +
+    abi_scratch                                              +
+    frame::ijava_state_size / Interpreter::stackElementSize;
+
+  // Fixed size of an interpreter frame, align to 16-byte.
+  return (size & -2);
+}
+
+// Fills a sceletal interpreter frame generated during deoptimizations.
+//
+// Parameters:
+//
+// interpreter_frame != NULL:
+//   set up the method, locals, and monitors.
+//   The frame interpreter_frame, if not NULL, is guaranteed to be the
+//   right size, as determined by a previous call to this method.
+//   It is also guaranteed to be walkable even though it is in a skeletal state
+//
+// is_top_frame == true:
+//   We're processing the *oldest* interpreter frame!
+//
+// pop_frame_extra_args:
+//   If this is != 0 we are returning to a deoptimized frame by popping
+//   off the callee frame. We want to re-execute the call that called the
+//   callee interpreted, but since the return to the interpreter would pop
+//   the arguments off advance the esp by dummy popframe_extra_args slots.
+//   Popping off those will establish the stack layout as it was before the call.
+//
+void AbstractInterpreter::layout_activation(Method* method,
+                                            int tempcount,
+                                            int popframe_extra_args,
+                                            int moncount,
+                                            int caller_actual_parameters,
+                                            int callee_param_count,
+                                            int callee_locals_count,
+                                            frame* caller,
+                                            frame* interpreter_frame,
+                                            bool is_top_frame,
+                                            bool is_bottom_frame) {
+
+  const int abi_scratch = is_top_frame ? (frame::abi_reg_args_size / Interpreter::stackElementSize) :
+                                         (frame::abi_minframe_size / Interpreter::stackElementSize);
+
+  intptr_t* locals_base  = (caller->is_interpreted_frame()) ?
+    caller->interpreter_frame_esp() + caller_actual_parameters :
+    caller->sp() + method->max_locals() - 1 + (frame::abi_minframe_size / Interpreter::stackElementSize);
+
+  intptr_t* monitor_base = caller->sp() - frame::ijava_state_size / Interpreter::stackElementSize;
+  intptr_t* monitor      = monitor_base - (moncount * frame::interpreter_frame_monitor_size());
+  intptr_t* esp_base     = monitor - 1;
+  intptr_t* esp          = esp_base - tempcount - popframe_extra_args;
+  intptr_t* sp           = (intptr_t *) (((intptr_t) (esp_base - callee_locals_count + callee_param_count - method->max_stack()- abi_scratch)) & -StackAlignmentInBytes);
+  intptr_t* sender_sp    = caller->sp() + (frame::abi_minframe_size - frame::abi_reg_args_size) / Interpreter::stackElementSize;
+  intptr_t* top_frame_sp = is_top_frame ? sp : sp + (frame::abi_minframe_size - frame::abi_reg_args_size) / Interpreter::stackElementSize;
+
+  interpreter_frame->interpreter_frame_set_method(method);
+  interpreter_frame->interpreter_frame_set_locals(locals_base);
+  interpreter_frame->interpreter_frame_set_cpcache(method->constants()->cache());
+  interpreter_frame->interpreter_frame_set_esp(esp);
+  interpreter_frame->interpreter_frame_set_monitor_end((BasicObjectLock *)monitor);
+  interpreter_frame->interpreter_frame_set_top_frame_sp(top_frame_sp);
+  if (!is_bottom_frame) {
+    interpreter_frame->interpreter_frame_set_sender_sp(sender_sp);
+  }
+}
--- a/hotspot/src/cpu/ppc/vm/assembler_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/assembler_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/assembler_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/assembler_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/assembler_ppc.inline.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/assembler_ppc.inline.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/bytes_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/bytes_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_CodeStubs_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_CodeStubs_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_Defs_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_Defs_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_FpuStackSim_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_FpuStackSim_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_LIRGenerator_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_LIRGenerator_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_LinearScan_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_LinearScan_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_LinearScan_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_LinearScan_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_MacroAssembler_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_MacroAssembler_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_MacroAssembler_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_MacroAssembler_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_Runtime1_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_Runtime1_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_globals_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c1_globals_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c2_globals_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c2_globals_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c2_init_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/c2_init_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/codeBuffer_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/codeBuffer_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/compiledIC_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/compiledIC_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/copy_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/copy_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/debug_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/debug_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/depChecker_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/depChecker_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/disassembler_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/disassembler_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/frame_ppc.cpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/frame_ppc.cpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/frame_ppc.hpp	Thu Feb 04 16:50:04 2016 -0800
+++ b/hotspot/src/cpu/ppc/vm/frame_ppc.hpp	Wed Jul 05 21:19:26 2017 +0200
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/frame_ppc.inline.hpp	Thu Feb 04 16:50:04 2016 -0800