annotate src/hotspot/cpu/arm/c1_Runtime1_arm.cpp @ 51224:dd1aa4229fd4

8207252: C1 still does eden allocations when TLAB is enabled Summary: Only do eden allocations when TLAB is disabled Reviewed-by: kbarrett, jrose, tschatzl, iveresov Contributed-by: jcbeyler@google.com
author jcbeyler
date Sun, 22 Jul 2018 20:00:39 -0700
parents bec342339138
children cc1a4a267798
rev   line source
bobv@42664 1 /*
eosterlund@49164 2 * Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
bobv@42664 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
bobv@42664 4 *
bobv@42664 5 * This code is free software; you can redistribute it and/or modify it
bobv@42664 6 * under the terms of the GNU General Public License version 2 only, as
bobv@42664 7 * published by the Free Software Foundation.
bobv@42664 8 *
bobv@42664 9 * This code is distributed in the hope that it will be useful, but WITHOUT
bobv@42664 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
bobv@42664 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
bobv@42664 12 * version 2 for more details (a copy is included in the LICENSE file that
bobv@42664 13 * accompanied this code).
bobv@42664 14 *
bobv@42664 15 * You should have received a copy of the GNU General Public License version
bobv@42664 16 * 2 along with this work; if not, write to the Free Software Foundation,
bobv@42664 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
bobv@42664 18 *
bobv@42664 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
bobv@42664 20 * or visit www.oracle.com if you need additional information or have any
bobv@42664 21 * questions.
bobv@42664 22 *
bobv@42664 23 */
bobv@42664 24
bobv@42664 25 #include "precompiled.hpp"
coleenp@50380 26 #include "asm/macroAssembler.inline.hpp"
bobv@42664 27 #include "c1/c1_Defs.hpp"
bobv@42664 28 #include "c1/c1_LIRAssembler.hpp"
bobv@42664 29 #include "c1/c1_MacroAssembler.hpp"
bobv@42664 30 #include "c1/c1_Runtime1.hpp"
eosterlund@49164 31 #include "ci/ciUtilities.hpp"
eosterlund@49164 32 #include "gc/shared/cardTable.hpp"
eosterlund@49455 33 #include "gc/shared/cardTableBarrierSet.hpp"
bobv@42664 34 #include "interpreter/interpreter.hpp"
bobv@42664 35 #include "nativeInst_arm.hpp"
bobv@42664 36 #include "oops/compiledICHolder.hpp"
bobv@42664 37 #include "oops/oop.inline.hpp"
bobv@42664 38 #include "prims/jvmtiExport.hpp"
bobv@42664 39 #include "register_arm.hpp"
bobv@42664 40 #include "runtime/sharedRuntime.hpp"
bobv@42664 41 #include "runtime/signature.hpp"
bobv@42664 42 #include "runtime/vframeArray.hpp"
stefank@46625 43 #include "utilities/align.hpp"
bobv@42664 44 #include "vmreg_arm.inline.hpp"
bobv@42664 45
bobv@42664 46 // Note: Rtemp usage is this file should not impact C2 and should be
bobv@42664 47 // correct as long as it is not implicitly used in lower layers (the
bobv@42664 48 // arm [macro]assembler) and used with care in the other C1 specific
bobv@42664 49 // files.
bobv@42664 50
bobv@42664 51 // Implementation of StubAssembler
bobv@42664 52
bobv@42664 53 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
bobv@42664 54 mov(R0, Rthread);
bobv@42664 55
bobv@42664 56 int call_offset = set_last_Java_frame(SP, FP, false, Rtemp);
bobv@42664 57
bobv@42664 58 call(entry);
bobv@42664 59 if (call_offset == -1) { // PC not saved
bobv@42664 60 call_offset = offset();
bobv@42664 61 }
bobv@42664 62 reset_last_Java_frame(Rtemp);
bobv@42664 63
bobv@42664 64 assert(frame_size() != no_frame_size, "frame must be fixed");
bobv@42664 65 if (_stub_id != Runtime1::forward_exception_id) {
bobv@42664 66 ldr(R3, Address(Rthread, Thread::pending_exception_offset()));
bobv@42664 67 }
bobv@42664 68
bobv@42664 69 if (oop_result1->is_valid()) {
bobv@42664 70 assert_different_registers(oop_result1, R3, Rtemp);
bobv@42664 71 get_vm_result(oop_result1, Rtemp);
bobv@42664 72 }
bobv@42664 73 if (metadata_result->is_valid()) {
bobv@42664 74 assert_different_registers(metadata_result, R3, Rtemp);
bobv@42664 75 get_vm_result_2(metadata_result, Rtemp);
bobv@42664 76 }
bobv@42664 77
bobv@42664 78 // Check for pending exception
bobv@42664 79 // unpack_with_exception_in_tls path is taken through
bobv@42664 80 // Runtime1::exception_handler_for_pc
bobv@42664 81 if (_stub_id != Runtime1::forward_exception_id) {
bobv@42664 82 assert(frame_size() != no_frame_size, "cannot directly call forward_exception_id");
bobv@42664 83 #ifdef AARCH64
bobv@42664 84 Label skip;
bobv@42664 85 cbz(R3, skip);
bobv@42664 86 jump(Runtime1::entry_for(Runtime1::forward_exception_id), relocInfo::runtime_call_type, Rtemp);
bobv@42664 87 bind(skip);
bobv@42664 88 #else
bobv@42664 89 cmp(R3, 0);
bobv@42664 90 jump(Runtime1::entry_for(Runtime1::forward_exception_id), relocInfo::runtime_call_type, Rtemp, ne);
bobv@42664 91 #endif // AARCH64
bobv@42664 92 } else {
bobv@42664 93 #ifdef ASSERT
bobv@42664 94 // Should not have pending exception in forward_exception stub
bobv@42664 95 ldr(R3, Address(Rthread, Thread::pending_exception_offset()));
bobv@42664 96 cmp(R3, 0);
bobv@42664 97 breakpoint(ne);
bobv@42664 98 #endif // ASSERT
bobv@42664 99 }
bobv@42664 100 return call_offset;
bobv@42664 101 }
bobv@42664 102
bobv@42664 103
bobv@42664 104 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
bobv@42664 105 if (arg1 != R1) {
bobv@42664 106 mov(R1, arg1);
bobv@42664 107 }
bobv@42664 108 return call_RT(oop_result1, metadata_result, entry, 1);
bobv@42664 109 }
bobv@42664 110
bobv@42664 111
bobv@42664 112 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
bobv@42664 113 assert(arg1 == R1 && arg2 == R2, "cannot handle otherwise");
bobv@42664 114 return call_RT(oop_result1, metadata_result, entry, 2);
bobv@42664 115 }
bobv@42664 116
bobv@42664 117
bobv@42664 118 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
bobv@42664 119 assert(arg1 == R1 && arg2 == R2 && arg3 == R3, "cannot handle otherwise");
bobv@42664 120 return call_RT(oop_result1, metadata_result, entry, 3);
bobv@42664 121 }
bobv@42664 122
bobv@42664 123
bobv@42664 124 #define __ sasm->
bobv@42664 125
bobv@42664 126 // TODO: ARM - does this duplicate RegisterSaver in SharedRuntime?
bobv@42664 127 #ifdef AARCH64
bobv@42664 128
bobv@42664 129 //
bobv@42664 130 // On AArch64 registers save area has the following layout:
bobv@42664 131 //
bobv@42664 132 // |---------------------|
bobv@42664 133 // | return address (LR) |
bobv@42664 134 // | FP |
bobv@42664 135 // |---------------------|
bobv@42664 136 // | D31 |
bobv@42664 137 // | ... |
bobv@42664 138 // | D0 |
bobv@42664 139 // |---------------------|
bobv@42664 140 // | padding |
bobv@42664 141 // |---------------------|
bobv@42664 142 // | R28 |
bobv@42664 143 // | ... |
bobv@42664 144 // | R0 |
bobv@42664 145 // |---------------------| <-- SP
bobv@42664 146 //
bobv@42664 147
bobv@42664 148 enum RegisterLayout {
bobv@42664 149 number_of_saved_gprs = 29,
bobv@42664 150 number_of_saved_fprs = FloatRegisterImpl::number_of_registers,
bobv@42664 151
bobv@42664 152 R0_offset = 0,
bobv@42664 153 D0_offset = R0_offset + number_of_saved_gprs + 1,
bobv@42664 154 FP_offset = D0_offset + number_of_saved_fprs,
bobv@42664 155 LR_offset = FP_offset + 1,
bobv@42664 156
bobv@42664 157 reg_save_size = LR_offset + 1,
bobv@42664 158
bobv@42664 159 arg1_offset = reg_save_size * wordSize,
bobv@42664 160 arg2_offset = (reg_save_size + 1) * wordSize
bobv@42664 161 };
bobv@42664 162
bobv@42664 163 #else
bobv@42664 164
bobv@42664 165 enum RegisterLayout {
bobv@42664 166 fpu_save_size = pd_nof_fpu_regs_reg_alloc,
bobv@42664 167 #ifndef __SOFTFP__
bobv@42664 168 D0_offset = 0,
bobv@42664 169 #endif
bobv@42664 170 R0_offset = fpu_save_size,
bobv@42664 171 R1_offset,
bobv@42664 172 R2_offset,
bobv@42664 173 R3_offset,
bobv@42664 174 R4_offset,
bobv@42664 175 R5_offset,
bobv@42664 176 R6_offset,
bobv@42664 177 #if (FP_REG_NUM != 7)
bobv@42664 178 R7_offset,
bobv@42664 179 #endif
bobv@42664 180 R8_offset,
bobv@42664 181 R9_offset,
bobv@42664 182 R10_offset,
bobv@42664 183 #if (FP_REG_NUM != 11)
bobv@42664 184 R11_offset,
bobv@42664 185 #endif
bobv@42664 186 R12_offset,
bobv@42664 187 FP_offset,
bobv@42664 188 LR_offset,
bobv@42664 189 reg_save_size,
bobv@42664 190 arg1_offset = reg_save_size * wordSize,
bobv@42664 191 arg2_offset = (reg_save_size + 1) * wordSize
bobv@42664 192 };
bobv@42664 193
bobv@42664 194 #endif // AARCH64
bobv@42664 195
bobv@42664 196 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers = HaveVFP) {
bobv@42664 197 sasm->set_frame_size(reg_save_size /* in words */);
bobv@42664 198
bobv@42664 199 // Record saved value locations in an OopMap.
bobv@42664 200 // Locations are offsets from sp after runtime call.
bobv@42664 201 OopMap* map = new OopMap(VMRegImpl::slots_per_word * reg_save_size, 0);
bobv@42664 202
bobv@42664 203 #ifdef AARCH64
bobv@42664 204 for (int i = 0; i < number_of_saved_gprs; i++) {
bobv@42664 205 map->set_callee_saved(VMRegImpl::stack2reg((R0_offset + i) * VMRegImpl::slots_per_word), as_Register(i)->as_VMReg());
bobv@42664 206 }
bobv@42664 207 map->set_callee_saved(VMRegImpl::stack2reg(FP_offset * VMRegImpl::slots_per_word), FP->as_VMReg());
bobv@42664 208 map->set_callee_saved(VMRegImpl::stack2reg(LR_offset * VMRegImpl::slots_per_word), LR->as_VMReg());
bobv@42664 209
bobv@42664 210 if (save_fpu_registers) {
bobv@42664 211 for (int i = 0; i < number_of_saved_fprs; i++) {
bobv@42664 212 map->set_callee_saved(VMRegImpl::stack2reg((D0_offset + i) * VMRegImpl::slots_per_word), as_FloatRegister(i)->as_VMReg());
bobv@42664 213 }
bobv@42664 214 }
bobv@42664 215 #else
bobv@42664 216 int j=0;
bobv@42664 217 for (int i = R0_offset; i < R10_offset; i++) {
bobv@42664 218 if (j == FP_REG_NUM) {
bobv@42664 219 // skip the FP register, saved below
bobv@42664 220 j++;
bobv@42664 221 }
bobv@42664 222 map->set_callee_saved(VMRegImpl::stack2reg(i), as_Register(j)->as_VMReg());
bobv@42664 223 j++;
bobv@42664 224 }
bobv@42664 225 assert(j == R10->encoding(), "must be");
bobv@42664 226 #if (FP_REG_NUM != 11)
bobv@42664 227 // add R11, if not saved as FP
bobv@42664 228 map->set_callee_saved(VMRegImpl::stack2reg(R11_offset), R11->as_VMReg());
bobv@42664 229 #endif
bobv@42664 230 map->set_callee_saved(VMRegImpl::stack2reg(FP_offset), FP->as_VMReg());
bobv@42664 231 map->set_callee_saved(VMRegImpl::stack2reg(LR_offset), LR->as_VMReg());
bobv@42664 232
bobv@42664 233 if (save_fpu_registers) {
bobv@42664 234 for (int i = 0; i < fpu_save_size; i++) {
bobv@42664 235 map->set_callee_saved(VMRegImpl::stack2reg(i), as_FloatRegister(i)->as_VMReg());
bobv@42664 236 }
bobv@42664 237 }
bobv@42664 238 #endif // AARCH64
bobv@42664 239
bobv@42664 240 return map;
bobv@42664 241 }
bobv@42664 242
bobv@42664 243 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = HaveVFP) {
bobv@42664 244 __ block_comment("save_live_registers");
bobv@42664 245 sasm->set_frame_size(reg_save_size /* in words */);
bobv@42664 246
bobv@42664 247 #ifdef AARCH64
bobv@42664 248 assert((reg_save_size * wordSize) % StackAlignmentInBytes == 0, "SP should be aligned");
bobv@42664 249
bobv@42664 250 __ raw_push(FP, LR);
bobv@42664 251
bobv@42664 252 __ sub(SP, SP, (reg_save_size - 2) * wordSize);
bobv@42664 253
stefank@46620 254 for (int i = 0; i < align_down((int)number_of_saved_gprs, 2); i += 2) {
bobv@42664 255 __ stp(as_Register(i), as_Register(i+1), Address(SP, (R0_offset + i) * wordSize));
bobv@42664 256 }
bobv@42664 257
bobv@42664 258 if (is_odd(number_of_saved_gprs)) {
bobv@42664 259 int i = number_of_saved_gprs - 1;
bobv@42664 260 __ str(as_Register(i), Address(SP, (R0_offset + i) * wordSize));
bobv@42664 261 }
bobv@42664 262
bobv@42664 263 if (save_fpu_registers) {
bobv@42664 264 assert (is_even(number_of_saved_fprs), "adjust this code");
bobv@42664 265 for (int i = 0; i < number_of_saved_fprs; i += 2) {
bobv@42664 266 __ stp_d(as_FloatRegister(i), as_FloatRegister(i+1), Address(SP, (D0_offset + i) * wordSize));
bobv@42664 267 }
bobv@42664 268 }
bobv@42664 269 #else
bobv@42664 270 __ push(RegisterSet(FP) | RegisterSet(LR));
bobv@42664 271 __ push(RegisterSet(R0, R6) | RegisterSet(R8, R10) | R12 | altFP_7_11);
bobv@42664 272 if (save_fpu_registers) {
bobv@42664 273 __ fstmdbd(SP, FloatRegisterSet(D0, fpu_save_size / 2), writeback);
bobv@42664 274 } else {
bobv@42664 275 __ sub(SP, SP, fpu_save_size * wordSize);
bobv@42664 276 }
bobv@42664 277 #endif // AARCH64
bobv@42664 278
bobv@42664 279 return generate_oop_map(sasm, save_fpu_registers);
bobv@42664 280 }
bobv@42664 281
bobv@42664 282
bobv@42664 283 static void restore_live_registers(StubAssembler* sasm,
bobv@42664 284 bool restore_R0,
bobv@42664 285 bool restore_FP_LR,
bobv@42664 286 bool do_return,
bobv@42664 287 bool restore_fpu_registers = HaveVFP) {
bobv@42664 288 __ block_comment("restore_live_registers");
bobv@42664 289
bobv@42664 290 #ifdef AARCH64
bobv@42664 291 if (restore_R0) {
bobv@42664 292 __ ldr(R0, Address(SP, R0_offset * wordSize));
bobv@42664 293 }
bobv@42664 294
bobv@42664 295 assert(is_odd(number_of_saved_gprs), "adjust this code");
bobv@42664 296 for (int i = 1; i < number_of_saved_gprs; i += 2) {
bobv@42664 297 __ ldp(as_Register(i), as_Register(i+1), Address(SP, (R0_offset + i) * wordSize));
bobv@42664 298 }
bobv@42664 299
bobv@42664 300 if (restore_fpu_registers) {
bobv@42664 301 assert (is_even(number_of_saved_fprs), "adjust this code");
bobv@42664 302 for (int i = 0; i < number_of_saved_fprs; i += 2) {
bobv@42664 303 __ ldp_d(as_FloatRegister(i), as_FloatRegister(i+1), Address(SP, (D0_offset + i) * wordSize));
bobv@42664 304 }
bobv@42664 305 }
bobv@42664 306
bobv@42664 307 __ add(SP, SP, (reg_save_size - 2) * wordSize);
bobv@42664 308
bobv@42664 309 if (restore_FP_LR) {
bobv@42664 310 __ raw_pop(FP, LR);
bobv@42664 311 if (do_return) {
bobv@42664 312 __ ret();
bobv@42664 313 }
bobv@42664 314 } else {
bobv@42664 315 assert (!do_return, "return without restoring FP/LR");
bobv@42664 316 }
bobv@42664 317 #else
bobv@42664 318 if (restore_fpu_registers) {
bobv@42664 319 __ fldmiad(SP, FloatRegisterSet(D0, fpu_save_size / 2), writeback);
bobv@42664 320 if (!restore_R0) {
bobv@42664 321 __ add(SP, SP, (R1_offset - fpu_save_size) * wordSize);
bobv@42664 322 }
bobv@42664 323 } else {
bobv@42664 324 __ add(SP, SP, (restore_R0 ? fpu_save_size : R1_offset) * wordSize);
bobv@42664 325 }
bobv@42664 326 __ pop(RegisterSet((restore_R0 ? R0 : R1), R6) | RegisterSet(R8, R10) | R12 | altFP_7_11);
bobv@42664 327 if (restore_FP_LR) {
bobv@42664 328 __ pop(RegisterSet(FP) | RegisterSet(do_return ? PC : LR));
bobv@42664 329 } else {
bobv@42664 330 assert (!do_return, "return without restoring FP/LR");
bobv@42664 331 }
bobv@42664 332 #endif // AARCH64
bobv@42664 333 }
bobv@42664 334
bobv@42664 335
bobv@42664 336 static void restore_live_registers_except_R0(StubAssembler* sasm, bool restore_fpu_registers = HaveVFP) {
bobv@42664 337 restore_live_registers(sasm, false, true, true, restore_fpu_registers);
bobv@42664 338 }
bobv@42664 339
bobv@42664 340 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = HaveVFP) {
bobv@42664 341 restore_live_registers(sasm, true, true, true, restore_fpu_registers);
bobv@42664 342 }
bobv@42664 343
bobv@42664 344 #ifndef AARCH64
bobv@42664 345 static void restore_live_registers_except_FP_LR(StubAssembler* sasm, bool restore_fpu_registers = HaveVFP) {
bobv@42664 346 restore_live_registers(sasm, true, false, false, restore_fpu_registers);
bobv@42664 347 }
bobv@42664 348 #endif // !AARCH64
bobv@42664 349
bobv@42664 350 static void restore_live_registers_without_return(StubAssembler* sasm, bool restore_fpu_registers = HaveVFP) {
bobv@42664 351 restore_live_registers(sasm, true, true, false, restore_fpu_registers);
bobv@42664 352 }
bobv@42664 353
eosterlund@49906 354 void StubAssembler::save_live_registers() {
shade@49938 355 ::save_live_registers(this);
eosterlund@49906 356 }
eosterlund@49906 357
eosterlund@49906 358 void StubAssembler::restore_live_registers_without_return() {
shade@49938 359 ::restore_live_registers_without_return(this);
eosterlund@49906 360 }
bobv@42664 361
bobv@42664 362 void Runtime1::initialize_pd() {
bobv@42664 363 }
bobv@42664 364
bobv@42664 365
bobv@42664 366 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
bobv@42664 367 OopMap* oop_map = save_live_registers(sasm);
bobv@42664 368
goetz@50094 369 int call_offset;
bobv@42664 370 if (has_argument) {
bobv@42664 371 __ ldr(R1, Address(SP, arg1_offset));
goetz@50094 372 __ ldr(R2, Address(SP, arg2_offset));
goetz@50094 373 call_offset = __ call_RT(noreg, noreg, target, R1, R2);
goetz@50094 374 } else {
goetz@50094 375 call_offset = __ call_RT(noreg, noreg, target);
bobv@42664 376 }
bobv@42664 377
bobv@42664 378 OopMapSet* oop_maps = new OopMapSet();
bobv@42664 379 oop_maps->add_gc_map(call_offset, oop_map);
bobv@42664 380
bobv@42664 381 DEBUG_ONLY(STOP("generate_exception_throw");) // Should not reach here
bobv@42664 382 return oop_maps;
bobv@42664 383 }
bobv@42664 384
bobv@42664 385
bobv@42664 386 static void restore_sp_for_method_handle(StubAssembler* sasm) {
bobv@42664 387 // Restore SP from its saved reg (FP) if the exception PC is a MethodHandle call site.
bobv@42664 388 __ ldr_s32(Rtemp, Address(Rthread, JavaThread::is_method_handle_return_offset()));
bobv@42664 389 #ifdef AARCH64
bobv@42664 390 Label skip;
bobv@42664 391 __ cbz(Rtemp, skip);
bobv@42664 392 __ mov(SP, Rmh_SP_save);
bobv@42664 393 __ bind(skip);
bobv@42664 394 #else
bobv@42664 395 __ cmp(Rtemp, 0);
bobv@42664 396 __ mov(SP, Rmh_SP_save, ne);
bobv@42664 397 #endif // AARCH64
bobv@42664 398 }
bobv@42664 399
bobv@42664 400
bobv@42664 401 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler* sasm) {
bobv@42664 402 __ block_comment("generate_handle_exception");
bobv@42664 403
bobv@42664 404 bool save_fpu_registers = false;
bobv@42664 405
bobv@42664 406 // Save registers, if required.
bobv@42664 407 OopMapSet* oop_maps = new OopMapSet();
bobv@42664 408 OopMap* oop_map = NULL;
bobv@42664 409
bobv@42664 410 switch (id) {
bobv@42664 411 case forward_exception_id: {
bobv@42664 412 save_fpu_registers = HaveVFP;
bobv@42664 413 oop_map = generate_oop_map(sasm);
bobv@42664 414 __ ldr(Rexception_obj, Address(Rthread, Thread::pending_exception_offset()));
bobv@42664 415 __ ldr(Rexception_pc, Address(SP, LR_offset * wordSize));
bobv@42664 416 Register zero = __ zero_register(Rtemp);
bobv@42664 417 __ str(zero, Address(Rthread, Thread::pending_exception_offset()));
bobv@42664 418 break;
bobv@42664 419 }
bobv@42664 420 case handle_exception_id:
bobv@42664 421 save_fpu_registers = HaveVFP;
bobv@42664 422 // fall-through
bobv@42664 423 case handle_exception_nofpu_id:
bobv@42664 424 // At this point all registers MAY be live.
bobv@42664 425 oop_map = save_live_registers(sasm, save_fpu_registers);
bobv@42664 426 break;
bobv@42664 427 case handle_exception_from_callee_id:
bobv@42664 428 // At this point all registers except exception oop (R4/R19) and
bobv@42664 429 // exception pc (R5/R20) are dead.
bobv@42664 430 oop_map = save_live_registers(sasm); // TODO it's not required to save all registers
bobv@42664 431 break;
bobv@42664 432 default: ShouldNotReachHere();
bobv@42664 433 }
bobv@42664 434
bobv@42664 435 __ str(Rexception_obj, Address(Rthread, JavaThread::exception_oop_offset()));
bobv@42664 436 __ str(Rexception_pc, Address(Rthread, JavaThread::exception_pc_offset()));
bobv@42664 437
bobv@42664 438 __ str(Rexception_pc, Address(SP, LR_offset * wordSize)); // patch throwing pc into return address
bobv@42664 439
bobv@42664 440 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
bobv@42664 441 oop_maps->add_gc_map(call_offset, oop_map);
bobv@42664 442
bobv@42664 443 // Exception handler found
bobv@42664 444 __ str(R0, Address(SP, LR_offset * wordSize)); // patch the return address
bobv@42664 445
bobv@42664 446 // Restore the registers that were saved at the beginning, remove
bobv@42664 447 // frame and jump to the exception handler.
bobv@42664 448 switch (id) {
bobv@42664 449 case forward_exception_id:
bobv@42664 450 case handle_exception_nofpu_id:
bobv@42664 451 case handle_exception_id:
bobv@42664 452 restore_live_registers(sasm, save_fpu_registers);
bobv@42664 453 // Note: the restore live registers includes the jump to LR (patched to R0)
bobv@42664 454 break;
bobv@42664 455 case handle_exception_from_callee_id:
bobv@42664 456 restore_live_registers_without_return(sasm); // must not jump immediatly to handler
bobv@42664 457 restore_sp_for_method_handle(sasm);
bobv@42664 458 __ ret();
bobv@42664 459 break;
bobv@42664 460 default: ShouldNotReachHere();
bobv@42664 461 }
bobv@42664 462
bobv@42664 463 DEBUG_ONLY(STOP("generate_handle_exception");) // Should not reach here
bobv@42664 464
bobv@42664 465 return oop_maps;
bobv@42664 466 }
bobv@42664 467
bobv@42664 468
bobv@42664 469 void Runtime1::generate_unwind_exception(StubAssembler* sasm) {
bobv@42664 470 // FP no longer used to find the frame start
bobv@42664 471 // on entry, remove_frame() has already been called (restoring FP and LR)
bobv@42664 472
bobv@42664 473 // search the exception handler address of the caller (using the return address)
bobv@42664 474 __ mov(c_rarg0, Rthread);
bobv@42664 475 __ mov(Rexception_pc, LR);
bobv@42664 476 __ mov(c_rarg1, LR);
bobv@42664 477 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), c_rarg0, c_rarg1);
bobv@42664 478
bobv@42664 479 // Exception oop should be still in Rexception_obj and pc in Rexception_pc
bobv@42664 480 // Jump to handler
bobv@42664 481 __ verify_not_null_oop(Rexception_obj);
bobv@42664 482
bobv@42664 483 // JSR292 extension
bobv@42664 484 restore_sp_for_method_handle(sasm);
bobv@42664 485
bobv@42664 486 __ jump(R0);
bobv@42664 487 }
bobv@42664 488
bobv@42664 489
bobv@42664 490 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
bobv@42664 491 OopMap* oop_map = save_live_registers(sasm);
bobv@42664 492
bobv@42664 493 // call the runtime patching routine, returns non-zero if nmethod got deopted.
bobv@42664 494 int call_offset = __ call_RT(noreg, noreg, target);
bobv@42664 495 OopMapSet* oop_maps = new OopMapSet();
bobv@42664 496 oop_maps->add_gc_map(call_offset, oop_map);
bobv@42664 497
bobv@42664 498 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
bobv@42664 499 assert(deopt_blob != NULL, "deoptimization blob must have been created");
bobv@42664 500
bobv@42664 501 __ cmp_32(R0, 0);
bobv@42664 502
bobv@42664 503 #ifdef AARCH64
bobv@42664 504 Label call_deopt;
bobv@42664 505
bobv@42664 506 restore_live_registers_without_return(sasm);
bobv@42664 507 __ b(call_deopt, ne);
bobv@42664 508 __ ret();
bobv@42664 509
bobv@42664 510 __ bind(call_deopt);
bobv@42664 511 #else
bobv@42664 512 restore_live_registers_except_FP_LR(sasm);
bobv@42664 513 __ pop(RegisterSet(FP) | RegisterSet(PC), eq);
bobv@42664 514
bobv@42664 515 // Deoptimization needed
bobv@42664 516 // TODO: ARM - no need to restore FP & LR because unpack_with_reexecution() stores them back
bobv@42664 517 __ pop(RegisterSet(FP) | RegisterSet(LR));
bobv@42664 518 #endif // AARCH64
bobv@42664 519
bobv@42664 520 __ jump(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type, Rtemp);
bobv@42664 521
bobv@42664 522 DEBUG_ONLY(STOP("generate_patching");) // Should not reach here
bobv@42664 523 return oop_maps;
bobv@42664 524 }
bobv@42664 525
bobv@42664 526
bobv@42664 527 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
bobv@42664 528 const bool must_gc_arguments = true;
bobv@42664 529 const bool dont_gc_arguments = false;
bobv@42664 530
bobv@42664 531 OopMapSet* oop_maps = NULL;
bobv@42664 532 bool save_fpu_registers = HaveVFP;
bobv@42664 533
bobv@42664 534 switch (id) {
bobv@42664 535 case forward_exception_id:
bobv@42664 536 {
bobv@42664 537 oop_maps = generate_handle_exception(id, sasm);
bobv@42664 538 // does not return on ARM
bobv@42664 539 }
bobv@42664 540 break;
bobv@42664 541
bobv@42664 542 case new_instance_id:
bobv@42664 543 case fast_new_instance_id:
bobv@42664 544 case fast_new_instance_init_check_id:
bobv@42664 545 {
bobv@42664 546 const Register result = R0;
bobv@42664 547 const Register klass = R1;
bobv@42664 548
jcbeyler@51224 549 // If TLAB is disabled, see if there is support for inlining contiguous
jcbeyler@51224 550 // allocations.
jcbeyler@51224 551 // Otherwise, just go to the slow path.
jcbeyler@51224 552 if (!UseTLAB && Universe::heap()->supports_inline_contig_alloc() && id != new_instance_id) {
jcbeyler@49010 553 Label slow_case, slow_case_no_pop;
bobv@42664 554
bobv@42664 555 // Make sure the class is fully initialized
bobv@42664 556 if (id == fast_new_instance_init_check_id) {
bobv@42664 557 __ ldrb(result, Address(klass, InstanceKlass::init_state_offset()));
bobv@42664 558 __ cmp(result, InstanceKlass::fully_initialized);
bobv@42664 559 __ b(slow_case_no_pop, ne);
bobv@42664 560 }
bobv@42664 561
bobv@42664 562 // Free some temporary registers
bobv@42664 563 const Register obj_size = R4;
bobv@42664 564 const Register tmp1 = R5;
bobv@42664 565 const Register tmp2 = LR;
bobv@42664 566 const Register obj_end = Rtemp;
bobv@42664 567
bobv@42664 568 __ raw_push(R4, R5, LR);
bobv@42664 569
bobv@42664 570 __ ldr_u32(obj_size, Address(klass, Klass::layout_helper_offset()));
bobv@42664 571 __ eden_allocate(result, obj_end, tmp1, tmp2, obj_size, slow_case); // initializes result and obj_end
bobv@42664 572 __ incr_allocated_bytes(obj_size, tmp2);
bobv@42664 573 __ initialize_object(result, obj_end, klass, noreg /* len */, tmp1, tmp2,
bobv@42664 574 instanceOopDesc::header_size() * HeapWordSize, -1,
bobv@42664 575 /* is_tlab_allocated */ false);
bobv@42664 576 __ raw_pop_and_ret(R4, R5);
bobv@42664 577
bobv@42664 578 __ bind(slow_case);
bobv@42664 579 __ raw_pop(R4, R5, LR);
bobv@42664 580
bobv@42664 581 __ bind(slow_case_no_pop);
bobv@42664 582 }
bobv@42664 583
bobv@42664 584 OopMap* map = save_live_registers(sasm);
bobv@42664 585 int call_offset = __ call_RT(result, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
bobv@42664 586 oop_maps = new OopMapSet();
bobv@42664 587 oop_maps->add_gc_map(call_offset, map);
bobv@42664 588
bobv@42664 589 // MacroAssembler::StoreStore useless (included in the runtime exit path)
bobv@42664 590
bobv@42664 591 restore_live_registers_except_R0(sasm);
bobv@42664 592 }
bobv@42664 593 break;
bobv@42664 594
bobv@42664 595 case counter_overflow_id:
bobv@42664 596 {
bobv@42664 597 OopMap* oop_map = save_live_registers(sasm);
bobv@42664 598 __ ldr(R1, Address(SP, arg1_offset));
bobv@42664 599 __ ldr(R2, Address(SP, arg2_offset));
bobv@42664 600 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), R1, R2);
bobv@42664 601 oop_maps = new OopMapSet();
bobv@42664 602 oop_maps->add_gc_map(call_offset, oop_map);
bobv@42664 603 restore_live_registers(sasm);
bobv@42664 604 }
bobv@42664 605 break;
bobv@42664 606
bobv@42664 607 case new_type_array_id:
bobv@42664 608 case new_object_array_id:
bobv@42664 609 {
bobv@42664 610 if (id == new_type_array_id) {
bobv@42664 611 __ set_info("new_type_array", dont_gc_arguments);
bobv@42664 612 } else {
bobv@42664 613 __ set_info("new_object_array", dont_gc_arguments);
bobv@42664 614 }
bobv@42664 615
bobv@42664 616 const Register result = R0;
bobv@42664 617 const Register klass = R1;
bobv@42664 618 const Register length = R2;
bobv@42664 619
jcbeyler@51224 620 // If TLAB is disabled, see if there is support for inlining contiguous
jcbeyler@51224 621 // allocations.
jcbeyler@51224 622 // Otherwise, just go to the slow path.
jcbeyler@51224 623 if (!UseTLAB && Universe::heap()->supports_inline_contig_alloc()) {
jcbeyler@49010 624 Label slow_case, slow_case_no_pop;
bobv@42664 625
bobv@42664 626 #ifdef AARCH64
bobv@42664 627 __ mov_slow(Rtemp, C1_MacroAssembler::max_array_allocation_length);
bobv@42664 628 __ cmp_32(length, Rtemp);
bobv@42664 629 #else
bobv@42664 630 __ cmp_32(length, C1_MacroAssembler::max_array_allocation_length);
bobv@42664 631 #endif // AARCH64
bobv@42664 632 __ b(slow_case_no_pop, hs);
bobv@42664 633
bobv@42664 634 // Free some temporary registers
bobv@42664 635 const Register arr_size = R4;
bobv@42664 636 const Register tmp1 = R5;
bobv@42664 637 const Register tmp2 = LR;
bobv@42664 638 const Register tmp3 = Rtemp;
bobv@42664 639 const Register obj_end = tmp3;
bobv@42664 640
bobv@42664 641 __ raw_push(R4, R5, LR);
bobv@42664 642
bobv@42664 643 // Get the allocation size: round_up((length << (layout_helper & 0xff)) + header_size)
bobv@42664 644 __ ldr_u32(tmp1, Address(klass, Klass::layout_helper_offset()));
bobv@42664 645 __ mov(arr_size, MinObjAlignmentInBytesMask);
bobv@42664 646 __ and_32(tmp2, tmp1, (unsigned int)(Klass::_lh_header_size_mask << Klass::_lh_header_size_shift));
bobv@42664 647
bobv@42664 648 #ifdef AARCH64
bobv@42664 649 __ lslv_w(tmp3, length, tmp1);
bobv@42664 650 __ add(arr_size, arr_size, tmp3);
bobv@42664 651 #else
bobv@42664 652 __ add(arr_size, arr_size, AsmOperand(length, lsl, tmp1));
bobv@42664 653 #endif // AARCH64
bobv@42664 654
bobv@42664 655 __ add(arr_size, arr_size, AsmOperand(tmp2, lsr, Klass::_lh_header_size_shift));
bobv@42664 656 __ align_reg(arr_size, arr_size, MinObjAlignmentInBytes);
bobv@42664 657
bobv@42664 658 // eden_allocate destroys tmp2, so reload header_size after allocation
bobv@42664 659 // eden_allocate initializes result and obj_end
bobv@42664 660 __ eden_allocate(result, obj_end, tmp1, tmp2, arr_size, slow_case);
bobv@42664 661 __ incr_allocated_bytes(arr_size, tmp2);
bobv@42664 662 __ ldrb(tmp2, Address(klass, in_bytes(Klass::layout_helper_offset()) +
bobv@42664 663 Klass::_lh_header_size_shift / BitsPerByte));
bobv@42664 664 __ initialize_object(result, obj_end, klass, length, tmp1, tmp2, tmp2, -1, /* is_tlab_allocated */ false);
bobv@42664 665 __ raw_pop_and_ret(R4, R5);
bobv@42664 666
bobv@42664 667 __ bind(slow_case);
bobv@42664 668 __ raw_pop(R4, R5, LR);
bobv@42664 669 __ bind(slow_case_no_pop);
bobv@42664 670 }
bobv@42664 671
bobv@42664 672 OopMap* map = save_live_registers(sasm);
bobv@42664 673 int call_offset;
bobv@42664 674 if (id == new_type_array_id) {
bobv@42664 675 call_offset = __ call_RT(result, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
bobv@42664 676 } else {
bobv@42664 677 call_offset = __ call_RT(result, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
bobv@42664 678 }
bobv@42664 679 oop_maps = new OopMapSet();
bobv@42664 680 oop_maps->add_gc_map(call_offset, map);
bobv@42664 681
bobv@42664 682 // MacroAssembler::StoreStore useless (included in the runtime exit path)
bobv@42664 683
bobv@42664 684 restore_live_registers_except_R0(sasm);
bobv@42664 685 }
bobv@42664 686 break;
bobv@42664 687
bobv@42664 688 case new_multi_array_id:
bobv@42664 689 {
bobv@42664 690 __ set_info("new_multi_array", dont_gc_arguments);
bobv@42664 691
bobv@42664 692 // R0: klass
bobv@42664 693 // R2: rank
bobv@42664 694 // SP: address of 1st dimension
bobv@42664 695 const Register result = R0;
bobv@42664 696 OopMap* map = save_live_registers(sasm);
bobv@42664 697
bobv@42664 698 __ mov(R1, R0);
bobv@42664 699 __ add(R3, SP, arg1_offset);
bobv@42664 700 int call_offset = __ call_RT(result, noreg, CAST_FROM_FN_PTR(address, new_multi_array), R1, R2, R3);
bobv@42664 701
bobv@42664 702 oop_maps = new OopMapSet();
bobv@42664 703 oop_maps->add_gc_map(call_offset, map);
bobv@42664 704
bobv@42664 705 // MacroAssembler::StoreStore useless (included in the runtime exit path)
bobv@42664 706
bobv@42664 707 restore_live_registers_except_R0(sasm);
bobv@42664 708 }
bobv@42664 709 break;
bobv@42664 710
bobv@42664 711 case register_finalizer_id:
bobv@42664 712 {
bobv@42664 713 __ set_info("register_finalizer", dont_gc_arguments);
bobv@42664 714
bobv@42664 715 // Do not call runtime if JVM_ACC_HAS_FINALIZER flag is not set
bobv@42664 716 __ load_klass(Rtemp, R0);
bobv@42664 717 __ ldr_u32(Rtemp, Address(Rtemp, Klass::access_flags_offset()));
bobv@42664 718
bobv@42664 719 #ifdef AARCH64
bobv@42664 720 Label L;
bobv@42664 721 __ tbnz(Rtemp, exact_log2(JVM_ACC_HAS_FINALIZER), L);
bobv@42664 722 __ ret();
bobv@42664 723 __ bind(L);
bobv@42664 724 #else
bobv@42664 725 __ tst(Rtemp, JVM_ACC_HAS_FINALIZER);
bobv@42664 726 __ bx(LR, eq);
bobv@42664 727 #endif // AARCH64
bobv@42664 728
bobv@42664 729 // Call VM
bobv@42664 730 OopMap* map = save_live_registers(sasm);
bobv@42664 731 oop_maps = new OopMapSet();
bobv@42664 732 int call_offset = __ call_RT(noreg, noreg,
bobv@42664 733 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), R0);
bobv@42664 734 oop_maps->add_gc_map(call_offset, map);
bobv@42664 735 restore_live_registers(sasm);
bobv@42664 736 }
bobv@42664 737 break;
bobv@42664 738
bobv@42664 739 case throw_range_check_failed_id:
bobv@42664 740 {
bobv@42664 741 __ set_info("range_check_failed", dont_gc_arguments);
bobv@42664 742 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
bobv@42664 743 }
bobv@42664 744 break;
bobv@42664 745
bobv@42664 746 case throw_index_exception_id:
bobv@42664 747 {
bobv@42664 748 __ set_info("index_range_check_failed", dont_gc_arguments);
bobv@42664 749 #ifdef AARCH64
bobv@42664 750 __ NOT_TESTED();
bobv@42664 751 #endif
bobv@42664 752 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
bobv@42664 753 }
bobv@42664 754 break;
bobv@42664 755
bobv@42664 756 case throw_div0_exception_id:
bobv@42664 757 {
bobv@42664 758 __ set_info("throw_div0_exception", dont_gc_arguments);
bobv@42664 759 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
bobv@42664 760 }
bobv@42664 761 break;
bobv@42664 762
bobv@42664 763 case throw_null_pointer_exception_id:
bobv@42664 764 {
bobv@42664 765 __ set_info("throw_null_pointer_exception", dont_gc_arguments);
bobv@42664 766 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
bobv@42664 767 }
bobv@42664 768 break;
bobv@42664 769
bobv@42664 770 case handle_exception_nofpu_id:
bobv@42664 771 case handle_exception_id:
bobv@42664 772 {
bobv@42664 773 __ set_info("handle_exception", dont_gc_arguments);
bobv@42664 774 oop_maps = generate_handle_exception(id, sasm);
bobv@42664 775 }
bobv@42664 776 break;
bobv@42664 777
bobv@42664 778 case handle_exception_from_callee_id:
bobv@42664 779 {
bobv@42664 780 __ set_info("handle_exception_from_callee", dont_gc_arguments);
bobv@42664 781 oop_maps = generate_handle_exception(id, sasm);
bobv@42664 782 }
bobv@42664 783 break;
bobv@42664 784
bobv@42664 785 case unwind_exception_id:
bobv@42664 786 {
bobv@42664 787 __ set_info("unwind_exception", dont_gc_arguments);
bobv@42664 788 generate_unwind_exception(sasm);
bobv@42664 789 }
bobv@42664 790 break;
bobv@42664 791
bobv@42664 792 case throw_array_store_exception_id:
bobv@42664 793 {
bobv@42664 794 __ set_info("throw_array_store_exception", dont_gc_arguments);
bobv@42664 795 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
bobv@42664 796 }
bobv@42664 797 break;
bobv@42664 798
bobv@42664 799 case throw_class_cast_exception_id:
bobv@42664 800 {
bobv@42664 801 __ set_info("throw_class_cast_exception", dont_gc_arguments);
bobv@42664 802 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
bobv@42664 803 }
bobv@42664 804 break;
bobv@42664 805
bobv@42664 806 case throw_incompatible_class_change_error_id:
bobv@42664 807 {
bobv@42664 808 __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
bobv@42664 809 #ifdef AARCH64
bobv@42664 810 __ NOT_TESTED();
bobv@42664 811 #endif
bobv@42664 812 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
bobv@42664 813 }
bobv@42664 814 break;
bobv@42664 815
bobv@42664 816 case slow_subtype_check_id:
bobv@42664 817 {
bobv@42664 818 // (in) R0 - sub, destroyed,
bobv@42664 819 // (in) R1 - super, not changed
bobv@42664 820 // (out) R0 - result: 1 if check passed, 0 otherwise
bobv@42664 821 __ raw_push(R2, R3, LR);
bobv@42664 822
bobv@42664 823 // Load an array of secondary_supers
bobv@42664 824 __ ldr(R2, Address(R0, Klass::secondary_supers_offset()));
bobv@42664 825 // Length goes to R3
bobv@42664 826 __ ldr_s32(R3, Address(R2, Array<Klass*>::length_offset_in_bytes()));
bobv@42664 827 __ add(R2, R2, Array<Klass*>::base_offset_in_bytes());
bobv@42664 828
bobv@42664 829 Label loop, miss;
bobv@42664 830 __ bind(loop);
bobv@42664 831 __ cbz(R3, miss);
bobv@42664 832 __ ldr(LR, Address(R2, wordSize, post_indexed));
bobv@42664 833 __ sub(R3, R3, 1);
bobv@42664 834 __ cmp(LR, R1);
bobv@42664 835 __ b(loop, ne);
bobv@42664 836
bobv@42664 837 // We get here if an equal cache entry is found
bobv@42664 838 __ str(R1, Address(R0, Klass::secondary_super_cache_offset()));
bobv@42664 839 __ mov(R0, 1);
bobv@42664 840 __ raw_pop_and_ret(R2, R3);
bobv@42664 841
bobv@42664 842 // A cache entry not found - return false
bobv@42664 843 __ bind(miss);
bobv@42664 844 __ mov(R0, 0);
bobv@42664 845 __ raw_pop_and_ret(R2, R3);
bobv@42664 846 }
bobv@42664 847 break;
bobv@42664 848
bobv@42664 849 case monitorenter_nofpu_id:
bobv@42664 850 save_fpu_registers = false;
bobv@42664 851 // fall through
bobv@42664 852 case monitorenter_id:
bobv@42664 853 {
bobv@42664 854 __ set_info("monitorenter", dont_gc_arguments);
bobv@42664 855 const Register obj = R1;
bobv@42664 856 const Register lock = R2;
bobv@42664 857 OopMap* map = save_live_registers(sasm, save_fpu_registers);
bobv@42664 858 __ ldr(obj, Address(SP, arg1_offset));
bobv@42664 859 __ ldr(lock, Address(SP, arg2_offset));
bobv@42664 860 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), obj, lock);
bobv@42664 861 oop_maps = new OopMapSet();
bobv@42664 862 oop_maps->add_gc_map(call_offset, map);
bobv@42664 863 restore_live_registers(sasm, save_fpu_registers);
bobv@42664 864 }
bobv@42664 865 break;
bobv@42664 866
bobv@42664 867 case monitorexit_nofpu_id:
bobv@42664 868 save_fpu_registers = false;
bobv@42664 869 // fall through
bobv@42664 870 case monitorexit_id:
bobv@42664 871 {
bobv@42664 872 __ set_info("monitorexit", dont_gc_arguments);
bobv@42664 873 const Register lock = R1;
bobv@42664 874 OopMap* map = save_live_registers(sasm, save_fpu_registers);
bobv@42664 875 __ ldr(lock, Address(SP, arg1_offset));
bobv@42664 876 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), lock);
bobv@42664 877 oop_maps = new OopMapSet();
bobv@42664 878 oop_maps->add_gc_map(call_offset, map);
bobv@42664 879 restore_live_registers(sasm, save_fpu_registers);
bobv@42664 880 }
bobv@42664 881 break;
bobv@42664 882
bobv@42664 883 case deoptimize_id:
bobv@42664 884 {
bobv@42664 885 __ set_info("deoptimize", dont_gc_arguments);
bobv@42664 886 OopMap* oop_map = save_live_registers(sasm);
bobv@42664 887 const Register trap_request = R1;
bobv@42664 888 __ ldr(trap_request, Address(SP, arg1_offset));
bobv@42664 889 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), trap_request);
bobv@42664 890 oop_maps = new OopMapSet();
bobv@42664 891 oop_maps->add_gc_map(call_offset, oop_map);
bobv@42664 892 restore_live_registers_without_return(sasm);
bobv@42664 893 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
bobv@42664 894 assert(deopt_blob != NULL, "deoptimization blob must have been created");
bobv@42664 895 __ jump(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type, AARCH64_ONLY(Rtemp) NOT_AARCH64(noreg));
bobv@42664 896 }
bobv@42664 897 break;
bobv@42664 898
bobv@42664 899 case access_field_patching_id:
bobv@42664 900 {
bobv@42664 901 __ set_info("access_field_patching", dont_gc_arguments);
bobv@42664 902 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
bobv@42664 903 }
bobv@42664 904 break;
bobv@42664 905
bobv@42664 906 case load_klass_patching_id:
bobv@42664 907 {
bobv@42664 908 __ set_info("load_klass_patching", dont_gc_arguments);
bobv@42664 909 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
bobv@42664 910 }
bobv@42664 911 break;
bobv@42664 912
bobv@42664 913 case load_appendix_patching_id:
bobv@42664 914 {
bobv@42664 915 __ set_info("load_appendix_patching", dont_gc_arguments);
bobv@42664 916 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
bobv@42664 917 }
bobv@42664 918 break;
bobv@42664 919
bobv@42664 920 case load_mirror_patching_id:
bobv@42664 921 {
bobv@42664 922 __ set_info("load_mirror_patching", dont_gc_arguments);
bobv@42664 923 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
bobv@42664 924 }
bobv@42664 925 break;
bobv@42664 926
bobv@42664 927 case predicate_failed_trap_id:
bobv@42664 928 {
bobv@42664 929 __ set_info("predicate_failed_trap", dont_gc_arguments);
bobv@42664 930
bobv@42664 931 OopMap* oop_map = save_live_registers(sasm);
bobv@42664 932 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
bobv@42664 933
bobv@42664 934 oop_maps = new OopMapSet();
bobv@42664 935 oop_maps->add_gc_map(call_offset, oop_map);
bobv@42664 936
bobv@42664 937 restore_live_registers_without_return(sasm);
bobv@42664 938
bobv@42664 939 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
bobv@42664 940 assert(deopt_blob != NULL, "deoptimization blob must have been created");
bobv@42664 941 __ jump(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type, Rtemp);
bobv@42664 942 }
bobv@42664 943 break;
bobv@42664 944
bobv@42664 945 default:
bobv@42664 946 {
bobv@42664 947 __ set_info("unimplemented entry", dont_gc_arguments);
bobv@42664 948 STOP("unimplemented entry");
bobv@42664 949 }
bobv@42664 950 break;
bobv@42664 951 }
bobv@42664 952 return oop_maps;
bobv@42664 953 }
bobv@42664 954
bobv@42664 955 #undef __
bobv@42664 956
bobv@42664 957 #ifdef __SOFTFP__
bobv@42664 958 const char *Runtime1::pd_name_for_address(address entry) {
bobv@42664 959
bobv@42664 960 #define FUNCTION_CASE(a, f) \
bobv@42664 961 if ((intptr_t)a == CAST_FROM_FN_PTR(intptr_t, f)) return #f
bobv@42664 962
bobv@42664 963 FUNCTION_CASE(entry, __aeabi_fadd_glibc);
bobv@42664 964 FUNCTION_CASE(entry, __aeabi_fmul);
bobv@42664 965 FUNCTION_CASE(entry, __aeabi_fsub_glibc);
bobv@42664 966 FUNCTION_CASE(entry, __aeabi_fdiv);
bobv@42664 967
bobv@42664 968 // __aeabi_XXXX_glibc: Imported code from glibc soft-fp bundle for calculation accuracy improvement. See CR 6757269.
bobv@42664 969 FUNCTION_CASE(entry, __aeabi_dadd_glibc);
bobv@42664 970 FUNCTION_CASE(entry, __aeabi_dmul);
bobv@42664 971 FUNCTION_CASE(entry, __aeabi_dsub_glibc);
bobv@42664 972 FUNCTION_CASE(entry, __aeabi_ddiv);
bobv@42664 973
bobv@42664 974 FUNCTION_CASE(entry, __aeabi_f2d);
bobv@42664 975 FUNCTION_CASE(entry, __aeabi_d2f);
bobv@42664 976 FUNCTION_CASE(entry, __aeabi_i2f);
bobv@42664 977 FUNCTION_CASE(entry, __aeabi_i2d);
bobv@42664 978 FUNCTION_CASE(entry, __aeabi_f2iz);
bobv@42664 979
bobv@42664 980 FUNCTION_CASE(entry, SharedRuntime::fcmpl);
bobv@42664 981 FUNCTION_CASE(entry, SharedRuntime::fcmpg);
bobv@42664 982 FUNCTION_CASE(entry, SharedRuntime::dcmpl);
bobv@42664 983 FUNCTION_CASE(entry, SharedRuntime::dcmpg);
bobv@42664 984
bobv@42664 985 FUNCTION_CASE(entry, SharedRuntime::unordered_fcmplt);
bobv@42664 986 FUNCTION_CASE(entry, SharedRuntime::unordered_dcmplt);
bobv@42664 987 FUNCTION_CASE(entry, SharedRuntime::unordered_fcmple);
bobv@42664 988 FUNCTION_CASE(entry, SharedRuntime::unordered_dcmple);
bobv@42664 989 FUNCTION_CASE(entry, SharedRuntime::unordered_fcmpge);
bobv@42664 990 FUNCTION_CASE(entry, SharedRuntime::unordered_dcmpge);
bobv@42664 991 FUNCTION_CASE(entry, SharedRuntime::unordered_fcmpgt);
bobv@42664 992 FUNCTION_CASE(entry, SharedRuntime::unordered_dcmpgt);
bobv@42664 993
bobv@42664 994 FUNCTION_CASE(entry, SharedRuntime::fneg);
bobv@42664 995 FUNCTION_CASE(entry, SharedRuntime::dneg);
bobv@42664 996
bobv@42664 997 FUNCTION_CASE(entry, __aeabi_fcmpeq);
bobv@42664 998 FUNCTION_CASE(entry, __aeabi_fcmplt);
bobv@42664 999 FUNCTION_CASE(entry, __aeabi_fcmple);
bobv@42664 1000 FUNCTION_CASE(entry, __aeabi_fcmpge);
bobv@42664 1001 FUNCTION_CASE(entry, __aeabi_fcmpgt);
bobv@42664 1002
bobv@42664 1003 FUNCTION_CASE(entry, __aeabi_dcmpeq);
bobv@42664 1004 FUNCTION_CASE(entry, __aeabi_dcmplt);
bobv@42664 1005 FUNCTION_CASE(entry, __aeabi_dcmple);
bobv@42664 1006 FUNCTION_CASE(entry, __aeabi_dcmpge);
bobv@42664 1007 FUNCTION_CASE(entry, __aeabi_dcmpgt);
bobv@42664 1008 #undef FUNCTION_CASE
bobv@42664 1009 return "";
bobv@42664 1010 }
bobv@42664 1011 #else // __SOFTFP__
bobv@42664 1012 const char *Runtime1::pd_name_for_address(address entry) {
bobv@42664 1013 return "<unknown function>";
bobv@42664 1014 }
bobv@42664 1015 #endif // __SOFTFP__