changeset 35607:d73b0b6a24e6

Merge
author amurillo
date Thu, 28 Jan 2016 16:30:37 -0800
parents 086c682bd8c5 d873b64009cc
children d549e724be36 ed9109f7ac47 b5764af2800a 928548a43408
files hotspot/make/gensrc/Gensrc-jdk.vm.ci.gmk hotspot/src/cpu/aarch64/vm/interpreter_aarch64.cpp hotspot/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp hotspot/src/cpu/ppc/vm/interpreter_ppc.cpp hotspot/src/cpu/ppc/vm/templateInterpreter_ppc.cpp hotspot/src/cpu/ppc/vm/templateInterpreter_ppc.hpp hotspot/src/cpu/sparc/vm/interpreter_sparc.cpp hotspot/src/cpu/sparc/vm/templateInterpreter_sparc.cpp hotspot/src/cpu/x86/vm/interpreterGenerator_x86.cpp hotspot/src/cpu/x86/vm/interpreter_x86_32.cpp hotspot/src/cpu/x86/vm/interpreter_x86_64.cpp hotspot/src/cpu/x86/vm/macroAssembler_x86_libm.cpp hotspot/src/cpu/x86/vm/templateInterpreter_x86.cpp hotspot/src/cpu/zero/vm/interp_masm_zero.cpp hotspot/src/cpu/zero/vm/interpreter_zero.cpp hotspot/src/cpu/zero/vm/register_definitions_zero.cpp hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.code/src/jdk/vm/ci/code/CompilationResult.java hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.code/src/jdk/vm/ci/code/DataSection.java hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.code/src/jdk/vm/ci/code/InfopointReason.java hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.service.processor/src/META-INF/services/javax.annotation.processing.Processor hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.service.processor/src/jdk/vm/ci/service/processor/ServiceProviderProcessor.java hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.service/.checkstyle_checks.xml hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.service/src/jdk/vm/ci/service/ServiceProvider.java hotspot/src/jdk.vm.ci/share/classes/jdk.vm.ci.service/src/jdk/vm/ci/service/Services.java hotspot/src/share/vm/oops/typeArrayOop.cpp hotspot/test/gc/6581734/Test6581734.java hotspot/test/gc/6845368/bigobj.java hotspot/test/gc/7072527/TestFullGCCount.java
diffstat 718 files changed, 93128 insertions(+), 82276 deletions(-) [+]
line wrap: on
line diff
--- a/hotspot/.mx.jvmci/mx_jvmci.py	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/.mx.jvmci/mx_jvmci.py	Thu Jan 28 16:30:37 2016 -0800
@@ -40,6 +40,8 @@
 
 _suite = mx.suite('jvmci')
 
+JVMCI_VERSION = 9
+
 """
 Top level directory of the JDK source workspace.
 """
@@ -153,11 +155,17 @@
     def deploy(self, jdkDir):
         mx.nyi('deploy', self)
 
+    def post_parse_cmd_line(self):
+        self.set_archiveparticipant()
+
+    def set_archiveparticipant(self):
+        dist = self.dist()
+        dist.set_archiveparticipant(JVMCIArchiveParticipant(dist))
+
 class ExtJDKDeployedDist(JvmciJDKDeployedDist):
     def __init__(self, name):
         JvmciJDKDeployedDist.__init__(self, name)
 
-
 """
 The monolithic JVMCI distribution is deployed through use of -Xbootclasspath/p
 so that it's not necessary to run JDK make after editing JVMCI sources.
@@ -186,7 +194,7 @@
         # JDK9 must be bootstrapped with a JDK8
         compliance = mx.JavaCompliance('8')
         jdk8 = mx.get_jdk(compliance.exactMatch, versionDescription=compliance.value)
-        cmd = ['sh', 'configure', '--with-debug-level=' + _vm.debugLevel, '--disable-debug-symbols', '--disable-precompiled-headers',
+        cmd = ['sh', 'configure', '--with-debug-level=' + _vm.debugLevel, '--with-native-debug-symbols=none', '--disable-precompiled-headers',
                '--with-jvm-variants=' + _vm.jvmVariant, '--disable-warnings-as-errors', '--with-boot-jdk=' + jdk8.home]
         mx.run(cmd, cwd=_jdkSourceRoot)
     cmd = [mx.gmake_cmd(), 'CONF=' + _vm.debugLevel]
@@ -205,7 +213,15 @@
     mx.run(cmd, cwd=_jdkSourceRoot)
 
     if 'images' in cmd:
-        _create_jdk_bundle(jdkBuildDir)
+        jdkImageDir = join(jdkBuildDir, 'images', 'jdk')
+
+        # The OpenJDK build creates an empty cacerts file so copy one from
+        # the default JDK (which is assumed to be an OracleJDK)
+        srcCerts = join(mx.get_jdk(tag='default').home, 'jre', 'lib', 'security', 'cacerts')
+        dstCerts = join(jdkImageDir, 'lib', 'security', 'cacerts')
+        shutil.copyfile(srcCerts, dstCerts)
+
+        _create_jdk_bundle(jdkBuildDir, _vm.debugLevel, jdkImageDir)
 
 def _get_jdk_bundle_arches():
     """
@@ -220,15 +236,14 @@
         return ['sparcv9']
     mx.abort('Unsupported JDK bundle arch: ' + cpu)
 
-def _create_jdk_bundle(jdkBuildDir):
+def _create_jdk_bundle(jdkBuildDir, debugLevel, jdkImageDir):
     """
     Creates a tar.gz JDK archive, an accompanying tar.gz.sha1 file with its
     SHA1 signature plus symlinks to the archive for non-canonical architecture names.
     """
-    jdkImageDir = join(jdkBuildDir, 'images', 'jdk')
 
     arches = _get_jdk_bundle_arches()
-    jdkTgzPath = join(_suite.get_output_root(), 'jdk-bundles', 'jdk9-{}-{}.tar.gz'.format(_get_openjdk_os(), arches[0]))
+    jdkTgzPath = join(_suite.get_output_root(), 'jdk-bundles', 'jdk9-{}-{}-{}.tar.gz'.format(debugLevel, _get_openjdk_os(), arches[0]))
     with mx.Archiver(jdkTgzPath, kind='tgz') as arc:
         mx.log('Creating ' + jdkTgzPath)
         for root, _, filenames in os.walk(jdkImageDir):
@@ -236,10 +251,6 @@
                 f = join(root, name)
                 arcname = 'jdk1.9.0/' + os.path.relpath(f, jdkImageDir)
                 arc.zf.add(name=f, arcname=arcname, recursive=False)
-        # The OpenJDK build creates an empty cacerts file so grab one from
-        # the default JDK which is assumed to be an OracleJDK
-        cacerts = join(mx.get_jdk(tag='default').home, 'jre', 'lib', 'security', 'cacerts')
-        arc.zf.add(name=cacerts, arcname='jdk1.9.0/lib/security/cacerts')
 
     with open(jdkTgzPath + '.sha1', 'w') as fp:
         mx.log('Creating ' + jdkTgzPath + '.sha1')
@@ -252,7 +263,7 @@
         os.symlink(source, link_name)
 
     for arch in arches[1:]:
-        link_name = join(_suite.get_output_root(), 'jdk-bundles', 'jdk9-{}-{}.tar.gz'.format(_get_openjdk_os(), arch))
+        link_name = join(_suite.get_output_root(), 'jdk-bundles', 'jdk9-{}-{}-{}.tar.gz'.format(debugLevel, _get_openjdk_os(), arch))
         jdkTgzName = os.path.basename(jdkTgzPath)
         _create_link(jdkTgzName, link_name)
         _create_link(jdkTgzName + '.sha1', link_name + '.sha1')
@@ -668,15 +679,10 @@
 
     def __opened__(self, arc, srcArc, services):
         self.services = services
+        self.jvmciServices = services
         self.arc = arc
 
     def __add__(self, arcname, contents):
-        if arcname.startswith('META-INF/jvmci.providers/'):
-            provider = arcname[len('META-INF/jvmci.providers/'):]
-            for service in contents.strip().split(os.linesep):
-                assert service
-                self.services.setdefault(service, []).append(provider)
-            return True
         return False
 
     def __addsrc__(self, arcname, contents):
@@ -757,6 +763,14 @@
 
         args = ['-Xbootclasspath/p:' + dep.classpath_repr() for dep in _jvmci_bootclasspath_prepends] + args
 
+        # Remove JVMCI jars from class path. They are only necessary when
+        # compiling with a javac from JDK8 or earlier.
+        cpIndex, cp = mx.find_classpath_arg(args)
+        if cp:
+            excluded = frozenset([dist.path for dist in _suite.dists])
+            cp = os.pathsep.join([e for e in cp.split(os.pathsep) if e not in excluded])
+            args[cpIndex] = cp
+
         jvmciModeArgs = _jvmciModes[_vm.jvmciMode]
         if jvmciModeArgs:
             bcpDeps = [jdkDist.dist() for jdkDist in jdkDeployedDists]
@@ -812,7 +826,7 @@
         _jvmci_jdks[debugLevel] = jdk
     return jdk
 
-class JVMCIJDKFactory(mx.JDKFactory):
+class JVMCI9JDKFactory(mx.JDKFactory):
     def getJDKConfig(self):
         jdk = get_jvmci_jdk(_vm.debugLevel)
         return jdk
@@ -836,8 +850,9 @@
 mx.add_argument('--jdk-debug-level', '--vmbuild', action='store', choices=_jdkDebugLevels + sorted(_legacyVmbuilds.viewkeys()), help='the JDK debug level to build/run (default: ' + _vm.debugLevel + ')')
 mx.add_argument('-I', '--use-jdk-image', action='store_true', help='build/run JDK image instead of exploded JDK')
 
+mx.addJDKFactory(_JVMCI_JDK_TAG, mx.JavaCompliance('9'), JVMCI9JDKFactory())
+
 def mx_post_parse_cmd_line(opts):
-    mx.addJDKFactory(_JVMCI_JDK_TAG, mx.JavaCompliance('9'), JVMCIJDKFactory())
     mx.set_java_command_default_jdk_tag(_JVMCI_JDK_TAG)
 
     jdkTag = mx.get_jdk_option().tag
@@ -864,6 +879,39 @@
     _vm.update(jvmVariant, debugLevel, jvmciMode)
 
     for jdkDist in jdkDeployedDists:
-        dist = jdkDist.dist()
-        if isinstance(jdkDist, JvmciJDKDeployedDist):
-            dist.set_archiveparticipant(JVMCIArchiveParticipant(dist))
+        jdkDist.post_parse_cmd_line()
+
+def _update_JDK9_STUBS_library():
+    """
+    Sets the "path" and "sha1" attributes of the "JDK9_STUBS" library.
+    """
+    jdk9InternalLib = _suite.suiteDict['libraries']['JDK9_STUBS']
+    jarInputDir = join(_suite.get_output_root(), 'jdk9-stubs')
+    jarPath = join(_suite.get_output_root(), 'jdk9-stubs.jar')
+
+    stubs = [
+        ('jdk.internal.misc', 'VM', """package jdk.internal.misc;
+public class VM {
+    public static String getSavedProperty(String key) {
+        throw new InternalError("should not reach here");
+    }
+}
+""")
+    ]
+
+    if not exists(jarPath):
+        sourceFiles = []
+        for (package, className, source) in stubs:
+            sourceFile = join(jarInputDir, package.replace('.', os.sep), className + '.java')
+            mx.ensure_dir_exists(os.path.dirname(sourceFile))
+            with open(sourceFile, 'w') as fp:
+                fp.write(source)
+            sourceFiles.append(sourceFile)
+        jdk = mx.get_jdk(tag='default')
+        mx.run([jdk.javac, '-d', jarInputDir] + sourceFiles)
+        mx.run([jdk.jar, 'cf', jarPath, '.'], cwd=jarInputDir)
+
+    jdk9InternalLib['path'] = jarPath
+    jdk9InternalLib['sha1'] = mx.sha1OfFile(jarPath)
+
+_update_JDK9_STUBS_library()
--- a/hotspot/.mx.jvmci/suite.py	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/.mx.jvmci/suite.py	Thu Jan 28 16:30:37 2016 -0800
@@ -1,5 +1,5 @@
 suite = {
-  "mxversion" : "5.5.12",
+  "mxversion" : "5.6.11",
   "name" : "jvmci",
   "url" : "http://openjdk.java.net/projects/graal",
   "developer" : {
@@ -24,7 +24,7 @@
 
   "defaultLicense" : "GPLv2-CPE",
 
-  # This puts mx/ as a sibiling of the JDK build configuration directories
+  # This puts mx/ as a sibling of the JDK build configuration directories
   # (e.g., macosx-x86_64-normal-server-release).
   "outputRoot" : "../build/mx/hotspot",
 
@@ -32,8 +32,6 @@
 
   "libraries" : {
 
-    # ------------- Libraries -------------
-
     "HCFDIS" : {
       "urls" : ["https://lafo.ssw.uni-linz.ac.at/pub/hcfdis-3.jar"],
       "sha1" : "a71247c6ddb90aad4abf7c77e501acc60674ef57",
@@ -53,34 +51,32 @@
       "sha1" : "122b87ca88e41a415cf8b523fd3d03b4325134a3",
       "urls" : ["https://lafo.ssw.uni-linz.ac.at/pub/graal-external-deps/batik-all-1.7.jar"],
     },
+
+    # Stubs for classes introduced in JDK9 that allow compilation with a JDK8 javac and Eclipse.
+    # The "path" and "sha1" attributes are added when mx_jvmci is loaded
+    # (see mx_jvmci._update_JDK9_STUBS_library()).
+    "JDK9_STUBS" : {
+        "license" : "GPLv2-CPE",
+     },
   },
 
   "projects" : {
 
     # ------------- JVMCI:Service -------------
 
-    "jdk.vm.ci.service" : {
+    "jdk.vm.ci.services" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
 
-    "jdk.vm.ci.service.processor" : {
-      "subDir" : "src/jdk.vm.ci/share/classes",
-      "sourceDirs" : ["src"],
-      "dependencies" : ["jdk.vm.ci.service"],
-      "checkstyle" : "jdk.vm.ci.service",
-      "javaCompliance" : "1.8",
-      "workingSets" : "JVMCI,Codegen,HotSpot",
-    },
-
     # ------------- JVMCI:API -------------
 
     "jdk.vm.ci.common" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
@@ -88,7 +84,7 @@
     "jdk.vm.ci.meta" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
@@ -97,7 +93,7 @@
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
       "dependencies" : ["jdk.vm.ci.meta"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
@@ -108,7 +104,7 @@
       "dependencies" : [
         "jdk.vm.ci.code",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
@@ -121,7 +117,7 @@
         "jdk.vm.ci.common",
         "jdk.vm.ci.runtime",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "API,JVMCI",
     },
@@ -129,7 +125,7 @@
     "jdk.vm.ci.inittimer" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI",
     },
@@ -140,7 +136,7 @@
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
       "dependencies" : ["jdk.vm.ci.code"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,AArch64",
     },
@@ -149,7 +145,7 @@
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
       "dependencies" : ["jdk.vm.ci.code"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,AMD64",
     },
@@ -158,7 +154,7 @@
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
       "dependencies" : ["jdk.vm.ci.code"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,SPARC",
     },
@@ -171,9 +167,10 @@
         "jdk.vm.ci.common",
         "jdk.vm.ci.inittimer",
         "jdk.vm.ci.runtime",
-        "jdk.vm.ci.service",
+        "jdk.vm.ci.services",
+        "JDK9_STUBS",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI",
     },
@@ -181,7 +178,7 @@
     "jdk.vm.ci.hotspotvmconfig" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "sourceDirs" : ["src"],
-      "checkstyle" : "jdk.vm.ci.service",
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,HotSpot",
     },
@@ -193,10 +190,7 @@
         "jdk.vm.ci.aarch64",
         "jdk.vm.ci.hotspot",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
-      "annotationProcessors" : [
-        "JVMCI_SERVICE_PROCESSOR",
-      ],
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,HotSpot,AArch64",
     },
@@ -208,10 +202,7 @@
         "jdk.vm.ci.amd64",
         "jdk.vm.ci.hotspot",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
-      "annotationProcessors" : [
-        "JVMCI_SERVICE_PROCESSOR",
-      ],
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,HotSpot,AMD64",
     },
@@ -223,10 +214,7 @@
         "jdk.vm.ci.sparc",
         "jdk.vm.ci.hotspot",
       ],
-      "checkstyle" : "jdk.vm.ci.service",
-      "annotationProcessors" : [
-        "JVMCI_SERVICE_PROCESSOR",
-      ],
+      "checkstyle" : "jdk.vm.ci.services",
       "javaCompliance" : "1.8",
       "workingSets" : "JVMCI,HotSpot,SPARC",
     },
@@ -241,9 +229,9 @@
 
     # ------------- Distributions -------------
 
-    "JVMCI_SERVICE" : {
+    "JVMCI_SERVICES" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
-      "dependencies" : ["jdk.vm.ci.service"],
+      "dependencies" : ["jdk.vm.ci.services"],
     },
 
     "JVMCI_API" : {
@@ -257,7 +245,7 @@
         "jdk.vm.ci.sparc",
       ],
       "distDependencies" : [
-        "JVMCI_SERVICE",
+        "JVMCI_SERVICES",
       ],
     },
 
@@ -277,7 +265,7 @@
       ],
       "distDependencies" : [
         "JVMCI_HOTSPOTVMCONFIG",
-        "JVMCI_SERVICE",
+        "JVMCI_SERVICES",
         "JVMCI_API",
       ],
     },
@@ -293,28 +281,18 @@
       "exclude" : ["mx:JUNIT"],
     },
 
-
-    "JVMCI_SERVICE_PROCESSOR" : {
-      "subDir" : "src/jdk.vm.ci/share/classes",
-      "dependencies" : ["jdk.vm.ci.service.processor"],
-      "distDependencies" : [
-        "JVMCI_SERVICE",
-      ],
-    },
-
     # This exists to have a monolithic jvmci.jar file which simplifies
     # using the -Xoverride option in JDK9.
     "JVMCI" : {
       "subDir" : "src/jdk.vm.ci/share/classes",
       "overlaps" : [
         "JVMCI_API",
-        "JVMCI_SERVICE",
+        "JVMCI_SERVICES",
         "JVMCI_HOTSPOT",
         "JVMCI_HOTSPOTVMCONFIG",
-        "JVMCI_SERVICE_PROCESSOR",
       ],
       "dependencies" : [
-        "jdk.vm.ci.service",
+        "jdk.vm.ci.services",
         "jdk.vm.ci.inittimer",
         "jdk.vm.ci.runtime",
         "jdk.vm.ci.common",
@@ -325,8 +303,8 @@
         "jdk.vm.ci.hotspot.aarch64",
         "jdk.vm.ci.hotspot.amd64",
         "jdk.vm.ci.hotspot.sparc",
-        "jdk.vm.ci.service.processor"
       ],
+      "exclude" : ["JDK9_STUBS"]
     },
   },
 }
--- a/hotspot/make/aix/Makefile	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/Makefile	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2015 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2015 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/buildtree.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/buildtree.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/compiler2.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/compiler2.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/debug.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/debug.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/defs.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/defs.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2006, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/fastdebug.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/fastdebug.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/jsig.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/jsig.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2005, 2014, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/jvmti.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/jvmti.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/ppc64.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/ppc64.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2004, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2015 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2015 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/product.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/product.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/tiered.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/tiered.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2006, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2015 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2015 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/vm.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/vm.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/aix/makefiles/xlc.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/aix/makefiles/xlc.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
-# Copyright (c) 2012, 2015 SAP. All rights reserved.
+# Copyright (c) 2012, 2015 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/gensrc/Gensrc-jdk.vm.ci.gmk	Wed Jul 05 21:17:06 2017 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,105 +0,0 @@
-#
-# Copyright (c) 2015, Oracle and/or its affiliates. All rights reserved.
-# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
-#
-# This code is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License version 2 only, as
-# published by the Free Software Foundation.  Oracle designates this
-# particular file as subject to the "Classpath" exception as provided
-# by Oracle in the LICENSE file that accompanied this code.
-#
-# This code is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-# version 2 for more details (a copy is included in the LICENSE file that
-# accompanied this code).
-#
-# You should have received a copy of the GNU General Public License version
-# 2 along with this work; if not, write to the Free Software Foundation,
-# Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
-#
-# Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
-# or visit www.oracle.com if you need additional information or have any
-# questions.
-#
-
-default: all
-
-include $(SPEC)
-include MakeBase.gmk
-include JavaCompilation.gmk
-include SetupJavaCompilers.gmk
-
-GENSRC_DIR := $(SUPPORT_OUTPUTDIR)/gensrc/jdk.vm.ci
-SRC_DIR := $(HOTSPOT_TOPDIR)/src/jdk.vm.ci/share/classes
-
-################################################################################
-# Compile the annotation processor
-
-$(eval $(call SetupJavaCompilation, BUILD_JVMCI_SERVICE, \
-    SETUP := GENERATE_OLDBYTECODE, \
-    SRC := $(SRC_DIR)/jdk.vm.ci.service/src \
-        $(SRC_DIR)/jdk.vm.ci.service.processor/src, \
-    BIN := $(BUILDTOOLS_OUTPUTDIR)/jvmci_service, \
-    JAR := $(BUILDTOOLS_OUTPUTDIR)/jdk.vm.ci.service.jar, \
-))
-
-################################################################################
-
-PROC_SRC_SUBDIRS := \
-    jdk.vm.ci.hotspot \
-    jdk.vm.ci.hotspot.aarch64 \
-    jdk.vm.ci.hotspot.amd64 \
-    jdk.vm.ci.hotspot.sparc \
-    jdk.vm.ci.runtime \
-    #
-
-PROC_SRC_DIRS := $(patsubst %, $(SRC_DIR)/%/src, $(PROC_SRC_SUBDIRS))
-
-PROC_SRCS := $(filter %.java, $(call CacheFind, $(PROC_SRC_DIRS)))
-
-ALL_SRC_DIRS := $(wildcard $(SRC_DIR)/*/src)
-SOURCEPATH := $(call PathList, $(ALL_SRC_DIRS))
-PROCESSOR_PATH := $(call PathList, \
-    $(BUILDTOOLS_OUTPUTDIR)/jdk.vm.ci.service.jar)
-
-$(GENSRC_DIR)/_gensrc_proc_done: $(PROC_SRCS) \
-    $(BUILD_JVMCI_SERVICE)
-	$(MKDIR) -p $(@D)
-	$(eval $(call ListPathsSafely,PROC_SRCS,$(@D)/_gensrc_proc_files))
-	$(JAVA_SMALL) $(NEW_JAVAC) \
-	    -XDignore.symbol.file \
-            -bootclasspath $(JDK_OUTPUTDIR)/modules/java.base \
-	    -sourcepath $(SOURCEPATH) \
-	    -implicit:none \
-	    -proc:only \
-	    -processorpath $(PROCESSOR_PATH) \
-	    -d $(GENSRC_DIR) \
-	    -s $(GENSRC_DIR) \
-	    @$(@D)/_gensrc_proc_files
-	$(TOUCH) $@
-
-TARGETS += $(GENSRC_DIR)/_gensrc_proc_done
-
-################################################################################
-
-$(GENSRC_DIR)/_providers_converted: $(GENSRC_DIR)/_gensrc_proc_done
-	$(MKDIR) -p $(GENSRC_DIR)/META-INF/services
-	($(CD) $(GENSRC_DIR)/META-INF/jvmci.providers && \
-	    for i in $$($(LS)); do \
-	      c=$$($(CAT) $$i | $(TR) -d '\n\r'); \
-	      $(ECHO) $$i >> $(GENSRC_DIR)/META-INF/services/$$c.tmp; \
-	    done)
-	($(CD) $(GENSRC_DIR)/META-INF/services && \
-	    for i in $$($(LS) *.tmp); do \
-	      $(MV) $$i $${i%.tmp}; \
-	    done)
-	$(TOUCH) $@
-
-TARGETS += $(GENSRC_DIR)/_providers_converted
-
-################################################################################
-
-all: $(TARGETS)
-
-.PHONY: default all
--- a/hotspot/make/linux/makefiles/ppc64.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/linux/makefiles/ppc64.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2004, 2013, Oracle and/or its affiliates. All rights reserved.
-# Copyright 2012, 2013 SAP AG. All rights reserved.
+# Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
--- a/hotspot/make/share/makefiles/mapfile-vers	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/share/makefiles/mapfile-vers	Thu Jan 28 16:30:37 2016 -0800
@@ -13,6 +13,7 @@
                 JVM_Clone;
                 JVM_ConstantPoolGetClassAt;
                 JVM_ConstantPoolGetClassAtIfLoaded;
+                JVM_ConstantPoolGetClassRefIndexAt;
                 JVM_ConstantPoolGetDoubleAt;
                 JVM_ConstantPoolGetFieldAt;
                 JVM_ConstantPoolGetFieldAtIfLoaded;
@@ -22,8 +23,11 @@
                 JVM_ConstantPoolGetMethodAt;
                 JVM_ConstantPoolGetMethodAtIfLoaded;
                 JVM_ConstantPoolGetMemberRefInfoAt;
+                JVM_ConstantPoolGetNameAndTypeRefInfoAt;
+                JVM_ConstantPoolGetNameAndTypeRefIndexAt;
                 JVM_ConstantPoolGetSize;
                 JVM_ConstantPoolGetStringAt;
+                JVM_ConstantPoolGetTagAt;
                 JVM_ConstantPoolGetUTF8At;
                 JVM_CountStackFrames;
                 JVM_CurrentClassLoader;
--- a/hotspot/make/solaris/makefiles/sparcWorks.make	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/make/solaris/makefiles/sparcWorks.make	Thu Jan 28 16:30:37 2016 -0800
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 1998, 2015, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 1998, 2016, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -48,9 +48,9 @@
 $(shell $(CC) -V 2>&1 | sed -n 's/^.*[ ,\t]C[ ,\t]\([1-9]\.[0-9][0-9]*\).*/\1/p')
 
 # Pick which compiler is validated
-# Validated compiler for JDK9 is SS12.3 (5.12)
-VALIDATED_COMPILER_REVS   := 5.12
-VALIDATED_CC_COMPILER_REVS := 5.12
+# Validated compiler for JDK9 is SS12.4 (5.13)
+VALIDATED_COMPILER_REVS   := 5.13
+VALIDATED_CC_COMPILER_REVS := 5.13
 
 # Warning messages about not using the above validated versions
 ENFORCE_COMPILER_REV${ENFORCE_COMPILER_REV} := $(strip ${VALIDATED_COMPILER_REVS})
--- a/hotspot/src/cpu/aarch64/vm/aarch64.ad	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/aarch64.ad	Thu Jan 28 16:30:37 2016 -0800
@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
 // Copyright (c) 2014, Red Hat Inc. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
@@ -577,7 +577,7 @@
     R26
  /* R27, */                     // heapbase
  /* R28, */                     // thread
-    R29,                        // fp
+ /* R29, */                     // fp
  /* R30, */                     // lr
  /* R31 */                      // sp
 );
@@ -646,7 +646,7 @@
     R26, R26_H,
  /* R27, R27_H, */              // heapbase
  /* R28, R28_H, */              // thread
-    R29, R29_H,                 // fp
+ /* R29, R29_H, */              // fp
  /* R30, R30_H, */              // lr
  /* R31, R31_H */               // sp
 );
@@ -4442,11 +4442,7 @@
 
   enc_class aarch64_enc_mov_byte_map_base(iRegP dst, immByteMapBase src) %{
     MacroAssembler _masm(&cbuf);
-    address page = (address)$src$$constant;
-    Register dst_reg = as_Register($dst$$reg);
-    unsigned long off;
-    __ adrp(dst_reg, ExternalAddress(page), off);
-    assert(off == 0, "assumed offset == 0");
+    __ load_byte_map_base($dst$$Register);
   %}
 
   enc_class aarch64_enc_mov_n(iRegN dst, immN src) %{
@@ -6673,6 +6669,14 @@
 
 //----------PIPELINE-----------------------------------------------------------
 // Rules which define the behavior of the target architectures pipeline.
+
+// For specific pipelines, eg A53, define the stages of that pipeline
+//pipe_desc(ISS, EX1, EX2, WR);
+#define ISS S0
+#define EX1 S1
+#define EX2 S2
+#define WR  S3
+
 // Integer ALU reg operation
 pipeline %{
 
@@ -6707,12 +6711,499 @@
 //----------PIPELINE DESCRIPTION-----------------------------------------------
 // Pipeline Description specifies the stages in the machine's pipeline
 
-pipe_desc(ISS, EX1, EX2, WR);
+// Define the pipeline as a generic 6 stage pipeline
+pipe_desc(S0, S1, S2, S3, S4, S5);
 
 //----------PIPELINE CLASSES---------------------------------------------------
 // Pipeline Classes describe the stages in which input and output are
 // referenced by the hardware pipeline.
 
+pipe_class fp_dop_reg_reg_s(vRegF dst, vRegF src1, vRegF src2)
+%{
+  single_instruction;
+  src1   : S1(read);
+  src2   : S2(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_dop_reg_reg_d(vRegD dst, vRegD src1, vRegD src2)
+%{
+  single_instruction;
+  src1   : S1(read);
+  src2   : S2(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_uop_s(vRegF dst, vRegF src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_uop_d(vRegD dst, vRegD src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_d2f(vRegF dst, vRegD src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_f2d(vRegD dst, vRegF src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_f2i(iRegINoSp dst, vRegF src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_f2l(iRegLNoSp dst, vRegF src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_i2f(vRegF dst, iRegIorL2I src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_l2f(vRegF dst, iRegL src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_d2i(iRegINoSp dst, vRegD src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_d2l(iRegLNoSp dst, vRegD src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_i2d(vRegD dst, iRegIorL2I src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_l2d(vRegD dst, iRegIorL2I src)
+%{
+  single_instruction;
+  src    : S1(read);
+  dst    : S5(write);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_div_s(vRegF dst, vRegF src1, vRegF src2)
+%{
+  single_instruction;
+  src1   : S1(read);
+  src2   : S2(read);
+  dst    : S5(write);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_div_d(vRegD dst, vRegD src1, vRegD src2)
+%{
+  single_instruction;
+  src1   : S1(read);
+  src2   : S2(read);
+  dst    : S5(write);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class fp_cond_reg_reg_s(vRegF dst, vRegF src1, vRegF src2, rFlagsReg cr)
+%{
+  single_instruction;
+  cr     : S1(read);
+  src1   : S1(read);
+  src2   : S1(read);
+  dst    : S3(write);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class fp_cond_reg_reg_d(vRegD dst, vRegD src1, vRegD src2, rFlagsReg cr)
+%{
+  single_instruction;
+  cr     : S1(read);
+  src1   : S1(read);
+  src2   : S1(read);
+  dst    : S3(write);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class fp_imm_s(vRegF dst)
+%{
+  single_instruction;
+  dst    : S3(write);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class fp_imm_d(vRegD dst)
+%{
+  single_instruction;
+  dst    : S3(write);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class fp_load_constant_s(vRegF dst)
+%{
+  single_instruction;
+  dst    : S4(write);
+  INS01  : ISS;
+  NEON_FP : S4;
+%}
+
+pipe_class fp_load_constant_d(vRegD dst)
+%{
+  single_instruction;
+  dst    : S4(write);
+  INS01  : ISS;
+  NEON_FP : S4;
+%}
+
+pipe_class vmul64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vmul128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vmla64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  dst    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vmla128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  dst    : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vdop64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S4(write);
+  src1   : S2(read);
+  src2   : S2(read);
+  INS01  : ISS;
+  NEON_FP : S4;
+%}
+
+pipe_class vdop128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S4(write);
+  src1   : S2(read);
+  src2   : S2(read);
+  INS0   : ISS;
+  NEON_FP : S4;
+%}
+
+pipe_class vlogical64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src1   : S2(read);
+  src2   : S2(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vlogical128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src1   : S2(read);
+  src2   : S2(read);
+  INS0   : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vshift64(vecD dst, vecD src, vecX shift)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  shift  : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vshift128(vecX dst, vecX src, vecX shift)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  shift  : S1(read);
+  INS0   : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vshift64_imm(vecD dst, vecD src, immI shift)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vshift128_imm(vecX dst, vecX src, immI shift)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS0   : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vdop_fp64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vdop_fp128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vmuldiv_fp64(vecD dst, vecD src1, vecD src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vmuldiv_fp128(vecX dst, vecX src1, vecX src2)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src1   : S1(read);
+  src2   : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vsqrt_fp128(vecX dst, vecX src)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src    : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vunop_fp64(vecD dst, vecD src)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vunop_fp128(vecX dst, vecX src)
+%{
+  single_instruction;
+  dst    : S5(write);
+  src    : S1(read);
+  INS0   : ISS;
+  NEON_FP : S5;
+%}
+
+pipe_class vdup_reg_reg64(vecD dst, iRegI src)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vdup_reg_reg128(vecX dst, iRegI src)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vdup_reg_freg64(vecD dst, vRegF src)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vdup_reg_freg128(vecX dst, vRegF src)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vdup_reg_dreg128(vecX dst, vRegD src)
+%{
+  single_instruction;
+  dst    : S3(write);
+  src    : S1(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vmovi_reg_imm64(vecD dst)
+%{
+  single_instruction;
+  dst    : S3(write);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vmovi_reg_imm128(vecX dst)
+%{
+  single_instruction;
+  dst    : S3(write);
+  INS0   : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vload_reg_mem64(vecD dst, vmem mem)
+%{
+  single_instruction;
+  dst    : S5(write);
+  mem    : ISS(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vload_reg_mem128(vecX dst, vmem mem)
+%{
+  single_instruction;
+  dst    : S5(write);
+  mem    : ISS(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vstore_reg_mem64(vecD src, vmem mem)
+%{
+  single_instruction;
+  mem    : ISS(read);
+  src    : S2(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
+pipe_class vstore_reg_mem128(vecD src, vmem mem)
+%{
+  single_instruction;
+  mem    : ISS(read);
+  src    : S2(read);
+  INS01  : ISS;
+  NEON_FP : S3;
+%}
+
 //------- Integer ALU operations --------------------------
 
 // Integer ALU reg-reg operation
@@ -7559,7 +8050,7 @@
     __ fmovs(as_FloatRegister($dst$$reg), (double)$con$$constant);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_imm_s);
 %}
 
 // Load Float Constant
@@ -7577,7 +8068,7 @@
     __ ldrs(as_FloatRegister($dst$$reg), $constantaddress($con));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_load_constant_s);
 %}
 
 // Load Packed Double Constant
@@ -7590,7 +8081,7 @@
     __ fmovd(as_FloatRegister($dst$$reg), $con$$constant);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_imm_d);
 %}
 
 // Load Double Constant
@@ -7607,7 +8098,7 @@
     __ ldrd(as_FloatRegister($dst$$reg), $constantaddress($con));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_load_constant_d);
 %}
 
 // Store Instructions
@@ -9615,7 +10106,7 @@
               cond);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_cond_reg_reg_s);
 %}
 
 instruct cmovUF_reg(cmpOpU cmp, rFlagsRegU cr, vRegF dst, vRegF src1,  vRegF src2)
@@ -9633,7 +10124,7 @@
               cond);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_cond_reg_reg_s);
 %}
 
 instruct cmovD_reg(cmpOp cmp, rFlagsReg cr, vRegD dst, vRegD src1,  vRegD src2)
@@ -9651,7 +10142,7 @@
               cond);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_cond_reg_reg_d);
 %}
 
 instruct cmovUD_reg(cmpOpU cmp, rFlagsRegU cr, vRegD dst, vRegD src1,  vRegD src2)
@@ -9669,7 +10160,7 @@
               cond);
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_cond_reg_reg_d);
 %}
 
 // ============================================================================
@@ -12033,7 +12524,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_s);
 %}
 
 instruct addD_reg_reg(vRegD dst, vRegD src1, vRegD src2) %{
@@ -12048,7 +12539,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_d);
 %}
 
 instruct subF_reg_reg(vRegF dst, vRegF src1, vRegF src2) %{
@@ -12063,7 +12554,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_s);
 %}
 
 instruct subD_reg_reg(vRegD dst, vRegD src1, vRegD src2) %{
@@ -12078,7 +12569,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_d);
 %}
 
 instruct mulF_reg_reg(vRegF dst, vRegF src1, vRegF src2) %{
@@ -12093,7 +12584,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_s);
 %}
 
 instruct mulD_reg_reg(vRegD dst, vRegD src1, vRegD src2) %{
@@ -12108,7 +12599,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_dop_reg_reg_d);
 %}
 
 // We cannot use these fused mul w add/sub ops because they don't
@@ -12256,7 +12747,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_div_s);
 %}
 
 instruct divD_reg_reg(vRegD dst, vRegD src1, vRegD src2) %{
@@ -12271,7 +12762,7 @@
              as_FloatRegister($src2$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_div_d);
 %}
 
 instruct negF_reg_reg(vRegF dst, vRegF src) %{
@@ -12285,7 +12776,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_uop_s);
 %}
 
 instruct negD_reg_reg(vRegD dst, vRegD src) %{
@@ -12299,7 +12790,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_uop_d);
 %}
 
 instruct absF_reg(vRegF dst, vRegF src) %{
@@ -12312,7 +12803,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_uop_s);
 %}
 
 instruct absD_reg(vRegD dst, vRegD src) %{
@@ -12325,7 +12816,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_uop_d);
 %}
 
 instruct sqrtD_reg(vRegD dst, vRegD src) %{
@@ -12338,7 +12829,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_div_s);
 %}
 
 instruct sqrtF_reg(vRegF dst, vRegF src) %{
@@ -12351,7 +12842,7 @@
              as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_div_d);
 %}
 
 // ============================================================================
@@ -12638,7 +13129,7 @@
     __ fcvtd(as_FloatRegister($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_d2f);
 %}
 
 instruct convF2D_reg(vRegD dst, vRegF src) %{
@@ -12651,7 +13142,7 @@
     __ fcvts(as_FloatRegister($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_f2d);
 %}
 
 instruct convF2I_reg_reg(iRegINoSp dst, vRegF src) %{
@@ -12664,7 +13155,7 @@
     __ fcvtzsw(as_Register($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_f2i);
 %}
 
 instruct convF2L_reg_reg(iRegLNoSp dst, vRegF src) %{
@@ -12677,7 +13168,7 @@
     __ fcvtzs(as_Register($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_f2l);
 %}
 
 instruct convI2F_reg_reg(vRegF dst, iRegIorL2I src) %{
@@ -12690,7 +13181,7 @@
     __ scvtfws(as_FloatRegister($dst$$reg), as_Register($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_i2f);
 %}
 
 instruct convL2F_reg_reg(vRegF dst, iRegL src) %{
@@ -12703,7 +13194,7 @@
     __ scvtfs(as_FloatRegister($dst$$reg), as_Register($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_l2f);
 %}
 
 instruct convD2I_reg_reg(iRegINoSp dst, vRegD src) %{
@@ -12716,7 +13207,7 @@
     __ fcvtzdw(as_Register($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_d2i);
 %}
 
 instruct convD2L_reg_reg(iRegLNoSp dst, vRegD src) %{
@@ -12729,7 +13220,7 @@
     __ fcvtzd(as_Register($dst$$reg), as_FloatRegister($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_d2l);
 %}
 
 instruct convI2D_reg_reg(vRegD dst, iRegIorL2I src) %{
@@ -12742,7 +13233,7 @@
     __ scvtfwd(as_FloatRegister($dst$$reg), as_Register($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_i2d);
 %}
 
 instruct convL2D_reg_reg(vRegD dst, iRegL src) %{
@@ -12755,7 +13246,7 @@
     __ scvtfd(as_FloatRegister($dst$$reg), as_Register($src$$reg));
   %}
 
-  ins_pipe(pipe_class_default);
+  ins_pipe(fp_l2d);
 %}
 
 // stack <-> reg and reg <-> reg shuffles with no conversion
@@ -14500,7 +14991,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "ldrs   $dst,$mem\t# vector (32 bits)" %}
   ins_encode( aarch64_enc_ldrvS(dst, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vload_reg_mem64);
 %}
 
 // Load vector (64 bits)
@@ -14511,7 +15002,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "ldrd   $dst,$mem\t# vector (64 bits)" %}
   ins_encode( aarch64_enc_ldrvD(dst, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vload_reg_mem64);
 %}
 
 // Load Vector (128 bits)
@@ -14522,7 +15013,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "ldrq   $dst,$mem\t# vector (128 bits)" %}
   ins_encode( aarch64_enc_ldrvQ(dst, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vload_reg_mem128);
 %}
 
 // Store Vector (32 bits)
@@ -14533,7 +15024,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "strs   $mem,$src\t# vector (32 bits)" %}
   ins_encode( aarch64_enc_strvS(src, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vstore_reg_mem64);
 %}
 
 // Store Vector (64 bits)
@@ -14544,7 +15035,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "strd   $mem,$src\t# vector (64 bits)" %}
   ins_encode( aarch64_enc_strvD(src, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vstore_reg_mem64);
 %}
 
 // Store Vector (128 bits)
@@ -14555,7 +15046,7 @@
   ins_cost(4 * INSN_COST);
   format %{ "strq   $mem,$src\t# vector (128 bits)" %}
   ins_encode( aarch64_enc_strvQ(src, mem) );
-  ins_pipe(pipe_class_memory);
+  ins_pipe(vstore_reg_mem128);
 %}
 
 instruct replicate8B(vecD dst, iRegIorL2I src)
@@ -14568,7 +15059,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T8B, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg64);
 %}
 
 instruct replicate16B(vecX dst, iRegIorL2I src)
@@ -14580,7 +15071,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T16B, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 instruct replicate8B_imm(vecD dst, immI con)
@@ -14593,7 +15084,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T8B, $con$$constant & 0xff);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm64);
 %}
 
 instruct replicate16B_imm(vecX dst, immI con)
@@ -14605,7 +15096,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T16B, $con$$constant & 0xff);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm128);
 %}
 
 instruct replicate4S(vecD dst, iRegIorL2I src)
@@ -14618,7 +15109,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T4H, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg64);
 %}
 
 instruct replicate8S(vecX dst, iRegIorL2I src)
@@ -14630,7 +15121,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T8H, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 instruct replicate4S_imm(vecD dst, immI con)
@@ -14643,7 +15134,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T4H, $con$$constant & 0xffff);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm64);
 %}
 
 instruct replicate8S_imm(vecX dst, immI con)
@@ -14655,7 +15146,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T8H, $con$$constant & 0xffff);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm128);
 %}
 
 instruct replicate2I(vecD dst, iRegIorL2I src)
@@ -14667,7 +15158,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T2S, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg64);
 %}
 
 instruct replicate4I(vecX dst, iRegIorL2I src)
@@ -14679,7 +15170,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T4S, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 instruct replicate2I_imm(vecD dst, immI con)
@@ -14691,7 +15182,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T2S, $con$$constant);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm64);
 %}
 
 instruct replicate4I_imm(vecX dst, immI con)
@@ -14703,7 +15194,7 @@
   ins_encode %{
     __ mov(as_FloatRegister($dst$$reg), __ T4S, $con$$constant);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm128);
 %}
 
 instruct replicate2L(vecX dst, iRegL src)
@@ -14715,7 +15206,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T2D, as_Register($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 instruct replicate2L_zero(vecX dst, immI0 zero)
@@ -14729,7 +15220,7 @@
            as_FloatRegister($dst$$reg),
            as_FloatRegister($dst$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmovi_reg_imm128);
 %}
 
 instruct replicate2F(vecD dst, vRegF src)
@@ -14742,7 +15233,7 @@
     __ dup(as_FloatRegister($dst$$reg), __ T2S,
            as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_freg64);
 %}
 
 instruct replicate4F(vecX dst, vRegF src)
@@ -14755,7 +15246,7 @@
     __ dup(as_FloatRegister($dst$$reg), __ T4S,
            as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_freg128);
 %}
 
 instruct replicate2D(vecX dst, vRegD src)
@@ -14768,7 +15259,7 @@
     __ dup(as_FloatRegister($dst$$reg), __ T2D,
            as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_dreg128);
 %}
 
 // ====================REDUCTION ARITHMETIC====================================
@@ -15014,7 +15505,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vadd16B(vecX dst, vecX src1, vecX src2)
@@ -15028,7 +15519,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vadd4S(vecD dst, vecD src1, vecD src2)
@@ -15043,7 +15534,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vadd8S(vecX dst, vecX src1, vecX src2)
@@ -15057,7 +15548,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vadd2I(vecD dst, vecD src1, vecD src2)
@@ -15071,7 +15562,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vadd4I(vecX dst, vecX src1, vecX src2)
@@ -15085,7 +15576,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vadd2L(vecX dst, vecX src1, vecX src2)
@@ -15099,7 +15590,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vadd2F(vecD dst, vecD src1, vecD src2)
@@ -15113,7 +15604,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp64);
 %}
 
 instruct vadd4F(vecX dst, vecX src1, vecX src2)
@@ -15127,7 +15618,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp128);
 %}
 
 instruct vadd2D(vecX dst, vecX src1, vecX src2)
@@ -15140,7 +15631,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp128);
 %}
 
 // --------------------------------- SUB --------------------------------------
@@ -15157,7 +15648,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vsub16B(vecX dst, vecX src1, vecX src2)
@@ -15171,7 +15662,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vsub4S(vecD dst, vecD src1, vecD src2)
@@ -15186,7 +15677,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vsub8S(vecX dst, vecX src1, vecX src2)
@@ -15200,7 +15691,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vsub2I(vecD dst, vecD src1, vecD src2)
@@ -15214,7 +15705,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop64);
 %}
 
 instruct vsub4I(vecX dst, vecX src1, vecX src2)
@@ -15228,7 +15719,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vsub2L(vecX dst, vecX src1, vecX src2)
@@ -15242,7 +15733,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop128);
 %}
 
 instruct vsub2F(vecD dst, vecD src1, vecD src2)
@@ -15256,7 +15747,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp64);
 %}
 
 instruct vsub4F(vecX dst, vecX src1, vecX src2)
@@ -15270,7 +15761,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp128);
 %}
 
 instruct vsub2D(vecX dst, vecX src1, vecX src2)
@@ -15284,7 +15775,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdop_fp128);
 %}
 
 // --------------------------------- MUL --------------------------------------
@@ -15301,7 +15792,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmul64);
 %}
 
 instruct vmul8S(vecX dst, vecX src1, vecX src2)
@@ -15315,7 +15806,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmul128);
 %}
 
 instruct vmul2I(vecD dst, vecD src1, vecD src2)
@@ -15329,7 +15820,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmul64);
 %}
 
 instruct vmul4I(vecX dst, vecX src1, vecX src2)
@@ -15343,7 +15834,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmul128);
 %}
 
 instruct vmul2F(vecD dst, vecD src1, vecD src2)
@@ -15357,7 +15848,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp64);
 %}
 
 instruct vmul4F(vecX dst, vecX src1, vecX src2)
@@ -15371,7 +15862,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp128);
 %}
 
 instruct vmul2D(vecX dst, vecX src1, vecX src2)
@@ -15385,7 +15876,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp128);
 %}
 
 // --------------------------------- MLA --------------------------------------
@@ -15402,7 +15893,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla64);
 %}
 
 instruct vmla8S(vecX dst, vecX src1, vecX src2)
@@ -15416,7 +15907,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla128);
 %}
 
 instruct vmla2I(vecD dst, vecD src1, vecD src2)
@@ -15430,7 +15921,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla64);
 %}
 
 instruct vmla4I(vecX dst, vecX src1, vecX src2)
@@ -15444,7 +15935,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla128);
 %}
 
 // --------------------------------- MLS --------------------------------------
@@ -15461,7 +15952,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla64);
 %}
 
 instruct vmls8S(vecX dst, vecX src1, vecX src2)
@@ -15475,7 +15966,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla128);
 %}
 
 instruct vmls2I(vecD dst, vecD src1, vecD src2)
@@ -15489,7 +15980,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla64);
 %}
 
 instruct vmls4I(vecX dst, vecX src1, vecX src2)
@@ -15503,7 +15994,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmla128);
 %}
 
 // --------------------------------- DIV --------------------------------------
@@ -15519,7 +16010,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp64);
 %}
 
 instruct vdiv4F(vecX dst, vecX src1, vecX src2)
@@ -15533,7 +16024,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp128);
 %}
 
 instruct vdiv2D(vecX dst, vecX src1, vecX src2)
@@ -15547,7 +16038,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vmuldiv_fp128);
 %}
 
 // --------------------------------- SQRT -------------------------------------
@@ -15561,7 +16052,7 @@
     __ fsqrt(as_FloatRegister($dst$$reg), __ T2D,
              as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vsqrt_fp128);
 %}
 
 // --------------------------------- ABS --------------------------------------
@@ -15576,7 +16067,7 @@
     __ fabs(as_FloatRegister($dst$$reg), __ T2S,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp64);
 %}
 
 instruct vabs4F(vecX dst, vecX src)
@@ -15589,7 +16080,7 @@
     __ fabs(as_FloatRegister($dst$$reg), __ T4S,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp128);
 %}
 
 instruct vabs2D(vecX dst, vecX src)
@@ -15602,7 +16093,7 @@
     __ fabs(as_FloatRegister($dst$$reg), __ T2D,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp128);
 %}
 
 // --------------------------------- NEG --------------------------------------
@@ -15617,7 +16108,7 @@
     __ fneg(as_FloatRegister($dst$$reg), __ T2S,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp64);
 %}
 
 instruct vneg4F(vecX dst, vecX src)
@@ -15630,7 +16121,7 @@
     __ fneg(as_FloatRegister($dst$$reg), __ T4S,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp128);
 %}
 
 instruct vneg2D(vecX dst, vecX src)
@@ -15643,7 +16134,7 @@
     __ fneg(as_FloatRegister($dst$$reg), __ T2D,
             as_FloatRegister($src$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vunop_fp128);
 %}
 
 // --------------------------------- AND --------------------------------------
@@ -15660,7 +16151,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical64);
 %}
 
 instruct vand16B(vecX dst, vecX src1, vecX src2)
@@ -15674,7 +16165,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical128);
 %}
 
 // --------------------------------- OR ---------------------------------------
@@ -15691,7 +16182,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical64);
 %}
 
 instruct vor16B(vecX dst, vecX src1, vecX src2)
@@ -15705,7 +16196,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical128);
 %}
 
 // --------------------------------- XOR --------------------------------------
@@ -15722,7 +16213,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical64);
 %}
 
 instruct vxor16B(vecX dst, vecX src1, vecX src2)
@@ -15736,7 +16227,7 @@
             as_FloatRegister($src1$$reg),
             as_FloatRegister($src2$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vlogical128);
 %}
 
 // ------------------------------ Shift ---------------------------------------
@@ -15747,7 +16238,7 @@
   ins_encode %{
     __ dup(as_FloatRegister($dst$$reg), __ T16B, as_Register($cnt$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 // Right shifts on aarch64 SIMD are implemented as left shift by -ve amount
@@ -15758,7 +16249,7 @@
     __ dup(as_FloatRegister($dst$$reg), __ T16B, as_Register($cnt$$reg));
     __ negr(as_FloatRegister($dst$$reg), __ T16B, as_FloatRegister($dst$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vdup_reg_reg128);
 %}
 
 instruct vsll8B(vecD dst, vecD src, vecX shift) %{
@@ -15773,7 +16264,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64);
 %}
 
 instruct vsll16B(vecX dst, vecX src, vecX shift) %{
@@ -15787,7 +16278,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsrl8B(vecD dst, vecD src, vecX shift) %{
@@ -15801,7 +16292,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64);
 %}
 
 instruct vsrl16B(vecX dst, vecX src, vecX shift) %{
@@ -15814,7 +16305,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsll8B_imm(vecD dst, vecD src, immI shift) %{
@@ -15834,7 +16325,7 @@
              as_FloatRegister($src$$reg), sh);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsll16B_imm(vecX dst, vecX src, immI shift) %{
@@ -15853,7 +16344,7 @@
              as_FloatRegister($src$$reg), sh);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsra8B_imm(vecD dst, vecD src, immI shift) %{
@@ -15869,7 +16360,7 @@
     __ sshr(as_FloatRegister($dst$$reg), __ T8B,
            as_FloatRegister($src$$reg), sh);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsra16B_imm(vecX dst, vecX src, immI shift) %{
@@ -15884,7 +16375,7 @@
     __ sshr(as_FloatRegister($dst$$reg), __ T16B,
            as_FloatRegister($src$$reg), sh);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsrl8B_imm(vecD dst, vecD src, immI shift) %{
@@ -15904,7 +16395,7 @@
              as_FloatRegister($src$$reg), -sh & 7);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsrl16B_imm(vecX dst, vecX src, immI shift) %{
@@ -15923,7 +16414,7 @@
              as_FloatRegister($src$$reg), -sh & 7);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsll4S(vecD dst, vecD src, vecX shift) %{
@@ -15938,7 +16429,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64);
 %}
 
 instruct vsll8S(vecX dst, vecX src, vecX shift) %{
@@ -15952,7 +16443,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsrl4S(vecD dst, vecD src, vecX shift) %{
@@ -15966,7 +16457,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64);
 %}
 
 instruct vsrl8S(vecX dst, vecX src, vecX shift) %{
@@ -15979,7 +16470,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsll4S_imm(vecD dst, vecD src, immI shift) %{
@@ -15999,7 +16490,7 @@
              as_FloatRegister($src$$reg), sh);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsll8S_imm(vecX dst, vecX src, immI shift) %{
@@ -16018,7 +16509,7 @@
              as_FloatRegister($src$$reg), sh);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsra4S_imm(vecD dst, vecD src, immI shift) %{
@@ -16034,7 +16525,7 @@
     __ sshr(as_FloatRegister($dst$$reg), __ T4H,
            as_FloatRegister($src$$reg), sh);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsra8S_imm(vecX dst, vecX src, immI shift) %{
@@ -16049,7 +16540,7 @@
     __ sshr(as_FloatRegister($dst$$reg), __ T8H,
            as_FloatRegister($src$$reg), sh);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsrl4S_imm(vecD dst, vecD src, immI shift) %{
@@ -16069,7 +16560,7 @@
              as_FloatRegister($src$$reg), -sh & 15);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsrl8S_imm(vecX dst, vecX src, immI shift) %{
@@ -16088,7 +16579,7 @@
              as_FloatRegister($src$$reg), -sh & 15);
     }
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsll2I(vecD dst, vecD src, vecX shift) %{
@@ -16102,7 +16593,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsll4I(vecX dst, vecX src, vecX shift) %{
@@ -16116,7 +16607,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsrl2I(vecD dst, vecD src, vecX shift) %{
@@ -16129,7 +16620,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsrl4I(vecX dst, vecX src, vecX shift) %{
@@ -16142,7 +16633,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsll2I_imm(vecD dst, vecD src, immI shift) %{
@@ -16155,7 +16646,7 @@
            as_FloatRegister($src$$reg),
            (int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsll4I_imm(vecX dst, vecX src, immI shift) %{
@@ -16168,7 +16659,7 @@
            as_FloatRegister($src$$reg),
            (int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsra2I_imm(vecD dst, vecD src, immI shift) %{
@@ -16181,7 +16672,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsra4I_imm(vecX dst, vecX src, immI shift) %{
@@ -16194,7 +16685,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsrl2I_imm(vecD dst, vecD src, immI shift) %{
@@ -16207,7 +16698,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift64_imm);
 %}
 
 instruct vsrl4I_imm(vecX dst, vecX src, immI shift) %{
@@ -16220,7 +16711,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 31);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsll2L(vecX dst, vecX src, vecX shift) %{
@@ -16234,7 +16725,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsrl2L(vecX dst, vecX src, vecX shift) %{
@@ -16247,7 +16738,7 @@
             as_FloatRegister($src$$reg),
             as_FloatRegister($shift$$reg));
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsll2L_imm(vecX dst, vecX src, immI shift) %{
@@ -16260,7 +16751,7 @@
            as_FloatRegister($src$$reg),
            (int)$shift$$constant & 63);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128);
 %}
 
 instruct vsra2L_imm(vecX dst, vecX src, immI shift) %{
@@ -16273,7 +16764,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 63);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 instruct vsrl2L_imm(vecX dst, vecX src, immI shift) %{
@@ -16286,7 +16777,7 @@
             as_FloatRegister($src$$reg),
             -(int)$shift$$constant & 63);
   %}
-  ins_pipe(pipe_class_default);
+  ins_pipe(vshift128_imm);
 %}
 
 //----------PEEPHOLE RULES-----------------------------------------------------
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/hotspot/src/cpu/aarch64/vm/abstractInterpreter_aarch64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -0,0 +1,180 @@
+/*
+ * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2014, Red Hat Inc. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+#include "precompiled.hpp"
+#include "interpreter/interpreter.hpp"
+#include "oops/constMethod.hpp"
+#include "oops/method.hpp"
+#include "runtime/frame.inline.hpp"
+#include "utilities/debug.hpp"
+#include "utilities/macros.hpp"
+
+
+int AbstractInterpreter::BasicType_as_index(BasicType type) {
+  int i = 0;
+  switch (type) {
+    case T_BOOLEAN: i = 0; break;
+    case T_CHAR   : i = 1; break;
+    case T_BYTE   : i = 2; break;
+    case T_SHORT  : i = 3; break;
+    case T_INT    : i = 4; break;
+    case T_LONG   : i = 5; break;
+    case T_VOID   : i = 6; break;
+    case T_FLOAT  : i = 7; break;
+    case T_DOUBLE : i = 8; break;
+    case T_OBJECT : i = 9; break;
+    case T_ARRAY  : i = 9; break;
+    default       : ShouldNotReachHere();
+  }
+  assert(0 <= i && i < AbstractInterpreter::number_of_result_handlers,
+         "index out of bounds");
+  return i;
+}
+
+// These should never be compiled since the interpreter will prefer
+// the compiled version to the intrinsic version.
+bool AbstractInterpreter::can_be_compiled(methodHandle m) {
+  switch (method_kind(m)) {
+    case Interpreter::java_lang_math_sin     : // fall thru
+    case Interpreter::java_lang_math_cos     : // fall thru
+    case Interpreter::java_lang_math_tan     : // fall thru
+    case Interpreter::java_lang_math_abs     : // fall thru
+    case Interpreter::java_lang_math_log     : // fall thru
+    case Interpreter::java_lang_math_log10   : // fall thru
+    case Interpreter::java_lang_math_sqrt    : // fall thru
+    case Interpreter::java_lang_math_pow     : // fall thru
+    case Interpreter::java_lang_math_exp     :
+      return false;
+    default:
+      return true;
+  }
+}
+
+// How much stack a method activation needs in words.
+int AbstractInterpreter::size_top_interpreter_activation(Method* method) {
+  const int entry_size = frame::interpreter_frame_monitor_size();
+
+  // total overhead size: entry_size + (saved rfp thru expr stack
+  // bottom).  be sure to change this if you add/subtract anything
+  // to/from the overhead area
+  const int overhead_size =
+    -(frame::interpreter_frame_initial_sp_offset) + entry_size;
+
+  const int stub_code = frame::entry_frame_after_call_words;
+  const int method_stack = (method->max_locals() + method->max_stack()) *
+                           Interpreter::stackElementWords;
+  return (overhead_size + method_stack + stub_code);
+}
+
+// asm based interpreter deoptimization helpers
+int AbstractInterpreter::size_activation(int max_stack,
+                                         int temps,
+                                         int extra_args,
+                                         int monitors,
+                                         int callee_params,
+                                         int callee_locals,
+                                         bool is_top_frame) {
+  // Note: This calculation must exactly parallel the frame setup
+  // in TemplateInterpreterGenerator::generate_method_entry.
+
+  // fixed size of an interpreter frame:
+  int overhead = frame::sender_sp_offset -
+                 frame::interpreter_frame_initial_sp_offset;
+  // Our locals were accounted for by the caller (or last_frame_adjust
+  // on the transistion) Since the callee parameters already account
+  // for the callee's params we only need to account for the extra
+  // locals.
+  int size = overhead +
+         (callee_locals - callee_params)*Interpreter::stackElementWords +
+         monitors * frame::interpreter_frame_monitor_size() +
+         temps* Interpreter::stackElementWords + extra_args;
+
+  // On AArch64 we always keep the stack pointer 16-aligned, so we
+  // must round up here.
+  size = round_to(size, 2);
+
+  return size;
+}
+
+void AbstractInterpreter::layout_activation(Method* method,
+                                            int tempcount,
+                                            int popframe_extra_args,
+                                            int moncount,
+                                            int caller_actual_parameters,
+                                            int callee_param_count,
+                                            int callee_locals,
+                                            frame* caller,
+                                            frame* interpreter_frame,
+                                            bool is_top_frame,
+                                            bool is_bottom_frame) {
+  // The frame interpreter_frame is guaranteed to be the right size,
+  // as determined by a previous call to the size_activation() method.
+  // It is also guaranteed to be walkable even though it is in a
+  // skeletal state
+
+  int max_locals = method->max_locals() * Interpreter::stackElementWords;
+  int extra_locals = (method->max_locals() - method->size_of_parameters()) *
+    Interpreter::stackElementWords;
+
+#ifdef ASSERT
+  assert(caller->sp() == interpreter_frame->sender_sp(), "Frame not properly walkable");
+#endif
+
+  interpreter_frame->interpreter_frame_set_method(method);
+  // NOTE the difference in using sender_sp and
+  // interpreter_frame_sender_sp interpreter_frame_sender_sp is
+  // the original sp of the caller (the unextended_sp) and
+  // sender_sp is fp+8/16 (32bit/64bit) XXX
+  intptr_t* locals = interpreter_frame->sender_sp() + max_locals - 1;
+
+#ifdef ASSERT
+  if (caller->is_interpreted_frame()) {
+    assert(locals < caller->fp() + frame::interpreter_frame_initial_sp_offset, "bad placement");
+  }
+#endif
+
+  interpreter_frame->interpreter_frame_set_locals(locals);
+  BasicObjectLock* montop = interpreter_frame->interpreter_frame_monitor_begin();
+  BasicObjectLock* monbot = montop - moncount;
+  interpreter_frame->interpreter_frame_set_monitor_end(monbot);
+
+  // Set last_sp
+  intptr_t*  esp = (intptr_t*) monbot -
+    tempcount*Interpreter::stackElementWords -
+    popframe_extra_args;
+  interpreter_frame->interpreter_frame_set_last_sp(esp);
+
+  // All frames but the initial (oldest) interpreter frame we fill in have
+  // a value for sender_sp that allows walking the stack but isn't
+  // truly correct. Correct the value here.
+  if (extra_locals != 0 &&
+      interpreter_frame->sender_sp() ==
+      interpreter_frame->interpreter_frame_sender_sp()) {
+    interpreter_frame->set_interpreter_frame_sender_sp(caller->sp() +
+                                                       extra_locals);
+  }
+  *interpreter_frame->interpreter_frame_cache_addr() =
+    method->constants()->cache();
+}
--- a/hotspot/src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/c1_CodeStubs_aarch64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -256,6 +256,7 @@
 
 void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
   __ bind(_entry);
+  ce->store_parameter(_trap_request, 0);
   __ far_call(RuntimeAddress(Runtime1::entry_for(Runtime1::deoptimize_id)));
   ce->add_call_info_here(_info);
   DEBUG_ONLY(__ should_not_reach_here());
--- a/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -3169,7 +3169,8 @@
       Register obj = as_reg(data);
       Register dst = as_reg(dest);
       if (is_oop && UseCompressedOops) {
-        __ encode_heap_oop(obj);
+        __ encode_heap_oop(rscratch1, obj);
+        obj = rscratch1;
       }
       assert_different_registers(obj, addr.base(), tmp, rscratch2, dst);
       Label again;
--- a/hotspot/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1066,7 +1066,9 @@
       {
         StubFrame f(sasm, "deoptimize", dont_gc_arguments);
         OopMap* oop_map = save_live_registers(sasm);
-        int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize));
+        f.load_argument(0, c_rarg1);
+        int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), c_rarg1);
+
         oop_maps = new OopMapSet();
         oop_maps->add_gc_map(call_offset, oop_map);
         restore_live_registers(sasm);
@@ -1148,9 +1150,6 @@
 
 #if INCLUDE_ALL_GCS
 
-// Registers to be saved around calls to g1_wb_pre or g1_wb_post
-#define G1_SAVE_REGS (RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2))
-
     case g1_pre_barrier_slow_id:
       {
         StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments);
@@ -1192,10 +1191,10 @@
         __ b(done);
 
         __ bind(runtime);
-        __ push(G1_SAVE_REGS, sp);
+        __ push_call_clobbered_registers();
         f.load_argument(0, pre_val);
         __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), pre_val, thread);
-        __ pop(G1_SAVE_REGS, sp);
+        __ pop_call_clobbered_registers();
         __ bind(done);
       }
       break;
@@ -1223,45 +1222,49 @@
         Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() +
                                         DirtyCardQueue::byte_offset_of_buf()));
 
-        const Register card_addr = rscratch2;
-        ExternalAddress cardtable((address) ct->byte_map_base);
+        const Register card_offset = rscratch2;
+        // LR is free here, so we can use it to hold the byte_map_base.
+        const Register byte_map_base = lr;
 
-        f.load_argument(0, card_addr);
-        __ lsr(card_addr, card_addr, CardTableModRefBS::card_shift);
-        unsigned long offset;
-        __ adrp(rscratch1, cardtable, offset);
-        __ add(card_addr, card_addr, rscratch1);
-        __ ldrb(rscratch1, Address(card_addr, offset));
+        assert_different_registers(card_offset, byte_map_base, rscratch1);
+
+        f.load_argument(0, card_offset);
+        __ lsr(card_offset, card_offset, CardTableModRefBS::card_shift);
+        __ load_byte_map_base(byte_map_base);
+        __ ldrb(rscratch1, Address(byte_map_base, card_offset));
         __ cmpw(rscratch1, (int)G1SATBCardTableModRefBS::g1_young_card_val());
         __ br(Assembler::EQ, done);
 
         assert((int)CardTableModRefBS::dirty_card_val() == 0, "must be 0");
 
         __ membar(Assembler::StoreLoad);
-        __ ldrb(rscratch1, Address(card_addr, offset));
+        __ ldrb(rscratch1, Address(byte_map_base, card_offset));
         __ cbzw(rscratch1, done);
 
         // storing region crossing non-NULL, card is clean.
         // dirty card and log.
-        __ strb(zr, Address(card_addr, offset));
+        __ strb(zr, Address(byte_map_base, card_offset));
+
+        // Convert card offset into an address in card_addr
+        Register card_addr = card_offset;
+        __ add(card_addr, byte_map_base, card_addr);
 
         __ ldr(rscratch1, queue_index);
         __ cbz(rscratch1, runtime);
         __ sub(rscratch1, rscratch1, wordSize);
         __ str(rscratch1, queue_index);
 
-        const Register buffer_addr = r0;
+        // Reuse LR to hold buffer_addr
+        const Register buffer_addr = lr;
 
-        __ push(RegSet::of(r0, r1), sp);
         __ ldr(buffer_addr, buffer);
         __ str(card_addr, Address(buffer_addr, rscratch1));
-        __ pop(RegSet::of(r0, r1), sp);
         __ b(done);
 
         __ bind(runtime);
-        __ push(G1_SAVE_REGS, sp);
+        __ push_call_clobbered_registers();
         __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread);
-        __ pop(G1_SAVE_REGS, sp);
+        __ pop_call_clobbered_registers();
         __ bind(done);
 
       }
--- a/hotspot/src/cpu/aarch64/vm/interpreter_aarch64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,261 +0,0 @@
-/*
- * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2014, Red Hat Inc. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- *
- */
-
-#include "precompiled.hpp"
-#include "asm/macroAssembler.hpp"
-#include "interpreter/bytecodeHistogram.hpp"
-#include "interpreter/interpreter.hpp"
-#include "interpreter/interpreterRuntime.hpp"
-#include "interpreter/interp_masm.hpp"
-#include "interpreter/templateInterpreterGenerator.hpp"
-#include "interpreter/templateTable.hpp"
-#include "oops/arrayOop.hpp"
-#include "oops/methodData.hpp"
-#include "oops/method.hpp"
-#include "oops/oop.inline.hpp"
-#include "prims/jvmtiExport.hpp"
-#include "prims/jvmtiThreadState.hpp"
-#include "prims/methodHandles.hpp"
-#include "runtime/arguments.hpp"
-#include "runtime/frame.inline.hpp"
-#include "runtime/sharedRuntime.hpp"
-#include "runtime/stubRoutines.hpp"
-#include "runtime/synchronizer.hpp"
-#include "runtime/timer.hpp"
-#include "runtime/vframeArray.hpp"
-#include "utilities/debug.hpp"
-#ifdef COMPILER1
-#include "c1/c1_Runtime1.hpp"
-#endif
-
-#define __ _masm->
-
-
-address AbstractInterpreterGenerator::generate_slow_signature_handler() {
-  address entry = __ pc();
-
-  __ andr(esp, esp, -16);
-  __ mov(c_rarg3, esp);
-  // rmethod
-  // rlocals
-  // c_rarg3: first stack arg - wordSize
-
-  // adjust sp
-  __ sub(sp, c_rarg3, 18 * wordSize);
-  __ str(lr, Address(__ pre(sp, -2 * wordSize)));
-  __ call_VM(noreg,
-             CAST_FROM_FN_PTR(address,
-                              InterpreterRuntime::slow_signature_handler),
-             rmethod, rlocals, c_rarg3);
-
-  // r0: result handler
-
-  // Stack layout:
-  // rsp: return address           <- sp
-  //      1 garbage
-  //      8 integer args (if static first is unused)
-  //      1 float/double identifiers
-  //      8 double args
-  //        stack args              <- esp
-  //        garbage
-  //        expression stack bottom
-  //        bcp (NULL)
-  //        ...
-
-  // Restore LR
-  __ ldr(lr, Address(__ post(sp, 2 * wordSize)));
-
-  // Do FP first so we can use c_rarg3 as temp
-  __ ldrw(c_rarg3, Address(sp, 9 * wordSize)); // float/double identifiers
-
-  for (int i = 0; i < Argument::n_float_register_parameters_c; i++) {
-    const FloatRegister r = as_FloatRegister(i);
-
-    Label d, done;
-
-    __ tbnz(c_rarg3, i, d);
-    __ ldrs(r, Address(sp, (10 + i) * wordSize));
-    __ b(done);
-    __ bind(d);
-    __ ldrd(r, Address(sp, (10 + i) * wordSize));
-    __ bind(done);
-  }
-
-  // c_rarg0 contains the result from the call of
-  // InterpreterRuntime::slow_signature_handler so we don't touch it
-  // here.  It will be loaded with the JNIEnv* later.
-  __ ldr(c_rarg1, Address(sp, 1 * wordSize));
-  for (int i = c_rarg2->encoding(); i <= c_rarg7->encoding(); i += 2) {
-    Register rm = as_Register(i), rn = as_Register(i+1);
-    __ ldp(rm, rn, Address(sp, i * wordSize));
-  }
-
-  __ add(sp, sp, 18 * wordSize);
-  __ ret(lr);
-
-  return entry;
-}
-
-
-//
-// Various method entries
-//
-
-address TemplateInterpreterGenerator::generate_math_entry(AbstractInterpreter::MethodKind kind) {
-  // rmethod: Method*
-  // r13: sender sp
-  // esp: args
-
-  if (!InlineIntrinsics) return NULL; // Generate a vanilla entry
-
-  // These don't need a safepoint check because they aren't virtually
-  // callable. We won't enter these intrinsics from compiled code.
-  // If in the future we added an intrinsic which was virtually callable
-  // we'd have to worry about how to safepoint so that this code is used.
-
-  // mathematical functions inlined by compiler
-  // (interpreter must provide identical implementation
-  // in order to avoid monotonicity bugs when switching
-  // from interpreter to compiler in the middle of some
-  // computation)
-  //
-  // stack:
-  //        [ arg ] <-- esp
-  //        [ arg ]
-  // retaddr in lr
-
-  address entry_point = NULL;
-  Register continuation = lr;
-  switch (kind) {
-  case Interpreter::java_lang_math_abs:
-    entry_point = __ pc();
-    __ ldrd(v0, Address(esp));
-    __ fabsd(v0, v0);
-    __ mov(sp, r13); // Restore caller's SP
-    break;
-  case Interpreter::java_lang_math_sqrt:
-    entry_point = __ pc();
-    __ ldrd(v0, Address(esp));
-    __ fsqrtd(v0, v0);
-    __ mov(sp, r13);
-    break;
-  case Interpreter::java_lang_math_sin :
-  case Interpreter::java_lang_math_cos :
-  case Interpreter::java_lang_math_tan :
-  case Interpreter::java_lang_math_log :
-  case Interpreter::java_lang_math_log10 :
-  case Interpreter::java_lang_math_exp :
-    entry_point = __ pc();
-    __ ldrd(v0, Address(esp));
-    __ mov(sp, r13);
-    __ mov(r19, lr);
-    continuation = r19;  // The first callee-saved register
-    generate_transcendental_entry(kind, 1);
-    break;
-  case Interpreter::java_lang_math_pow :
-    entry_point = __ pc();
-    __ mov(r19, lr);
-    continuation = r19;
-    __ ldrd(v0, Address(esp, 2 * Interpreter::stackElementSize));
-    __ ldrd(v1, Address(esp));
-    __ mov(sp, r13);
-    generate_transcendental_entry(kind, 2);
-    break;
-  default:
-    ;
-  }
-  if (entry_point) {
-    __ br(continuation);
-  }
-
-  return entry_point;
-}
-
-  // double trigonometrics and transcendentals
-  // static jdouble dsin(jdouble x);
-  // static jdouble dcos(jdouble x);
-  // static jdouble dtan(jdouble x);
-  // static jdouble dlog(jdouble x);
-  // static jdouble dlog10(jdouble x);
-  // static jdouble dexp(jdouble x);
-  // static jdouble dpow(jdouble x, jdouble y);
-
-void TemplateInterpreterGenerator::generate_transcendental_entry(AbstractInterpreter::MethodKind kind, int fpargs) {
-  address fn;
-  switch (kind) {
-  case Interpreter::java_lang_math_sin :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
-    break;
-  case Interpreter::java_lang_math_cos :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
-    break;
-  case Interpreter::java_lang_math_tan :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
-    break;
-  case Interpreter::java_lang_math_log :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
-    break;
-  case Interpreter::java_lang_math_log10 :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
-    break;
-  case Interpreter::java_lang_math_exp :
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
-    break;
-  case Interpreter::java_lang_math_pow :
-    fpargs = 2;
-    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
-    break;
-  default:
-    ShouldNotReachHere();
-    fn = NULL;  // unreachable
-  }
-  const int gpargs = 0, rtype = 3;
-  __ mov(rscratch1, fn);
-  __ blrt(rscratch1, gpargs, fpargs, rtype);
-}
-
-// Abstract method entry
-// Attempt to execute abstract method. Throw exception
-address TemplateInterpreterGenerator::generate_abstract_entry(void) {
-  // rmethod: Method*
-  // r13: sender SP
-
-  address entry_point = __ pc();
-
-  // abstract method entry
-
-  //  pop return address, reset last_sp to NULL
-  __ empty_expression_stack();
-  __ restore_bcp();      // bcp must be correct for exception handler   (was destroyed)
-  __ restore_locals();   // make sure locals pointer is correct as well (was destroyed)
-
-  // throw exception
-  __ call_VM(noreg, CAST_FROM_FN_PTR(address,
-                             InterpreterRuntime::throw_AbstractMethodError));
-  // the call_VM checks for exception, so we should never return here.
-  __ should_not_reach_here();
-
-  return entry_point;
-}
--- a/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -2301,6 +2301,30 @@
 }
 #endif
 
+void MacroAssembler::push_call_clobbered_registers() {
+  push(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
+
+  // Push v0-v7, v16-v31.
+  for (int i = 30; i >= 0; i -= 2) {
+    if (i <= v7->encoding() || i >= v16->encoding()) {
+        stpd(as_FloatRegister(i), as_FloatRegister(i+1),
+             Address(pre(sp, -2 * wordSize)));
+    }
+  }
+}
+
+void MacroAssembler::pop_call_clobbered_registers() {
+
+  for (int i = 0; i < 32; i += 2) {
+    if (i <= v7->encoding() || i >= v16->encoding()) {
+      ldpd(as_FloatRegister(i), as_FloatRegister(i+1),
+           Address(post(sp, 2 * wordSize)));
+    }
+  }
+
+  pop(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
+}
+
 void MacroAssembler::push_CPU_state(bool save_vectors) {
   push(0x3fffffff, sp);         // integer registers except lr & sp
 
@@ -3099,12 +3123,7 @@
 
   assert(CardTableModRefBS::dirty_card_val() == 0, "must be");
 
-  {
-    ExternalAddress cardtable((address) ct->byte_map_base);
-    unsigned long offset;
-    adrp(rscratch1, cardtable, offset);
-    assert(offset == 0, "byte_map_base is misaligned");
-  }
+  load_byte_map_base(rscratch1);
 
   if (UseCondCardMark) {
     Label L_already_dirty;
@@ -3596,12 +3615,10 @@
 
   lsr(card_addr, store_addr, CardTableModRefBS::card_shift);
 
-  unsigned long offset;
-  adrp(tmp2, cardtable, offset);
-
   // get the address of the card
+  load_byte_map_base(tmp2);
   add(card_addr, card_addr, tmp2);
-  ldrb(tmp2, Address(card_addr, offset));
+  ldrb(tmp2, Address(card_addr));
   cmpw(tmp2, (int)G1SATBCardTableModRefBS::g1_young_card_val());
   br(Assembler::EQ, done);
 
@@ -3609,13 +3626,13 @@
 
   membar(Assembler::StoreLoad);
 
-  ldrb(tmp2, Address(card_addr, offset));
+  ldrb(tmp2, Address(card_addr));
   cbzw(tmp2, done);
 
   // storing a region crossing, non-NULL oop, card is clean.
   // dirty card and log.
 
-  strb(zr, Address(card_addr, offset));
+  strb(zr, Address(card_addr));
 
   ldr(rscratch1, queue_index);
   cbz(rscratch1, runtime);
@@ -3938,7 +3955,7 @@
   // was post-decremented.)  Skip this address by starting at i=1, and
   // touch a few more pages below.  N.B.  It is important to touch all
   // the way down to and including i=StackShadowPages.
-  for (int i = 0; i < (JavaThread::stack_shadow_zone_size() / os::vm_page_size()) - 1; i++) {
+  for (int i = 0; i < (int)(JavaThread::stack_shadow_zone_size() / os::vm_page_size()) - 1; i++) {
     // this could be any sized move but this is can be a debugging crumb
     // so the bigger the better.
     lea(tmp, Address(tmp, -os::vm_page_size()));
@@ -3971,6 +3988,9 @@
   long offset_low = dest_page - low_page;
   long offset_high = dest_page - high_page;
 
+  assert(is_valid_AArch64_address(dest.target()), "bad address");
+  assert(dest.getMode() == Address::literal, "ADRP must be applied to a literal address");
+
   InstructionMark im(this);
   code_section()->relocate(inst_mark(), dest.rspec());
   // 8143067: Ensure that the adrp can reach the dest from anywhere within
@@ -3982,11 +4002,26 @@
     long offset = dest_page - pc_page;
     offset = (offset & ((1<<20)-1)) << 12;
     _adrp(reg1, pc()+offset);
-    movk(reg1, ((unsigned long)dest.target() >> 32) & 0xffff, 32);
+    movk(reg1, (unsigned long)dest.target() >> 32, 32);
   }
   byte_offset = (unsigned long)dest.target() & 0xfff;
 }
 
+void MacroAssembler::load_byte_map_base(Register reg) {
+  jbyte *byte_map_base =
+    ((CardTableModRefBS*)(Universe::heap()->barrier_set()))->byte_map_base;
+
+  if (is_valid_AArch64_address((address)byte_map_base)) {
+    // Strictly speaking the byte_map_base isn't an address at all,
+    // and it might even be negative.
+    unsigned long offset;
+    adrp(reg, ExternalAddress((address)byte_map_base), offset);
+    assert(offset == 0, "misaligned card table base");
+  } else {
+    mov(reg, (uint64_t)byte_map_base);
+  }
+}
+
 void MacroAssembler::build_frame(int framesize) {
   assert(framesize > 0, "framesize must be > 0");
   if (framesize < ((1 << 9) + 2 * wordSize)) {
--- a/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -437,6 +437,13 @@
   void push(RegSet regs, Register stack) { if (regs.bits()) push(regs.bits(), stack); }
   void pop(RegSet regs, Register stack) { if (regs.bits()) pop(regs.bits(), stack); }
 
+  // Push and pop everything that might be clobbered by a native
+  // runtime call except rscratch1 and rscratch2.  (They are always
+  // scratch, so we don't have to protect them.)  Only save the lower
+  // 64 bits of each vector register.
+  void push_call_clobbered_registers();
+  void pop_call_clobbered_registers();
+
   // now mov instructions for loading absolute addresses and 32 or
   // 64 bit integers
 
@@ -1116,6 +1123,15 @@
   // of your data.
   Address form_address(Register Rd, Register base, long byte_offset, int shift);
 
+  // Return true iff an address is within the 48-bit AArch64 address
+  // space.
+  bool is_valid_AArch64_address(address a) {
+    return ((uint64_t)a >> 48) == 0;
+  }
+
+  // Load the base of the cardtable byte map into reg.
+  void load_byte_map_base(Register reg);
+
   // Prolog generator routines to support switch between x86 code and
   // generated ARM code
 
--- a/hotspot/src/cpu/aarch64/vm/relocInfo_aarch64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/relocInfo_aarch64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -87,7 +87,6 @@
       return;
     }
   }
-  assert(addr() != x, "call instruction in an infinite loop");
   MacroAssembler::pd_patch_instruction(addr(), x);
   assert(pd_call_destination(addr()) == x, "fail in reloc");
 }
--- a/hotspot/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/sharedRuntime_aarch64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1090,7 +1090,7 @@
 }
 
 
-// Check GC_locker::needs_gc and enter the runtime if it's true.  This
+// Check GCLocker::needs_gc and enter the runtime if it's true.  This
 // keeps a new JNI critical region from starting until a GC has been
 // forced.  Save down any oops in registers and describe them in an
 // OopMap.
@@ -1272,14 +1272,14 @@
 // GetPrimtiveArrayCritical and disallow the use of any other JNI
 // functions.  The wrapper is expected to unpack the arguments before
 // passing them to the callee and perform checks before and after the
-// native call to ensure that they GC_locker
+// native call to ensure that they GCLocker
 // lock_critical/unlock_critical semantics are followed.  Some other
 // parts of JNI setup are skipped like the tear down of the JNI handle
 // block and the check for pending exceptions it's impossible for them
 // to be thrown.
 //
 // They are roughly structured like this:
-//    if (GC_locker::needs_gc())
+//    if (GCLocker::needs_gc())
 //      SharedRuntime::block_for_jni_critical();
 //    tranistion to thread_in_native
 //    unpack arrray arguments and call native entry point
--- a/hotspot/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -744,7 +744,7 @@
            __ sub(end, end, start); // number of bytes to copy
 
           const Register count = end; // 'end' register contains bytes count now
-          __ mov(scratch, (address)ct->byte_map_base);
+          __ load_byte_map_base(scratch);
           __ add(start, start, scratch);
           if (UseConcMarkSweepGC) {
             __ membar(__ StoreStore);
--- a/hotspot/src/cpu/aarch64/vm/templateInterpreterGenerator_aarch64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/templateInterpreterGenerator_aarch64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -57,6 +57,13 @@
 #include "../../../../../../simulator/simulator.hpp"
 #endif
 
+// Size of interpreter code.  Increase if too small.  Interpreter will
+// fail with a guarantee ("not enough space for interpreter generation");
+// if too small.
+// Run with +PrintInterpreter to get the VM to print out the size.
+// Max size with JVMTI
+int TemplateInterpreter::InterpreterCodeSize = 200 * 1024;
+
 #define __ _masm->
 
 //-----------------------------------------------------------------------------
@@ -65,6 +72,213 @@
 
 //-----------------------------------------------------------------------------
 
+address TemplateInterpreterGenerator::generate_slow_signature_handler() {
+  address entry = __ pc();
+
+  __ andr(esp, esp, -16);
+  __ mov(c_rarg3, esp);
+  // rmethod
+  // rlocals
+  // c_rarg3: first stack arg - wordSize
+
+  // adjust sp
+  __ sub(sp, c_rarg3, 18 * wordSize);
+  __ str(lr, Address(__ pre(sp, -2 * wordSize)));
+  __ call_VM(noreg,
+             CAST_FROM_FN_PTR(address,
+                              InterpreterRuntime::slow_signature_handler),
+             rmethod, rlocals, c_rarg3);
+
+  // r0: result handler
+
+  // Stack layout:
+  // rsp: return address           <- sp
+  //      1 garbage
+  //      8 integer args (if static first is unused)
+  //      1 float/double identifiers
+  //      8 double args
+  //        stack args              <- esp
+  //        garbage
+  //        expression stack bottom
+  //        bcp (NULL)
+  //        ...
+
+  // Restore LR
+  __ ldr(lr, Address(__ post(sp, 2 * wordSize)));
+
+  // Do FP first so we can use c_rarg3 as temp
+  __ ldrw(c_rarg3, Address(sp, 9 * wordSize)); // float/double identifiers
+
+  for (int i = 0; i < Argument::n_float_register_parameters_c; i++) {
+    const FloatRegister r = as_FloatRegister(i);
+
+    Label d, done;
+
+    __ tbnz(c_rarg3, i, d);
+    __ ldrs(r, Address(sp, (10 + i) * wordSize));
+    __ b(done);
+    __ bind(d);
+    __ ldrd(r, Address(sp, (10 + i) * wordSize));
+    __ bind(done);
+  }
+
+  // c_rarg0 contains the result from the call of
+  // InterpreterRuntime::slow_signature_handler so we don't touch it
+  // here.  It will be loaded with the JNIEnv* later.
+  __ ldr(c_rarg1, Address(sp, 1 * wordSize));
+  for (int i = c_rarg2->encoding(); i <= c_rarg7->encoding(); i += 2) {
+    Register rm = as_Register(i), rn = as_Register(i+1);
+    __ ldp(rm, rn, Address(sp, i * wordSize));
+  }
+
+  __ add(sp, sp, 18 * wordSize);
+  __ ret(lr);
+
+  return entry;
+}
+
+
+//
+// Various method entries
+//
+
+address TemplateInterpreterGenerator::generate_math_entry(AbstractInterpreter::MethodKind kind) {
+  // rmethod: Method*
+  // r13: sender sp
+  // esp: args
+
+  if (!InlineIntrinsics) return NULL; // Generate a vanilla entry
+
+  // These don't need a safepoint check because they aren't virtually
+  // callable. We won't enter these intrinsics from compiled code.
+  // If in the future we added an intrinsic which was virtually callable
+  // we'd have to worry about how to safepoint so that this code is used.
+
+  // mathematical functions inlined by compiler
+  // (interpreter must provide identical implementation
+  // in order to avoid monotonicity bugs when switching
+  // from interpreter to compiler in the middle of some
+  // computation)
+  //
+  // stack:
+  //        [ arg ] <-- esp
+  //        [ arg ]
+  // retaddr in lr
+
+  address entry_point = NULL;
+  Register continuation = lr;
+  switch (kind) {
+  case Interpreter::java_lang_math_abs:
+    entry_point = __ pc();
+    __ ldrd(v0, Address(esp));
+    __ fabsd(v0, v0);
+    __ mov(sp, r13); // Restore caller's SP
+    break;
+  case Interpreter::java_lang_math_sqrt:
+    entry_point = __ pc();
+    __ ldrd(v0, Address(esp));
+    __ fsqrtd(v0, v0);
+    __ mov(sp, r13);
+    break;
+  case Interpreter::java_lang_math_sin :
+  case Interpreter::java_lang_math_cos :
+  case Interpreter::java_lang_math_tan :
+  case Interpreter::java_lang_math_log :
+  case Interpreter::java_lang_math_log10 :
+  case Interpreter::java_lang_math_exp :
+    entry_point = __ pc();
+    __ ldrd(v0, Address(esp));
+    __ mov(sp, r13);
+    __ mov(r19, lr);
+    continuation = r19;  // The first callee-saved register
+    generate_transcendental_entry(kind, 1);
+    break;
+  case Interpreter::java_lang_math_pow :
+    entry_point = __ pc();
+    __ mov(r19, lr);
+    continuation = r19;
+    __ ldrd(v0, Address(esp, 2 * Interpreter::stackElementSize));
+    __ ldrd(v1, Address(esp));
+    __ mov(sp, r13);
+    generate_transcendental_entry(kind, 2);
+    break;
+  default:
+    ;
+  }
+  if (entry_point) {
+    __ br(continuation);
+  }
+
+  return entry_point;
+}
+
+  // double trigonometrics and transcendentals
+  // static jdouble dsin(jdouble x);
+  // static jdouble dcos(jdouble x);
+  // static jdouble dtan(jdouble x);
+  // static jdouble dlog(jdouble x);
+  // static jdouble dlog10(jdouble x);
+  // static jdouble dexp(jdouble x);
+  // static jdouble dpow(jdouble x, jdouble y);
+
+void TemplateInterpreterGenerator::generate_transcendental_entry(AbstractInterpreter::MethodKind kind, int fpargs) {
+  address fn;
+  switch (kind) {
+  case Interpreter::java_lang_math_sin :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
+    break;
+  case Interpreter::java_lang_math_cos :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
+    break;
+  case Interpreter::java_lang_math_tan :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
+    break;
+  case Interpreter::java_lang_math_log :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
+    break;
+  case Interpreter::java_lang_math_log10 :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
+    break;
+  case Interpreter::java_lang_math_exp :
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
+    break;
+  case Interpreter::java_lang_math_pow :
+    fpargs = 2;
+    fn = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
+    break;
+  default:
+    ShouldNotReachHere();
+    fn = NULL;  // unreachable
+  }
+  const int gpargs = 0, rtype = 3;
+  __ mov(rscratch1, fn);
+  __ blrt(rscratch1, gpargs, fpargs, rtype);
+}
+
+// Abstract method entry
+// Attempt to execute abstract method. Throw exception
+address TemplateInterpreterGenerator::generate_abstract_entry(void) {
+  // rmethod: Method*
+  // r13: sender SP
+
+  address entry_point = __ pc();
+
+  // abstract method entry
+
+  //  pop return address, reset last_sp to NULL
+  __ empty_expression_stack();
+  __ restore_bcp();      // bcp must be correct for exception handler   (was destroyed)
+  __ restore_locals();   // make sure locals pointer is correct as well (was destroyed)
+
+  // throw exception
+  __ call_VM(noreg, CAST_FROM_FN_PTR(address,
+                             InterpreterRuntime::throw_AbstractMethodError));
+  // the call_VM checks for exception, so we should never return here.
+  __ should_not_reach_here();
+
+  return entry_point;
+}
+
 address TemplateInterpreterGenerator::generate_StackOverflowError_handler() {
   address entry = __ pc();
 
@@ -716,7 +930,7 @@
 
   // If G1 is not enabled then attempt to go through the accessor entry point
   // Reference.get is an accessor
-  return generate_accessor_entry();
+  return NULL;
 }
 
 /**
@@ -842,7 +1056,7 @@
   // an interpreter frame with greater than a page of locals, so each page
   // needs to be checked.  Only true for non-native.
   if (UseStackBanging) {
-    const int size_t n_shadow_pages = JavaThread::stack_shadow_zone_size() / os::vm_page_size();
+    const int n_shadow_pages = JavaThread::stack_shadow_zone_size() / os::vm_page_size();
     const int start_page = native_call ? n_shadow_pages : 1;
     const int page_size = os::vm_page_size();
     for (int pages = start_page; pages <= n_shadow_pages ; pages++) {
@@ -1184,8 +1398,8 @@
   {
     Label no_reguard;
     __ lea(rscratch1, Address(rthread, in_bytes(JavaThread::stack_guard_state_offset())));
-    __ ldrb(rscratch1, Address(rscratch1));
-    __ cmp(rscratch1, JavaThread::stack_guard_yellow_disabled);
+    __ ldrw(rscratch1, Address(rscratch1));
+    __ cmp(rscratch1, JavaThread::stack_guard_yellow_reserved_disabled);
     __ br(Assembler::NE, no_reguard);
 
     __ pusha(); // XXX only save smashed registers
--- a/hotspot/src/cpu/aarch64/vm/templateInterpreter_aarch64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,186 +0,0 @@
-/*
- * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2014, Red Hat Inc. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- *
- */
-
-#include "precompiled.hpp"
-#include "interpreter/interpreter.hpp"
-#include "oops/constMethod.hpp"
-#include "oops/method.hpp"
-#include "runtime/frame.inline.hpp"
-#include "utilities/debug.hpp"
-#include "utilities/macros.hpp"
-
-// Size of interpreter code.  Increase if too small.  Interpreter will
-// fail with a guarantee ("not enough space for interpreter generation");
-// if too small.
-// Run with +PrintInterpreter to get the VM to print out the size.
-// Max size with JVMTI
-int TemplateInterpreter::InterpreterCodeSize = 200 * 1024;
-
-int AbstractInterpreter::BasicType_as_index(BasicType type) {
-  int i = 0;
-  switch (type) {
-    case T_BOOLEAN: i = 0; break;
-    case T_CHAR   : i = 1; break;
-    case T_BYTE   : i = 2; break;
-    case T_SHORT  : i = 3; break;
-    case T_INT    : i = 4; break;
-    case T_LONG   : i = 5; break;
-    case T_VOID   : i = 6; break;
-    case T_FLOAT  : i = 7; break;
-    case T_DOUBLE : i = 8; break;
-    case T_OBJECT : i = 9; break;
-    case T_ARRAY  : i = 9; break;
-    default       : ShouldNotReachHere();
-  }
-  assert(0 <= i && i < AbstractInterpreter::number_of_result_handlers,
-         "index out of bounds");
-  return i;
-}
-
-// These should never be compiled since the interpreter will prefer
-// the compiled version to the intrinsic version.
-bool AbstractInterpreter::can_be_compiled(methodHandle m) {
-  switch (method_kind(m)) {
-    case Interpreter::java_lang_math_sin     : // fall thru
-    case Interpreter::java_lang_math_cos     : // fall thru
-    case Interpreter::java_lang_math_tan     : // fall thru
-    case Interpreter::java_lang_math_abs     : // fall thru
-    case Interpreter::java_lang_math_log     : // fall thru
-    case Interpreter::java_lang_math_log10   : // fall thru
-    case Interpreter::java_lang_math_sqrt    : // fall thru
-    case Interpreter::java_lang_math_pow     : // fall thru
-    case Interpreter::java_lang_math_exp     :
-      return false;
-    default:
-      return true;
-  }
-}
-
-// How much stack a method activation needs in words.
-int AbstractInterpreter::size_top_interpreter_activation(Method* method) {
-  const int entry_size = frame::interpreter_frame_monitor_size();
-
-  // total overhead size: entry_size + (saved rfp thru expr stack
-  // bottom).  be sure to change this if you add/subtract anything
-  // to/from the overhead area
-  const int overhead_size =
-    -(frame::interpreter_frame_initial_sp_offset) + entry_size;
-
-  const int stub_code = frame::entry_frame_after_call_words;
-  const int method_stack = (method->max_locals() + method->max_stack()) *
-                           Interpreter::stackElementWords;
-  return (overhead_size + method_stack + stub_code);
-}
-
-// asm based interpreter deoptimization helpers
-int AbstractInterpreter::size_activation(int max_stack,
-                                         int temps,
-                                         int extra_args,
-                                         int monitors,
-                                         int callee_params,
-                                         int callee_locals,
-                                         bool is_top_frame) {
-  // Note: This calculation must exactly parallel the frame setup
-  // in TemplateInterpreterGenerator::generate_method_entry.
-
-  // fixed size of an interpreter frame:
-  int overhead = frame::sender_sp_offset -
-                 frame::interpreter_frame_initial_sp_offset;
-  // Our locals were accounted for by the caller (or last_frame_adjust
-  // on the transistion) Since the callee parameters already account
-  // for the callee's params we only need to account for the extra
-  // locals.
-  int size = overhead +
-         (callee_locals - callee_params)*Interpreter::stackElementWords +
-         monitors * frame::interpreter_frame_monitor_size() +
-         temps* Interpreter::stackElementWords + extra_args;
-
-  // On AArch64 we always keep the stack pointer 16-aligned, so we
-  // must round up here.
-  size = round_to(size, 2);
-
-  return size;
-}
-
-void AbstractInterpreter::layout_activation(Method* method,
-                                            int tempcount,
-                                            int popframe_extra_args,
-                                            int moncount,
-                                            int caller_actual_parameters,
-                                            int callee_param_count,
-                                            int callee_locals,
-                                            frame* caller,
-                                            frame* interpreter_frame,
-                                            bool is_top_frame,
-                                            bool is_bottom_frame) {
-  // The frame interpreter_frame is guaranteed to be the right size,
-  // as determined by a previous call to the size_activation() method.
-  // It is also guaranteed to be walkable even though it is in a
-  // skeletal state
-
-  int max_locals = method->max_locals() * Interpreter::stackElementWords;
-  int extra_locals = (method->max_locals() - method->size_of_parameters()) *
-    Interpreter::stackElementWords;
-
-#ifdef ASSERT
-  assert(caller->sp() == interpreter_frame->sender_sp(), "Frame not properly walkable");
-#endif
-
-  interpreter_frame->interpreter_frame_set_method(method);
-  // NOTE the difference in using sender_sp and
-  // interpreter_frame_sender_sp interpreter_frame_sender_sp is
-  // the original sp of the caller (the unextended_sp) and
-  // sender_sp is fp+8/16 (32bit/64bit) XXX
-  intptr_t* locals = interpreter_frame->sender_sp() + max_locals - 1;
-
-#ifdef ASSERT
-  if (caller->is_interpreted_frame()) {
-    assert(locals < caller->fp() + frame::interpreter_frame_initial_sp_offset, "bad placement");
-  }
-#endif
-
-  interpreter_frame->interpreter_frame_set_locals(locals);
-  BasicObjectLock* montop = interpreter_frame->interpreter_frame_monitor_begin();
-  BasicObjectLock* monbot = montop - moncount;
-  interpreter_frame->interpreter_frame_set_monitor_end(monbot);
-
-  // Set last_sp
-  intptr_t*  esp = (intptr_t*) monbot -
-    tempcount*Interpreter::stackElementWords -
-    popframe_extra_args;
-  interpreter_frame->interpreter_frame_set_last_sp(esp);
-
-  // All frames but the initial (oldest) interpreter frame we fill in have
-  // a value for sender_sp that allows walking the stack but isn't
-  // truly correct. Correct the value here.
-  if (extra_locals != 0 &&
-      interpreter_frame->sender_sp() ==
-      interpreter_frame->interpreter_frame_sender_sp()) {
-    interpreter_frame->set_interpreter_frame_sender_sp(caller->sp() +
-                                                       extra_locals);
-  }
-  *interpreter_frame->interpreter_frame_cache_addr() =
-    method->constants()->cache();
-}
--- a/hotspot/src/cpu/aarch64/vm/vm_version_aarch64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/vm_version_aarch64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -121,7 +121,6 @@
   FLAG_SET_DEFAULT(PrefetchScanIntervalInBytes, 256);
   FLAG_SET_DEFAULT(PrefetchFieldsAhead, 256);
   FLAG_SET_DEFAULT(PrefetchCopyIntervalInBytes, 256);
-  FLAG_SET_DEFAULT(UseSSE42Intrinsics, true);
 
   unsigned long auxv = getauxval(AT_HWCAP);
 
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/hotspot/src/cpu/ppc/vm/abstractInterpreter_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -0,0 +1,163 @@
+/*
+ * Copyright (c) 2014, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015 SAP SE. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+#include "precompiled.hpp"
+#include "interpreter/interpreter.hpp"
+#include "oops/constMethod.hpp"
+#include "oops/method.hpp"
+#include "runtime/frame.inline.hpp"
+#include "utilities/debug.hpp"
+#include "utilities/macros.hpp"
+
+int AbstractInterpreter::BasicType_as_index(BasicType type) {
+  int i = 0;
+  switch (type) {
+    case T_BOOLEAN: i = 0; break;
+    case T_CHAR   : i = 1; break;
+    case T_BYTE   : i = 2; break;
+    case T_SHORT  : i = 3; break;
+    case T_INT    : i = 4; break;
+    case T_LONG   : i = 5; break;
+    case T_VOID   : i = 6; break;
+    case T_FLOAT  : i = 7; break;
+    case T_DOUBLE : i = 8; break;
+    case T_OBJECT : i = 9; break;
+    case T_ARRAY  : i = 9; break;
+    default       : ShouldNotReachHere();
+  }
+  assert(0 <= i && i < AbstractInterpreter::number_of_result_handlers, "index out of bounds");
+  return i;
+}
+
+// Support abs and sqrt like in compiler.
+// For others we can use a normal (native) entry.
+bool AbstractInterpreter::math_entry_available(AbstractInterpreter::MethodKind kind) {
+  if (!InlineIntrinsics) return false;
+
+  return ((kind==Interpreter::java_lang_math_sqrt && VM_Version::has_fsqrt()) ||
+          (kind==Interpreter::java_lang_math_abs));
+}
+
+// These should never be compiled since the interpreter will prefer
+// the compiled version to the intrinsic version.
+bool AbstractInterpreter::can_be_compiled(methodHandle m) {
+  return !math_entry_available(method_kind(m));
+}
+
+// How much stack a method activation needs in stack slots.
+// We must calc this exactly like in generate_fixed_frame.
+// Note: This returns the conservative size assuming maximum alignment.
+int AbstractInterpreter::size_top_interpreter_activation(Method* method) {
+  const int max_alignment_size = 2;
+  const int abi_scratch = frame::abi_reg_args_size;
+  return method->max_locals() + method->max_stack() +
+         frame::interpreter_frame_monitor_size() + max_alignment_size + abi_scratch;
+}
+
+// Returns number of stackElementWords needed for the interpreter frame with the
+// given sections.
+// This overestimates the stack by one slot in case of alignments.
+int AbstractInterpreter::size_activation(int max_stack,
+                                         int temps,
+                                         int extra_args,
+                                         int monitors,
+                                         int callee_params,
+                                         int callee_locals,
+                                         bool is_top_frame) {
+  // Note: This calculation must exactly parallel the frame setup
+  // in TemplateInterpreterGenerator::generate_fixed_frame.
+  assert(Interpreter::stackElementWords == 1, "sanity");
+  const int max_alignment_space = StackAlignmentInBytes / Interpreter::stackElementSize;
+  const int abi_scratch = is_top_frame ? (frame::abi_reg_args_size / Interpreter::stackElementSize) :
+                                         (frame::abi_minframe_size / Interpreter::stackElementSize);
+  const int size =
+    max_stack                                                +
+    (callee_locals - callee_params)                          +
+    monitors * frame::interpreter_frame_monitor_size()       +
+    max_alignment_space                                      +
+    abi_scratch                                              +
+    frame::ijava_state_size / Interpreter::stackElementSize;
+
+  // Fixed size of an interpreter frame, align to 16-byte.
+  return (size & -2);
+}
+
+// Fills a sceletal interpreter frame generated during deoptimizations.
+//
+// Parameters:
+//
+// interpreter_frame != NULL:
+//   set up the method, locals, and monitors.
+//   The frame interpreter_frame, if not NULL, is guaranteed to be the
+//   right size, as determined by a previous call to this method.
+//   It is also guaranteed to be walkable even though it is in a skeletal state
+//
+// is_top_frame == true:
+//   We're processing the *oldest* interpreter frame!
+//
+// pop_frame_extra_args:
+//   If this is != 0 we are returning to a deoptimized frame by popping
+//   off the callee frame. We want to re-execute the call that called the
+//   callee interpreted, but since the return to the interpreter would pop
+//   the arguments off advance the esp by dummy popframe_extra_args slots.
+//   Popping off those will establish the stack layout as it was before the call.
+//
+void AbstractInterpreter::layout_activation(Method* method,
+                                            int tempcount,
+                                            int popframe_extra_args,
+                                            int moncount,
+                                            int caller_actual_parameters,
+                                            int callee_param_count,
+                                            int callee_locals_count,
+                                            frame* caller,
+                                            frame* interpreter_frame,
+                                            bool is_top_frame,
+                                            bool is_bottom_frame) {
+
+  const int abi_scratch = is_top_frame ? (frame::abi_reg_args_size / Interpreter::stackElementSize) :
+                                         (frame::abi_minframe_size / Interpreter::stackElementSize);
+
+  intptr_t* locals_base  = (caller->is_interpreted_frame()) ?
+    caller->interpreter_frame_esp() + caller_actual_parameters :
+    caller->sp() + method->max_locals() - 1 + (frame::abi_minframe_size / Interpreter::stackElementSize);
+
+  intptr_t* monitor_base = caller->sp() - frame::ijava_state_size / Interpreter::stackElementSize;
+  intptr_t* monitor      = monitor_base - (moncount * frame::interpreter_frame_monitor_size());
+  intptr_t* esp_base     = monitor - 1;
+  intptr_t* esp          = esp_base - tempcount - popframe_extra_args;
+  intptr_t* sp           = (intptr_t *) (((intptr_t) (esp_base - callee_locals_count + callee_param_count - method->max_stack()- abi_scratch)) & -StackAlignmentInBytes);
+  intptr_t* sender_sp    = caller->sp() + (frame::abi_minframe_size - frame::abi_reg_args_size) / Interpreter::stackElementSize;
+  intptr_t* top_frame_sp = is_top_frame ? sp : sp + (frame::abi_minframe_size - frame::abi_reg_args_size) / Interpreter::stackElementSize;
+
+  interpreter_frame->interpreter_frame_set_method(method);
+  interpreter_frame->interpreter_frame_set_locals(locals_base);
+  interpreter_frame->interpreter_frame_set_cpcache(method->constants()->cache());
+  interpreter_frame->interpreter_frame_set_esp(esp);
+  interpreter_frame->interpreter_frame_set_monitor_end((BasicObjectLock *)monitor);
+  interpreter_frame->interpreter_frame_set_top_frame_sp(top_frame_sp);
+  if (!is_bottom_frame) {
+    interpreter_frame->interpreter_frame_set_sender_sp(sender_sp);
+  }
+}
--- a/hotspot/src/cpu/ppc/vm/assembler_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/assembler_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/assembler_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/assembler_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/assembler_ppc.inline.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/assembler_ppc.inline.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/bytes_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/bytes_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_CodeStubs_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_CodeStubs_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_Defs_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_Defs_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_FpuStackSim_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_FpuStackSim_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_FrameMap_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_LIRAssembler_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_LIRGenerator_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_LIRGenerator_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_LinearScan_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_LinearScan_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_LinearScan_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_LinearScan_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_MacroAssembler_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_MacroAssembler_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_MacroAssembler_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_MacroAssembler_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_Runtime1_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_Runtime1_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c1_globals_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c1_globals_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c2_globals_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c2_globals_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/c2_init_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/c2_init_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/codeBuffer_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/codeBuffer_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/compiledIC_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/compiledIC_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/copy_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/copy_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/debug_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/debug_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/depChecker_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/depChecker_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/disassembler_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/disassembler_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/frame_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/frame_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/frame_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/frame_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/frame_ppc.inline.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/frame_ppc.inline.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/globalDefinitions_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/globalDefinitions_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/globals_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/globals_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/icBuffer_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/icBuffer_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/icache_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/icache_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/icache_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/icache_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/interp_masm_ppc_64.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/interp_masm_ppc_64.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/interpreterRT_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/interpreterRT_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/interpreterRT_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/interpreterRT_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2014, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2014 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2014 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/interpreter_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,555 +0,0 @@
-/*
- * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- *
- */
-
-#include "precompiled.hpp"
-#include "asm/macroAssembler.inline.hpp"
-#include "interpreter/bytecodeHistogram.hpp"
-#include "interpreter/interpreter.hpp"
-#include "interpreter/interpreterRuntime.hpp"
-#include "interpreter/interp_masm.hpp"
-#include "interpreter/templateInterpreterGenerator.hpp"
-#include "interpreter/templateTable.hpp"
-#include "oops/arrayOop.hpp"
-#include "oops/methodData.hpp"
-#include "oops/method.hpp"
-#include "oops/oop.inline.hpp"
-#include "prims/jvmtiExport.hpp"
-#include "prims/jvmtiThreadState.hpp"
-#include "prims/methodHandles.hpp"
-#include "runtime/arguments.hpp"
-#include "runtime/frame.inline.hpp"
-#include "runtime/sharedRuntime.hpp"
-#include "runtime/stubRoutines.hpp"
-#include "runtime/synchronizer.hpp"
-#include "runtime/timer.hpp"
-#include "runtime/vframeArray.hpp"
-#include "utilities/debug.hpp"
-#ifdef COMPILER1
-#include "c1/c1_Runtime1.hpp"
-#endif
-
-#define __ _masm->
-
-#ifdef PRODUCT
-#define BLOCK_COMMENT(str) // nothing
-#else
-#define BLOCK_COMMENT(str) __ block_comment(str)
-#endif
-
-#define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
-
-address AbstractInterpreterGenerator::generate_slow_signature_handler() {
-  // Slow_signature handler that respects the PPC C calling conventions.
-  //
-  // We get called by the native entry code with our output register
-  // area == 8. First we call InterpreterRuntime::get_result_handler
-  // to copy the pointer to the signature string temporarily to the
-  // first C-argument and to return the result_handler in
-  // R3_RET. Since native_entry will copy the jni-pointer to the
-  // first C-argument slot later on, it is OK to occupy this slot
-  // temporarilly. Then we copy the argument list on the java
-  // expression stack into native varargs format on the native stack
-  // and load arguments into argument registers. Integer arguments in
-  // the varargs vector will be sign-extended to 8 bytes.
-  //
-  // On entry:
-  //   R3_ARG1        - intptr_t*     Address of java argument list in memory.
-  //   R15_prev_state - BytecodeInterpreter* Address of interpreter state for
-  //     this method
-  //   R19_method
-  //
-  // On exit (just before return instruction):
-  //   R3_RET            - contains the address of the result_handler.
-  //   R4_ARG2           - is not updated for static methods and contains "this" otherwise.
-  //   R5_ARG3-R10_ARG8: - When the (i-2)th Java argument is not of type float or double,
-  //                       ARGi contains this argument. Otherwise, ARGi is not updated.
-  //   F1_ARG1-F13_ARG13 - contain the first 13 arguments of type float or double.
-
-  const int LogSizeOfTwoInstructions = 3;
-
-  // FIXME: use Argument:: GL: Argument names different numbers!
-  const int max_fp_register_arguments  = 13;
-  const int max_int_register_arguments = 6;  // first 2 are reserved
-
-  const Register arg_java       = R21_tmp1;
-  const Register arg_c          = R22_tmp2;
-  const Register signature      = R23_tmp3;  // is string
-  const Register sig_byte       = R24_tmp4;
-  const Register fpcnt          = R25_tmp5;
-  const Register argcnt         = R26_tmp6;
-  const Register intSlot        = R27_tmp7;
-  const Register target_sp      = R28_tmp8;
-  const FloatRegister floatSlot = F0;
-
-  address entry = __ function_entry();
-
-  __ save_LR_CR(R0);
-  __ save_nonvolatile_gprs(R1_SP, _spill_nonvolatiles_neg(r14));
-  // We use target_sp for storing arguments in the C frame.
-  __ mr(target_sp, R1_SP);
-  __ push_frame_reg_args_nonvolatiles(0, R11_scratch1);
-
-  __ mr(arg_java, R3_ARG1);
-
-  __ call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::get_signature), R16_thread, R19_method);
-
-  // Signature is in R3_RET. Signature is callee saved.
-  __ mr(signature, R3_RET);
-
-  // Get the result handler.
-  __ call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::get_result_handler), R16_thread, R19_method);
-
-  {
-    Label L;
-    // test if static
-    // _access_flags._flags must be at offset 0.
-    // TODO PPC port: requires change in shared code.
-    //assert(in_bytes(AccessFlags::flags_offset()) == 0,
-    //       "MethodDesc._access_flags == MethodDesc._access_flags._flags");
-    // _access_flags must be a 32 bit value.
-    assert(sizeof(AccessFlags) == 4, "wrong size");
-    __ lwa(R11_scratch1/*access_flags*/, method_(access_flags));
-    // testbit with condition register.
-    __ testbitdi(CCR0, R0, R11_scratch1/*access_flags*/, JVM_ACC_STATIC_BIT);
-    __ btrue(CCR0, L);
-    // For non-static functions, pass "this" in R4_ARG2 and copy it
-    // to 2nd C-arg slot.
-    // We need to box the Java object here, so we use arg_java
-    // (address of current Java stack slot) as argument and don't
-    // dereference it as in case of ints, floats, etc.
-    __ mr(R4_ARG2, arg_java);
-    __ addi(arg_java, arg_java, -BytesPerWord);
-    __ std(R4_ARG2, _abi(carg_2), target_sp);
-    __ bind(L);
-  }
-
-  // Will be incremented directly after loop_start. argcnt=0
-  // corresponds to 3rd C argument.
-  __ li(argcnt, -1);
-  // arg_c points to 3rd C argument
-  __ addi(arg_c, target_sp, _abi(carg_3));
-  // no floating-point args parsed so far
-  __ li(fpcnt, 0);
-
-  Label move_intSlot_to_ARG, move_floatSlot_to_FARG;
-  Label loop_start, loop_end;
-  Label do_int, do_long, do_float, do_double, do_dontreachhere, do_object, do_array, do_boxed;
-
-  // signature points to '(' at entry
-#ifdef ASSERT
-  __ lbz(sig_byte, 0, signature);
-  __ cmplwi(CCR0, sig_byte, '(');
-  __ bne(CCR0, do_dontreachhere);
-#endif
-
-  __ bind(loop_start);
-
-  __ addi(argcnt, argcnt, 1);
-  __ lbzu(sig_byte, 1, signature);
-
-  __ cmplwi(CCR0, sig_byte, ')'); // end of signature
-  __ beq(CCR0, loop_end);
-
-  __ cmplwi(CCR0, sig_byte, 'B'); // byte
-  __ beq(CCR0, do_int);
-
-  __ cmplwi(CCR0, sig_byte, 'C'); // char
-  __ beq(CCR0, do_int);
-
-  __ cmplwi(CCR0, sig_byte, 'D'); // double
-  __ beq(CCR0, do_double);
-
-  __ cmplwi(CCR0, sig_byte, 'F'); // float
-  __ beq(CCR0, do_float);
-
-  __ cmplwi(CCR0, sig_byte, 'I'); // int
-  __ beq(CCR0, do_int);
-
-  __ cmplwi(CCR0, sig_byte, 'J'); // long
-  __ beq(CCR0, do_long);
-
-  __ cmplwi(CCR0, sig_byte, 'S'); // short
-  __ beq(CCR0, do_int);
-
-  __ cmplwi(CCR0, sig_byte, 'Z'); // boolean
-  __ beq(CCR0, do_int);
-
-  __ cmplwi(CCR0, sig_byte, 'L'); // object
-  __ beq(CCR0, do_object);
-
-  __ cmplwi(CCR0, sig_byte, '['); // array
-  __ beq(CCR0, do_array);
-
-  //  __ cmplwi(CCR0, sig_byte, 'V'); // void cannot appear since we do not parse the return type
-  //  __ beq(CCR0, do_void);
-
-  __ bind(do_dontreachhere);
-
-  __ unimplemented("ShouldNotReachHere in slow_signature_handler", 120);
-
-  __ bind(do_array);
-
-  {
-    Label start_skip, end_skip;
-
-    __ bind(start_skip);
-    __ lbzu(sig_byte, 1, signature);
-    __ cmplwi(CCR0, sig_byte, '[');
-    __ beq(CCR0, start_skip); // skip further brackets
-    __ cmplwi(CCR0, sig_byte, '9');
-    __ bgt(CCR0, end_skip);   // no optional size
-    __ cmplwi(CCR0, sig_byte, '0');
-    __ bge(CCR0, start_skip); // skip optional size
-    __ bind(end_skip);
-
-    __ cmplwi(CCR0, sig_byte, 'L');
-    __ beq(CCR0, do_object);  // for arrays of objects, the name of the object must be skipped
-    __ b(do_boxed);          // otherwise, go directly to do_boxed
-  }
-
-  __ bind(do_object);
-  {
-    Label L;
-    __ bind(L);
-    __ lbzu(sig_byte, 1, signature);
-    __ cmplwi(CCR0, sig_byte, ';');
-    __ bne(CCR0, L);
-   }
-  // Need to box the Java object here, so we use arg_java (address of
-  // current Java stack slot) as argument and don't dereference it as
-  // in case of ints, floats, etc.
-  Label do_null;
-  __ bind(do_boxed);
-  __ ld(R0,0, arg_java);
-  __ cmpdi(CCR0, R0, 0);
-  __ li(intSlot,0);
-  __ beq(CCR0, do_null);
-  __ mr(intSlot, arg_java);
-  __ bind(do_null);
-  __ std(intSlot, 0, arg_c);
-  __ addi(arg_java, arg_java, -BytesPerWord);
-  __ addi(arg_c, arg_c, BytesPerWord);
-  __ cmplwi(CCR0, argcnt, max_int_register_arguments);
-  __ blt(CCR0, move_intSlot_to_ARG);
-  __ b(loop_start);
-
-  __ bind(do_int);
-  __ lwa(intSlot, 0, arg_java);
-  __ std(intSlot, 0, arg_c);
-  __ addi(arg_java, arg_java, -BytesPerWord);
-  __ addi(arg_c, arg_c, BytesPerWord);
-  __ cmplwi(CCR0, argcnt, max_int_register_arguments);
-  __ blt(CCR0, move_intSlot_to_ARG);
-  __ b(loop_start);
-
-  __ bind(do_long);
-  __ ld(intSlot, -BytesPerWord, arg_java);
-  __ std(intSlot, 0, arg_c);
-  __ addi(arg_java, arg_java, - 2 * BytesPerWord);
-  __ addi(arg_c, arg_c, BytesPerWord);
-  __ cmplwi(CCR0, argcnt, max_int_register_arguments);
-  __ blt(CCR0, move_intSlot_to_ARG);
-  __ b(loop_start);
-
-  __ bind(do_float);
-  __ lfs(floatSlot, 0, arg_java);
-#if defined(LINUX)
-  // Linux uses ELF ABI. Both original ELF and ELFv2 ABIs have float
-  // in the least significant word of an argument slot.
-#if defined(VM_LITTLE_ENDIAN)
-  __ stfs(floatSlot, 0, arg_c);
-#else
-  __ stfs(floatSlot, 4, arg_c);
-#endif
-#elif defined(AIX)
-  // Although AIX runs on big endian CPU, float is in most significant
-  // word of an argument slot.
-  __ stfs(floatSlot, 0, arg_c);
-#else
-#error "unknown OS"
-#endif
-  __ addi(arg_java, arg_java, -BytesPerWord);
-  __ addi(arg_c, arg_c, BytesPerWord);
-  __ cmplwi(CCR0, fpcnt, max_fp_register_arguments);
-  __ blt(CCR0, move_floatSlot_to_FARG);
-  __ b(loop_start);
-
-  __ bind(do_double);
-  __ lfd(floatSlot, - BytesPerWord, arg_java);
-  __ stfd(floatSlot, 0, arg_c);
-  __ addi(arg_java, arg_java, - 2 * BytesPerWord);
-  __ addi(arg_c, arg_c, BytesPerWord);
-  __ cmplwi(CCR0, fpcnt, max_fp_register_arguments);
-  __ blt(CCR0, move_floatSlot_to_FARG);
-  __ b(loop_start);
-
-  __ bind(loop_end);
-
-  __ pop_frame();
-  __ restore_nonvolatile_gprs(R1_SP, _spill_nonvolatiles_neg(r14));
-  __ restore_LR_CR(R0);
-
-  __ blr();
-
-  Label move_int_arg, move_float_arg;
-  __ bind(move_int_arg); // each case must consist of 2 instructions (otherwise adapt LogSizeOfTwoInstructions)
-  __ mr(R5_ARG3, intSlot);  __ b(loop_start);
-  __ mr(R6_ARG4, intSlot);  __ b(loop_start);
-  __ mr(R7_ARG5, intSlot);  __ b(loop_start);
-  __ mr(R8_ARG6, intSlot);  __ b(loop_start);
-  __ mr(R9_ARG7, intSlot);  __ b(loop_start);
-  __ mr(R10_ARG8, intSlot); __ b(loop_start);
-
-  __ bind(move_float_arg); // each case must consist of 2 instructions (otherwise adapt LogSizeOfTwoInstructions)
-  __ fmr(F1_ARG1, floatSlot);   __ b(loop_start);
-  __ fmr(F2_ARG2, floatSlot);   __ b(loop_start);
-  __ fmr(F3_ARG3, floatSlot);   __ b(loop_start);
-  __ fmr(F4_ARG4, floatSlot);   __ b(loop_start);
-  __ fmr(F5_ARG5, floatSlot);   __ b(loop_start);
-  __ fmr(F6_ARG6, floatSlot);   __ b(loop_start);
-  __ fmr(F7_ARG7, floatSlot);   __ b(loop_start);
-  __ fmr(F8_ARG8, floatSlot);   __ b(loop_start);
-  __ fmr(F9_ARG9, floatSlot);   __ b(loop_start);
-  __ fmr(F10_ARG10, floatSlot); __ b(loop_start);
-  __ fmr(F11_ARG11, floatSlot); __ b(loop_start);
-  __ fmr(F12_ARG12, floatSlot); __ b(loop_start);
-  __ fmr(F13_ARG13, floatSlot); __ b(loop_start);
-
-  __ bind(move_intSlot_to_ARG);
-  __ sldi(R0, argcnt, LogSizeOfTwoInstructions);
-  __ load_const(R11_scratch1, move_int_arg); // Label must be bound here.
-  __ add(R11_scratch1, R0, R11_scratch1);
-  __ mtctr(R11_scratch1/*branch_target*/);
-  __ bctr();
-  __ bind(move_floatSlot_to_FARG);
-  __ sldi(R0, fpcnt, LogSizeOfTwoInstructions);
-  __ addi(fpcnt, fpcnt, 1);
-  __ load_const(R11_scratch1, move_float_arg); // Label must be bound here.
-  __ add(R11_scratch1, R0, R11_scratch1);
-  __ mtctr(R11_scratch1/*branch_target*/);
-  __ bctr();
-
-  return entry;
-}
-
-address AbstractInterpreterGenerator::generate_result_handler_for(BasicType type) {
-  //
-  // Registers alive
-  //   R3_RET
-  //   LR
-  //
-  // Registers updated
-  //   R3_RET
-  //
-
-  Label done;
-  address entry = __ pc();
-
-  switch (type) {
-  case T_BOOLEAN:
-    // convert !=0 to 1
-    __ neg(R0, R3_RET);
-    __ orr(R0, R3_RET, R0);
-    __ srwi(R3_RET, R0, 31);
-    break;
-  case T_BYTE:
-     // sign extend 8 bits
-     __ extsb(R3_RET, R3_RET);
-     break;
-  case T_CHAR:
-     // zero extend 16 bits
-     __ clrldi(R3_RET, R3_RET, 48);
-     break;
-  case T_SHORT:
-     // sign extend 16 bits
-     __ extsh(R3_RET, R3_RET);
-     break;
-  case T_INT:
-     // sign extend 32 bits
-     __ extsw(R3_RET, R3_RET);
-     break;
-  case T_LONG:
-     break;
-  case T_OBJECT:
-    // unbox result if not null
-    __ cmpdi(CCR0, R3_RET, 0);
-    __ beq(CCR0, done);
-    __ ld(R3_RET, 0, R3_RET);
-    __ verify_oop(R3_RET);
-    break;
-  case T_FLOAT:
-     break;
-  case T_DOUBLE:
-     break;
-  case T_VOID:
-     break;
-  default: ShouldNotReachHere();
-  }
-
-  __ BIND(done);
-  __ blr();
-
-  return entry;
-}
-
-// Abstract method entry.
-//
-address TemplateInterpreterGenerator::generate_abstract_entry(void) {
-  address entry = __ pc();
-
-  //
-  // Registers alive
-  //   R16_thread     - JavaThread*
-  //   R19_method     - callee's method (method to be invoked)
-  //   R1_SP          - SP prepared such that caller's outgoing args are near top
-  //   LR             - return address to caller
-  //
-  // Stack layout at this point:
-  //
-  //   0       [TOP_IJAVA_FRAME_ABI]         <-- R1_SP
-  //           alignment (optional)
-  //           [outgoing Java arguments]
-  //           ...
-  //   PARENT  [PARENT_IJAVA_FRAME_ABI]
-  //            ...
-  //
-
-  // Can't use call_VM here because we have not set up a new
-  // interpreter state. Make the call to the vm and make it look like
-  // our caller set up the JavaFrameAnchor.
-  __ set_top_ijava_frame_at_SP_as_last_Java_frame(R1_SP, R12_scratch2/*tmp*/);
-
-  // Push a new C frame and save LR.
-  __ save_LR_CR(R0);
-  __ push_frame_reg_args(0, R11_scratch1);
-
-  // This is not a leaf but we have a JavaFrameAnchor now and we will
-  // check (create) exceptions afterward so this is ok.
-  __ call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_AbstractMethodError),
-                  R16_thread);
-
-  // Pop the C frame and restore LR.
-  __ pop_frame();
-  __ restore_LR_CR(R0);
-
-  // Reset JavaFrameAnchor from call_VM_leaf above.
-  __ reset_last_Java_frame();
-
-  // We don't know our caller, so jump to the general forward exception stub,
-  // which will also pop our full frame off. Satisfy the interface of
-  // SharedRuntime::generate_forward_exception()
-  __ load_const_optimized(R11_scratch1, StubRoutines::forward_exception_entry(), R0);
-  __ mtctr(R11_scratch1);
-  __ bctr();
-
-  return entry;
-}
-
-// Interpreter intrinsic for WeakReference.get().
-// 1. Don't push a full blown frame and go on dispatching, but fetch the value
-//    into R8 and return quickly
-// 2. If G1 is active we *must* execute this intrinsic for corrrectness:
-//    It contains a GC barrier which puts the reference into the satb buffer
-//    to indicate that someone holds a strong reference to the object the
-//    weak ref points to!
-address TemplateInterpreterGenerator::generate_Reference_get_entry(void) {
-  // Code: _aload_0, _getfield, _areturn
-  // parameter size = 1
-  //
-  // The code that gets generated by this routine is split into 2 parts:
-  //    1. the "intrinsified" code for G1 (or any SATB based GC),
-  //    2. the slow path - which is an expansion of the regular method entry.
-  //
-  // Notes:
-  // * In the G1 code we do not check whether we need to block for
-  //   a safepoint. If G1 is enabled then we must execute the specialized
-  //   code for Reference.get (except when the Reference object is null)
-  //   so that we can log the value in the referent field with an SATB
-  //   update buffer.
-  //   If the code for the getfield template is modified so that the
-  //   G1 pre-barrier code is executed when the current method is
-  //   Reference.get() then going through the normal method entry
-  //   will be fine.
-  // * The G1 code can, however, check the receiver object (the instance
-  //   of java.lang.Reference) and jump to the slow path if null. If the
-  //   Reference object is null then we obviously cannot fetch the referent
-  //   and so we don't need to call the G1 pre-barrier. Thus we can use the
-  //   regular method entry code to generate the NPE.
-  //
-
-  if (UseG1GC) {
-    address entry = __ pc();
-
-    const int referent_offset = java_lang_ref_Reference::referent_offset;
-    guarantee(referent_offset > 0, "referent offset not initialized");
-
-    Label slow_path;
-
-    // Debugging not possible, so can't use __ skip_if_jvmti_mode(slow_path, GR31_SCRATCH);
-
-    // In the G1 code we don't check if we need to reach a safepoint. We
-    // continue and the thread will safepoint at the next bytecode dispatch.
-
-    // If the receiver is null then it is OK to jump to the slow path.
-    __ ld(R3_RET, Interpreter::stackElementSize, R15_esp); // get receiver
-
-    // Check if receiver == NULL and go the slow path.
-    __ cmpdi(CCR0, R3_RET, 0);
-    __ beq(CCR0, slow_path);
-
-    // Load the value of the referent field.
-    __ load_heap_oop(R3_RET, referent_offset, R3_RET);
-
-    // Generate the G1 pre-barrier code to log the value of
-    // the referent field in an SATB buffer. Note with
-    // these parameters the pre-barrier does not generate
-    // the load of the previous value.
-
-    // Restore caller sp for c2i case.
-#ifdef ASSERT
-      __ ld(R9_ARG7, 0, R1_SP);
-      __ ld(R10_ARG8, 0, R21_sender_SP);
-      __ cmpd(CCR0, R9_ARG7, R10_ARG8);
-      __ asm_assert_eq("backlink", 0x544);
-#endif // ASSERT
-    __ mr(R1_SP, R21_sender_SP); // Cut the stack back to where the caller started.
-
-    __ g1_write_barrier_pre(noreg,         // obj
-                            noreg,         // offset
-                            R3_RET,        // pre_val
-                            R11_scratch1,  // tmp
-                            R12_scratch2,  // tmp
-                            true);         // needs_frame
-
-    __ blr();
-
-    // Generate regular method entry.
-    __ bind(slow_path);
-    __ jump_to_entry(Interpreter::entry_for_kind(Interpreter::zerolocals), R11_scratch1);
-    return entry;
-  }
-
-  return NULL;
-}
--- a/hotspot/src/cpu/ppc/vm/javaFrameAnchor_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/javaFrameAnchor_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2014 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2014 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/jniFastGetField_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/jniFastGetField_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/jniTypes_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/jniTypes_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/jni_ppc.h	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/jni_ppc.h	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/macroAssembler_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/macroAssembler_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2016 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -3172,11 +3172,12 @@
 //
 // Assumes that result differs from all other registers.
 //
-// Haystack, needle are the addresses of jchar-arrays.
-// NeedleChar is needle[0] if it is known at compile time.
-// Haycnt is the length of the haystack. We assume haycnt >=1.
+// 'haystack' is the addresses of a jchar-array.
+// 'needle' is either the character to search for or R0.
+// 'needleChar' is the character to search for if 'needle' == R0..
+// 'haycnt' is the length of the haystack. We assume 'haycnt' >=1.
 //
-// Preserves haystack, haycnt, kills all other registers.
+// Preserves haystack, haycnt, needle and kills all other registers.
 //
 // If needle == R0, we search for the constant needleChar.
 void MacroAssembler::string_indexof_1(Register result, Register haystack, Register haycnt,
@@ -3186,13 +3187,11 @@
   assert_different_registers(result, haystack, haycnt, needle, tmp1, tmp2);
 
   Label L_InnerLoop, L_FinalCheck, L_Found1, L_Found2, L_Found3, L_NotFound, L_End;
-  Register needle0 = needle, // Contains needle[0].
-           addr = tmp1,
+  Register addr = tmp1,
            ch1 = tmp2,
            ch2 = R0;
 
-//2 (variable) or 3 (const):
-   if (needle != R0) lhz(needle0, 0, needle); // Preload needle character, needle has len==1.
+//3:
    dcbtct(haystack, 0x00);                        // Indicate R/O access to haystack.
 
    srwi_(tmp2, haycnt, 1);   // Shift right by exact_log2(UNROLL_FACTOR).
@@ -3203,8 +3202,8 @@
   bind(L_InnerLoop);             // Main work horse (2x unrolled search loop).
    lhz(ch1, 0, addr);        // Load characters from haystack.
    lhz(ch2, 2, addr);
-   (needle != R0) ? cmpw(CCR0, ch1, needle0) : cmplwi(CCR0, ch1, needleChar);
-   (needle != R0) ? cmpw(CCR1, ch2, needle0) : cmplwi(CCR1, ch2, needleChar);
+   (needle != R0) ? cmpw(CCR0, ch1, needle) : cmplwi(CCR0, ch1, needleChar);
+   (needle != R0) ? cmpw(CCR1, ch2, needle) : cmplwi(CCR1, ch2, needleChar);
    beq(CCR0, L_Found1);   // Did we find the needle?
    beq(CCR1, L_Found2);
    addi(addr, addr, 4);
@@ -3214,7 +3213,7 @@
    andi_(R0, haycnt, 1);
    beq(CCR0, L_NotFound);
    lhz(ch1, 0, addr);        // One position left at which we have to compare.
-   (needle != R0) ? cmpw(CCR1, ch1, needle0) : cmplwi(CCR1, ch1, needleChar);
+   (needle != R0) ? cmpw(CCR1, ch1, needle) : cmplwi(CCR1, ch1, needleChar);
    beq(CCR1, L_Found3);
 //21:
   bind(L_NotFound);
@@ -3399,7 +3398,15 @@
             chr2_reg = cnt2_reg,
             addr_diff = str2_reg;
 
+   // 'cnt_reg' contains the number of characters in the string's character array for the
+   // pre-CompactStrings strings implementation and the number of bytes in the string's
+   // byte array for the CompactStrings strings implementation.
+   const int HAS_COMPACT_STRING = java_lang_String::has_coder_field() ? 1 : 0; // '1' = byte array, '0' = char array
+
    // Offset 0 should be 32 byte aligned.
+//-6:
+    srawi(cnt1_reg, cnt1_reg, HAS_COMPACT_STRING);
+    srawi(cnt2_reg, cnt2_reg, HAS_COMPACT_STRING);
 //-4:
     dcbtct(str1_reg, 0x00);  // Indicate R/O access to str1.
     dcbtct(str2_reg, 0x00);  // Indicate R/O access to str2.
@@ -3478,14 +3485,21 @@
   Register index_reg = tmp5_reg;
   Register cbc_iter  = tmp4_reg;
 
+  // 'cnt_reg' contains the number of characters in the string's character array for the
+  // pre-CompactStrings strings implementation and the number of bytes in the string's
+  // byte array for the CompactStrings strings implementation.
+  const int HAS_COMPACT_STRING = java_lang_String::has_coder_field() ? 1 : 0; // '1' = byte array, '0' = char array
+
 //-1:
   dcbtct(str1_reg, 0x00);  // Indicate R/O access to str1.
   dcbtct(str2_reg, 0x00);  // Indicate R/O access to str2.
 //1:
-  andi(cbc_iter, cnt_reg, 4-1);            // Remaining iterations after 4 java characters per iteration loop.
+  // cbc_iter: remaining characters after the '4 java characters per iteration' loop.
+  rlwinm(cbc_iter, cnt_reg, 32 - HAS_COMPACT_STRING, 30, 31); // (cnt_reg % (HAS_COMPACT_STRING ? 8 : 4)) >> HAS_COMPACT_STRING
   li(index_reg, 0); // init
   li(result_reg, 0); // assume false
-  srwi_(tmp2_reg, cnt_reg, exact_log2(4)); // Div: 4 java characters per iteration (main loop).
+  // tmp2_reg: units of 4 java characters (i.e. 8 bytes) per iteration (main loop).
+  srwi_(tmp2_reg, cnt_reg, exact_log2(4 << HAS_COMPACT_STRING)); // cnt_reg / (HAS_COMPACT_STRING ? 8 : 4)
 
   cmpwi(CCR1, cbc_iter, 0);             // CCR1 = (cbc_iter==0)
   beq(CCR0, Linit_cbc);                 // too short
@@ -3526,6 +3540,11 @@
   assert(sizeof(jchar) == 2, "must be");
   assert(cntval >= 0 && ((cntval & 0x7fff) == cntval), "wrong immediate");
 
+  // 'cntval' contains the number of characters in the string's character array for the
+  // pre-CompactStrings strings implementation and the number of bytes in the string's
+  // byte array for the CompactStrings strings implementation.
+  cntval >>= (java_lang_String::has_coder_field() ? 1 : 0); // '1' = byte array strings, '0' = char array strings
+
   Label Ldone_false;
 
   if (cntval < 16) { // short case
@@ -3652,9 +3671,9 @@
   assert_different_registers(table, tc0, tc1, tc2);
   assert(table == tc3, "must be!");
 
-  if (ix0 != 0) addi(tc0, table, ix0);
-  if (ix1 != 0) addi(tc1, table, ix1);
-  if (ix2 != 0) addi(tc2, table, ix2);
+  addi(tc0, table, ix0);
+  addi(tc1, table, ix1);
+  addi(tc2, table, ix2);
   if (ix3 != 0) addi(tc3, table, ix3);
 
   return ix3;
@@ -3720,14 +3739,14 @@
   const int mainLoop_alignment = loopAlignment ? 32 : 4; // (InputForNewCode > 4 ? InputForNewCode : 32) : 4;
 
   // Process all bytes in a single-byte loop.
-  cmpdi(CCR0, len, 0);                           // Anything to do?
-  mtctr(len);
+  clrldi_(len, len, 32);                         // Enforce 32 bit. Anything to do?
   beq(CCR0, L_done);
 
   if (invertCRC) {
     nand(crc, crc, crc);                         // ~c
   }
 
+  mtctr(len);
   align(mainLoop_alignment);
   BIND(L_mainLoop);
     lbz(data, 0, buf);                           // Byte from buffer, zero-extended.
@@ -3943,7 +3962,7 @@
 #else
   Register crc_rv = tmp;                         // Load_reverse needs separate registers to work on.
                                                  // Occupies tmp, but frees up crc.
-  load_reverse_32(crc_rv, crc);                  // evert byte order because we are dealing with big-endian data.
+  load_reverse_32(crc_rv, crc);                  // Revert byte order because we are dealing with big-endian data.
   tmp = crc;
 #endif
 
--- a/hotspot/src/cpu/ppc/vm/macroAssembler_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/macroAssembler_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/macroAssembler_ppc.inline.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/macroAssembler_ppc.inline.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/metaspaceShared_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/metaspaceShared_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/methodHandles_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/methodHandles_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/methodHandles_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/methodHandles_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/nativeInst_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/nativeInst_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/nativeInst_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/nativeInst_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/ppc.ad	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/ppc.ad	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 //
-// Copyright (c) 2011, 2015, Oracle and/or its affiliates. All rights reserved.
-// Copyright 2012, 2015 SAP AG. All rights reserved.
+// Copyright (c) 2011, 2016, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2012, 2015 SAP SE. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
 // This code is free software; you can redistribute it and/or modify it
@@ -956,36 +956,40 @@
 // the instruction. The padding must match the size of a NOP instruction.
 
 int string_indexOf_imm1_charNode::compute_padding(int current_offset) const {
-  return (3*4-current_offset)&31;
+  return (3*4-current_offset)&31;  // see MacroAssembler::string_indexof_1
 }
 
 int string_indexOf_imm1Node::compute_padding(int current_offset) const {
-  return (2*4-current_offset)&31;
+  return (3*4-current_offset)&31;  // see MacroAssembler::string_indexof_1
+}
+
+int string_indexOfCharNode::compute_padding(int current_offset) const {
+  return (3*4-current_offset)&31;  // see MacroAssembler::string_indexof_1
 }
 
 int string_indexOf_immNode::compute_padding(int current_offset) const {
-  return (3*4-current_offset)&31;
+  return (3*4-current_offset)&31;  // see MacroAssembler::string_indexof(constant needlecount)
 }
 
 int string_indexOfNode::compute_padding(int current_offset) const {
-  return (1*4-current_offset)&31;
+  return (1*4-current_offset)&31;  // see MacroAssembler::string_indexof(variable needlecount)
 }
 
 int string_compareNode::compute_padding(int current_offset) const {
-  return (4*4-current_offset)&31;
+  return (2*4-current_offset)&31;  // see MacroAssembler::string_compare
 }
 
 int string_equals_immNode::compute_padding(int current_offset) const {
-  if (opnd_array(3)->constant() < 16) return 0; // Don't insert nops for short version (loop completely unrolled).
-  return (2*4-current_offset)&31;
+  if (opnd_array(3)->constant() < 16) return 0; // For strlen < 16 no nops because loop completely unrolled
+  return (2*4-current_offset)&31;               // Genral case - see MacroAssembler::char_arrays_equalsImm
 }
 
 int string_equalsNode::compute_padding(int current_offset) const {
-  return (7*4-current_offset)&31;
+  return (7*4-current_offset)&31;  // see MacroAssembler::char_arrays_equals
 }
 
 int inlineCallClearArrayNode::compute_padding(int current_offset) const {
-  return (2*4-current_offset)&31;
+  return (2*4-current_offset)&31;  // see MacroAssembler::clear_memory_doubleword
 }
 
 //=============================================================================
@@ -2025,6 +2029,8 @@
     return SpecialStringEquals && !CompactStrings;
   case Op_StrIndexOf:
     return SpecialStringIndexOf && !CompactStrings;
+  case Op_StrIndexOfChar:
+    return SpecialStringIndexOf && !CompactStrings;
   }
 
   return true;  // Per default match rules are supported.
@@ -11034,11 +11040,11 @@
 instruct string_indexOf_imm1_char(iRegIdst result, iRegPsrc haystack, iRegIsrc haycnt,
                                   immP needleImm, immL offsetImm, immI_1 needlecntImm,
                                   iRegIdst tmp1, iRegIdst tmp2,
-                                  flagsRegCR0 cr0, flagsRegCR1 cr1) %{
+                                  flagsRegCR0 cr0, flagsRegCR1 cr1, regCTR ctr) %{
   predicate(SpecialStringIndexOf && !CompactStrings);  // type check implicit by parameter type, See Matcher::match_rule_supported
   match(Set result (StrIndexOf (Binary haystack haycnt) (Binary (AddP needleImm offsetImm) needlecntImm)));
 
-  effect(TEMP_DEF result, TEMP tmp1, TEMP tmp2, KILL cr0, KILL cr1);
+  effect(TEMP_DEF result, TEMP tmp1, TEMP tmp2, KILL cr0, KILL cr1, KILL ctr);
 
   ins_cost(150);
   format %{ "String IndexOf CSCL1 $haystack[0..$haycnt], $needleImm+$offsetImm[0..$needlecntImm]"
@@ -11050,10 +11056,23 @@
     immPOper *needleOper = (immPOper *)$needleImm;
     const TypeOopPtr *t = needleOper->type()->isa_oopptr();
     ciTypeArray* needle_values = t->const_oop()->as_type_array();  // Pointer to live char *
-
+    jchar chr;
+    if (java_lang_String::has_coder_field()) {
+      // New compact strings byte array strings
+#ifdef VM_LITTLE_ENDIAN
+      chr = (((jchar)needle_values->element_value(1).as_byte()) << 8) |
+              (jchar)needle_values->element_value(0).as_byte();
+#else
+      chr = (((jchar)needle_values->element_value(0).as_byte()) << 8) |
+              (jchar)needle_values->element_value(1).as_byte();
+#endif
+    } else {
+      // Old char array strings
+      chr = needle_values->char_at(0);
+    }
     __ string_indexof_1($result$$Register,
                         $haystack$$Register, $haycnt$$Register,
-                        R0, needle_values->char_at(0),
+                        R0, chr,
                         $tmp1$$Register, $tmp2$$Register);
   %}
   ins_pipe(pipe_class_compare);
@@ -11073,12 +11092,13 @@
 instruct string_indexOf_imm1(iRegIdst result, iRegPsrc haystack, iRegIsrc haycnt,
                              rscratch2RegP needle, immI_1 needlecntImm,
                              iRegIdst tmp1, iRegIdst tmp2,
-                             flagsRegCR0 cr0, flagsRegCR1 cr1) %{
+                             flagsRegCR0 cr0, flagsRegCR1 cr1, regCTR ctr) %{
   match(Set result (StrIndexOf (Binary haystack haycnt) (Binary needle needlecntImm)));
   effect(USE_KILL needle, /* TDEF needle, */ TEMP_DEF result,
-         TEMP tmp1, TEMP tmp2);
+         TEMP tmp1, TEMP tmp2, KILL cr0, KILL cr1, KILL ctr);
   // Required for EA: check if it is still a type_array.
-  predicate(SpecialStringIndexOf && !CompactStrings && n->in(3)->in(1)->bottom_type()->is_aryptr()->const_oop() &&
+  predicate(SpecialStringIndexOf && !CompactStrings &&
+            n->in(3)->in(1)->bottom_type()->is_aryptr()->const_oop() &&
             n->in(3)->in(1)->bottom_type()->is_aryptr()->const_oop()->is_type_array());
   ins_cost(180);
 
@@ -11091,17 +11111,54 @@
     Node *ndl = in(operand_index($needle));  // The node that defines needle.
     ciTypeArray* needle_values = ndl->bottom_type()->is_aryptr()->const_oop()->as_type_array();
     guarantee(needle_values, "sanity");
-    if (needle_values != NULL) {
-      __ string_indexof_1($result$$Register,
-                          $haystack$$Register, $haycnt$$Register,
-                          R0, needle_values->char_at(0),
-                          $tmp1$$Register, $tmp2$$Register);
+    jchar chr;
+    if (java_lang_String::has_coder_field()) {
+      // New compact strings byte array strings
+#ifdef VM_LITTLE_ENDIAN
+      chr = (((jchar)needle_values->element_value(1).as_byte()) << 8) |
+              (jchar)needle_values->element_value(0).as_byte();
+#else
+      chr = (((jchar)needle_values->element_value(0).as_byte()) << 8) |
+              (jchar)needle_values->element_value(1).as_byte();
+#endif
     } else {
-      __ string_indexof_1($result$$Register,
-                          $haystack$$Register, $haycnt$$Register,
-                          $needle$$Register, 0,
-                          $tmp1$$Register, $tmp2$$Register);
+      // Old char array strings
+      chr = needle_values->char_at(0);
     }
+    __ string_indexof_1($result$$Register,
+                        $haystack$$Register, $haycnt$$Register,
+                        R0, chr,
+                        $tmp1$$Register, $tmp2$$Register);
+  %}
+  ins_pipe(pipe_class_compare);
+%}
+
+// String_IndexOfChar
+//
+// Assumes register result differs from all input registers.
+//
+// Preserves registers haystack, haycnt
+// Kills     registers tmp1, tmp2
+// Defines   registers result
+//
+// Use dst register classes if register gets killed, as it is the case for tmp registers!
+instruct string_indexOfChar(iRegIdst result, iRegPsrc haystack, iRegIsrc haycnt,
+                            iRegIsrc ch, iRegIdst tmp1, iRegIdst tmp2,
+                            flagsRegCR0 cr0, flagsRegCR1 cr1, regCTR ctr) %{
+  match(Set result (StrIndexOfChar (Binary haystack haycnt) ch));
+  effect(TEMP_DEF result, TEMP tmp1, TEMP tmp2, KILL cr0, KILL cr1, KILL ctr);
+  predicate(SpecialStringIndexOf && !CompactStrings);
+  ins_cost(180);
+
+  ins_alignment(8); // 'compute_padding()' gets called, up to this number-1 nops will get inserted.
+
+  format %{ "String IndexOfChar $haystack[0..$haycnt], $ch"
+            " -> $result \t// KILL $haycnt, $tmp1, $tmp2, $cr0, $cr1" %}
+  ins_encode %{
+    __ string_indexof_1($result$$Register,
+                        $haystack$$Register, $haycnt$$Register,
+                        $ch$$Register, 0 /* this is not used if the character is already in a register */,
+                        $tmp1$$Register, $tmp2$$Register);
   %}
   ins_pipe(pipe_class_compare);
 %}
@@ -11120,10 +11177,10 @@
 instruct string_indexOf_imm(iRegIdst result, iRegPsrc haystack, rscratch1RegI haycnt,
                             iRegPsrc needle, uimmI15 needlecntImm,
                             iRegIdst tmp1, iRegIdst tmp2, iRegIdst tmp3, iRegIdst tmp4, iRegIdst tmp5,
-                            flagsRegCR0 cr0, flagsRegCR1 cr1, flagsRegCR6 cr6) %{
+                            flagsRegCR0 cr0, flagsRegCR1 cr1, flagsRegCR6 cr6, regCTR ctr) %{
   match(Set result (StrIndexOf (Binary haystack haycnt) (Binary needle needlecntImm)));
   effect(USE_KILL haycnt, /* better: TDEF haycnt, */ TEMP_DEF result,
-         TEMP tmp1, TEMP tmp2, TEMP tmp3, TEMP tmp4, TEMP tmp5, KILL cr0, KILL cr1, KILL cr6);
+         TEMP tmp1, TEMP tmp2, TEMP tmp3, TEMP tmp4, TEMP tmp5, KILL cr0, KILL cr1, KILL cr6, KILL ctr);
   // Required for EA: check if it is still a type_array.
   predicate(SpecialStringIndexOf && !CompactStrings && n->in(3)->in(1)->bottom_type()->is_aryptr()->const_oop() &&
             n->in(3)->in(1)->bottom_type()->is_aryptr()->const_oop()->is_type_array());
@@ -11153,11 +11210,11 @@
 // Use dst register classes if register gets killed, as it is the case for tmp registers!
 instruct string_indexOf(iRegIdst result, iRegPsrc haystack, rscratch1RegI haycnt, iRegPsrc needle, rscratch2RegI needlecnt,
                         iRegLdst tmp1, iRegLdst tmp2, iRegLdst tmp3, iRegLdst tmp4,
-                        flagsRegCR0 cr0, flagsRegCR1 cr1, flagsRegCR6 cr6) %{
+                        flagsRegCR0 cr0, flagsRegCR1 cr1, flagsRegCR6 cr6, regCTR ctr) %{
   match(Set result (StrIndexOf (Binary haystack haycnt) (Binary needle needlecnt)));
   effect(USE_KILL haycnt, USE_KILL needlecnt, /*better: TDEF haycnt, TDEF needlecnt,*/
          TEMP_DEF result,
-         TEMP tmp1, TEMP tmp2, TEMP tmp3, TEMP tmp4, KILL cr0, KILL cr1, KILL cr6);
+         TEMP tmp1, TEMP tmp2, TEMP tmp3, TEMP tmp4, KILL cr0, KILL cr1, KILL cr6, KILL ctr);
   predicate(SpecialStringIndexOf && !CompactStrings);  // See Matcher::match_rule_supported.
   ins_cost(300);
 
--- a/hotspot/src/cpu/ppc/vm/ppc_64.ad	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/ppc_64.ad	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 //
 // Copyright (c) 2011, 2013, Oracle and/or its affiliates. All rights reserved.
-// Copyright 2012, 2013 SAP AG. All rights reserved.
+// Copyright (c) 2012, 2013 SAP SE. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
 // This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/registerMap_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/registerMap_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/register_definitions_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/register_definitions_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/register_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/register_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/register_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/register_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2014 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2014 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -609,13 +609,11 @@
 REGISTER_DECLARATION(Register, R27_tmp7, R27);
 REGISTER_DECLARATION(Register, R28_tmp8, R28);
 REGISTER_DECLARATION(Register, R29_tmp9, R29);
-#ifndef CC_INTERP
 REGISTER_DECLARATION(Register, R24_dispatch_addr,     R24);
 REGISTER_DECLARATION(Register, R25_templateTableBase, R25);
 REGISTER_DECLARATION(Register, R26_monitor,           R26);
 REGISTER_DECLARATION(Register, R27_constPoolCache,    R27);
 REGISTER_DECLARATION(Register, R28_mdx,               R28);
-#endif // CC_INTERP
 
 REGISTER_DECLARATION(Register, R19_inline_cache_reg, R19);
 REGISTER_DECLARATION(Register, R29_TOC, R29);
@@ -638,12 +636,9 @@
 #define R26_monitor           AS_REGISTER(Register, R26)
 #define R27_constPoolCache    AS_REGISTER(Register, R27)
 #define R28_mdx               AS_REGISTER(Register, R28)
-#endif
 
 #define R19_inline_cache_reg AS_REGISTER(Register, R19)
 #define R29_TOC AS_REGISTER(Register, R29)
-
-#define CCR4_is_synced AS_REGISTER(ConditionRegister, CCR4)
 #endif
 
 // Scratch registers are volatile.
--- a/hotspot/src/cpu/ppc/vm/relocInfo_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/relocInfo_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/relocInfo_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/relocInfo_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/runtime_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/runtime_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1998, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/sharedRuntime_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/sharedRuntime_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
+ * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2016 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -1477,7 +1477,7 @@
   }
 }
 
-// Check GC_locker::needs_gc and enter the runtime if it's true. This
+// Check GCLocker::needs_gc and enter the runtime if it's true. This
 // keeps a new JNI critical region from starting until a GC has been
 // forced. Save down any oops in registers and describe them in an
 // OopMap.
@@ -1489,9 +1489,9 @@
                                                VMRegPair* in_regs,
                                                BasicType* in_sig_bt,
                                                Register tmp_reg ) {
-  __ block_comment("check GC_locker::needs_gc");
+  __ block_comment("check GCLocker::needs_gc");
   Label cont;
-  __ lbz(tmp_reg, (RegisterOrConstant)(intptr_t)GC_locker::needs_gc_address());
+  __ lbz(tmp_reg, (RegisterOrConstant)(intptr_t)GCLocker::needs_gc_address());
   __ cmplwi(CCR0, tmp_reg, 0);
   __ beq(CCR0, cont);
 
@@ -1690,14 +1690,14 @@
 // GetPrimtiveArrayCritical and disallow the use of any other JNI
 // functions.  The wrapper is expected to unpack the arguments before
 // passing them to the callee and perform checks before and after the
-// native call to ensure that they GC_locker
+// native call to ensure that they GCLocker
 // lock_critical/unlock_critical semantics are followed.  Some other
 // parts of JNI setup are skipped like the tear down of the JNI handle
 // block and the check for pending exceptions it's impossible for them
 // to be thrown.
 //
 // They are roughly structured like this:
-//   if (GC_locker::needs_gc())
+//   if (GCLocker::needs_gc())
 //     SharedRuntime::block_for_jni_critical();
 //   tranistion to thread_in_native
 //   unpack arrray arguments and call native entry point
@@ -3400,9 +3400,9 @@
 void SharedRuntime::montgomery_multiply(jint *a_ints, jint *b_ints, jint *n_ints,
                                         jint len, jlong inv,
                                         jint *m_ints) {
+  len = len & 0x7fffFFFF; // C2 does not respect int to long conversion for stub calls.
   assert(len % 2 == 0, "array length in montgomery_multiply must be even");
   int longwords = len/2;
-  assert(longwords > 0, "unsupported");
 
   // Make very sure we don't use so much space that the stack might
   // overflow. 512 jints corresponds to an 16384-bit integer and
@@ -3430,9 +3430,9 @@
 void SharedRuntime::montgomery_square(jint *a_ints, jint *n_ints,
                                       jint len, jlong inv,
                                       jint *m_ints) {
+  len = len & 0x7fffFFFF; // C2 does not respect int to long conversion for stub calls.
   assert(len % 2 == 0, "array length in montgomery_square must be even");
   int longwords = len/2;
-  assert(longwords > 0, "unsupported");
 
   // Make very sure we don't use so much space that the stack might
   // overflow. 512 jints corresponds to an 16384-bit integer and
--- a/hotspot/src/cpu/ppc/vm/stubGenerator_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/stubGenerator_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2016 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -1070,6 +1070,12 @@
     return start;
   }
 
+  inline void assert_positive_int(Register count) {
+#ifdef ASSERT
+    __ srdi_(R0, count, 31);
+    __ asm_assert_eq("missing zero extend", 0xAFFE);
+#endif
+  }
 
   // Generate overlap test for array copy stubs.
   //
@@ -1082,10 +1088,7 @@
     Register tmp1 = R6_ARG4;
     Register tmp2 = R7_ARG5;
 
-#ifdef ASSERT
-    __ srdi_(tmp2, R5_ARG3, 31);
-    __ asm_assert_eq("missing zero extend", 0xAFFE);
-#endif
+    assert_positive_int(R5_ARG3);
 
     __ subf(tmp1, R3_ARG1, R4_ARG2); // distance in bytes
     __ sldi(tmp2, R5_ARG3, log2_elem_size); // size in bytes
@@ -1125,14 +1128,15 @@
   address generate_disjoint_byte_copy(bool aligned, const char * name) {
     StubCodeMark mark(this, "StubRoutines", name);
     address start = __ function_entry();
+    assert_positive_int(R5_ARG3);
 
     Register tmp1 = R6_ARG4;
     Register tmp2 = R7_ARG5;
     Register tmp3 = R8_ARG6;
     Register tmp4 = R9_ARG7;
 
-
     Label l_1, l_2, l_3, l_4, l_5, l_6, l_7, l_8, l_9;
+
     // Don't try anything fancy if arrays don't have many elements.
     __ li(tmp3, 0);
     __ cmpwi(CCR0, R5_ARG3, 17);
@@ -1257,6 +1261,7 @@
   address generate_conjoint_byte_copy(bool aligned, const char * name) {
     StubCodeMark mark(this, "StubRoutines", name);
     address start = __ function_entry();
+    assert_positive_int(R5_ARG3);
 
     Register tmp1 = R6_ARG4;
     Register tmp2 = R7_ARG5;
@@ -1349,8 +1354,10 @@
     Register tmp4 = R9_ARG7;
 
     address start = __ function_entry();
+    assert_positive_int(R5_ARG3);
 
       Label l_1, l_2, l_3, l_4, l_5, l_6, l_7, l_8;
+
     // don't try anything fancy if arrays don't have many elements
     __ li(tmp3, 0);
     __ cmpwi(CCR0, R5_ARG3, 9);
@@ -1479,6 +1486,7 @@
   address generate_conjoint_short_copy(bool aligned, const char * name) {
     StubCodeMark mark(this, "StubRoutines", name);
     address start = __ function_entry();
+    assert_positive_int(R5_ARG3);
 
     Register tmp1 = R6_ARG4;
     Register tmp2 = R7_ARG5;
@@ -1521,6 +1529,7 @@
     Register tmp4 = R0;
 
     Label l_1, l_2, l_3, l_4, l_5, l_6;
+
     // for short arrays, just do single element copy
     __ li(tmp3, 0);
     __ cmpwi(CCR0, R5_ARG3, 5);
@@ -1603,6 +1612,7 @@
   address generate_disjoint_int_copy(bool aligned, const char * name) {
     StubCodeMark mark(this, "StubRoutines", name);
     address start = __ function_entry();
+    assert_positive_int(R5_ARG3);
     generate_disjoint_int_copy_core(aligned);
     __ li(R3_RET, 0); // return 0
     __ blr();
@@ -1688,7 +1698,7 @@
   address generate_conjoint_int_copy(bool aligned, const char * name) {
     StubCodeMark mark(this, "StubRoutines", name);
     address start = __ function_entry();
-
+    assert_positive_int(R5_ARG3);
     address nooverlap_target = aligned ?
       STUB_ENTRY(arrayof_jint_disjoint_arraycopy) :
       STUB_ENTRY(jint_disjoint_arraycopy);
@@ -1775,6 +1785,7 @@
   address generate_disjoint_long_copy(bool aligned, const char * name) {
     StubCodeMark mark(this, "StubRoutines", name);
     address start = __ function_entry();
+    assert_positive_int(R5_ARG3);
     generate_disjoint_long_copy_core(aligned);
     __ li(R3_RET, 0); // return 0
     __ blr();
@@ -1858,7 +1869,7 @@
   address generate_conjoint_long_copy(bool aligned, const char * name) {
     StubCodeMark mark(this, "StubRoutines", name);
     address start = __ function_entry();
-
+    assert_positive_int(R5_ARG3);
     address nooverlap_target = aligned ?
       STUB_ENTRY(arrayof_jlong_disjoint_arraycopy) :
       STUB_ENTRY(jlong_disjoint_arraycopy);
@@ -1885,7 +1896,7 @@
     StubCodeMark mark(this, "StubRoutines", name);
 
     address start = __ function_entry();
-
+    assert_positive_int(R5_ARG3);
     address nooverlap_target = aligned ?
       STUB_ENTRY(arrayof_oop_disjoint_arraycopy) :
       STUB_ENTRY(oop_disjoint_arraycopy);
@@ -1922,7 +1933,7 @@
   address generate_disjoint_oop_copy(bool aligned, const char * name, bool dest_uninitialized) {
     StubCodeMark mark(this, "StubRoutines", name);
     address start = __ function_entry();
-
+    assert_positive_int(R5_ARG3);
     gen_write_ref_array_pre_barrier(R3_ARG1, R4_ARG2, R5_ARG3, dest_uninitialized, R9_ARG7);
 
     // save some arguments, disjoint_long_copy_core destroys them.
@@ -1996,7 +2007,24 @@
     StubCodeMark mark(this, "StubRoutines", name);
     address start = __ function_entry();
 
-    // TODO: Assert that int is 64 bit sign extended and arrays are not conjoint.
+    // Assert that int is 64 bit sign extended and arrays are not conjoint.
+#ifdef ASSERT
+    {
+    assert_positive_int(R5_ARG3);
+    const Register tmp1 = R11_scratch1, tmp2 = R12_scratch2;
+    Label no_overlap;
+    __ subf(tmp1, R3_ARG1, R4_ARG2); // distance in bytes
+    __ sldi(tmp2, R5_ARG3, LogBytesPerHeapOop); // size in bytes
+    __ cmpld(CCR0, R3_ARG1, R4_ARG2); // Use unsigned comparison!
+    __ cmpld(CCR1, tmp1, tmp2);
+    __ crnand(CCR0, Assembler::less, CCR1, Assembler::less);
+    // Overlaps if Src before dst and distance smaller than size.
+    // Branch to forward copy routine otherwise.
+    __ blt(CCR0, no_overlap);
+    __ stop("overlap in checkcast_copy", 0x9543);
+    __ bind(no_overlap);
+    }
+#endif
 
     gen_write_ref_array_pre_barrier(R3_from, R4_to, R5_count, dest_uninitialized, R12_tmp, /* preserve: */ R6_ckoff, R7_ckval);
 
@@ -2445,12 +2473,14 @@
                                                              STUB_ENTRY(checkcast_arraycopy));
 
     // fill routines
-    StubRoutines::_jbyte_fill          = generate_fill(T_BYTE,  false, "jbyte_fill");
-    StubRoutines::_jshort_fill         = generate_fill(T_SHORT, false, "jshort_fill");
-    StubRoutines::_jint_fill           = generate_fill(T_INT,   false, "jint_fill");
-    StubRoutines::_arrayof_jbyte_fill  = generate_fill(T_BYTE,  true, "arrayof_jbyte_fill");
-    StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
-    StubRoutines::_arrayof_jint_fill   = generate_fill(T_INT,   true, "arrayof_jint_fill");
+    if (OptimizeFill) {
+      StubRoutines::_jbyte_fill          = generate_fill(T_BYTE,  false, "jbyte_fill");
+      StubRoutines::_jshort_fill         = generate_fill(T_SHORT, false, "jshort_fill");
+      StubRoutines::_jint_fill           = generate_fill(T_INT,   false, "jint_fill");
+      StubRoutines::_arrayof_jbyte_fill  = generate_fill(T_BYTE,  true, "arrayof_jbyte_fill");
+      StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
+      StubRoutines::_arrayof_jint_fill   = generate_fill(T_INT,   true, "arrayof_jint_fill");
+    }
   }
 
   // Safefetch stubs.
@@ -2535,6 +2565,11 @@
 
     BLOCK_COMMENT("Entry:");
 
+    // C2 does not respect int to long conversion for stub calls.
+    __ clrldi(xlen, xlen, 32);
+    __ clrldi(ylen, ylen, 32);
+    __ clrldi(zlen, zlen, 32);
+
     // Save non-volatile regs (frameless).
     int current_offs = 8;
     __ std(R24, -current_offs, R1_SP); current_offs += 8;
--- a/hotspot/src/cpu/ppc/vm/stubRoutines_ppc_64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/stubRoutines_ppc_64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/stubRoutines_ppc_64.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/stubRoutines_ppc_64.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/templateInterpreterGenerator_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/templateInterpreterGenerator_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2014, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2014, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -51,6 +51,13 @@
 #undef __
 #define __ _masm->
 
+// Size of interpreter code.  Increase if too small.  Interpreter will
+// fail with a guarantee ("not enough space for interpreter generation");
+// if too small.
+// Run with +PrintInterpreter to get the VM to print out the size.
+// Max size with JVMTI
+int TemplateInterpreter::InterpreterCodeSize = 230*K;
+
 #ifdef PRODUCT
 #define BLOCK_COMMENT(str) /* nothing */
 #else
@@ -61,6 +68,500 @@
 
 //-----------------------------------------------------------------------------
 
+address TemplateInterpreterGenerator::generate_slow_signature_handler() {
+  // Slow_signature handler that respects the PPC C calling conventions.
+  //
+  // We get called by the native entry code with our output register
+  // area == 8. First we call InterpreterRuntime::get_result_handler
+  // to copy the pointer to the signature string temporarily to the
+  // first C-argument and to return the result_handler in
+  // R3_RET. Since native_entry will copy the jni-pointer to the
+  // first C-argument slot later on, it is OK to occupy this slot
+  // temporarilly. Then we copy the argument list on the java
+  // expression stack into native varargs format on the native stack
+  // and load arguments into argument registers. Integer arguments in
+  // the varargs vector will be sign-extended to 8 bytes.
+  //
+  // On entry:
+  //   R3_ARG1        - intptr_t*     Address of java argument list in memory.
+  //   R15_prev_state - BytecodeInterpreter* Address of interpreter state for
+  //     this method
+  //   R19_method
+  //
+  // On exit (just before return instruction):
+  //   R3_RET            - contains the address of the result_handler.
+  //   R4_ARG2           - is not updated for static methods and contains "this" otherwise.
+  //   R5_ARG3-R10_ARG8: - When the (i-2)th Java argument is not of type float or double,
+  //                       ARGi contains this argument. Otherwise, ARGi is not updated.
+  //   F1_ARG1-F13_ARG13 - contain the first 13 arguments of type float or double.
+
+  const int LogSizeOfTwoInstructions = 3;
+
+  // FIXME: use Argument:: GL: Argument names different numbers!
+  const int max_fp_register_arguments  = 13;
+  const int max_int_register_arguments = 6;  // first 2 are reserved
+
+  const Register arg_java       = R21_tmp1;
+  const Register arg_c          = R22_tmp2;
+  const Register signature      = R23_tmp3;  // is string
+  const Register sig_byte       = R24_tmp4;
+  const Register fpcnt          = R25_tmp5;
+  const Register argcnt         = R26_tmp6;
+  const Register intSlot        = R27_tmp7;
+  const Register target_sp      = R28_tmp8;
+  const FloatRegister floatSlot = F0;
+
+  address entry = __ function_entry();
+
+  __ save_LR_CR(R0);
+  __ save_nonvolatile_gprs(R1_SP, _spill_nonvolatiles_neg(r14));
+  // We use target_sp for storing arguments in the C frame.
+  __ mr(target_sp, R1_SP);
+  __ push_frame_reg_args_nonvolatiles(0, R11_scratch1);
+
+  __ mr(arg_java, R3_ARG1);
+
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::get_signature), R16_thread, R19_method);
+
+  // Signature is in R3_RET. Signature is callee saved.
+  __ mr(signature, R3_RET);
+
+  // Get the result handler.
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::get_result_handler), R16_thread, R19_method);
+
+  {
+    Label L;
+    // test if static
+    // _access_flags._flags must be at offset 0.
+    // TODO PPC port: requires change in shared code.
+    //assert(in_bytes(AccessFlags::flags_offset()) == 0,
+    //       "MethodDesc._access_flags == MethodDesc._access_flags._flags");
+    // _access_flags must be a 32 bit value.
+    assert(sizeof(AccessFlags) == 4, "wrong size");
+    __ lwa(R11_scratch1/*access_flags*/, method_(access_flags));
+    // testbit with condition register.
+    __ testbitdi(CCR0, R0, R11_scratch1/*access_flags*/, JVM_ACC_STATIC_BIT);
+    __ btrue(CCR0, L);
+    // For non-static functions, pass "this" in R4_ARG2 and copy it
+    // to 2nd C-arg slot.
+    // We need to box the Java object here, so we use arg_java
+    // (address of current Java stack slot) as argument and don't
+    // dereference it as in case of ints, floats, etc.
+    __ mr(R4_ARG2, arg_java);
+    __ addi(arg_java, arg_java, -BytesPerWord);
+    __ std(R4_ARG2, _abi(carg_2), target_sp);
+    __ bind(L);
+  }
+
+  // Will be incremented directly after loop_start. argcnt=0
+  // corresponds to 3rd C argument.
+  __ li(argcnt, -1);
+  // arg_c points to 3rd C argument
+  __ addi(arg_c, target_sp, _abi(carg_3));
+  // no floating-point args parsed so far
+  __ li(fpcnt, 0);
+
+  Label move_intSlot_to_ARG, move_floatSlot_to_FARG;
+  Label loop_start, loop_end;
+  Label do_int, do_long, do_float, do_double, do_dontreachhere, do_object, do_array, do_boxed;
+
+  // signature points to '(' at entry
+#ifdef ASSERT
+  __ lbz(sig_byte, 0, signature);
+  __ cmplwi(CCR0, sig_byte, '(');
+  __ bne(CCR0, do_dontreachhere);
+#endif
+
+  __ bind(loop_start);
+
+  __ addi(argcnt, argcnt, 1);
+  __ lbzu(sig_byte, 1, signature);
+
+  __ cmplwi(CCR0, sig_byte, ')'); // end of signature
+  __ beq(CCR0, loop_end);
+
+  __ cmplwi(CCR0, sig_byte, 'B'); // byte
+  __ beq(CCR0, do_int);
+
+  __ cmplwi(CCR0, sig_byte, 'C'); // char
+  __ beq(CCR0, do_int);
+
+  __ cmplwi(CCR0, sig_byte, 'D'); // double
+  __ beq(CCR0, do_double);
+
+  __ cmplwi(CCR0, sig_byte, 'F'); // float
+  __ beq(CCR0, do_float);
+
+  __ cmplwi(CCR0, sig_byte, 'I'); // int
+  __ beq(CCR0, do_int);
+
+  __ cmplwi(CCR0, sig_byte, 'J'); // long
+  __ beq(CCR0, do_long);
+
+  __ cmplwi(CCR0, sig_byte, 'S'); // short
+  __ beq(CCR0, do_int);
+
+  __ cmplwi(CCR0, sig_byte, 'Z'); // boolean
+  __ beq(CCR0, do_int);
+
+  __ cmplwi(CCR0, sig_byte, 'L'); // object
+  __ beq(CCR0, do_object);
+
+  __ cmplwi(CCR0, sig_byte, '['); // array
+  __ beq(CCR0, do_array);
+
+  //  __ cmplwi(CCR0, sig_byte, 'V'); // void cannot appear since we do not parse the return type
+  //  __ beq(CCR0, do_void);
+
+  __ bind(do_dontreachhere);
+
+  __ unimplemented("ShouldNotReachHere in slow_signature_handler", 120);
+
+  __ bind(do_array);
+
+  {
+    Label start_skip, end_skip;
+
+    __ bind(start_skip);
+    __ lbzu(sig_byte, 1, signature);
+    __ cmplwi(CCR0, sig_byte, '[');
+    __ beq(CCR0, start_skip); // skip further brackets
+    __ cmplwi(CCR0, sig_byte, '9');
+    __ bgt(CCR0, end_skip);   // no optional size
+    __ cmplwi(CCR0, sig_byte, '0');
+    __ bge(CCR0, start_skip); // skip optional size
+    __ bind(end_skip);
+
+    __ cmplwi(CCR0, sig_byte, 'L');
+    __ beq(CCR0, do_object);  // for arrays of objects, the name of the object must be skipped
+    __ b(do_boxed);          // otherwise, go directly to do_boxed
+  }
+
+  __ bind(do_object);
+  {
+    Label L;
+    __ bind(L);
+    __ lbzu(sig_byte, 1, signature);
+    __ cmplwi(CCR0, sig_byte, ';');
+    __ bne(CCR0, L);
+   }
+  // Need to box the Java object here, so we use arg_java (address of
+  // current Java stack slot) as argument and don't dereference it as
+  // in case of ints, floats, etc.
+  Label do_null;
+  __ bind(do_boxed);
+  __ ld(R0,0, arg_java);
+  __ cmpdi(CCR0, R0, 0);
+  __ li(intSlot,0);
+  __ beq(CCR0, do_null);
+  __ mr(intSlot, arg_java);
+  __ bind(do_null);
+  __ std(intSlot, 0, arg_c);
+  __ addi(arg_java, arg_java, -BytesPerWord);
+  __ addi(arg_c, arg_c, BytesPerWord);
+  __ cmplwi(CCR0, argcnt, max_int_register_arguments);
+  __ blt(CCR0, move_intSlot_to_ARG);
+  __ b(loop_start);
+
+  __ bind(do_int);
+  __ lwa(intSlot, 0, arg_java);
+  __ std(intSlot, 0, arg_c);
+  __ addi(arg_java, arg_java, -BytesPerWord);
+  __ addi(arg_c, arg_c, BytesPerWord);
+  __ cmplwi(CCR0, argcnt, max_int_register_arguments);
+  __ blt(CCR0, move_intSlot_to_ARG);
+  __ b(loop_start);
+
+  __ bind(do_long);
+  __ ld(intSlot, -BytesPerWord, arg_java);
+  __ std(intSlot, 0, arg_c);
+  __ addi(arg_java, arg_java, - 2 * BytesPerWord);
+  __ addi(arg_c, arg_c, BytesPerWord);
+  __ cmplwi(CCR0, argcnt, max_int_register_arguments);
+  __ blt(CCR0, move_intSlot_to_ARG);
+  __ b(loop_start);
+
+  __ bind(do_float);
+  __ lfs(floatSlot, 0, arg_java);
+#if defined(LINUX)
+  // Linux uses ELF ABI. Both original ELF and ELFv2 ABIs have float
+  // in the least significant word of an argument slot.
+#if defined(VM_LITTLE_ENDIAN)
+  __ stfs(floatSlot, 0, arg_c);
+#else
+  __ stfs(floatSlot, 4, arg_c);
+#endif
+#elif defined(AIX)
+  // Although AIX runs on big endian CPU, float is in most significant
+  // word of an argument slot.
+  __ stfs(floatSlot, 0, arg_c);
+#else
+#error "unknown OS"
+#endif
+  __ addi(arg_java, arg_java, -BytesPerWord);
+  __ addi(arg_c, arg_c, BytesPerWord);
+  __ cmplwi(CCR0, fpcnt, max_fp_register_arguments);
+  __ blt(CCR0, move_floatSlot_to_FARG);
+  __ b(loop_start);
+
+  __ bind(do_double);
+  __ lfd(floatSlot, - BytesPerWord, arg_java);
+  __ stfd(floatSlot, 0, arg_c);
+  __ addi(arg_java, arg_java, - 2 * BytesPerWord);
+  __ addi(arg_c, arg_c, BytesPerWord);
+  __ cmplwi(CCR0, fpcnt, max_fp_register_arguments);
+  __ blt(CCR0, move_floatSlot_to_FARG);
+  __ b(loop_start);
+
+  __ bind(loop_end);
+
+  __ pop_frame();
+  __ restore_nonvolatile_gprs(R1_SP, _spill_nonvolatiles_neg(r14));
+  __ restore_LR_CR(R0);
+
+  __ blr();
+
+  Label move_int_arg, move_float_arg;
+  __ bind(move_int_arg); // each case must consist of 2 instructions (otherwise adapt LogSizeOfTwoInstructions)
+  __ mr(R5_ARG3, intSlot);  __ b(loop_start);
+  __ mr(R6_ARG4, intSlot);  __ b(loop_start);
+  __ mr(R7_ARG5, intSlot);  __ b(loop_start);
+  __ mr(R8_ARG6, intSlot);  __ b(loop_start);
+  __ mr(R9_ARG7, intSlot);  __ b(loop_start);
+  __ mr(R10_ARG8, intSlot); __ b(loop_start);
+
+  __ bind(move_float_arg); // each case must consist of 2 instructions (otherwise adapt LogSizeOfTwoInstructions)
+  __ fmr(F1_ARG1, floatSlot);   __ b(loop_start);
+  __ fmr(F2_ARG2, floatSlot);   __ b(loop_start);
+  __ fmr(F3_ARG3, floatSlot);   __ b(loop_start);
+  __ fmr(F4_ARG4, floatSlot);   __ b(loop_start);
+  __ fmr(F5_ARG5, floatSlot);   __ b(loop_start);
+  __ fmr(F6_ARG6, floatSlot);   __ b(loop_start);
+  __ fmr(F7_ARG7, floatSlot);   __ b(loop_start);
+  __ fmr(F8_ARG8, floatSlot);   __ b(loop_start);
+  __ fmr(F9_ARG9, floatSlot);   __ b(loop_start);
+  __ fmr(F10_ARG10, floatSlot); __ b(loop_start);
+  __ fmr(F11_ARG11, floatSlot); __ b(loop_start);
+  __ fmr(F12_ARG12, floatSlot); __ b(loop_start);
+  __ fmr(F13_ARG13, floatSlot); __ b(loop_start);
+
+  __ bind(move_intSlot_to_ARG);
+  __ sldi(R0, argcnt, LogSizeOfTwoInstructions);
+  __ load_const(R11_scratch1, move_int_arg); // Label must be bound here.
+  __ add(R11_scratch1, R0, R11_scratch1);
+  __ mtctr(R11_scratch1/*branch_target*/);
+  __ bctr();
+  __ bind(move_floatSlot_to_FARG);
+  __ sldi(R0, fpcnt, LogSizeOfTwoInstructions);
+  __ addi(fpcnt, fpcnt, 1);
+  __ load_const(R11_scratch1, move_float_arg); // Label must be bound here.
+  __ add(R11_scratch1, R0, R11_scratch1);
+  __ mtctr(R11_scratch1/*branch_target*/);
+  __ bctr();
+
+  return entry;
+}
+
+address TemplateInterpreterGenerator::generate_result_handler_for(BasicType type) {
+  //
+  // Registers alive
+  //   R3_RET
+  //   LR
+  //
+  // Registers updated
+  //   R3_RET
+  //
+
+  Label done;
+  address entry = __ pc();
+
+  switch (type) {
+  case T_BOOLEAN:
+    // convert !=0 to 1
+    __ neg(R0, R3_RET);
+    __ orr(R0, R3_RET, R0);
+    __ srwi(R3_RET, R0, 31);
+    break;
+  case T_BYTE:
+     // sign extend 8 bits
+     __ extsb(R3_RET, R3_RET);
+     break;
+  case T_CHAR:
+     // zero extend 16 bits
+     __ clrldi(R3_RET, R3_RET, 48);
+     break;
+  case T_SHORT:
+     // sign extend 16 bits
+     __ extsh(R3_RET, R3_RET);
+     break;
+  case T_INT:
+     // sign extend 32 bits
+     __ extsw(R3_RET, R3_RET);
+     break;
+  case T_LONG:
+     break;
+  case T_OBJECT:
+    // unbox result if not null
+    __ cmpdi(CCR0, R3_RET, 0);
+    __ beq(CCR0, done);
+    __ ld(R3_RET, 0, R3_RET);
+    __ verify_oop(R3_RET);
+    break;
+  case T_FLOAT:
+     break;
+  case T_DOUBLE:
+     break;
+  case T_VOID:
+     break;
+  default: ShouldNotReachHere();
+  }
+
+  BIND(done);
+  __ blr();
+
+  return entry;
+}
+
+// Abstract method entry.
+//
+address TemplateInterpreterGenerator::generate_abstract_entry(void) {
+  address entry = __ pc();
+
+  //
+  // Registers alive
+  //   R16_thread     - JavaThread*
+  //   R19_method     - callee's method (method to be invoked)
+  //   R1_SP          - SP prepared such that caller's outgoing args are near top
+  //   LR             - return address to caller
+  //
+  // Stack layout at this point:
+  //
+  //   0       [TOP_IJAVA_FRAME_ABI]         <-- R1_SP
+  //           alignment (optional)
+  //           [outgoing Java arguments]
+  //           ...
+  //   PARENT  [PARENT_IJAVA_FRAME_ABI]
+  //            ...
+  //
+
+  // Can't use call_VM here because we have not set up a new
+  // interpreter state. Make the call to the vm and make it look like
+  // our caller set up the JavaFrameAnchor.
+  __ set_top_ijava_frame_at_SP_as_last_Java_frame(R1_SP, R12_scratch2/*tmp*/);
+
+  // Push a new C frame and save LR.
+  __ save_LR_CR(R0);
+  __ push_frame_reg_args(0, R11_scratch1);
+
+  // This is not a leaf but we have a JavaFrameAnchor now and we will
+  // check (create) exceptions afterward so this is ok.
+  __ call_VM_leaf(CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_AbstractMethodError),
+                  R16_thread);
+
+  // Pop the C frame and restore LR.
+  __ pop_frame();
+  __ restore_LR_CR(R0);
+
+  // Reset JavaFrameAnchor from call_VM_leaf above.
+  __ reset_last_Java_frame();
+
+  // We don't know our caller, so jump to the general forward exception stub,
+  // which will also pop our full frame off. Satisfy the interface of
+  // SharedRuntime::generate_forward_exception()
+  __ load_const_optimized(R11_scratch1, StubRoutines::forward_exception_entry(), R0);
+  __ mtctr(R11_scratch1);
+  __ bctr();
+
+  return entry;
+}
+
+// Interpreter intrinsic for WeakReference.get().
+// 1. Don't push a full blown frame and go on dispatching, but fetch the value
+//    into R8 and return quickly
+// 2. If G1 is active we *must* execute this intrinsic for corrrectness:
+//    It contains a GC barrier which puts the reference into the satb buffer
+//    to indicate that someone holds a strong reference to the object the
+//    weak ref points to!
+address TemplateInterpreterGenerator::generate_Reference_get_entry(void) {
+  // Code: _aload_0, _getfield, _areturn
+  // parameter size = 1
+  //
+  // The code that gets generated by this routine is split into 2 parts:
+  //    1. the "intrinsified" code for G1 (or any SATB based GC),
+  //    2. the slow path - which is an expansion of the regular method entry.
+  //
+  // Notes:
+  // * In the G1 code we do not check whether we need to block for
+  //   a safepoint. If G1 is enabled then we must execute the specialized
+  //   code for Reference.get (except when the Reference object is null)
+  //   so that we can log the value in the referent field with an SATB
+  //   update buffer.
+  //   If the code for the getfield template is modified so that the
+  //   G1 pre-barrier code is executed when the current method is
+  //   Reference.get() then going through the normal method entry
+  //   will be fine.
+  // * The G1 code can, however, check the receiver object (the instance
+  //   of java.lang.Reference) and jump to the slow path if null. If the
+  //   Reference object is null then we obviously cannot fetch the referent
+  //   and so we don't need to call the G1 pre-barrier. Thus we can use the
+  //   regular method entry code to generate the NPE.
+  //
+
+  if (UseG1GC) {
+    address entry = __ pc();
+
+    const int referent_offset = java_lang_ref_Reference::referent_offset;
+    guarantee(referent_offset > 0, "referent offset not initialized");
+
+    Label slow_path;
+
+    // Debugging not possible, so can't use __ skip_if_jvmti_mode(slow_path, GR31_SCRATCH);
+
+    // In the G1 code we don't check if we need to reach a safepoint. We
+    // continue and the thread will safepoint at the next bytecode dispatch.
+
+    // If the receiver is null then it is OK to jump to the slow path.
+    __ ld(R3_RET, Interpreter::stackElementSize, R15_esp); // get receiver
+
+    // Check if receiver == NULL and go the slow path.
+    __ cmpdi(CCR0, R3_RET, 0);
+    __ beq(CCR0, slow_path);
+
+    // Load the value of the referent field.
+    __ load_heap_oop(R3_RET, referent_offset, R3_RET);
+
+    // Generate the G1 pre-barrier code to log the value of
+    // the referent field in an SATB buffer. Note with
+    // these parameters the pre-barrier does not generate
+    // the load of the previous value.
+
+    // Restore caller sp for c2i case.
+#ifdef ASSERT
+      __ ld(R9_ARG7, 0, R1_SP);
+      __ ld(R10_ARG8, 0, R21_sender_SP);
+      __ cmpd(CCR0, R9_ARG7, R10_ARG8);
+      __ asm_assert_eq("backlink", 0x544);
+#endif // ASSERT
+    __ mr(R1_SP, R21_sender_SP); // Cut the stack back to where the caller started.
+
+    __ g1_write_barrier_pre(noreg,         // obj
+                            noreg,         // offset
+                            R3_RET,        // pre_val
+                            R11_scratch1,  // tmp
+                            R12_scratch2,  // tmp
+                            true);         // needs_frame
+
+    __ blr();
+
+    // Generate regular method entry.
+    __ bind(slow_path);
+    __ jump_to_entry(Interpreter::entry_for_kind(Interpreter::zerolocals), R11_scratch1);
+    return entry;
+  }
+
+  return NULL;
+}
+
 // Actually we should never reach here since we do stack overflow checks before pushing any frame.
 address TemplateInterpreterGenerator::generate_StackOverflowError_handler() {
   address entry = __ pc();
@@ -222,12 +723,6 @@
   return entry;
 }
 
-// A result handler converts the native result into java format.
-// Use the shared code between c++ and template interpreter.
-address TemplateInterpreterGenerator::generate_result_handler_for(BasicType type) {
-  return AbstractInterpreterGenerator::generate_result_handler_for(type);
-}
-
 address TemplateInterpreterGenerator::generate_safept_entry_for(TosState state, address runtime_entry) {
   address entry = __ pc();
 
@@ -602,7 +1097,7 @@
 // End of helpers
 
 address TemplateInterpreterGenerator::generate_math_entry(AbstractInterpreter::MethodKind kind) {
-  if (!TemplateInterpreter::math_entry_available(kind)) {
+  if (!Interpreter::math_entry_available(kind)) {
     NOT_PRODUCT(__ should_not_reach_here();)
     return NULL;
   }
--- a/hotspot/src/cpu/ppc/vm/templateInterpreter_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,173 +0,0 @@
-/*
- * Copyright (c) 2014, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2015 SAP AG. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- *
- */
-
-#include "precompiled.hpp"
-#include "interpreter/interpreter.hpp"
-#include "oops/constMethod.hpp"
-#include "oops/method.hpp"
-#include "runtime/frame.inline.hpp"
-#include "utilities/debug.hpp"
-#include "utilities/macros.hpp"
-
-// Size of interpreter code.  Increase if too small.  Interpreter will
-// fail with a guarantee ("not enough space for interpreter generation");
-// if too small.
-// Run with +PrintInterpreter to get the VM to print out the size.
-// Max size with JVMTI
-int TemplateInterpreter::InterpreterCodeSize = 230*K;
-
-int AbstractInterpreter::BasicType_as_index(BasicType type) {
-  int i = 0;
-  switch (type) {
-    case T_BOOLEAN: i = 0; break;
-    case T_CHAR   : i = 1; break;
-    case T_BYTE   : i = 2; break;
-    case T_SHORT  : i = 3; break;
-    case T_INT    : i = 4; break;
-    case T_LONG   : i = 5; break;
-    case T_VOID   : i = 6; break;
-    case T_FLOAT  : i = 7; break;
-    case T_DOUBLE : i = 8; break;
-    case T_OBJECT : i = 9; break;
-    case T_ARRAY  : i = 9; break;
-    default       : ShouldNotReachHere();
-  }
-  assert(0 <= i && i < AbstractInterpreter::number_of_result_handlers, "index out of bounds");
-  return i;
-}
-
-// These should never be compiled since the interpreter will prefer
-// the compiled version to the intrinsic version.
-bool AbstractInterpreter::can_be_compiled(methodHandle m) {
-  return !TemplateInterpreter::math_entry_available(method_kind(m));
-}
-
-// How much stack a method activation needs in stack slots.
-// We must calc this exactly like in generate_fixed_frame.
-// Note: This returns the conservative size assuming maximum alignment.
-int AbstractInterpreter::size_top_interpreter_activation(Method* method) {
-  const int max_alignment_size = 2;
-  const int abi_scratch = frame::abi_reg_args_size;
-  return method->max_locals() + method->max_stack() +
-         frame::interpreter_frame_monitor_size() + max_alignment_size + abi_scratch;
-}
-
-// Returns number of stackElementWords needed for the interpreter frame with the
-// given sections.
-// This overestimates the stack by one slot in case of alignments.
-int AbstractInterpreter::size_activation(int max_stack,
-                                         int temps,
-                                         int extra_args,
-                                         int monitors,
-                                         int callee_params,
-                                         int callee_locals,
-                                         bool is_top_frame) {
-  // Note: This calculation must exactly parallel the frame setup
-  // in TemplateInterpreterGenerator::generate_fixed_frame.
-  assert(Interpreter::stackElementWords == 1, "sanity");
-  const int max_alignment_space = StackAlignmentInBytes / Interpreter::stackElementSize;
-  const int abi_scratch = is_top_frame ? (frame::abi_reg_args_size / Interpreter::stackElementSize) :
-                                         (frame::abi_minframe_size / Interpreter::stackElementSize);
-  const int size =
-    max_stack                                                +
-    (callee_locals - callee_params)                          +
-    monitors * frame::interpreter_frame_monitor_size()       +
-    max_alignment_space                                      +
-    abi_scratch                                              +
-    frame::ijava_state_size / Interpreter::stackElementSize;
-
-  // Fixed size of an interpreter frame, align to 16-byte.
-  return (size & -2);
-}
-
-// Fills a sceletal interpreter frame generated during deoptimizations.
-//
-// Parameters:
-//
-// interpreter_frame != NULL:
-//   set up the method, locals, and monitors.
-//   The frame interpreter_frame, if not NULL, is guaranteed to be the
-//   right size, as determined by a previous call to this method.
-//   It is also guaranteed to be walkable even though it is in a skeletal state
-//
-// is_top_frame == true:
-//   We're processing the *oldest* interpreter frame!
-//
-// pop_frame_extra_args:
-//   If this is != 0 we are returning to a deoptimized frame by popping
-//   off the callee frame. We want to re-execute the call that called the
-//   callee interpreted, but since the return to the interpreter would pop
-//   the arguments off advance the esp by dummy popframe_extra_args slots.
-//   Popping off those will establish the stack layout as it was before the call.
-//
-void AbstractInterpreter::layout_activation(Method* method,
-                                            int tempcount,
-                                            int popframe_extra_args,
-                                            int moncount,
-                                            int caller_actual_parameters,
-                                            int callee_param_count,
-                                            int callee_locals_count,
-                                            frame* caller,
-                                            frame* interpreter_frame,
-                                            bool is_top_frame,
-                                            bool is_bottom_frame) {
-
-  const int abi_scratch = is_top_frame ? (frame::abi_reg_args_size / Interpreter::stackElementSize) :
-                                         (frame::abi_minframe_size / Interpreter::stackElementSize);
-
-  intptr_t* locals_base  = (caller->is_interpreted_frame()) ?
-    caller->interpreter_frame_esp() + caller_actual_parameters :
-    caller->sp() + method->max_locals() - 1 + (frame::abi_minframe_size / Interpreter::stackElementSize);
-
-  intptr_t* monitor_base = caller->sp() - frame::ijava_state_size / Interpreter::stackElementSize;
-  intptr_t* monitor      = monitor_base - (moncount * frame::interpreter_frame_monitor_size());
-  intptr_t* esp_base     = monitor - 1;
-  intptr_t* esp          = esp_base - tempcount - popframe_extra_args;
-  intptr_t* sp           = (intptr_t *) (((intptr_t) (esp_base - callee_locals_count + callee_param_count - method->max_stack()- abi_scratch)) & -StackAlignmentInBytes);
-  intptr_t* sender_sp    = caller->sp() + (frame::abi_minframe_size - frame::abi_reg_args_size) / Interpreter::stackElementSize;
-  intptr_t* top_frame_sp = is_top_frame ? sp : sp + (frame::abi_minframe_size - frame::abi_reg_args_size) / Interpreter::stackElementSize;
-
-  interpreter_frame->interpreter_frame_set_method(method);
-  interpreter_frame->interpreter_frame_set_locals(locals_base);
-  interpreter_frame->interpreter_frame_set_cpcache(method->constants()->cache());
-  interpreter_frame->interpreter_frame_set_esp(esp);
-  interpreter_frame->interpreter_frame_set_monitor_end((BasicObjectLock *)monitor);
-  interpreter_frame->interpreter_frame_set_top_frame_sp(top_frame_sp);
-  if (!is_bottom_frame) {
-    interpreter_frame->interpreter_frame_set_sender_sp(sender_sp);
-  }
-}
-
-// Support abs and sqrt like in compiler.
-// For others we can use a normal (native) entry.
-
-bool TemplateInterpreter::math_entry_available(AbstractInterpreter::MethodKind kind) {
-  if (!InlineIntrinsics) return false;
-
-  return ((kind==Interpreter::java_lang_math_sqrt && VM_Version::has_fsqrt()) ||
-          (kind==Interpreter::java_lang_math_abs));
-}
-
-
--- a/hotspot/src/cpu/ppc/vm/templateInterpreter_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,42 +0,0 @@
-/*
- * Copyright (c) 2014, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2013, 2015 SAP AG. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- *
- */
-
-#ifndef CPU_PPC_VM_TEMPLATEINTERPRETER_PPC_HPP
-#define CPU_PPC_VM_TEMPLATEINTERPRETER_PPC_HPP
-
- protected:
-
-  // Size of interpreter code. Increase if too small.  Interpreter will
-  // fail with a guarantee ("not enough space for interpreter generation");
-  // if too small.
-  // Run with +PrintInterpreter to get the VM to print out the size.
-  // Max size with JVMTI
-  const static int InterpreterCodeSize = 230*K;
-
- public:
-  // Support abs and sqrt like in compiler.
-  // For others we can use a normal (native) entry.
-  static bool math_entry_available(AbstractInterpreter::MethodKind kind);
-#endif // CPU_PPC_VM_TEMPLATEINTERPRETER_PPC_HPP
--- a/hotspot/src/cpu/ppc/vm/templateTable_ppc_64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/templateTable_ppc_64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2014, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2013, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2013, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/templateTable_ppc_64.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/templateTable_ppc_64.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2013, 2014 SAP AG. All rights reserved.
+ * Copyright (c) 2013, 2014 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/vmStructs_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/vmStructs_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/vm_version_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/vm_version_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/vm_version_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/vm_version_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/vmreg_ppc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/vmreg_ppc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/vmreg_ppc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/vmreg_ppc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2001, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/vmreg_ppc.inline.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/vmreg_ppc.inline.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2013 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- a/hotspot/src/cpu/ppc/vm/vtableStubs_ppc_64.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/ppc/vm/vtableStubs_ppc_64.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * Copyright 2012, 2015 SAP AG. All rights reserved.
+ * Copyright (c) 2012, 2015 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/hotspot/src/cpu/sparc/vm/abstractInterpreter_sparc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -0,0 +1,304 @@
+/*
+ * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ *
+ */
+
+#include "precompiled.hpp"
+#include "interpreter/interpreter.hpp"
+#include "oops/constMethod.hpp"
+#include "oops/method.hpp"
+#include "runtime/arguments.hpp"
+#include "runtime/frame.inline.hpp"
+#include "runtime/synchronizer.hpp"
+#include "utilities/macros.hpp"
+
+
+int AbstractInterpreter::BasicType_as_index(BasicType type) {
+  int i = 0;
+  switch (type) {
+    case T_BOOLEAN: i = 0; break;
+    case T_CHAR   : i = 1; break;
+    case T_BYTE   : i = 2; break;
+    case T_SHORT  : i = 3; break;
+    case T_INT    : i = 4; break;
+    case T_LONG   : i = 5; break;
+    case T_VOID   : i = 6; break;
+    case T_FLOAT  : i = 7; break;
+    case T_DOUBLE : i = 8; break;
+    case T_OBJECT : i = 9; break;
+    case T_ARRAY  : i = 9; break;
+    default       : ShouldNotReachHere();
+  }
+  assert(0 <= i && i < AbstractInterpreter::number_of_result_handlers, "index out of bounds");
+  return i;
+}
+
+bool AbstractInterpreter::can_be_compiled(methodHandle m) {
+  // No special entry points that preclude compilation
+  return true;
+}
+
+static int size_activation_helper(int callee_extra_locals, int max_stack, int monitor_size) {
+
+  // Figure out the size of an interpreter frame (in words) given that we have a fully allocated
+  // expression stack, the callee will have callee_extra_locals (so we can account for
+  // frame extension) and monitor_size for monitors. Basically we need to calculate
+  // this exactly like generate_fixed_frame/generate_compute_interpreter_state.
+  //
+  //
+  // The big complicating thing here is that we must ensure that the stack stays properly
+  // aligned. This would be even uglier if monitor size wasn't modulo what the stack
+  // needs to be aligned for). We are given that the sp (fp) is already aligned by
+  // the caller so we must ensure that it is properly aligned for our callee.
+  //
+  const int rounded_vm_local_words =
+       round_to(frame::interpreter_frame_vm_local_words,WordsPerLong);
+  // callee_locals and max_stack are counts, not the size in frame.
+  const int locals_size =
+       round_to(callee_extra_locals * Interpreter::stackElementWords, WordsPerLong);
+  const int max_stack_words = max_stack * Interpreter::stackElementWords;
+  return (round_to((max_stack_words
+                   + rounded_vm_local_words
+                   + frame::memory_parameter_word_sp_offset), WordsPerLong)
+                   // already rounded
+                   + locals_size + monitor_size);
+}
+
+// How much stack a method top interpreter activation needs in words.
+int AbstractInterpreter::size_top_interpreter_activation(Method* method) {
+
+  // See call_stub code
+  int call_stub_size  = round_to(7 + frame::memory_parameter_word_sp_offset,
+                                 WordsPerLong);    // 7 + register save area
+
+  // Save space for one monitor to get into the interpreted method in case
+  // the method is synchronized
+  int monitor_size    = method->is_synchronized() ?
+                                1*frame::interpreter_frame_monitor_size() : 0;
+  return size_activation_helper(method->max_locals(), method->max_stack(),
+                                monitor_size) + call_stub_size;
+}
+
+int AbstractInterpreter::size_activation(int max_stack,
+                                         int temps,
+                                         int extra_args,
+                                         int monitors,
+                                         int callee_params,
+                                         int callee_locals,
+                                         bool is_top_frame) {
+  // Note: This calculation must exactly parallel the frame setup
+  // in TemplateInterpreterGenerator::generate_fixed_frame.
+
+  int monitor_size           = monitors * frame::interpreter_frame_monitor_size();
+
+  assert(monitor_size == round_to(monitor_size, WordsPerLong), "must align");
+
+  //
+  // Note: if you look closely this appears to be doing something much different
+  // than generate_fixed_frame. What is happening is this. On sparc we have to do
+  // this dance with interpreter_sp_adjustment because the window save area would
+  // appear just below the bottom (tos) of the caller's java expression stack. Because
+  // the interpreter want to have the locals completely contiguous generate_fixed_frame
+  // will adjust the caller's sp for the "extra locals" (max_locals - parameter_size).
+  // Now in generate_fixed_frame the extension of the caller's sp happens in the callee.
+  // In this code the opposite occurs the caller adjusts it's own stack base on the callee.
+  // This is mostly ok but it does cause a problem when we get to the initial frame (the oldest)
+  // because the oldest frame would have adjust its callers frame and yet that frame
+  // already exists and isn't part of this array of frames we are unpacking. So at first
+  // glance this would seem to mess up that frame. However Deoptimization::fetch_unroll_info_helper()
+  // will after it calculates all of the frame's on_stack_size()'s will then figure out the
+  // amount to adjust the caller of the initial (oldest) frame and the calculation will all
+  // add up. It does seem like it simpler to account for the adjustment here (and remove the
+  // callee... parameters here). However this would mean that this routine would have to take
+  // the caller frame as input so we could adjust its sp (and set it's interpreter_sp_adjustment)
+  // and run the calling loop in the reverse order. This would also would appear to mean making
+  // this code aware of what the interactions are when that initial caller fram was an osr or
+  // other adapter frame. deoptimization is complicated enough and  hard enough to debug that
+  // there is no sense in messing working code.
+  //
+
+  int rounded_cls = round_to((callee_locals - callee_params), WordsPerLong);
+  assert(rounded_cls == round_to(rounded_cls, WordsPerLong), "must align");
+
+  int raw_frame_size = size_activation_helper(rounded_cls, max_stack, monitor_size);
+
+  return raw_frame_size;
+}
+
+void AbstractInterpreter::layout_activation(Method* method,
+                                            int tempcount,
+                                            int popframe_extra_args,
+                                            int moncount,
+                                            int caller_actual_parameters,
+                                            int callee_param_count,
+                                            int callee_local_count,
+                                            frame* caller,
+                                            frame* interpreter_frame,
+                                            bool is_top_frame,
+                                            bool is_bottom_frame) {
+  // Set up the following variables:
+  //   - Lmethod
+  //   - Llocals
+  //   - Lmonitors (to the indicated number of monitors)
+  //   - Lesp (to the indicated number of temps)
+  // The frame caller on entry is a description of the caller of the
+  // frame we are about to layout. We are guaranteed that we will be
+  // able to fill in a new interpreter frame as its callee (i.e. the
+  // stack space is allocated and the amount was determined by an
+  // earlier call to the size_activation() method).  On return caller
+  // while describe the interpreter frame we just layed out.
+
+  // The skeleton frame must already look like an interpreter frame
+  // even if not fully filled out.
+  assert(interpreter_frame->is_interpreted_frame(), "Must be interpreted frame");
+
+  int rounded_vm_local_words = round_to(frame::interpreter_frame_vm_local_words,WordsPerLong);
+  int monitor_size           = moncount * frame::interpreter_frame_monitor_size();
+  assert(monitor_size == round_to(monitor_size, WordsPerLong), "must align");
+
+  intptr_t* fp = interpreter_frame->fp();
+
+  JavaThread* thread = JavaThread::current();
+  RegisterMap map(thread, false);
+  // More verification that skeleton frame is properly walkable
+  assert(fp == caller->sp(), "fp must match");
+
+  intptr_t* montop     = fp - rounded_vm_local_words;
+
+  // preallocate monitors (cf. __ add_monitor_to_stack)
+  intptr_t* monitors = montop - monitor_size;
+
+  // preallocate stack space
+  intptr_t*  esp = monitors - 1 -
+    (tempcount * Interpreter::stackElementWords) -
+    popframe_extra_args;
+
+  int local_words = method->max_locals() * Interpreter::stackElementWords;
+  NEEDS_CLEANUP;
+  intptr_t* locals;
+  if (caller->is_interpreted_frame()) {
+    // Can force the locals area to end up properly overlapping the top of the expression stack.
+    intptr_t* Lesp_ptr = caller->interpreter_frame_tos_address() - 1;
+    // Note that this computation means we replace size_of_parameters() values from the caller
+    // interpreter frame's expression stack with our argument locals
+    int parm_words  = caller_actual_parameters * Interpreter::stackElementWords;
+    locals = Lesp_ptr + parm_words;
+    int delta = local_words - parm_words;
+    int computed_sp_adjustment = (delta > 0) ? round_to(delta, WordsPerLong) : 0;
+    *interpreter_frame->register_addr(I5_savedSP)    = (intptr_t) (fp + computed_sp_adjustment) - STACK_BIAS;
+    if (!is_bottom_frame) {
+      // Llast_SP is set below for the current frame to SP (with the
+      // extra space for the callee's locals). Here we adjust
+      // Llast_SP for the caller's frame, removing the extra space
+      // for the current method's locals.
+      *caller->register_addr(Llast_SP) = *interpreter_frame->register_addr(I5_savedSP);
+    } else {
+      assert(*caller->register_addr(Llast_SP) >= *interpreter_frame->register_addr(I5_savedSP), "strange Llast_SP");
+    }
+  } else {
+    assert(caller->is_compiled_frame() || caller->is_entry_frame(), "only possible cases");
+    // Don't have Lesp available; lay out locals block in the caller
+    // adjacent to the register window save area.
+    //
+    // Compiled frames do not allocate a varargs area which is why this if
+    // statement is needed.
+    //
+    if (caller->is_compiled_frame()) {
+      locals = fp + frame::register_save_words + local_words - 1;
+    } else {
+      locals = fp + frame::memory_parameter_word_sp_offset + local_words - 1;
+    }
+    if (!caller->is_entry_frame()) {
+      // Caller wants his own SP back
+      int caller_frame_size = caller->cb()->frame_size();
+      *interpreter_frame->register_addr(I5_savedSP) = (intptr_t)(caller->fp() - caller_frame_size) - STACK_BIAS;
+    }
+  }
+  if (TraceDeoptimization) {
+    if (caller->is_entry_frame()) {
+      // make sure I5_savedSP and the entry frames notion of saved SP
+      // agree.  This assertion duplicate a check in entry frame code
+      // but catches the failure earlier.
+      assert(*caller->register_addr(Lscratch) == *interpreter_frame->register_addr(I5_savedSP),
+             "would change callers SP");
+    }
+    if (caller->is_entry_frame()) {
+      tty->print("entry ");
+    }
+    if (caller->is_compiled_frame()) {
+      tty->print("compiled ");
+      if (caller->is_deoptimized_frame()) {
+        tty->print("(deopt) ");
+      }
+    }
+    if (caller->is_interpreted_frame()) {
+      tty->print("interpreted ");
+    }
+    tty->print_cr("caller fp=" INTPTR_FORMAT " sp=" INTPTR_FORMAT, p2i(caller->fp()), p2i(caller->sp()));
+    tty->print_cr("save area = " INTPTR_FORMAT ", " INTPTR_FORMAT, p2i(caller->sp()), p2i(caller->sp() + 16));
+    tty->print_cr("save area = " INTPTR_FORMAT ", " INTPTR_FORMAT, p2i(caller->fp()), p2i(caller->fp() + 16));
+    tty->print_cr("interpreter fp=" INTPTR_FORMAT ", " INTPTR_FORMAT, p2i(interpreter_frame->fp()), p2i(interpreter_frame->sp()));
+    tty->print_cr("save area = " INTPTR_FORMAT ", " INTPTR_FORMAT, p2i(interpreter_frame->sp()), p2i(interpreter_frame->sp() + 16));
+    tty->print_cr("save area = " INTPTR_FORMAT ", " INTPTR_FORMAT, p2i(interpreter_frame->fp()), p2i(interpreter_frame->fp() + 16));
+    tty->print_cr("Llocals = " INTPTR_FORMAT, p2i(locals));
+    tty->print_cr("Lesp = " INTPTR_FORMAT, p2i(esp));
+    tty->print_cr("Lmonitors = " INTPTR_FORMAT, p2i(monitors));
+  }
+
+  if (method->max_locals() > 0) {
+    assert(locals < caller->sp() || locals >= (caller->sp() + 16), "locals in save area");
+    assert(locals < caller->fp() || locals > (caller->fp() + 16), "locals in save area");
+    assert(locals < interpreter_frame->sp() || locals > (interpreter_frame->sp() + 16), "locals in save area");
+    assert(locals < interpreter_frame->fp() || locals >= (interpreter_frame->fp() + 16), "locals in save area");
+  }
+#ifdef _LP64
+  assert(*interpreter_frame->register_addr(I5_savedSP) & 1, "must be odd");
+#endif
+
+  *interpreter_frame->register_addr(Lmethod)     = (intptr_t) method;
+  *interpreter_frame->register_addr(Llocals)     = (intptr_t) locals;
+  *interpreter_frame->register_addr(Lmonitors)   = (intptr_t) monitors;
+  *interpreter_frame->register_addr(Lesp)        = (intptr_t) esp;
+  // Llast_SP will be same as SP as there is no adapter space
+  *interpreter_frame->register_addr(Llast_SP)    = (intptr_t) interpreter_frame->sp() - STACK_BIAS;
+  *interpreter_frame->register_addr(LcpoolCache) = (intptr_t) method->constants()->cache();
+#ifdef FAST_DISPATCH
+  *interpreter_frame->register_addr(IdispatchTables) = (intptr_t) Interpreter::dispatch_table();
+#endif
+
+
+#ifdef ASSERT
+  BasicObjectLock* mp = (BasicObjectLock*)monitors;
+
+  assert(interpreter_frame->interpreter_frame_method() == method, "method matches");
+  assert(interpreter_frame->interpreter_frame_local_at(9) == (intptr_t *)((intptr_t)locals - (9 * Interpreter::stackElementSize)), "locals match");
+  assert(interpreter_frame->interpreter_frame_monitor_end()   == mp, "monitor_end matches");
+  assert(((intptr_t *)interpreter_frame->interpreter_frame_monitor_begin()) == ((intptr_t *)mp)+monitor_size, "monitor_begin matches");
+  assert(interpreter_frame->interpreter_frame_tos_address()-1 == esp, "esp matches");
+
+  // check bounds
+  intptr_t* lo = interpreter_frame->sp() + (frame::memory_parameter_word_sp_offset - 1);
+  intptr_t* hi = interpreter_frame->fp() - rounded_vm_local_words;
+  assert(lo < monitors && montop <= hi, "monitors in bounds");
+  assert(lo <= esp && esp < monitors, "esp in bounds");
+#endif // ASSERT
+}
--- a/hotspot/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1805,9 +1805,7 @@
 
 void LIR_Assembler::intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr thread, LIR_Opr dest, LIR_Op* op) {
   switch (code) {
-    case lir_sin:
-    case lir_tan:
-    case lir_cos: {
+    case lir_tan: {
       assert(thread->is_valid(), "preserve the thread object for performance reasons");
       assert(dest->as_double_reg() == F0, "the result will be in f0/f1");
       break;
--- a/hotspot/src/cpu/sparc/vm/c1_MacroAssembler_sparc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/sparc/vm/c1_MacroAssembler_sparc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -205,12 +205,7 @@
 
 
 void C1_MacroAssembler::initialize_body(Register base, Register index) {
-  assert_different_registers(base, index);
-  Label loop;
-  bind(loop);
-  subcc(index, HeapWordSize, index);
-  brx(Assembler::greaterEqual, true, Assembler::pt, loop);
-  delayed()->st_ptr(G0, base, index);
+  zero_memory(base, index);
 }
 
 
@@ -237,7 +232,7 @@
   }
   try_allocate(obj, noreg, obj_size * wordSize, t2, t3, slow_case);
 
-  initialize_object(obj, klass, noreg, obj_size * HeapWordSize, t1, t2);
+  initialize_object(obj, klass, noreg, obj_size * HeapWordSize, t1, t2, /* is_tlab_allocated */ UseTLAB);
 }
 
 void C1_MacroAssembler::initialize_object(
@@ -246,7 +241,8 @@
   Register var_size_in_bytes,          // object size in bytes if unknown at compile time; invalid otherwise
   int      con_size_in_bytes,          // object size in bytes if   known at compile time
   Register t1,                         // temp register
-  Register t2                          // temp register
+  Register t2,                         // temp register
+  bool     is_tlab_allocated           // the object was allocated in a TLAB; relevant for the implementation of ZeroTLAB
   ) {
   const int hdr_size_in_bytes = instanceOopDesc::header_size() * HeapWordSize;
 
@@ -269,31 +265,33 @@
 
 #endif
 
-  // initialize body
-  const int threshold = 5 * HeapWordSize;              // approximate break even point for code size
-  if (var_size_in_bytes != noreg) {
-    // use a loop
-    add(obj, hdr_size_in_bytes, t1);               // compute address of first element
-    sub(var_size_in_bytes, hdr_size_in_bytes, t2); // compute size of body
-    initialize_body(t1, t2);
+  if (!(UseTLAB && ZeroTLAB && is_tlab_allocated)) {
+    // initialize body
+    const int threshold = 5 * HeapWordSize;              // approximate break even point for code size
+    if (var_size_in_bytes != noreg) {
+      // use a loop
+      add(obj, hdr_size_in_bytes, t1);               // compute address of first element
+      sub(var_size_in_bytes, hdr_size_in_bytes, t2); // compute size of body
+      initialize_body(t1, t2);
 #ifndef _LP64
-  } else if (con_size_in_bytes < threshold * 2) {
-    // on v9 we can do double word stores to fill twice as much space.
-    assert(hdr_size_in_bytes % 8 == 0, "double word aligned");
-    assert(con_size_in_bytes % 8 == 0, "double word aligned");
-    for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += 2 * HeapWordSize) stx(G0, obj, i);
+    } else if (con_size_in_bytes < threshold * 2) {
+      // on v9 we can do double word stores to fill twice as much space.
+      assert(hdr_size_in_bytes % 8 == 0, "double word aligned");
+      assert(con_size_in_bytes % 8 == 0, "double word aligned");
+      for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += 2 * HeapWordSize) stx(G0, obj, i);
 #endif
-  } else if (con_size_in_bytes <= threshold) {
-    // use explicit NULL stores
-    for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += HeapWordSize)     st_ptr(G0, obj, i);
-  } else if (con_size_in_bytes > hdr_size_in_bytes) {
-    // use a loop
-    const Register base  = t1;
-    const Register index = t2;
-    add(obj, hdr_size_in_bytes, base);               // compute address of first element
-    // compute index = number of words to clear
-    set(con_size_in_bytes - hdr_size_in_bytes, index);
-    initialize_body(base, index);
+    } else if (con_size_in_bytes <= threshold) {
+      // use explicit NULL stores
+      for (int i = hdr_size_in_bytes; i < con_size_in_bytes; i += HeapWordSize)     st_ptr(G0, obj, i);
+    } else if (con_size_in_bytes > hdr_size_in_bytes) {
+      // use a loop
+      const Register base  = t1;
+      const Register index = t2;
+      add(obj, hdr_size_in_bytes, base);               // compute address of first element
+      // compute index = number of words to clear
+      set(con_size_in_bytes - hdr_size_in_bytes, index);
+      initialize_body(base, index);
+    }
   }
 
   if (CURRENT_ENV->dtrace_alloc_probes()) {
--- a/hotspot/src/cpu/sparc/vm/c1_MacroAssembler_sparc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/sparc/vm/c1_MacroAssembler_sparc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -50,7 +50,8 @@
     Register var_size_in_bytes,        // object size in bytes if unknown at compile time; invalid otherwise
     int      con_size_in_bytes,        // object size in bytes if   known at compile time
     Register t1,                       // temp register
-    Register t2                        // temp register
+    Register t2,                       // temp register
+    bool is_tlab_allocated             // the object was allocated in a TLAB; relevant for the implementation of ZeroTLAB
   );
 
   // allocation of fixed-size objects
--- a/hotspot/src/cpu/sparc/vm/c1_Runtime1_sparc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/sparc/vm/c1_Runtime1_sparc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -435,7 +435,7 @@
 
           __ tlab_allocate(O0_obj, G1_obj_size, 0, G3_t1, slow_path);
 
-          __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
+          __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2, /* is_tlab_allocated */ true);
           __ verify_oop(O0_obj);
           __ mov(O0, I0);
           __ ret();
@@ -447,7 +447,7 @@
           __ eden_allocate(O0_obj, G1_obj_size, 0, G3_t1, G4_t2, slow_path);
           __ incr_allocated_bytes(G1_obj_size, G3_t1, G4_t2);
 
-          __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
+          __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2, /* is_tlab_allocated */ false);
           __ verify_oop(O0_obj);
           __ mov(O0, I0);
           __ ret();
@@ -542,7 +542,9 @@
           __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
           __ sub(G1_arr_size, G3_t1, O1_t2);  // body length
           __ add(O0_obj, G3_t1, G3_t1);       // body start
-          __ initialize_body(G3_t1, O1_t2);
+          if (!ZeroTLAB) {
+            __ initialize_body(G3_t1, O1_t2);
+          }
           __ verify_oop(O0_obj);
           __ retl();
           __ delayed()->nop();
--- a/hotspot/src/cpu/sparc/vm/interpreter_sparc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,231 +0,0 @@
-/*
- * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- *
- */
-
-#include "precompiled.hpp"
-#include "asm/macroAssembler.hpp"
-#include "interpreter/bytecodeHistogram.hpp"
-#include "interpreter/interpreter.hpp"
-#include "interpreter/interpreterRuntime.hpp"
-#include "interpreter/interp_masm.hpp"
-#include "interpreter/templateInterpreterGenerator.hpp"
-#include "interpreter/templateTable.hpp"
-#include "oops/arrayOop.hpp"
-#include "oops/methodData.hpp"
-#include "oops/method.hpp"
-#include "oops/oop.inline.hpp"
-#include "prims/jvmtiExport.hpp"
-#include "prims/jvmtiThreadState.hpp"
-#include "prims/methodHandles.hpp"
-#include "runtime/arguments.hpp"
-#include "runtime/frame.inline.hpp"
-#include "runtime/sharedRuntime.hpp"
-#include "runtime/stubRoutines.hpp"
-#include "runtime/synchronizer.hpp"
-#include "runtime/timer.hpp"
-#include "runtime/vframeArray.hpp"
-#include "utilities/debug.hpp"
-#ifdef COMPILER1
-#include "c1/c1_Runtime1.hpp"
-#endif
-
-
-
-// Generation of Interpreter
-//
-// The TemplateInterpreterGenerator generates the interpreter into Interpreter::_code.
-
-
-#define __ _masm->
-
-
-//----------------------------------------------------------------------------------------------------
-
-#ifndef _LP64
-address AbstractInterpreterGenerator::generate_slow_signature_handler() {
-  address entry = __ pc();
-  Argument argv(0, true);
-
-  // We are in the jni transition frame. Save the last_java_frame corresponding to the
-  // outer interpreter frame
-  //
-  __ set_last_Java_frame(FP, noreg);
-  // make sure the interpreter frame we've pushed has a valid return pc
-  __ mov(O7, I7);
-  __ mov(Lmethod, G3_scratch);
-  __ mov(Llocals, G4_scratch);
-  __ save_frame(0);
-  __ mov(G2_thread, L7_thread_cache);
-  __ add(argv.address_in_frame(), O3);
-  __ mov(G2_thread, O0);
-  __ mov(G3_scratch, O1);
-  __ call(CAST_FROM_FN_PTR(address, InterpreterRuntime::slow_signature_handler), relocInfo::runtime_call_type);
-  __ delayed()->mov(G4_scratch, O2);
-  __ mov(L7_thread_cache, G2_thread);
-  __ reset_last_Java_frame();
-
-  // load the register arguments (the C code packed them as varargs)
-  for (Argument ldarg = argv.successor(); ldarg.is_register(); ldarg = ldarg.successor()) {
-      __ ld_ptr(ldarg.address_in_frame(), ldarg.as_register());
-  }
-  __ ret();
-  __ delayed()->
-     restore(O0, 0, Lscratch);  // caller's Lscratch gets the result handler
-  return entry;
-}
-
-
-#else
-// LP64 passes floating point arguments in F1, F3, F5, etc. instead of
-// O0, O1, O2 etc..
-// Doubles are passed in D0, D2, D4
-// We store the signature of the first 16 arguments in the first argument
-// slot because it will be overwritten prior to calling the native
-// function, with the pointer to the JNIEnv.
-// If LP64 there can be up to 16 floating point arguments in registers
-// or 6 integer registers.
-address AbstractInterpreterGenerator::generate_slow_signature_handler() {
-
-  enum {
-    non_float  = 0,
-    float_sig  = 1,
-    double_sig = 2,
-    sig_mask   = 3
-  };
-
-  address entry = __ pc();
-  Argument argv(0, true);
-
-  // We are in the jni transition frame. Save the last_java_frame corresponding to the
-  // outer interpreter frame
-  //
-  __ set_last_Java_frame(FP, noreg);
-  // make sure the interpreter frame we've pushed has a valid return pc
-  __ mov(O7, I7);
-  __ mov(Lmethod, G3_scratch);
-  __ mov(Llocals, G4_scratch);
-  __ save_frame(0);
-  __ mov(G2_thread, L7_thread_cache);
-  __ add(argv.address_in_frame(), O3);
-  __ mov(G2_thread, O0);
-  __ mov(G3_scratch, O1);
-  __ call(CAST_FROM_FN_PTR(address, InterpreterRuntime::slow_signature_handler), relocInfo::runtime_call_type);
-  __ delayed()->mov(G4_scratch, O2);
-  __ mov(L7_thread_cache, G2_thread);
-  __ reset_last_Java_frame();
-
-
-  // load the register arguments (the C code packed them as varargs)
-  Address Sig = argv.address_in_frame();        // Argument 0 holds the signature
-  __ ld_ptr( Sig, G3_scratch );                   // Get register argument signature word into G3_scratch
-  __ mov( G3_scratch, G4_scratch);
-  __ srl( G4_scratch, 2, G4_scratch);             // Skip Arg 0
-  Label done;
-  for (Argument ldarg = argv.successor(); ldarg.is_float_register(); ldarg = ldarg.successor()) {
-    Label NonFloatArg;
-    Label LoadFloatArg;
-    Label LoadDoubleArg;
-    Label NextArg;
-    Address a = ldarg.address_in_frame();
-    __ andcc(G4_scratch, sig_mask, G3_scratch);
-    __ br(Assembler::zero, false, Assembler::pt, NonFloatArg);
-    __ delayed()->nop();
-
-    __ cmp(G3_scratch, float_sig );
-    __ br(Assembler::equal, false, Assembler::pt, LoadFloatArg);
-    __ delayed()->nop();
-
-    __ cmp(G3_scratch, double_sig );
-    __ br(Assembler::equal, false, Assembler::pt, LoadDoubleArg);
-    __ delayed()->nop();
-
-    __ bind(NonFloatArg);
-    // There are only 6 integer register arguments!
-    if ( ldarg.is_register() )
-      __ ld_ptr(ldarg.address_in_frame(), ldarg.as_register());
-    else {
-    // Optimization, see if there are any more args and get out prior to checking
-    // all 16 float registers.  My guess is that this is rare.
-    // If is_register is false, then we are done the first six integer args.
-      __ br_null_short(G4_scratch, Assembler::pt, done);
-    }
-    __ ba(NextArg);
-    __ delayed()->srl( G4_scratch, 2, G4_scratch );
-
-    __ bind(LoadFloatArg);
-    __ ldf( FloatRegisterImpl::S, a, ldarg.as_float_register(), 4);
-    __ ba(NextArg);
-    __ delayed()->srl( G4_scratch, 2, G4_scratch );
-
-    __ bind(LoadDoubleArg);
-    __ ldf( FloatRegisterImpl::D, a, ldarg.as_double_register() );
-    __ ba(NextArg);
-    __ delayed()->srl( G4_scratch, 2, G4_scratch );
-
-    __ bind(NextArg);
-
-  }
-
-  __ bind(done);
-  __ ret();
-  __ delayed()->
-     restore(O0, 0, Lscratch);  // caller's Lscratch gets the result handler
-  return entry;
-}
-#endif
-
-void TemplateInterpreterGenerator::generate_counter_overflow(Label& Lcontinue) {
-
-  // Generate code to initiate compilation on the counter overflow.
-
-  // InterpreterRuntime::frequency_counter_overflow takes two arguments,
-  // the first indicates if the counter overflow occurs at a backwards branch (NULL bcp)
-  // and the second is only used when the first is true.  We pass zero for both.
-  // The call returns the address of the verified entry point for the method or NULL
-  // if the compilation did not complete (either went background or bailed out).
-  __ set((int)false, O2);
-  __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), O2, O2, true);
-  // returns verified_entry_point or NULL
-  // we ignore it in any case
-  __ ba_short(Lcontinue);
-
-}
-
-
-// End of helpers
-
-// Various method entries
-
-// Abstract method entry
-// Attempt to execute abstract method. Throw exception
-//
-address TemplateInterpreterGenerator::generate_abstract_entry(void) {
-  address entry = __ pc();
-  // abstract method entry
-  // throw exception
-  __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_AbstractMethodError));
-  // the call_VM checks for exception, so we should never return here.
-  __ should_not_reach_here();
-  return entry;
-
-}
--- a/hotspot/src/cpu/sparc/vm/macroAssembler_sparc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/sparc/vm/macroAssembler_sparc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -3386,10 +3386,20 @@
   // Retain tlab and allocate object in shared space if
   // the amount free in the tlab is too large to discard.
   cmp(t1, t2);
+
   brx(Assembler::lessEqual, false, Assembler::pt, discard_tlab);
-
   // increment waste limit to prevent getting stuck on this slow path
-  delayed()->add(t2, ThreadLocalAllocBuffer::refill_waste_limit_increment(), t2);
+  if (Assembler::is_simm13(ThreadLocalAllocBuffer::refill_waste_limit_increment())) {
+    delayed()->add(t2, ThreadLocalAllocBuffer::refill_waste_limit_increment(), t2);
+  } else {
+    delayed()->nop();
+    // set64 does not use the temp register if the given constant is 32 bit. So
+    // we can just use any register; using G0 results in ignoring of the upper 32 bit
+    // of that value.
+    set64(ThreadLocalAllocBuffer::refill_waste_limit_increment(), t3, G0);
+    add(t2, t3, t2);
+  }
+
   st_ptr(t2, G2_thread, in_bytes(JavaThread::tlab_refill_waste_limit_offset()));
   if (TLABStats) {
     // increment number of slow_allocations
@@ -3459,11 +3469,27 @@
   add(top, t1, top); // t1 is tlab_size
   sub(top, ThreadLocalAllocBuffer::alignment_reserve_in_bytes(), top);
   st_ptr(top, G2_thread, in_bytes(JavaThread::tlab_end_offset()));
+
+  if (ZeroTLAB) {
+    // This is a fast TLAB refill, therefore the GC is not notified of it.
+    // So compiled code must fill the new TLAB with zeroes.
+    ld_ptr(G2_thread, in_bytes(JavaThread::tlab_start_offset()), t2);
+    zero_memory(t2, t1);
+  }
   verify_tlab();
   ba(retry);
   delayed()->nop();
 }
 
+void MacroAssembler::zero_memory(Register base, Register index) {
+  assert_different_registers(base, index);
+  Label loop;
+  bind(loop);
+  subcc(index, HeapWordSize, index);
+  brx(Assembler::greaterEqual, true, Assembler::pt, loop);
+  delayed()->st_ptr(G0, base, index);
+}
+
 void MacroAssembler::incr_allocated_bytes(RegisterOrConstant size_in_bytes,
                                           Register t1, Register t2) {
   // Bump total bytes allocated by this thread
--- a/hotspot/src/cpu/sparc/vm/macroAssembler_sparc.hpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/sparc/vm/macroAssembler_sparc.hpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1278,6 +1278,7 @@
     Label&   slow_case                 // continuation point if fast allocation fails
   );
   void tlab_refill(Label& retry_tlab, Label& try_eden, Label& slow_case);
+  void zero_memory(Register base, Register index);
   void incr_allocated_bytes(RegisterOrConstant size_in_bytes,
                             Register t1, Register t2);
 
--- a/hotspot/src/cpu/sparc/vm/sharedRuntime_sparc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/sparc/vm/sharedRuntime_sparc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1748,7 +1748,7 @@
 }
 
 
-// Check GC_locker::needs_gc and enter the runtime if it's true.  This
+// Check GCLocker::needs_gc and enter the runtime if it's true.  This
 // keeps a new JNI critical region from starting until a GC has been
 // forced.  Save down any oops in registers and describe them in an
 // OopMap.
@@ -1759,9 +1759,9 @@
                                                OopMapSet* oop_maps,
                                                VMRegPair* in_regs,
                                                BasicType* in_sig_bt) {
-  __ block_comment("check GC_locker::needs_gc");
+  __ block_comment("check GCLocker::needs_gc");
   Label cont;
-  AddressLiteral sync_state(GC_locker::needs_gc_address());
+  AddressLiteral sync_state(GCLocker::needs_gc_address());
   __ load_bool_contents(sync_state, G3_scratch);
   __ cmp_zero_and_br(Assembler::equal, G3_scratch, cont);
   __ delayed()->nop();
@@ -1936,14 +1936,14 @@
 // GetPrimtiveArrayCritical and disallow the use of any other JNI
 // functions.  The wrapper is expected to unpack the arguments before
 // passing them to the callee and perform checks before and after the
-// native call to ensure that they GC_locker
+// native call to ensure that they GCLocker
 // lock_critical/unlock_critical semantics are followed.  Some other
 // parts of JNI setup are skipped like the tear down of the JNI handle
 // block and the check for pending exceptions it's impossible for them
 // to be thrown.
 //
 // They are roughly structured like this:
-//    if (GC_locker::needs_gc())
+//    if (GCLocker::needs_gc())
 //      SharedRuntime::block_for_jni_critical();
 //    tranistion to thread_in_native
 //    unpack arrray arguments and call native entry point
--- a/hotspot/src/cpu/sparc/vm/templateInterpreterGenerator_sparc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ b/hotspot/src/cpu/sparc/vm/templateInterpreterGenerator_sparc.cpp	Thu Jan 28 16:30:37 2016 -0800
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -52,6 +52,18 @@
 #endif
 #undef FAST_DISPATCH
 
+// Size of interpreter code.  Increase if too small.  Interpreter will
+// fail with a guarantee ("not enough space for interpreter generation");
+// if too small.
+// Run with +PrintInterpreter to get the VM to print out the size.
+// Max size with JVMTI
+#ifdef _LP64
+  // The sethi() instruction generates lots more instructions when shell
+  // stack limit is unlimited, so that's why this is much bigger.
+int TemplateInterpreter::InterpreterCodeSize = 260 * K;
+#else
+int TemplateInterpreter::InterpreterCodeSize = 230 * K;
+#endif
 
 // Generation of Interpreter
 //
@@ -63,6 +75,174 @@
 
 //----------------------------------------------------------------------------------------------------
 
+#ifndef _LP64
+address TemplateInterpreterGenerator::generate_slow_signature_handler() {
+  address entry = __ pc();
+  Argument argv(0, true);
+
+  // We are in the jni transition frame. Save the last_java_frame corresponding to the
+  // outer interpreter frame
+  //
+  __ set_last_Java_frame(FP, noreg);
+  // make sure the interpreter frame we've pushed has a valid return pc
+  __ mov(O7, I7);
+  __ mov(Lmethod, G3_scratch);
+  __ mov(Llocals, G4_scratch);
+  __ save_frame(0);
+  __ mov(G2_thread, L7_thread_cache);
+  __ add(argv.address_in_frame(), O3);
+  __ mov(G2_thread, O0);
+  __ mov(G3_scratch, O1);
+  __ call(CAST_FROM_FN_PTR(address, InterpreterRuntime::slow_signature_handler), relocInfo::runtime_call_type);
+  __ delayed()->mov(G4_scratch, O2);
+  __ mov(L7_thread_cache, G2_thread);
+  __ reset_last_Java_frame();
+
+  // load the register arguments (the C code packed them as varargs)
+  for (Argument ldarg = argv.successor(); ldarg.is_register(); ldarg = ldarg.successor()) {
+      __ ld_ptr(ldarg.address_in_frame(), ldarg.as_register());
+  }
+  __ ret();
+  __ delayed()->
+     restore(O0, 0, Lscratch);  // caller's Lscratch gets the result handler
+  return entry;
+}
+
+
+#else
+// LP64 passes floating point arguments in F1, F3, F5, etc. instead of
+// O0, O1, O2 etc..
+// Doubles are passed in D0, D2, D4
+// We store the signature of the first 16 arguments in the first argument
+// slot because it will be overwritten prior to calling the native
+// function, with the pointer to the JNIEnv.
+// If LP64 there can be up to 16 floating point arguments in registers
+// or 6 integer registers.
+address TemplateInterpreterGenerator::generate_slow_signature_handler() {
+
+  enum {
+    non_float  = 0,
+    float_sig  = 1,
+    double_sig = 2,
+    sig_mask   = 3
+  };
+
+  address entry = __ pc();
+  Argument argv(0, true);
+
+  // We are in the jni transition frame. Save the last_java_frame corresponding to the
+  // outer interpreter frame
+  //
+  __ set_last_Java_frame(FP, noreg);
+  // make sure the interpreter frame we've pushed has a valid return pc
+  __ mov(O7, I7);
+  __ mov(Lmethod, G3_scratch);
+  __ mov(Llocals, G4_scratch);
+  __ save_frame(0);
+  __ mov(G2_thread, L7_thread_cache);
+  __ add(argv.address_in_frame(), O3);
+  __ mov(G2_thread, O0);
+  __ mov(G3_scratch, O1);
+  __ call(CAST_FROM_FN_PTR(address, InterpreterRuntime::slow_signature_handler), relocInfo::runtime_call_type);
+  __ delayed()->mov(G4_scratch, O2);
+  __ mov(L7_thread_cache, G2_thread);
+  __ reset_last_Java_frame();
+
+
+  // load the register arguments (the C code packed them as varargs)
+  Address Sig = argv.address_in_frame();        // Argument 0 holds the signature
+  __ ld_ptr( Sig, G3_scratch );                   // Get register argument signature word into G3_scratch
+  __ mov( G3_scratch, G4_scratch);
+  __ srl( G4_scratch, 2, G4_scratch);             // Skip Arg 0
+  Label done;
+  for (Argument ldarg = argv.successor(); ldarg.is_float_register(); ldarg = ldarg.successor()) {
+    Label NonFloatArg;
+    Label LoadFloatArg;
+    Label LoadDoubleArg;
+    Label NextArg;
+    Address a = ldarg.address_in_frame();
+    __ andcc(G4_scratch, sig_mask, G3_scratch);
+    __ br(Assembler::zero, false, Assembler::pt, NonFloatArg);
+    __ delayed()->nop();
+
+    __ cmp(G3_scratch, float_sig );
+    __ br(Assembler::equal, false, Assembler::pt, LoadFloatArg);
+    __ delayed()->nop();
+
+    __ cmp(G3_scratch, double_sig );
+    __ br(Assembler::equal, false, Assembler::pt, LoadDoubleArg);
+    __ delayed()->nop();
+
+    __ bind(NonFloatArg);
+    // There are only 6 integer register arguments!
+    if ( ldarg.is_register() )
+      __ ld_ptr(ldarg.address_in_frame(), ldarg.as_register());
+    else {
+    // Optimization, see if there are any more args and get out prior to checking
+    // all 16 float registers.  My guess is that this is rare.
+    // If is_register is false, then we are done the first six integer args.
+      __ br_null_short(G4_scratch, Assembler::pt, done);
+    }
+    __ ba(NextArg);
+    __ delayed()->srl( G4_scratch, 2, G4_scratch );
+
+    __ bind(LoadFloatArg);
+    __ ldf( FloatRegisterImpl::S, a, ldarg.as_float_register(), 4);
+    __ ba(NextArg);
+    __ delayed()->srl( G4_scratch, 2, G4_scratch );
+
+    __ bind(LoadDoubleArg);
+    __ ldf( FloatRegisterImpl::D, a, ldarg.as_double_register() );
+    __ ba(NextArg);
+    __ delayed()->srl( G4_scratch, 2, G4_scratch );
+
+    __ bind(NextArg);
+
+  }
+
+  __ bind(done);
+  __ ret();
+  __ delayed()->
+     restore(O0, 0, Lscratch);  // caller's Lscratch gets the result handler
+  return entry;
+}
+#endif
+
+void TemplateInterpreterGenerator::generate_counter_overflow(Label& Lcontinue) {
+
+  // Generate code to initiate compilation on the counter overflow.
+
+  // InterpreterRuntime::frequency_counter_overflow takes two arguments,
+  // the first indicates if the counter overflow occurs at a backwards branch (NULL bcp)
+  // and the second is only used when the first is true.  We pass zero for both.
+  // The call returns the address of the verified entry point for the method or NULL
+  // if the compilation did not complete (either went background or bailed out).
+  __ set((int)false, O2);
+  __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), O2, O2, true);
+  // returns verified_entry_point or NULL
+  // we ignore it in any case
+  __ ba_short(Lcontinue);
+
+}
+
+
+// End of helpers
+
+// Various method entries
+
+// Abstract method entry
+// Attempt to execute abstract method. Throw exception
+//
+address TemplateInterpreterGenerator::generate_abstract_entry(void) {
+  address entry = __ pc();
+  // abstract method entry
+  // throw exception
+  __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_AbstractMethodError));
+  // the call_VM checks for exception, so we should never return here.
+  __ should_not_reach_here();
+  return entry;
+
+}
 
 void TemplateInterpreterGenerator::save_native_result(void) {
   // result potentially in O0/O1: save it across calls
@@ -911,6 +1091,31 @@
 address TemplateInterpreterGenerator::generate_math_entry(AbstractInterpreter::MethodKind kind) {
   return NULL;
 }
+
+// TODO: rather than touching all pages, check against stack_overflow_limit and bang yellow page to
+// generate exception
+void TemplateInterpreterGenerator::bang_stack_shadow_pages(bool native_call) {
+  // Quick & dirty stack overflow checking: bang the stack & handle trap.
+  // Note that we do the banging after the frame is setup, since the exception
+  // handling code expects to find a valid interpreter frame on the stack.
+  // Doing the banging earlier fails if the caller frame is not an interpreter
+  // frame.
+  // (Also, the exception throwing code expects to unlock any synchronized
+  // method receiever, so do the banging after locking the receiver.)
+
+  // Bang each page in the shadow zone. We can't assume it's been done for
+  // an interpreter frame with greater than a page of locals, so each page
+  // needs to be checked.  Only true for non-native.
+  if (UseStackBanging) {
+    const int page_size = os::vm_page_size();
+    const int n_shadow_pages = ((int)JavaThread::stack_shadow_zone_size()) / page_size;
+    const int start_page = native_call ? n_shadow_pages : 1;
+    for (int pages = start_page; pages <= n_shadow_pages; pages++) {
+      __ bang_stack_with_offset(pages*page_size);
+    }
+  }
+}
+
 //
 // Interpreter stub for calling a native method. (asm interpreter)
 // This sets up a somewhat different looking stack for calling the native method
--- a/hotspot/src/cpu/sparc/vm/templateInterpreter_sparc.cpp	Wed Jul 05 21:17:06 2017 +0200
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,316 +0,0 @@
-/*
- * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 only, as
- * published by the Free Software Foundation.
- *
- * This code is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- * version 2 for more details (a copy is included in the LICENSE file that
- * accompanied this code).
- *
- * You should have received a copy of the GNU General Public License version
- * 2 along with this work; if not, write to the Free Software Foundation,
- * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
- * or visit www.oracle.com if you need additional information or have any
- * questions.
- *
- */
-
-#include "precompiled.hpp"
-#include "interpreter/interpreter.hpp"
-#include "oops/constMethod.hpp"
-#include "oops/method.hpp"
-#include "runtime/arguments.hpp"
-#include "runtime/frame.inline.hpp"
-#include "runtime/synchronizer.hpp"
-#include "utilities/macros.hpp"
-
-// Size of interpreter code.  Increase if too small.  Interpreter will
-// fail with a guarantee ("not enough space for interpreter generation");
-// if too small.
-// Run with +PrintInterpreter to get the VM to print o