diff src/cpu/x86/vm/vm_version_x86.hpp @ 747:93c14e5562c4

6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}() Summary: These methods can be instrinsified by using bit scan, bit test, and population count instructions. Reviewed-by: kvn, never
author twisti
date Wed, 06 May 2009 00:27:52 -0700
parents c771b7f43bbf
children c18cbe5936b8
line wrap: on
line diff
--- a/src/cpu/x86/vm/vm_version_x86.hpp	Tue May 05 11:02:10 2009 -0700
+++ b/src/cpu/x86/vm/vm_version_x86.hpp	Wed May 06 00:27:52 2009 -0700
@@ -120,7 +120,7 @@
       uint32_t LahfSahf     : 1,
                CmpLegacy    : 1,
                             : 4,
-               abm          : 1,
+               lzcnt        : 1,
                sse4a        : 1,
                misalignsse  : 1,
                prefetchw    : 1,
@@ -182,7 +182,8 @@
      CPU_SSE4A  = (1 << 10),
      CPU_SSE4_1 = (1 << 11),
      CPU_SSE4_2 = (1 << 12),
-     CPU_POPCNT = (1 << 13)
+     CPU_POPCNT = (1 << 13),
+     CPU_LZCNT  = (1 << 14)
    } cpuFeatureFlags;
 
   // cpuid information block.  All info derived from executing cpuid with
@@ -277,8 +278,6 @@
     if (_cpuid_info.std_cpuid1_edx.bits.mmx != 0 || is_amd() &&
         _cpuid_info.ext_cpuid1_edx.bits.mmx != 0)
       result |= CPU_MMX;
-    if (is_amd() && _cpuid_info.ext_cpuid1_edx.bits.tdnow != 0)
-      result |= CPU_3DNOW;
     if (_cpuid_info.std_cpuid1_edx.bits.sse != 0)
       result |= CPU_SSE;
     if (_cpuid_info.std_cpuid1_edx.bits.sse2 != 0)
@@ -287,14 +286,23 @@
       result |= CPU_SSE3;
     if (_cpuid_info.std_cpuid1_ecx.bits.ssse3 != 0)
       result |= CPU_SSSE3;
-    if (is_amd() && _cpuid_info.ext_cpuid1_ecx.bits.sse4a != 0)
-      result |= CPU_SSE4A;
     if (_cpuid_info.std_cpuid1_ecx.bits.sse4_1 != 0)
       result |= CPU_SSE4_1;
     if (_cpuid_info.std_cpuid1_ecx.bits.sse4_2 != 0)
       result |= CPU_SSE4_2;
     if (_cpuid_info.std_cpuid1_ecx.bits.popcnt != 0)
       result |= CPU_POPCNT;
+
+    // AMD features.
+    if (is_amd()) {
+      if (_cpuid_info.ext_cpuid1_edx.bits.tdnow != 0)
+        result |= CPU_3DNOW;
+      if (_cpuid_info.ext_cpuid1_ecx.bits.lzcnt != 0)
+        result |= CPU_LZCNT;
+      if (_cpuid_info.ext_cpuid1_ecx.bits.sse4a != 0)
+        result |= CPU_SSE4A;
+    }
+
     return result;
   }
 
@@ -391,6 +399,7 @@
   static bool supports_3dnow()    { return (_cpuFeatures & CPU_3DNOW) != 0; }
   static bool supports_mmx_ext()  { return is_amd() && _cpuid_info.ext_cpuid1_edx.bits.mmx_amd != 0; }
   static bool supports_3dnow2()   { return is_amd() && _cpuid_info.ext_cpuid1_edx.bits.tdnow2 != 0; }
+  static bool supports_lzcnt()    { return (_cpuFeatures & CPU_LZCNT) != 0; }
   static bool supports_sse4a()    { return (_cpuFeatures & CPU_SSE4A) != 0; }
 
   static bool supports_compare_and_exchange() { return true; }