annotate src/os_cpu/linux_sparc/vm/linux_sparc.s @ 122:435e64505015

6693457: Open-source hotspot linux-sparc support Summary: Move os_cpu/linux_sparc from closed to open Reviewed-by: kamg
author phh
date Thu, 24 Apr 2008 15:07:57 -0400
parents
children d1605aabd0a1
rev   line source
phh@122 1 #
phh@122 2 # Copyright 2005-2007 Sun Microsystems, Inc. All Rights Reserved.
phh@122 3 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
phh@122 4 #
phh@122 5 # This code is free software; you can redistribute it and/or modify it
phh@122 6 # under the terms of the GNU General Public License version 2 only, as
phh@122 7 # published by the Free Software Foundation.
phh@122 8 #
phh@122 9 # This code is distributed in the hope that it will be useful, but WITHOUT
phh@122 10 # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
phh@122 11 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
phh@122 12 # version 2 for more details (a copy is included in the LICENSE file that
phh@122 13 # accompanied this code).
phh@122 14 #
phh@122 15 # You should have received a copy of the GNU General Public License version
phh@122 16 # 2 along with this work; if not, write to the Free Software Foundation,
phh@122 17 # Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
phh@122 18 #
phh@122 19 # Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
phh@122 20 # CA 95054 USA or visit www.sun.com if you need additional information or
phh@122 21 # have any questions.
phh@122 22 #
phh@122 23
phh@122 24 # Prototype: int SafeFetch32 (int * adr, int ErrValue)
phh@122 25 # The "ld" at Fetch32 is potentially faulting instruction.
phh@122 26 # If the instruction traps the trap handler will arrange
phh@122 27 # for control to resume at Fetch32Resume.
phh@122 28 # By convention with the trap handler we ensure there is a non-CTI
phh@122 29 # instruction in the trap shadow.
phh@122 30
phh@122 31
phh@122 32 .globl SafeFetch32, Fetch32PFI, Fetch32Resume
phh@122 33 .globl SafeFetchN
phh@122 34 .align 32
phh@122 35 .type SafeFetch32,@function
phh@122 36 SafeFetch32:
phh@122 37 mov %o0, %g1
phh@122 38 mov %o1, %o0
phh@122 39 Fetch32PFI:
phh@122 40 # <-- Potentially faulting instruction
phh@122 41 ld [%g1], %o0
phh@122 42 Fetch32Resume:
phh@122 43 nop
phh@122 44 retl
phh@122 45 nop
phh@122 46
phh@122 47 .globl SafeFetchN, FetchNPFI, FetchNResume
phh@122 48 .type SafeFetchN,@function
phh@122 49 .align 32
phh@122 50 SafeFetchN:
phh@122 51 mov %o0, %g1
phh@122 52 mov %o1, %o0
phh@122 53 FetchNPFI:
phh@122 54 ldn [%g1], %o0
phh@122 55 FetchNResume:
phh@122 56 nop
phh@122 57 retl
phh@122 58 nop
phh@122 59
phh@122 60 # Possibilities:
phh@122 61 # -- membar
phh@122 62 # -- CAS (SP + BIAS, G0, G0)
phh@122 63 # -- wr %g0, %asi
phh@122 64
phh@122 65 .globl SpinPause
phh@122 66 .type SpinPause,@function
phh@122 67 .align 32
phh@122 68 SpinPause:
phh@122 69 retl
phh@122 70 mov %g0, %o0
phh@122 71
phh@122 72 .globl _Copy_conjoint_jlongs_atomic
phh@122 73 .type _Copy_conjoint_jlongs_atomic,@function
phh@122 74 _Copy_conjoint_jlongs_atomic:
phh@122 75 cmp %o0, %o1
phh@122 76 bleu 4f
phh@122 77 sll %o2, 3, %o4
phh@122 78 ba 2f
phh@122 79 1:
phh@122 80 subcc %o4, 8, %o4
phh@122 81 std %o2, [%o1]
phh@122 82 add %o0, 8, %o0
phh@122 83 add %o1, 8, %o1
phh@122 84 2:
phh@122 85 bge,a 1b
phh@122 86 ldd [%o0], %o2
phh@122 87 ba 5f
phh@122 88 nop
phh@122 89 3:
phh@122 90 std %o2, [%o1+%o4]
phh@122 91 4:
phh@122 92 subcc %o4, 8, %o4
phh@122 93 bge,a 3b
phh@122 94 ldd [%o0+%o4], %o2
phh@122 95 5:
phh@122 96 retl
phh@122 97 nop
phh@122 98
phh@122 99
phh@122 100 .globl _flush_reg_windows
phh@122 101 .align 32
phh@122 102 _flush_reg_windows:
phh@122 103 ta 0x03
phh@122 104 retl
phh@122 105 mov %fp, %o0