changeset 1726:9bdbd693dbaa

Merge
author trims
date Fri, 24 Sep 2010 00:51:15 -0700
parents 8d5897b4230f a25394352030
children b2045e0af26e
files
diffstat 225 files changed, 10719 insertions(+), 3042 deletions(-) [+]
line wrap: on
line diff
--- a/agent/src/share/classes/sun/jvm/hotspot/CommandProcessor.java	Thu Sep 23 17:33:27 2010 -0700
+++ b/agent/src/share/classes/sun/jvm/hotspot/CommandProcessor.java	Fri Sep 24 00:51:15 2010 -0700
@@ -1037,7 +1037,7 @@
                             public void prologue(Address start, Address end) {
                             }
                             public void visit(CodeBlob blob) {
-                                fout.println(gen.genHTML(blob.instructionsBegin()));
+                                fout.println(gen.genHTML(blob.contentBegin()));
                             }
                             public void epilogue() {
                             }
--- a/agent/src/share/classes/sun/jvm/hotspot/c1/Runtime1.java	Thu Sep 23 17:33:27 2010 -0700
+++ b/agent/src/share/classes/sun/jvm/hotspot/c1/Runtime1.java	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2003, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -54,7 +54,7 @@
 
   /** FIXME: consider making argument "type-safe" in Java port */
   public Address entryFor(int id) {
-    return blobFor(id).instructionsBegin();
+    return blobFor(id).codeBegin();
   }
 
   /** FIXME: consider making argument "type-safe" in Java port */
--- a/agent/src/share/classes/sun/jvm/hotspot/code/CodeBlob.java	Thu Sep 23 17:33:27 2010 -0700
+++ b/agent/src/share/classes/sun/jvm/hotspot/code/CodeBlob.java	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2005, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -39,7 +39,8 @@
   private static CIntegerField sizeField;
   private static CIntegerField headerSizeField;
   private static CIntegerField relocationSizeField;
-  private static CIntegerField instructionsOffsetField;
+  private static CIntegerField contentOffsetField;
+  private static CIntegerField codeOffsetField;
   private static CIntegerField frameCompleteOffsetField;
   private static CIntegerField dataOffsetField;
   private static CIntegerField frameSizeField;
@@ -68,7 +69,8 @@
     headerSizeField          = type.getCIntegerField("_header_size");
     relocationSizeField      = type.getCIntegerField("_relocation_size");
     frameCompleteOffsetField = type.getCIntegerField("_frame_complete_offset");
-    instructionsOffsetField  = type.getCIntegerField("_instructions_offset");
+    contentOffsetField       = type.getCIntegerField("_content_offset");
+    codeOffsetField          = type.getCIntegerField("_code_offset");
     dataOffsetField          = type.getCIntegerField("_data_offset");
     frameSizeField           = type.getCIntegerField("_frame_size");
     oopMapsField             = type.getAddressField("_oop_maps");
@@ -111,11 +113,19 @@
   //  public RelocInfo relocationBegin();
   //  public RelocInfo relocationEnd();
 
-  public Address instructionsBegin() {
-    return headerBegin().addOffsetTo(instructionsOffsetField.getValue(addr));
+  public Address contentBegin() {
+    return headerBegin().addOffsetTo(contentOffsetField.getValue(addr));
   }
 
-  public Address instructionsEnd() {
+  public Address contentEnd() {
+    return headerBegin().addOffsetTo(dataOffsetField.getValue(addr));
+  }
+
+  public Address codeBegin() {
+    return headerBegin().addOffsetTo(contentOffsetField.getValue(addr));
+  }
+
+  public Address codeEnd() {
     return headerBegin().addOffsetTo(dataOffsetField.getValue(addr));
   }
 
@@ -128,24 +138,27 @@
   }
 
   // Offsets
-  public int getRelocationOffset()   { return (int) headerSizeField.getValue(addr);         }
-  public int getInstructionsOffset() { return (int) instructionsOffsetField.getValue(addr); }
-  public int getDataOffset()         { return (int) dataOffsetField.getValue(addr);         }
+  public int getRelocationOffset() { return (int) headerSizeField   .getValue(addr); }
+  public int getContentOffset()    { return (int) contentOffsetField.getValue(addr); }
+  public int getCodeOffset()       { return (int) codeOffsetField   .getValue(addr); }
+  public int getDataOffset()       { return (int) dataOffsetField   .getValue(addr); }
 
   // Sizes
-  public int getSize()             { return (int) sizeField.getValue(addr);                     }
-  public int getHeaderSize()       { return (int) headerSizeField.getValue(addr);               }
+  public int getSize()             { return (int) sizeField      .getValue(addr);     }
+  public int getHeaderSize()       { return (int) headerSizeField.getValue(addr);     }
   // FIXME: add getRelocationSize()
-  public int getInstructionsSize() { return (int) instructionsEnd().minus(instructionsBegin()); }
-  public int getDataSize()         { return (int) dataEnd().minus(dataBegin());                 }
+  public int getContentSize()      { return (int) contentEnd().minus(contentBegin()); }
+  public int getCodeSize()         { return (int) codeEnd()   .minus(codeBegin());    }
+  public int getDataSize()         { return (int) dataEnd()   .minus(dataBegin());    }
 
   // Containment
-  public boolean blobContains(Address addr)         { return headerBegin().lessThanOrEqual(addr) && dataEnd().greaterThan(addr);               }
+  public boolean blobContains(Address addr)    { return headerBegin() .lessThanOrEqual(addr) && dataEnd()   .greaterThan(addr); }
   // FIXME: add relocationContains
-  public boolean instructionsContains(Address addr) { return instructionsBegin().lessThanOrEqual(addr) && instructionsEnd().greaterThan(addr); }
-  public boolean dataContains(Address addr)         { return dataBegin().lessThanOrEqual(addr) && dataEnd().greaterThan(addr);                 }
-  public boolean contains(Address addr)             { return instructionsContains(addr);                                                       }
-  public boolean isFrameCompleteAt(Address a)       { return instructionsContains(a) && a.minus(instructionsBegin()) >= frameCompleteOffsetField.getValue(addr); }
+  public boolean contentContains(Address addr) { return contentBegin().lessThanOrEqual(addr) && contentEnd().greaterThan(addr); }
+  public boolean codeContains(Address addr)    { return codeBegin()   .lessThanOrEqual(addr) && codeEnd()   .greaterThan(addr); }
+  public boolean dataContains(Address addr)    { return dataBegin()   .lessThanOrEqual(addr) && dataEnd()   .greaterThan(addr); }
+  public boolean contains(Address addr)        { return contentContains(addr);                                                  }
+  public boolean isFrameCompleteAt(Address a)  { return codeContains(a) && a.minus(codeBegin()) >= frameCompleteOffsetField.getValue(addr); }
 
   // Reclamation support (really only used by the nmethods, but in order to get asserts to work
   // in the CodeCache they are defined virtual here)
@@ -168,7 +181,7 @@
     if (Assert.ASSERTS_ENABLED) {
       Assert.that(getOopMaps() != null, "nope");
     }
-    return getOopMaps().findMapAtOffset(pc.minus(instructionsBegin()), debugging);
+    return getOopMaps().findMapAtOffset(pc.minus(codeBegin()), debugging);
   }
 
   //  virtual void preserve_callee_argument_oops(frame fr, const RegisterMap* reg_map, void f(oop*)) { ShouldNotReachHere(); }
@@ -200,7 +213,8 @@
   }
 
   protected void printComponentsOn(PrintStream tty) {
-    tty.println(" instructions: [" + instructionsBegin() + ", " + instructionsEnd() + "), " +
+    tty.println(" content: [" + contentBegin() + ", " + contentEnd() + "), " +
+                " code: [" + codeBegin() + ", " + codeEnd() + "), " +
                 " data: [" + dataBegin() + ", " + dataEnd() + "), " +
                 " frame size: " + getFrameSize());
   }
--- a/agent/src/share/classes/sun/jvm/hotspot/code/NMethod.java	Thu Sep 23 17:33:27 2010 -0700
+++ b/agent/src/share/classes/sun/jvm/hotspot/code/NMethod.java	Fri Sep 24 00:51:15 2010 -0700
@@ -134,10 +134,10 @@
   public boolean isOSRMethod()    { return getEntryBCI() != VM.getVM().getInvocationEntryBCI(); }
 
   /** Boundaries for different parts */
-  public Address constantsBegin()       { return instructionsBegin();                                }
+  public Address constantsBegin()       { return contentBegin();                                     }
   public Address constantsEnd()         { return getEntryPoint();                                    }
-  public Address codeBegin()            { return getEntryPoint();                                    }
-  public Address codeEnd()              { return headerBegin().addOffsetTo(getStubOffset());         }
+  public Address instsBegin()           { return codeBegin();                                       }
+  public Address instsEnd()             { return headerBegin().addOffsetTo(getStubOffset());         }
   public Address exceptionBegin()       { return headerBegin().addOffsetTo(getExceptionOffset());    }
   public Address deoptBegin()           { return headerBegin().addOffsetTo(getDeoptOffset());        }
   public Address stubBegin()            { return headerBegin().addOffsetTo(getStubOffset());         }
@@ -156,7 +156,7 @@
   public Address nulChkTableEnd()       { return headerBegin().addOffsetTo(getNMethodEndOffset());   }
 
   public int constantsSize()            { return (int) constantsEnd()   .minus(constantsBegin());    }
-  public int codeSize()                 { return (int) codeEnd()        .minus(codeBegin());         }
+  public int instsSize()                { return (int) instsEnd()       .minus(instsBegin());        }
   public int stubSize()                 { return (int) stubEnd()        .minus(stubBegin());         }
   public int oopsSize()                 { return (int) oopsEnd()        .minus(oopsBegin());         }
   public int scopesDataSize()           { return (int) scopesDataEnd()  .minus(scopesDataBegin());   }
@@ -169,7 +169,7 @@
   public int totalSize() {
     return
       constantsSize()    +
-      codeSize()         +
+      instsSize()        +
       stubSize()         +
       scopesDataSize()   +
       scopesPCsSize()    +
@@ -179,7 +179,7 @@
   }
 
   public boolean constantsContains   (Address addr) { return constantsBegin()   .lessThanOrEqual(addr) && constantsEnd()   .greaterThan(addr); }
-  public boolean codeContains        (Address addr) { return codeBegin()        .lessThanOrEqual(addr) && codeEnd()        .greaterThan(addr); }
+  public boolean instsContains       (Address addr) { return instsBegin()       .lessThanOrEqual(addr) && instsEnd()       .greaterThan(addr); }
   public boolean stubContains        (Address addr) { return stubBegin()        .lessThanOrEqual(addr) && stubEnd()        .greaterThan(addr); }
   public boolean oopsContains        (Address addr) { return oopsBegin()        .lessThanOrEqual(addr) && oopsEnd()        .greaterThan(addr); }
   public boolean scopesDataContains  (Address addr) { return scopesDataBegin()  .lessThanOrEqual(addr) && scopesDataEnd()  .greaterThan(addr); }
@@ -353,7 +353,8 @@
 
   protected void printComponentsOn(PrintStream tty) {
     // FIXME: add relocation information
-    tty.println(" instructions: [" + instructionsBegin() + ", " + instructionsEnd() + "), " +
+    tty.println(" content: [" + contentBegin() + ", " + contentEnd() + "), " +
+                " code: [" + codeBegin() + ", " + codeEnd() + "), " +
                 " data: [" + dataBegin() + ", " + dataEnd() + "), " +
                 " oops: [" + oopsBegin() + ", " + oopsEnd() + "), " +
                 " frame size: " + getFrameSize());
--- a/agent/src/share/classes/sun/jvm/hotspot/code/PCDesc.java	Thu Sep 23 17:33:27 2010 -0700
+++ b/agent/src/share/classes/sun/jvm/hotspot/code/PCDesc.java	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2009, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -75,7 +75,7 @@
   }
 
   public Address getRealPC(NMethod code) {
-    return code.instructionsBegin().addOffsetTo(getPCOffset());
+    return code.codeBegin().addOffsetTo(getPCOffset());
   }
 
 
--- a/agent/src/share/classes/sun/jvm/hotspot/ui/FindInCodeCachePanel.java	Thu Sep 23 17:33:27 2010 -0700
+++ b/agent/src/share/classes/sun/jvm/hotspot/ui/FindInCodeCachePanel.java	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2004, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -190,11 +190,11 @@
 
   private void reportResult(StringBuffer result, CodeBlob blob) {
     result.append("<a href='blob:");
-    result.append(blob.instructionsBegin().toString());
+    result.append(blob.contentBegin().toString());
     result.append("'>");
     result.append(blob.getName());
     result.append("@");
-    result.append(blob.instructionsBegin());
+    result.append(blob.contentBegin());
     result.append("</a><br>");
   }
 
--- a/agent/src/share/classes/sun/jvm/hotspot/ui/classbrowser/HTMLGenerator.java	Thu Sep 23 17:33:27 2010 -0700
+++ b/agent/src/share/classes/sun/jvm/hotspot/ui/classbrowser/HTMLGenerator.java	Fri Sep 24 00:51:15 2010 -0700
@@ -1415,13 +1415,13 @@
          buf.append(genMethodAndKlassLink(nmethod.getMethod()));
 
          buf.h3("Compiled Code");
-         sun.jvm.hotspot.debugger.Address codeBegin = nmethod.codeBegin();
-         sun.jvm.hotspot.debugger.Address codeEnd   = nmethod.codeEnd();
-         final int codeSize = (int)codeEnd.minus(codeBegin);
-         final long startPc = addressToLong(codeBegin);
-         final byte[] code = new byte[codeSize];
+         sun.jvm.hotspot.debugger.Address instsBegin = nmethod.instsBegin();
+         sun.jvm.hotspot.debugger.Address instsEnd   = nmethod.instsEnd();
+         final int instsSize = nmethod.instsSize();
+         final long startPc = addressToLong(instsBegin);
+         final byte[] code = new byte[instsSize];
          for (int i=0; i < code.length; i++)
-            code[i] = codeBegin.getJByteAt(i);
+            code[i] = instsBegin.getJByteAt(i);
 
          final long verifiedEntryPoint = addressToLong(nmethod.getVerifiedEntryPoint());
          final long entryPoint = addressToLong(nmethod.getEntryPoint());
@@ -1499,8 +1499,8 @@
          buf.h3("CodeBlob");
 
          buf.h3("Compiled Code");
-         final sun.jvm.hotspot.debugger.Address codeBegin = blob.instructionsBegin();
-         final int codeSize = blob.getInstructionsSize();
+         final sun.jvm.hotspot.debugger.Address codeBegin = blob.codeBegin();
+         final int codeSize = blob.getCodeSize();
          final long startPc = addressToLong(codeBegin);
          final byte[] code = new byte[codeSize];
          for (int i=0; i < code.length; i++)
--- a/agent/src/share/classes/sun/jvm/hotspot/utilities/PointerFinder.java	Thu Sep 23 17:33:27 2010 -0700
+++ b/agent/src/share/classes/sun/jvm/hotspot/utilities/PointerFinder.java	Fri Sep 24 00:51:15 2010 -0700
@@ -96,15 +96,15 @@
         if (Assert.ASSERTS_ENABLED) {
           Assert.that(loc.blob != null, "Should have found CodeBlob");
         }
-        loc.inBlobInstructions = loc.blob.instructionsContains(a);
-        loc.inBlobData         = loc.blob.dataContains(a);
+        loc.inBlobCode = loc.blob.codeContains(a);
+        loc.inBlobData = loc.blob.dataContains(a);
 
         if (loc.blob.isNMethod()) {
             NMethod nm = (NMethod) loc.blob;
             loc.inBlobOops = nm.oopsContains(a);
         }
 
-        loc.inBlobUnknownLocation = (!(loc.inBlobInstructions ||
+        loc.inBlobUnknownLocation = (!(loc.inBlobCode ||
                                        loc.inBlobData ||
                                        loc.inBlobOops));
         return loc;
--- a/agent/src/share/classes/sun/jvm/hotspot/utilities/PointerLocation.java	Thu Sep 23 17:33:27 2010 -0700
+++ b/agent/src/share/classes/sun/jvm/hotspot/utilities/PointerLocation.java	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2004, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -65,7 +65,7 @@
   InterpreterCodelet interpreterCodelet;
   CodeBlob blob;
   // FIXME: add more detail about CodeBlob
-  boolean inBlobInstructions;
+  boolean inBlobCode;
   boolean inBlobData;
   boolean inBlobOops;
   boolean inBlobUnknownLocation;
@@ -142,8 +142,8 @@
     return blob;
   }
 
-  public boolean isInBlobInstructions() {
-    return inBlobInstructions;
+  public boolean isInBlobCode() {
+    return inBlobCode;
   }
 
   public boolean isInBlobData() {
@@ -233,8 +233,8 @@
     } else if (isInCodeCache()) {
       CodeBlob b = getCodeBlob();
       tty.print("In ");
-      if (isInBlobInstructions()) {
-        tty.print("instructions");
+      if (isInBlobCode()) {
+        tty.print("code");
       } else if (isInBlobData()) {
         tty.print("data");
       } else if (isInBlobOops()) {
--- a/make/hotspot_version	Thu Sep 23 17:33:27 2010 -0700
+++ b/make/hotspot_version	Fri Sep 24 00:51:15 2010 -0700
@@ -33,9 +33,9 @@
 # Don't put quotes (fail windows build).
 HOTSPOT_VM_COPYRIGHT=Copyright 2010
 
-HS_MAJOR_VER=19
+HS_MAJOR_VER=20
 HS_MINOR_VER=0
-HS_BUILD_NUMBER=06
+HS_BUILD_NUMBER=01
 
 JDK_MAJOR_VER=1
 JDK_MINOR_VER=7
--- a/make/jprt.properties	Thu Sep 23 17:33:27 2010 -0700
+++ b/make/jprt.properties	Fri Sep 24 00:51:15 2010 -0700
@@ -47,6 +47,8 @@
 # Define the Solaris platforms we want for the various releases
 
 jprt.my.solaris.sparc.jdk7=solaris_sparc_5.10
+jprt.my.solaris.sparc.jdk7b107=solaris_sparc_5.10
+jprt.my.solaris.sparc.jdk7temp=solaris_sparc_5.10
 jprt.my.solaris.sparc.jdk6=solaris_sparc_5.8
 jprt.my.solaris.sparc.jdk6perf=solaris_sparc_5.8
 jprt.my.solaris.sparc.jdk6u10=solaris_sparc_5.8
@@ -56,6 +58,8 @@
 jprt.my.solaris.sparc=${jprt.my.solaris.sparc.${jprt.tools.default.release}}
 
 jprt.my.solaris.sparcv9.jdk7=solaris_sparcv9_5.10
+jprt.my.solaris.sparcv9.jdk7b107=solaris_sparcv9_5.10
+jprt.my.solaris.sparcv9.jdk7temp=solaris_sparcv9_5.10
 jprt.my.solaris.sparcv9.jdk6=solaris_sparcv9_5.8
 jprt.my.solaris.sparcv9.jdk6perf=solaris_sparcv9_5.8
 jprt.my.solaris.sparcv9.jdk6u10=solaris_sparcv9_5.8
@@ -65,6 +69,8 @@
 jprt.my.solaris.sparcv9=${jprt.my.solaris.sparcv9.${jprt.tools.default.release}}
 
 jprt.my.solaris.i586.jdk7=solaris_i586_5.10
+jprt.my.solaris.i586.jdk7b107=solaris_i586_5.10
+jprt.my.solaris.i586.jdk7temp=solaris_i586_5.10
 jprt.my.solaris.i586.jdk6=solaris_i586_5.8
 jprt.my.solaris.i586.jdk6perf=solaris_i586_5.8
 jprt.my.solaris.i586.jdk6u10=solaris_i586_5.8
@@ -74,6 +80,8 @@
 jprt.my.solaris.i586=${jprt.my.solaris.i586.${jprt.tools.default.release}}
 
 jprt.my.solaris.x64.jdk7=solaris_x64_5.10
+jprt.my.solaris.x64.jdk7b107=solaris_x64_5.10
+jprt.my.solaris.x64.jdk7temp=solaris_x64_5.10
 jprt.my.solaris.x64.jdk6=solaris_x64_5.10
 jprt.my.solaris.x64.jdk6perf=solaris_x64_5.10
 jprt.my.solaris.x64.jdk6u10=solaris_x64_5.10
@@ -83,6 +91,8 @@
 jprt.my.solaris.x64=${jprt.my.solaris.x64.${jprt.tools.default.release}}
 
 jprt.my.linux.i586.jdk7=linux_i586_2.6
+jprt.my.linux.i586.jdk7b107=linux_i586_2.6
+jprt.my.linux.i586.jdk7temp=linux_i586_2.6
 jprt.my.linux.i586.jdk6=linux_i586_2.4
 jprt.my.linux.i586.jdk6perf=linux_i586_2.4
 jprt.my.linux.i586.jdk6u10=linux_i586_2.4
@@ -92,6 +102,8 @@
 jprt.my.linux.i586=${jprt.my.linux.i586.${jprt.tools.default.release}}
 
 jprt.my.linux.x64.jdk7=linux_x64_2.6
+jprt.my.linux.x64.jdk7b107=linux_x64_2.6
+jprt.my.linux.x64.jdk7temp=linux_x64_2.6
 jprt.my.linux.x64.jdk6=linux_x64_2.4
 jprt.my.linux.x64.jdk6perf=linux_x64_2.4
 jprt.my.linux.x64.jdk6u10=linux_x64_2.4
@@ -100,7 +112,9 @@
 jprt.my.linux.x64.jdk6u20=linux_x64_2.4
 jprt.my.linux.x64=${jprt.my.linux.x64.${jprt.tools.default.release}}
 
-jprt.my.windows.i586.jdk7=windows_i586_5.0
+jprt.my.windows.i586.jdk7=windows_i586_5.1
+jprt.my.windows.i586.jdk7b107=windows_i586_5.0
+jprt.my.windows.i586.jdk7temp=windows_i586_5.0
 jprt.my.windows.i586.jdk6=windows_i586_5.0
 jprt.my.windows.i586.jdk6perf=windows_i586_5.0
 jprt.my.windows.i586.jdk6u10=windows_i586_5.0
@@ -110,6 +124,8 @@
 jprt.my.windows.i586=${jprt.my.windows.i586.${jprt.tools.default.release}}
 
 jprt.my.windows.x64.jdk7=windows_x64_5.2
+jprt.my.windows.x64.jdk7b107=windows_x64_5.2
+jprt.my.windows.x64.jdk7temp=windows_x64_5.2
 jprt.my.windows.x64.jdk6=windows_x64_5.2
 jprt.my.windows.x64.jdk6perf=windows_x64_5.2
 jprt.my.windows.x64.jdk6u10=windows_x64_5.2
--- a/make/linux/Makefile	Thu Sep 23 17:33:27 2010 -0700
+++ b/make/linux/Makefile	Fri Sep 24 00:51:15 2010 -0700
@@ -19,7 +19,7 @@
 # Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 # or visit www.oracle.com if you need additional information or have any
 # questions.
-#  
+#
 #
 
 # This makefile creates a build tree and lights off a build.
@@ -45,13 +45,13 @@
 #
 #    make REMOTE="rsh -l me myotherlinuxbox"
 
-# Along with VM, Serviceability Agent (SA) is built for SA/JDI binding. 
-# JDI binding on SA produces two binaries: 
+# Along with VM, Serviceability Agent (SA) is built for SA/JDI binding.
+# JDI binding on SA produces two binaries:
 #  1. sa-jdi.jar       - This is build before building libjvm[_g].so
 #                        Please refer to ./makefiles/sa.make
 #  2. libsa[_g].so     - Native library for SA - This is built after
 #                        libjsig[_g].so (signal interposition library)
-#                        Please refer to ./makefiles/vm.make 
+#                        Please refer to ./makefiles/vm.make
 # If $(GAMMADIR)/agent dir is not present, SA components are not built.
 
 ifeq ($(GAMMADIR),)
@@ -61,11 +61,9 @@
 endif
 include $(GAMMADIR)/make/$(OSNAME)/makefiles/rules.make
 
-ifndef LP64
 ifndef CC_INTERP
 FORCE_TIERED=1
 endif
-endif
 
 ifdef LP64
   ifeq ("$(filter $(LP64_ARCH),$(BUILDARCH))","")
--- a/make/linux/makefiles/sa.make	Thu Sep 23 17:33:27 2010 -0700
+++ b/make/linux/makefiles/sa.make	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2003, 2008, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -48,6 +48,9 @@
 AGENT_FILES1 := $(shell /usr/bin/test -d $(AGENT_DIR) && /bin/ls $(AGENT_FILES1))
 AGENT_FILES2 := $(shell /usr/bin/test -d $(AGENT_DIR) && /bin/ls $(AGENT_FILES2))
 
+AGENT_FILES1_LIST := $(GENERATED)/agent1.classes.list
+AGENT_FILES2_LIST := $(GENERATED)/agent2.classes.list
+
 SA_CLASSDIR = $(GENERATED)/saclasses
 
 SA_BUILD_VERSION_PROP = "sun.jvm.hotspot.runtime.VM.saBuildVersion=$(SA_BUILD_VERSION)"
@@ -79,10 +82,24 @@
 	$(QUIETLY) if [ ! -d $(SA_CLASSDIR) ] ; then \
 	  mkdir -p $(SA_CLASSDIR);        \
 	fi
-
-	$(QUIETLY) $(REMOTE) $(COMPILE.JAVAC) -source 1.4 -target 1.4 -classpath $(SA_CLASSPATH) -sourcepath $(AGENT_SRC_DIR) -d $(SA_CLASSDIR) $(AGENT_FILES1)
-	$(QUIETLY) $(REMOTE) $(COMPILE.JAVAC) -source 1.4 -target 1.4 -classpath $(SA_CLASSPATH) -sourcepath $(AGENT_SRC_DIR) -d $(SA_CLASSDIR) $(AGENT_FILES2)
-
+	
+# Note: When indented, make tries to execute the '$(shell' comment.
+# In some environments, cmd processors have limited line length.
+# To prevent the javac invocation in the next block from using
+# a very long cmd line, we use javac's @file-list option. We
+# generate the file lists using make's built-in 'foreach' control
+# flow which also avoids cmd processor line length issues. Since
+# the 'foreach' is done as part of make's macro expansion phase,
+# the initialization of the lists is also done in the same phase
+# using '$(shell rm ...' instead of using the more traditional
+# 'rm ...' rule.
+	$(shell rm -rf $(AGENT_FILES1_LIST) $(AGENT_FILES2_LIST))
+	$(foreach file,$(AGENT_FILES1),$(shell echo $(file) >> $(AGENT_FILES1_LIST)))
+	$(foreach file,$(AGENT_FILES2),$(shell echo $(file) >> $(AGENT_FILES2_LIST)))
+	
+	$(QUIETLY) $(REMOTE) $(COMPILE.JAVAC) -source 1.4 -target 1.4 -classpath $(SA_CLASSPATH) -sourcepath $(AGENT_SRC_DIR) -d $(SA_CLASSDIR) @$(AGENT_FILES1_LIST)
+	$(QUIETLY) $(REMOTE) $(COMPILE.JAVAC) -source 1.4 -target 1.4 -classpath $(SA_CLASSPATH) -sourcepath $(AGENT_SRC_DIR) -d $(SA_CLASSDIR) @$(AGENT_FILES2_LIST)
+	
 	$(QUIETLY) $(REMOTE) $(COMPILE.RMIC)  -classpath $(SA_CLASSDIR) -d $(SA_CLASSDIR) sun.jvm.hotspot.debugger.remote.RemoteDebuggerServer
 	$(QUIETLY) echo "$(SA_BUILD_VERSION_PROP)" > $(SA_PROPERTIES)
 	$(QUIETLY) rm -f $(SA_CLASSDIR)/sun/jvm/hotspot/utilities/soql/sa.js
@@ -101,3 +118,4 @@
 clean:
 	rm -rf $(SA_CLASSDIR)
 	rm -rf $(GENERATED)/sa-jdi.jar
+	rm -rf $(AGENT_FILES1_LIST) $(AGENT_FILES2_LIST)
--- a/make/solaris/Makefile	Thu Sep 23 17:33:27 2010 -0700
+++ b/make/solaris/Makefile	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 1998, 2008, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -19,7 +19,7 @@
 # Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 # or visit www.oracle.com if you need additional information or have any
 # questions.
-#  
+#
 #
 
 # This makefile creates a build tree and lights off a build.
@@ -36,13 +36,13 @@
 # or BOOTDIR has to be set. We do *not* search javac, javah, rmic etc.
 # from the PATH.
 
-# Along with VM, Serviceability Agent (SA) is built for SA/JDI binding. 
-# JDI binding on SA produces two binaries: 
+# Along with VM, Serviceability Agent (SA) is built for SA/JDI binding.
+# JDI binding on SA produces two binaries:
 #  1. sa-jdi.jar       - This is build before building libjvm[_g].so
 #                        Please refer to ./makefiles/sa.make
 #  2. libsaproc[_g].so - Native library for SA - This is built after
 #                        libjsig[_g].so (signal interposition library)
-#                        Please refer to ./makefiles/vm.make 
+#                        Please refer to ./makefiles/vm.make
 # If $(GAMMADIR)/agent dir is not present, SA components are not built.
 
 ifeq ($(GAMMADIR),)
@@ -52,11 +52,9 @@
 endif
 include $(GAMMADIR)/make/$(OSNAME)/makefiles/rules.make
 
-ifndef LP64
 ifndef CC_INTERP
 FORCE_TIERED=1
 endif
-endif
 
 ifdef LP64
   ifeq ("$(filter $(LP64_ARCH),$(BUILDARCH))","")
--- a/make/solaris/makefiles/dtrace.make	Thu Sep 23 17:33:27 2010 -0700
+++ b/make/solaris/makefiles/dtrace.make	Fri Sep 24 00:51:15 2010 -0700
@@ -165,7 +165,7 @@
 $(DTRACE.o): $(DTRACE).d $(JVMOFFS).h $(JVMOFFS)Index.h $(DTraced_Files)
 	@echo Compiling $(DTRACE).d
 
-	$(QUIETLY) $(DTRACE_PROG) $(DTRACE_OPTS) -C -I. -G -o $@ -s $(DTRACE).d \
+	$(QUIETLY) $(DTRACE_PROG) $(DTRACE_OPTS) -C -I. -G -xlazyload -o $@ -s $(DTRACE).d \
      $(DTraced_Files) ||\
   STATUS=$$?;\
 	if [ x"$$STATUS" = x"1" -a \
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/make/solaris/makefiles/reorder_TIERED_sparcv9	Fri Sep 24 00:51:15 2010 -0700
@@ -0,0 +1,4477 @@
+data = R0x2000;
+text = LOAD ?RXO;
+
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+text: .text%__1cNTemplateTableLwide_astore6F_v_;
+text: .text%__1cNTemplateTableHiastore6F_v_;
+text: .text%__1cNTemplateTableEldiv6F_v_;
+text: .text%__1cNTemplateTableLtableswitch6F_v_;
+text: .text%__1cNTemplateTableMlookupswitch6F_v_;
+text: .text%__1cNTemplateTableRfast_linearswitch6F_v_;
+text: .text%__1cNTemplateTableRfast_binaryswitch6F_v_;
+text: .text%__1cNCompileBrokerVinit_compiler_threads6Fi_v_;
+text: .text%__1cJPSPermGen2t6MnNReservedSpace_IIIIpkci_v_;
+text: .text%__1cNCompileBrokerQset_should_block6F_v_;
+text: .text%__1cU__STATIC_CONSTRUCTOR6F_v_: compileBroker.o;
+text: .text%__1cNTemplateTableIgetfield6Fi_v_;
+text: .text%__1cNTemplateTableJgetstatic6Fi_v_;
+text: .text%__1cIPSOldGenKinitialize6MnNReservedSpace_Ipkci_v_;
+text: .text%__1cIPSOldGen2t6MIIIpkci_v_;
+text: .text%__1cIPSOldGen2t6MnNReservedSpace_IIIIpkci_v_;
+text: .text%__1cVcompiledICHolderKlassMcreate_klass6FpnGThread__pnMklassOopDesc__;
+text: .text%__1cU__STATIC_CONSTRUCTOR6F_v_: psMarkSweep.o;
+text: .text%__1cNTemplateTableIputfield6Fi_v_;
+text: .text%__1cNTemplateTableJputstatic6Fi_v_;
+text: .text%__1cVcompiledICHolderKlassOset_alloc_size6MI_v_: compiledICHolderKlass.o;
+text: .text%__1cLPSMarkSweepKinitialize6F_v_;
+text: .text%__1cNTemplateTableIwide_ret6F_v_;
+text: .text%__1cNTemplateTableElrem6F_v_;
+text: .text%__1cNTemplateTableElshl6F_v_;
+text: .text%__1cNTemplateTableElshr6F_v_;
+text: .text%__1cNTemplateTableFlushr6F_v_;
+text: .text%__1cbCTwoGenerationCollectorPolicyQinitialize_flags6M_v_;
+text: .text%__1cbCTwoGenerationCollectorPolicyUinitialize_size_info6M_v_;
+text: .text%__1cNTemplateTableEineg6F_v_;
+text: .text%__1cNTemplateTableElneg6F_v_;
+text: .text%__1cNTemplateTableEfneg6F_v_;
+text: .text%__1cNTemplateTableEdneg6F_v_;
+text: .text%__1cNTemplateTableEiinc6F_v_;
+text: .text%__1cNTemplateTableJwide_iinc6F_v_;
+text: .text%__1cKPSScavengeKinitialize6F_v_;
+text: .text%__1cNTemplateTableElcmp6F_v_;
+text: .text%__1cWcompilationPolicy_init6F_v_;
+text: .text%__1cRCompilationPolicyUcompleted_vm_startup6F_v_;
+text: .text%__1cU__STATIC_CONSTRUCTOR6F_v_: compilationPolicy.o;
+text: .text%__1cSPSPromotionManagerKinitialize6F_v_;
+text: .text%__1cNTemplateTableDret6F_v_;
--- a/make/solaris/makefiles/sa.make	Thu Sep 23 17:33:27 2010 -0700
+++ b/make/solaris/makefiles/sa.make	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2003, 2008, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -44,6 +44,9 @@
 AGENT_FILES1 := $(shell /usr/bin/test -d $(AGENT_DIR) && /bin/ls $(AGENT_FILES1))
 AGENT_FILES2 := $(shell /usr/bin/test -d $(AGENT_DIR) && /bin/ls $(AGENT_FILES2))
 
+AGENT_FILES1_LIST := $(GENERATED)/agent1.classes.list
+AGENT_FILES2_LIST := $(GENERATED)/agent2.classes.list
+
 SA_CLASSDIR = $(GENERATED)/saclasses
 
 SA_BUILD_VERSION_PROP = "sun.jvm.hotspot.runtime.VM.saBuildVersion=$(SA_BUILD_VERSION)"
@@ -70,8 +73,23 @@
 	$(QUIETLY) if [ ! -d $(SA_CLASSDIR) ] ; then \
 	  mkdir -p $(SA_CLASSDIR);        \
 	fi
-	$(QUIETLY) $(COMPILE.JAVAC) -source 1.4 -target 1.4 -classpath $(SA_CLASSPATH) -sourcepath $(AGENT_SRC_DIR) -d $(SA_CLASSDIR) $(AGENT_FILES1)
-	$(QUIETLY) $(COMPILE.JAVAC) -source 1.4 -target 1.4 -classpath $(SA_CLASSPATH) -sourcepath $(AGENT_SRC_DIR) -d $(SA_CLASSDIR) $(AGENT_FILES2)
+	
+# Note: When indented, make tries to execute the '$(shell' comment.
+# In some environments, cmd processors have limited line length.
+# To prevent the javac invocation in the next block from using
+# a very long cmd line, we use javac's @file-list option. We
+# generate the file lists using make's built-in 'foreach' control
+# flow which also avoids cmd processor line length issues. Since
+# the 'foreach' is done as part of make's macro expansion phase,
+# the initialization of the lists is also done in the same phase
+# using '$(shell rm ...' instead of using the more traditional
+# 'rm ...' rule.
+	$(shell rm -rf $(AGENT_FILES1_LIST) $(AGENT_FILES2_LIST))
+	$(foreach file,$(AGENT_FILES1),$(shell echo $(file) >> $(AGENT_FILES1_LIST)))
+	$(foreach file,$(AGENT_FILES2),$(shell echo $(file) >> $(AGENT_FILES2_LIST)))
+	
+	$(QUIETLY) $(COMPILE.JAVAC) -source 1.4 -target 1.4 -classpath $(SA_CLASSPATH) -sourcepath $(AGENT_SRC_DIR) -d $(SA_CLASSDIR) @$(AGENT_FILES1_LIST)
+	$(QUIETLY) $(COMPILE.JAVAC) -source 1.4 -target 1.4 -classpath $(SA_CLASSPATH) -sourcepath $(AGENT_SRC_DIR) -d $(SA_CLASSDIR) @$(AGENT_FILES2_LIST)
 	
 	$(QUIETLY) $(COMPILE.RMIC)  -classpath $(SA_CLASSDIR) -d $(SA_CLASSDIR) sun.jvm.hotspot.debugger.remote.RemoteDebuggerServer
 	$(QUIETLY) echo "$(SA_BUILD_VERSION_PROP)" > $(SA_PROPERTIES)
@@ -88,3 +106,4 @@
 clean:
 	rm -rf $(SA_CLASSDIR)
 	rm -rf $(GENERATED)/sa-jdi.jar
+	rm -rf $(AGENT_FILES1_LIST) $(AGENT_FILES2_LIST)
--- a/make/windows/build.make	Thu Sep 23 17:33:27 2010 -0700
+++ b/make/windows/build.make	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 1998, 2008, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -19,7 +19,7 @@
 # Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 # or visit www.oracle.com if you need additional information or have any
 # questions.
-#  
+#
 #
 
 # Note: this makefile is invoked both from build.bat and from the J2SE
@@ -72,13 +72,11 @@
 !endif
 !endif
 
-!if "$(BUILDARCH)" != "amd64"
 !if "$(BUILDARCH)" != "ia64"
 !ifndef CC_INTERP
 FORCE_TIERED=1
 !endif
 !endif
-!endif
 
 !if "$(BUILDARCH)" == "amd64"
 Platform_arch=x86
@@ -135,7 +133,7 @@
 # We can have update versions like "01a", but Windows requires
 # we use only integers in the file version field.  So:
 # JDK_UPDATE_VER = JDK_UPDATE_VERSION * 10 + EXCEPTION_VERSION
-# 
+#
 JDK_UPDATE_VER=0
 JDK_BUILD_NUMBER=0
 
@@ -148,7 +146,7 @@
 #       1.6.0_01a-b02 will be 6.0.11.2
 #
 # JDK_* variables are defined in make/hotspot_version or on command line
-# 
+#
 JDK_VER=$(JDK_MINOR_VER),$(JDK_MICRO_VER),$(JDK_UPDATE_VER),$(JDK_BUILD_NUMBER)
 JDK_DOTVER=$(JDK_MINOR_VER).$(JDK_MICRO_VER).$(JDK_UPDATE_VER).$(JDK_BUILD_NUMBER)
 !if "$(JRE_RELEASE_VERSION)" == ""
@@ -162,7 +160,7 @@
 
 # Hotspot Express VM FileVersion:
 # 10.0-b<yz> will have DLL version 10.0.0.yz (need 4 numbers).
-# 
+#
 # HS_* variables are defined in make/hotspot_version
 #
 HS_VER=$(HS_MAJOR_VER),$(HS_MINOR_VER),0,$(HS_BUILD_NUMBER)
@@ -182,7 +180,7 @@
 
 
 # We don't support SA on ia64, and we can't
-# build it if we are using a version of Vis Studio 
+# build it if we are using a version of Vis Studio
 # older than .Net 2003.
 # SA_INCLUDE and SA_LIB are hold-overs from a previous
 # implementation in which we could build SA using
--- a/src/cpu/sparc/vm/assembler_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/assembler_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -4192,7 +4192,7 @@
 
 static void generate_satb_log_enqueue(bool with_frame) {
   BufferBlob* bb = BufferBlob::create("enqueue_with_frame", EnqueueCodeSize);
-  CodeBuffer buf(bb->instructions_begin(), bb->instructions_size());
+  CodeBuffer buf(bb);
   MacroAssembler masm(&buf);
   address start = masm.pc();
   Register pre_val;
@@ -4421,7 +4421,7 @@
 // This gets to assume that o0 contains the object address.
 static void generate_dirty_card_log_enqueue(jbyte* byte_map_base) {
   BufferBlob* bb = BufferBlob::create("dirty_card_enqueue", EnqueueCodeSize*2);
-  CodeBuffer buf(bb->instructions_begin(), bb->instructions_size());
+  CodeBuffer buf(bb);
   MacroAssembler masm(&buf);
   address start = masm.pc();
 
--- a/src/cpu/sparc/vm/c1_CodeStubs_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/c1_CodeStubs_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -57,13 +57,12 @@
 #endif
 }
 
-#ifdef TIERED
 
 void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
   __ bind(_entry);
   __ set(_bci, G4);
   __ call(Runtime1::entry_for(Runtime1::counter_overflow_id), relocInfo::runtime_call_type);
-  __ delayed()->nop();
+  __ delayed()->mov_or_nop(_method->as_register(), G5);
   ce->add_call_info_here(_info);
   ce->verify_oop_map(_info);
 
@@ -71,7 +70,6 @@
   __ delayed()->nop();
 }
 
-#endif // TIERED
 
 void DivByZeroStub::emit_code(LIR_Assembler* ce) {
   if (_offset != -1) {
--- a/src/cpu/sparc/vm/c1_FrameMap_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/c1_FrameMap_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -73,6 +73,7 @@
 // some useful constant RInfo's:
 LIR_Opr FrameMap::in_long_opr;
 LIR_Opr FrameMap::out_long_opr;
+LIR_Opr FrameMap::g1_long_single_opr;
 
 LIR_Opr FrameMap::F0_opr;
 LIR_Opr FrameMap::F0_double_opr;
@@ -238,6 +239,7 @@
 
   in_long_opr    = as_long_opr(I0);
   out_long_opr   = as_long_opr(O0);
+  g1_long_single_opr    = as_long_single_opr(G1);
 
   G0_opr = as_opr(G0);
   G1_opr = as_opr(G1);
--- a/src/cpu/sparc/vm/c1_FrameMap_sparc.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/c1_FrameMap_sparc.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -103,6 +103,7 @@
 
   static LIR_Opr in_long_opr;
   static LIR_Opr out_long_opr;
+  static LIR_Opr g1_long_single_opr;
 
   static LIR_Opr F0_opr;
   static LIR_Opr F0_double_opr;
@@ -113,18 +114,25 @@
  private:
   static FloatRegister  _fpu_regs [nof_fpu_regs];
 
+  static LIR_Opr as_long_single_opr(Register r) {
+    return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
+  }
+  static LIR_Opr as_long_pair_opr(Register r) {
+    return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r));
+  }
+
  public:
 
 #ifdef _LP64
   static LIR_Opr as_long_opr(Register r) {
-    return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
+    return as_long_single_opr(r);
   }
   static LIR_Opr as_pointer_opr(Register r) {
-    return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
+    return as_long_single_opr(r);
   }
 #else
   static LIR_Opr as_long_opr(Register r) {
-    return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r));
+    return as_long_pair_opr(r);
   }
   static LIR_Opr as_pointer_opr(Register r) {
     return as_opr(r);
--- a/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1625,13 +1625,18 @@
 
 void LIR_Assembler::return_op(LIR_Opr result) {
   // the poll may need a register so just pick one that isn't the return register
-#ifdef TIERED
+#if defined(TIERED) && !defined(_LP64)
   if (result->type_field() == LIR_OprDesc::long_type) {
     // Must move the result to G1
     // Must leave proper result in O0,O1 and G1 (TIERED only)
     __ sllx(I0, 32, G1);          // Shift bits into high G1
     __ srl (I1, 0, I1);           // Zero extend O1 (harmless?)
     __ or3 (I1, G1, G1);          // OR 64 bits into G1
+#ifdef ASSERT
+    // mangle it so any problems will show up
+    __ set(0xdeadbeef, I0);
+    __ set(0xdeadbeef, I1);
+#endif
   }
 #endif // TIERED
   __ set((intptr_t)os::get_polling_page(), L0);
@@ -2424,6 +2429,192 @@
 }
 
 
+void LIR_Assembler::type_profile_helper(Register mdo, int mdo_offset_bias,
+                                        ciMethodData *md, ciProfileData *data,
+                                        Register recv, Register tmp1, Label* update_done) {
+  uint i;
+  for (i = 0; i < VirtualCallData::row_limit(); i++) {
+    Label next_test;
+    // See if the receiver is receiver[n].
+    Address receiver_addr(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_offset(i)) -
+                          mdo_offset_bias);
+    __ ld_ptr(receiver_addr, tmp1);
+    __ verify_oop(tmp1);
+    __ cmp(recv, tmp1);
+    __ brx(Assembler::notEqual, false, Assembler::pt, next_test);
+    __ delayed()->nop();
+    Address data_addr(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i)) -
+                      mdo_offset_bias);
+    __ ld_ptr(data_addr, tmp1);
+    __ add(tmp1, DataLayout::counter_increment, tmp1);
+    __ st_ptr(tmp1, data_addr);
+    __ ba(false, *update_done);
+    __ delayed()->nop();
+    __ bind(next_test);
+  }
+
+  // Didn't find receiver; find next empty slot and fill it in
+  for (i = 0; i < VirtualCallData::row_limit(); i++) {
+    Label next_test;
+    Address recv_addr(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_offset(i)) -
+                      mdo_offset_bias);
+    load(recv_addr, tmp1, T_OBJECT);
+    __ br_notnull(tmp1, false, Assembler::pt, next_test);
+    __ delayed()->nop();
+    __ st_ptr(recv, recv_addr);
+    __ set(DataLayout::counter_increment, tmp1);
+    __ st_ptr(tmp1, mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i)) -
+              mdo_offset_bias);
+    __ ba(false, *update_done);
+    __ delayed()->nop();
+    __ bind(next_test);
+  }
+}
+
+
+void LIR_Assembler::setup_md_access(ciMethod* method, int bci,
+                                    ciMethodData*& md, ciProfileData*& data, int& mdo_offset_bias) {
+  md = method->method_data();
+  if (md == NULL) {
+    bailout("out of memory building methodDataOop");
+    return;
+  }
+  data = md->bci_to_data(bci);
+  assert(data != NULL,       "need data for checkcast");
+  assert(data->is_ReceiverTypeData(), "need ReceiverTypeData for type check");
+  if (!Assembler::is_simm13(md->byte_offset_of_slot(data, DataLayout::header_offset()) + data->size_in_bytes())) {
+    // The offset is large so bias the mdo by the base of the slot so
+    // that the ld can use simm13s to reference the slots of the data
+    mdo_offset_bias = md->byte_offset_of_slot(data, DataLayout::header_offset());
+  }
+}
+
+void LIR_Assembler::emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, Label* failure, Label* obj_is_null) {
+  // we always need a stub for the failure case.
+  CodeStub* stub = op->stub();
+  Register obj = op->object()->as_register();
+  Register k_RInfo = op->tmp1()->as_register();
+  Register klass_RInfo = op->tmp2()->as_register();
+  Register dst = op->result_opr()->as_register();
+  Register Rtmp1 = op->tmp3()->as_register();
+  ciKlass* k = op->klass();
+
+
+  if (obj == k_RInfo) {
+    k_RInfo = klass_RInfo;
+    klass_RInfo = obj;
+  }
+
+  ciMethodData* md;
+  ciProfileData* data;
+  int mdo_offset_bias = 0;
+  if (op->should_profile()) {
+    ciMethod* method = op->profiled_method();
+    assert(method != NULL, "Should have method");
+    setup_md_access(method, op->profiled_bci(), md, data, mdo_offset_bias);
+
+    Label not_null;
+    __ br_notnull(obj, false, Assembler::pn, not_null);
+    __ delayed()->nop();
+    Register mdo      = k_RInfo;
+    Register data_val = Rtmp1;
+    jobject2reg(md->constant_encoding(), mdo);
+    if (mdo_offset_bias > 0) {
+      __ set(mdo_offset_bias, data_val);
+      __ add(mdo, data_val, mdo);
+    }
+    Address flags_addr(mdo, md->byte_offset_of_slot(data, DataLayout::flags_offset()) - mdo_offset_bias);
+    __ ldub(flags_addr, data_val);
+    __ or3(data_val, BitData::null_seen_byte_constant(), data_val);
+    __ stb(data_val, flags_addr);
+    __ ba(false, *obj_is_null);
+    __ delayed()->nop();
+    __ bind(not_null);
+  } else {
+    __ br_null(obj, false, Assembler::pn, *obj_is_null);
+    __ delayed()->nop();
+  }
+
+  Label profile_cast_failure, profile_cast_success;
+  Label *failure_target = op->should_profile() ? &profile_cast_failure : failure;
+  Label *success_target = op->should_profile() ? &profile_cast_success : success;
+
+  // patching may screw with our temporaries on sparc,
+  // so let's do it before loading the class
+  if (k->is_loaded()) {
+    jobject2reg(k->constant_encoding(), k_RInfo);
+  } else {
+    jobject2reg_with_patching(k_RInfo, op->info_for_patch());
+  }
+  assert(obj != k_RInfo, "must be different");
+
+  // get object class
+  // not a safepoint as obj null check happens earlier
+  load(obj, oopDesc::klass_offset_in_bytes(), klass_RInfo, T_OBJECT, NULL);
+  if (op->fast_check()) {
+    assert_different_registers(klass_RInfo, k_RInfo);
+    __ cmp(k_RInfo, klass_RInfo);
+    __ brx(Assembler::notEqual, false, Assembler::pt, *failure_target);
+    __ delayed()->nop();
+  } else {
+    bool need_slow_path = true;
+    if (k->is_loaded()) {
+      if (k->super_check_offset() != sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes())
+        need_slow_path = false;
+      // perform the fast part of the checking logic
+      __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, noreg,
+                                       (need_slow_path ? success_target : NULL),
+                                       failure_target, NULL,
+                                       RegisterOrConstant(k->super_check_offset()));
+    } else {
+      // perform the fast part of the checking logic
+      __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, O7, success_target,
+                                       failure_target, NULL);
+    }
+    if (need_slow_path) {
+      // call out-of-line instance of __ check_klass_subtype_slow_path(...):
+      assert(klass_RInfo == G3 && k_RInfo == G1, "incorrect call setup");
+      __ call(Runtime1::entry_for(Runtime1::slow_subtype_check_id), relocInfo::runtime_call_type);
+      __ delayed()->nop();
+      __ cmp(G3, 0);
+      __ br(Assembler::equal, false, Assembler::pn, *failure_target);
+      __ delayed()->nop();
+      // Fall through to success case
+    }
+  }
+
+  if (op->should_profile()) {
+    Register mdo  = klass_RInfo, recv = k_RInfo, tmp1 = Rtmp1;
+    assert_different_registers(obj, mdo, recv, tmp1);
+    __ bind(profile_cast_success);
+    jobject2reg(md->constant_encoding(), mdo);
+    if (mdo_offset_bias > 0) {
+      __ set(mdo_offset_bias, tmp1);
+      __ add(mdo, tmp1, mdo);
+    }
+    load(Address(obj, oopDesc::klass_offset_in_bytes()), recv, T_OBJECT);
+    type_profile_helper(mdo, mdo_offset_bias, md, data, recv, tmp1, success);
+    // Jump over the failure case
+    __ ba(false, *success);
+    __ delayed()->nop();
+    // Cast failure case
+    __ bind(profile_cast_failure);
+    jobject2reg(md->constant_encoding(), mdo);
+    if (mdo_offset_bias > 0) {
+      __ set(mdo_offset_bias, tmp1);
+      __ add(mdo, tmp1, mdo);
+    }
+    Address data_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset()) - mdo_offset_bias);
+    __ ld_ptr(data_addr, tmp1);
+    __ sub(tmp1, DataLayout::counter_increment, tmp1);
+    __ st_ptr(tmp1, data_addr);
+    __ ba(false, *failure);
+    __ delayed()->nop();
+  }
+  __ ba(false, *success);
+  __ delayed()->nop();
+}
+
 void LIR_Assembler::emit_opTypeCheck(LIR_OpTypeCheck* op) {
   LIR_Code code = op->code();
   if (code == lir_store_check) {
@@ -2434,193 +2625,106 @@
     Register Rtmp1 = op->tmp3()->as_register();
 
     __ verify_oop(value);
-
     CodeStub* stub = op->stub();
-    Label done;
-    __ cmp(value, 0);
-    __ br(Assembler::equal, false, Assembler::pn, done);
-    __ delayed()->nop();
+    // check if it needs to be profiled
+    ciMethodData* md;
+    ciProfileData* data;
+    int mdo_offset_bias = 0;
+    if (op->should_profile()) {
+      ciMethod* method = op->profiled_method();
+      assert(method != NULL, "Should have method");
+      setup_md_access(method, op->profiled_bci(), md, data, mdo_offset_bias);
+    }
+    Label profile_cast_success, profile_cast_failure, done;
+    Label *success_target = op->should_profile() ? &profile_cast_success : &done;
+    Label *failure_target = op->should_profile() ? &profile_cast_failure : stub->entry();
+
+    if (op->should_profile()) {
+      Label not_null;
+      __ br_notnull(value, false, Assembler::pn, not_null);
+      __ delayed()->nop();
+      Register mdo      = k_RInfo;
+      Register data_val = Rtmp1;
+      jobject2reg(md->constant_encoding(), mdo);
+      if (mdo_offset_bias > 0) {
+        __ set(mdo_offset_bias, data_val);
+        __ add(mdo, data_val, mdo);
+      }
+      Address flags_addr(mdo, md->byte_offset_of_slot(data, DataLayout::flags_offset()) - mdo_offset_bias);
+      __ ldub(flags_addr, data_val);
+      __ or3(data_val, BitData::null_seen_byte_constant(), data_val);
+      __ stb(data_val, flags_addr);
+      __ ba(false, done);
+      __ delayed()->nop();
+      __ bind(not_null);
+    } else {
+      __ br_null(value, false, Assembler::pn, done);
+      __ delayed()->nop();
+    }
     load(array, oopDesc::klass_offset_in_bytes(), k_RInfo, T_OBJECT, op->info_for_exception());
     load(value, oopDesc::klass_offset_in_bytes(), klass_RInfo, T_OBJECT, NULL);
 
     // get instance klass
     load(k_RInfo, objArrayKlass::element_klass_offset_in_bytes() + sizeof(oopDesc), k_RInfo, T_OBJECT, NULL);
     // perform the fast part of the checking logic
-    __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, O7, &done, stub->entry(), NULL);
+    __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, O7, success_target, failure_target, NULL);
 
     // call out-of-line instance of __ check_klass_subtype_slow_path(...):
     assert(klass_RInfo == G3 && k_RInfo == G1, "incorrect call setup");
     __ call(Runtime1::entry_for(Runtime1::slow_subtype_check_id), relocInfo::runtime_call_type);
     __ delayed()->nop();
     __ cmp(G3, 0);
-    __ br(Assembler::equal, false, Assembler::pn, *stub->entry());
+    __ br(Assembler::equal, false, Assembler::pn, *failure_target);
     __ delayed()->nop();
+    // fall through to the success case
+
+    if (op->should_profile()) {
+      Register mdo  = klass_RInfo, recv = k_RInfo, tmp1 = Rtmp1;
+      assert_different_registers(value, mdo, recv, tmp1);
+      __ bind(profile_cast_success);
+      jobject2reg(md->constant_encoding(), mdo);
+      if (mdo_offset_bias > 0) {
+        __ set(mdo_offset_bias, tmp1);
+        __ add(mdo, tmp1, mdo);
+      }
+      load(Address(value, oopDesc::klass_offset_in_bytes()), recv, T_OBJECT);
+      type_profile_helper(mdo, mdo_offset_bias, md, data, recv, tmp1, &done);
+      __ ba(false, done);
+      __ delayed()->nop();
+      // Cast failure case
+      __ bind(profile_cast_failure);
+      jobject2reg(md->constant_encoding(), mdo);
+      if (mdo_offset_bias > 0) {
+        __ set(mdo_offset_bias, tmp1);
+        __ add(mdo, tmp1, mdo);
+      }
+      Address data_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset()) - mdo_offset_bias);
+      __ ld_ptr(data_addr, tmp1);
+      __ sub(tmp1, DataLayout::counter_increment, tmp1);
+      __ st_ptr(tmp1, data_addr);
+      __ ba(false, *stub->entry());
+      __ delayed()->nop();
+    }
     __ bind(done);
-  } else if (op->code() == lir_checkcast) {
-    // we always need a stub for the failure case.
-    CodeStub* stub = op->stub();
+  } else if (code == lir_checkcast) {
     Register obj = op->object()->as_register();
-    Register k_RInfo = op->tmp1()->as_register();
-    Register klass_RInfo = op->tmp2()->as_register();
     Register dst = op->result_opr()->as_register();
-    Register Rtmp1 = op->tmp3()->as_register();
-    ciKlass* k = op->klass();
-
-    if (obj == k_RInfo) {
-      k_RInfo = klass_RInfo;
-      klass_RInfo = obj;
-    }
-    if (op->profiled_method() != NULL) {
-      ciMethod* method = op->profiled_method();
-      int bci          = op->profiled_bci();
-
-      // We need two temporaries to perform this operation on SPARC,
-      // so to keep things simple we perform a redundant test here
-      Label profile_done;
-      __ cmp(obj, 0);
-      __ br(Assembler::notEqual, false, Assembler::pn, profile_done);
-      __ delayed()->nop();
-      // Object is null; update methodDataOop
-      ciMethodData* md = method->method_data();
-      if (md == NULL) {
-        bailout("out of memory building methodDataOop");
-        return;
-      }
-      ciProfileData* data = md->bci_to_data(bci);
-      assert(data != NULL,       "need data for checkcast");
-      assert(data->is_BitData(), "need BitData for checkcast");
-      Register mdo      = k_RInfo;
-      Register data_val = Rtmp1;
-      jobject2reg(md->constant_encoding(), mdo);
-
-      int mdo_offset_bias = 0;
-      if (!Assembler::is_simm13(md->byte_offset_of_slot(data, DataLayout::header_offset()) + data->size_in_bytes())) {
-        // The offset is large so bias the mdo by the base of the slot so
-        // that the ld can use simm13s to reference the slots of the data
-        mdo_offset_bias = md->byte_offset_of_slot(data, DataLayout::header_offset());
-        __ set(mdo_offset_bias, data_val);
-        __ add(mdo, data_val, mdo);
-      }
-
-
-      Address flags_addr(mdo, md->byte_offset_of_slot(data, DataLayout::flags_offset()) - mdo_offset_bias);
-      __ ldub(flags_addr, data_val);
-      __ or3(data_val, BitData::null_seen_byte_constant(), data_val);
-      __ stb(data_val, flags_addr);
-      __ bind(profile_done);
-    }
-
-    Label done;
-    // patching may screw with our temporaries on sparc,
-    // so let's do it before loading the class
-    if (k->is_loaded()) {
-      jobject2reg(k->constant_encoding(), k_RInfo);
-    } else {
-      jobject2reg_with_patching(k_RInfo, op->info_for_patch());
-    }
-    assert(obj != k_RInfo, "must be different");
-    __ cmp(obj, 0);
-    __ br(Assembler::equal, false, Assembler::pn, done);
-    __ delayed()->nop();
-
-    // get object class
-    // not a safepoint as obj null check happens earlier
-    load(obj, oopDesc::klass_offset_in_bytes(), klass_RInfo, T_OBJECT, NULL);
-    if (op->fast_check()) {
-      assert_different_registers(klass_RInfo, k_RInfo);
-      __ cmp(k_RInfo, klass_RInfo);
-      __ br(Assembler::notEqual, false, Assembler::pt, *stub->entry());
-      __ delayed()->nop();
-      __ bind(done);
-    } else {
-      bool need_slow_path = true;
-      if (k->is_loaded()) {
-        if (k->super_check_offset() != sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes())
-          need_slow_path = false;
-        // perform the fast part of the checking logic
-        __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, noreg,
-                                         (need_slow_path ? &done : NULL),
-                                         stub->entry(), NULL,
-                                         RegisterOrConstant(k->super_check_offset()));
-      } else {
-        // perform the fast part of the checking logic
-        __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, O7,
-                                         &done, stub->entry(), NULL);
-      }
-      if (need_slow_path) {
-        // call out-of-line instance of __ check_klass_subtype_slow_path(...):
-        assert(klass_RInfo == G3 && k_RInfo == G1, "incorrect call setup");
-        __ call(Runtime1::entry_for(Runtime1::slow_subtype_check_id), relocInfo::runtime_call_type);
-        __ delayed()->nop();
-        __ cmp(G3, 0);
-        __ br(Assembler::equal, false, Assembler::pn, *stub->entry());
-        __ delayed()->nop();
-      }
-      __ bind(done);
-    }
+    Label success;
+    emit_typecheck_helper(op, &success, op->stub()->entry(), &success);
+    __ bind(success);
     __ mov(obj, dst);
   } else if (code == lir_instanceof) {
     Register obj = op->object()->as_register();
-    Register k_RInfo = op->tmp1()->as_register();
-    Register klass_RInfo = op->tmp2()->as_register();
     Register dst = op->result_opr()->as_register();
-    Register Rtmp1 = op->tmp3()->as_register();
-    ciKlass* k = op->klass();
-
-    Label done;
-    if (obj == k_RInfo) {
-      k_RInfo = klass_RInfo;
-      klass_RInfo = obj;
-    }
-    // patching may screw with our temporaries on sparc,
-    // so let's do it before loading the class
-    if (k->is_loaded()) {
-      jobject2reg(k->constant_encoding(), k_RInfo);
-    } else {
-      jobject2reg_with_patching(k_RInfo, op->info_for_patch());
-    }
-    assert(obj != k_RInfo, "must be different");
-    __ cmp(obj, 0);
-    __ br(Assembler::equal, true, Assembler::pn, done);
-    __ delayed()->set(0, dst);
-
-    // get object class
-    // not a safepoint as obj null check happens earlier
-    load(obj, oopDesc::klass_offset_in_bytes(), klass_RInfo, T_OBJECT, NULL);
-    if (op->fast_check()) {
-      __ cmp(k_RInfo, klass_RInfo);
-      __ br(Assembler::equal, true, Assembler::pt, done);
-      __ delayed()->set(1, dst);
-      __ set(0, dst);
-      __ bind(done);
-    } else {
-      bool need_slow_path = true;
-      if (k->is_loaded()) {
-        if (k->super_check_offset() != sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes())
-          need_slow_path = false;
-        // perform the fast part of the checking logic
-        __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, O7, noreg,
-                                         (need_slow_path ? &done : NULL),
-                                         (need_slow_path ? &done : NULL), NULL,
-                                         RegisterOrConstant(k->super_check_offset()),
-                                         dst);
-      } else {
-        assert(dst != klass_RInfo && dst != k_RInfo, "need 3 registers");
-        // perform the fast part of the checking logic
-        __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, O7, dst,
-                                         &done, &done, NULL,
-                                         RegisterOrConstant(-1),
-                                         dst);
-      }
-      if (need_slow_path) {
-        // call out-of-line instance of __ check_klass_subtype_slow_path(...):
-        assert(klass_RInfo == G3 && k_RInfo == G1, "incorrect call setup");
-        __ call(Runtime1::entry_for(Runtime1::slow_subtype_check_id), relocInfo::runtime_call_type);
-        __ delayed()->nop();
-        __ mov(G3, dst);
-      }
-      __ bind(done);
-    }
+    Label success, failure, done;
+    emit_typecheck_helper(op, &success, &failure, &failure);
+    __ bind(failure);
+    __ set(0, dst);
+    __ ba(false, done);
+    __ delayed()->nop();
+    __ bind(success);
+    __ set(1, dst);
+    __ bind(done);
   } else {
     ShouldNotReachHere();
   }
@@ -2776,9 +2880,14 @@
   ciProfileData* data = md->bci_to_data(bci);
   assert(data->is_CounterData(), "need CounterData for calls");
   assert(op->mdo()->is_single_cpu(),  "mdo must be allocated");
+  Register mdo  = op->mdo()->as_register();
+#ifdef _LP64
+  assert(op->tmp1()->is_double_cpu(), "tmp1 must be allocated");
+  Register tmp1 = op->tmp1()->as_register_lo();
+#else
   assert(op->tmp1()->is_single_cpu(), "tmp1 must be allocated");
-  Register mdo  = op->mdo()->as_register();
   Register tmp1 = op->tmp1()->as_register();
+#endif
   jobject2reg(md->constant_encoding(), mdo);
   int mdo_offset_bias = 0;
   if (!Assembler::is_simm13(md->byte_offset_of_slot(data, CounterData::count_offset()) +
@@ -2795,13 +2904,13 @@
   // Perform additional virtual call profiling for invokevirtual and
   // invokeinterface bytecodes
   if ((bc == Bytecodes::_invokevirtual || bc == Bytecodes::_invokeinterface) &&
-      Tier1ProfileVirtualCalls) {
+      C1ProfileVirtualCalls) {
     assert(op->recv()->is_single_cpu(), "recv must be allocated");
     Register recv = op->recv()->as_register();
     assert_different_registers(mdo, tmp1, recv);
     assert(data->is_VirtualCallData(), "need VirtualCallData for virtual calls");
     ciKlass* known_klass = op->known_holder();
-    if (Tier1OptimizeVirtualCallProfiling && known_klass != NULL) {
+    if (C1OptimizeVirtualCallProfiling && known_klass != NULL) {
       // We know the type that will be seen at this call site; we can
       // statically update the methodDataOop rather than needing to do
       // dynamic tests on the receiver type
@@ -2816,9 +2925,9 @@
           Address data_addr(mdo, md->byte_offset_of_slot(data,
                                                          VirtualCallData::receiver_count_offset(i)) -
                             mdo_offset_bias);
-          __ lduw(data_addr, tmp1);
+          __ ld_ptr(data_addr, tmp1);
           __ add(tmp1, DataLayout::counter_increment, tmp1);
-          __ stw(tmp1, data_addr);
+          __ st_ptr(tmp1, data_addr);
           return;
         }
       }
@@ -2837,70 +2946,32 @@
           __ st_ptr(tmp1, recv_addr);
           Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
                             mdo_offset_bias);
-          __ lduw(data_addr, tmp1);
+          __ ld_ptr(data_addr, tmp1);
           __ add(tmp1, DataLayout::counter_increment, tmp1);
-          __ stw(tmp1, data_addr);
+          __ st_ptr(tmp1, data_addr);
           return;
         }
       }
     } else {
       load(Address(recv, oopDesc::klass_offset_in_bytes()), recv, T_OBJECT);
       Label update_done;
-      uint i;
-      for (i = 0; i < VirtualCallData::row_limit(); i++) {
-        Label next_test;
-        // See if the receiver is receiver[n].
-        Address receiver_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)) -
-                              mdo_offset_bias);
-        __ ld_ptr(receiver_addr, tmp1);
-        __ verify_oop(tmp1);
-        __ cmp(recv, tmp1);
-        __ brx(Assembler::notEqual, false, Assembler::pt, next_test);
-        __ delayed()->nop();
-        Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
-                          mdo_offset_bias);
-        __ lduw(data_addr, tmp1);
-        __ add(tmp1, DataLayout::counter_increment, tmp1);
-        __ stw(tmp1, data_addr);
-        __ br(Assembler::always, false, Assembler::pt, update_done);
-        __ delayed()->nop();
-        __ bind(next_test);
-      }
-
-      // Didn't find receiver; find next empty slot and fill it in
-      for (i = 0; i < VirtualCallData::row_limit(); i++) {
-        Label next_test;
-        Address recv_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)) -
-                          mdo_offset_bias);
-        load(recv_addr, tmp1, T_OBJECT);
-        __ tst(tmp1);
-        __ brx(Assembler::notEqual, false, Assembler::pt, next_test);
-        __ delayed()->nop();
-        __ st_ptr(recv, recv_addr);
-        __ set(DataLayout::counter_increment, tmp1);
-        __ st_ptr(tmp1, mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
-                  mdo_offset_bias);
-        __ br(Assembler::always, false, Assembler::pt, update_done);
-        __ delayed()->nop();
-        __ bind(next_test);
-      }
+      type_profile_helper(mdo, mdo_offset_bias, md, data, recv, tmp1, &update_done);
       // Receiver did not match any saved receiver and there is no empty row for it.
       // Increment total counter to indicate polymorphic case.
-      __ lduw(counter_addr, tmp1);
+      __ ld_ptr(counter_addr, tmp1);
       __ add(tmp1, DataLayout::counter_increment, tmp1);
-      __ stw(tmp1, counter_addr);
+      __ st_ptr(tmp1, counter_addr);
 
       __ bind(update_done);
     }
   } else {
     // Static call
-    __ lduw(counter_addr, tmp1);
+    __ ld_ptr(counter_addr, tmp1);
     __ add(tmp1, DataLayout::counter_increment, tmp1);
-    __ stw(tmp1, counter_addr);
+    __ st_ptr(tmp1, counter_addr);
   }
 }
 
-
 void LIR_Assembler::align_backward_branch_target() {
   __ align(OptoLoopAlignment);
 }
@@ -3093,31 +3164,36 @@
   // no-op on TSO
 }
 
-// Macro to Pack two sequential registers containing 32 bit values
+// Pack two sequential registers containing 32 bit values
 // into a single 64 bit register.
-// rs and rs->successor() are packed into rd
-// rd and rs may be the same register.
-// Note: rs and rs->successor() are destroyed.
-void LIR_Assembler::pack64( Register rs, Register rd ) {
+// src and src->successor() are packed into dst
+// src and dst may be the same register.
+// Note: src is destroyed
+void LIR_Assembler::pack64(LIR_Opr src, LIR_Opr dst) {
+  Register rs = src->as_register();
+  Register rd = dst->as_register_lo();
   __ sllx(rs, 32, rs);
   __ srl(rs->successor(), 0, rs->successor());
   __ or3(rs, rs->successor(), rd);
 }
 
-// Macro to unpack a 64 bit value in a register into
+// Unpack a 64 bit value in a register into
 // two sequential registers.
-// rd is unpacked into rd and rd->successor()
-void LIR_Assembler::unpack64( Register rd ) {
-  __ mov(rd, rd->successor());
-  __ srax(rd, 32, rd);
-  __ sra(rd->successor(), 0, rd->successor());
+// src is unpacked into dst and dst->successor()
+void LIR_Assembler::unpack64(LIR_Opr src, LIR_Opr dst) {
+  Register rs = src->as_register_lo();
+  Register rd = dst->as_register_hi();
+  assert_different_registers(rs, rd, rd->successor());
+  __ srlx(rs, 32, rd);
+  __ srl (rs,  0, rd->successor());
 }
 
 
 void LIR_Assembler::leal(LIR_Opr addr_opr, LIR_Opr dest) {
   LIR_Address* addr = addr_opr->as_address_ptr();
   assert(addr->index()->is_illegal() && addr->scale() == LIR_Address::times_1 && Assembler::is_simm13(addr->disp()), "can't handle complex addresses yet");
-  __ add(addr->base()->as_register(), addr->disp(), dest->as_register());
+
+  __ add(addr->base()->as_pointer_register(), addr->disp(), dest->as_pointer_register());
 }
 
 
@@ -3188,11 +3264,36 @@
             tty->cr();
           }
 #endif
-          continue;
+        } else {
+          LIR_Op* delay_op = new LIR_OpDelay(new LIR_Op0(lir_nop), op->as_OpJavaCall()->info());
+          inst->insert_before(i + 1, delay_op);
+          i++;
         }
 
-        LIR_Op* delay_op = new LIR_OpDelay(new LIR_Op0(lir_nop), op->as_OpJavaCall()->info());
-        inst->insert_before(i + 1, delay_op);
+#if defined(TIERED) && !defined(_LP64)
+        // fixup the return value from G1 to O0/O1 for long returns.
+        // It's done here instead of in LIRGenerator because there's
+        // such a mismatch between the single reg and double reg
+        // calling convention.
+        LIR_OpJavaCall* callop = op->as_OpJavaCall();
+        if (callop->result_opr() == FrameMap::out_long_opr) {
+          LIR_OpJavaCall* call;
+          LIR_OprList* arguments = new LIR_OprList(callop->arguments()->length());
+          for (int a = 0; a < arguments->length(); a++) {
+            arguments[a] = callop->arguments()[a];
+          }
+          if (op->code() == lir_virtual_call) {
+            call = new LIR_OpJavaCall(op->code(), callop->method(), callop->receiver(), FrameMap::g1_long_single_opr,
+                                      callop->vtable_offset(), arguments, callop->info());
+          } else {
+            call = new LIR_OpJavaCall(op->code(), callop->method(), callop->receiver(), FrameMap::g1_long_single_opr,
+                                      callop->addr(), arguments, callop->info());
+          }
+          inst->at_put(i - 1, call);
+          inst->insert_before(i + 1, new LIR_Op1(lir_unpack64, FrameMap::g1_long_single_opr, callop->result_opr(),
+                                                 T_LONG, lir_patch_none, NULL));
+        }
+#endif
         break;
       }
     }
--- a/src/cpu/sparc/vm/c1_LIRAssembler_sparc.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/c1_LIRAssembler_sparc.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2006, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -71,9 +71,16 @@
 
   static bool is_single_instruction(LIR_Op* op);
 
+  // Record the type of the receiver in ReceiverTypeData
+  void type_profile_helper(Register mdo, int mdo_offset_bias,
+                           ciMethodData *md, ciProfileData *data,
+                           Register recv, Register tmp1, Label* update_done);
+  // Setup pointers to MDO, MDO slot, also compute offset bias to access the slot.
+  void setup_md_access(ciMethod* method, int bci,
+                       ciMethodData*& md, ciProfileData*& data, int& mdo_offset_bias);
  public:
-  void pack64( Register rs, Register rd );
-  void unpack64( Register rd );
+  void   pack64(LIR_Opr src, LIR_Opr dst);
+  void unpack64(LIR_Opr src, LIR_Opr dst);
 
 enum {
 #ifdef _LP64
--- a/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2005, 2009, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -227,29 +227,37 @@
   }
 }
 
+LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
+  LIR_Opr r;
+  if (type == T_LONG) {
+    r = LIR_OprFact::longConst(x);
+  } else if (type == T_INT) {
+    r = LIR_OprFact::intConst(x);
+  } else {
+    ShouldNotReachHere();
+  }
+  if (!Assembler::is_simm13(x)) {
+    LIR_Opr tmp = new_register(type);
+    __ move(r, tmp);
+    return tmp;
+  }
+  return r;
+}
 
-void LIRGenerator::increment_counter(address counter, int step) {
+void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
   LIR_Opr pointer = new_pointer_register();
   __ move(LIR_OprFact::intptrConst(counter), pointer);
-  LIR_Address* addr = new LIR_Address(pointer, T_INT);
+  LIR_Address* addr = new LIR_Address(pointer, type);
   increment_counter(addr, step);
 }
 
 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
-  LIR_Opr temp = new_register(T_INT);
+  LIR_Opr temp = new_register(addr->type());
   __ move(addr, temp);
-  LIR_Opr c = LIR_OprFact::intConst(step);
-  if (Assembler::is_simm13(step)) {
-    __ add(temp, c, temp);
-  } else {
-    LIR_Opr temp2 = new_register(T_INT);
-    __ move(c, temp2);
-    __ add(temp, temp2, temp);
-  }
+  __ add(temp, load_immediate(step, addr->type()), temp);
   __ move(temp, addr);
 }
 
-
 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
   LIR_Opr o7opr = FrameMap::O7_opr;
   __ load(new LIR_Address(base, disp, T_INT), o7opr, info);
@@ -611,7 +619,6 @@
   left.load_item();
   right.load_item();
   LIR_Opr reg = rlock_result(x);
-
   if (x->x()->type()->is_float_kind()) {
     Bytecodes::Code code = x->op();
     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
@@ -1040,7 +1047,9 @@
   LIR_Opr tmp1 = FrameMap::G1_oop_opr;
   LIR_Opr tmp2 = FrameMap::G3_oop_opr;
   LIR_Opr tmp3 = FrameMap::G4_oop_opr;
-  __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,  x->direct_compare(), patching_info);
+  __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
+                x->direct_compare(), patching_info,
+                x->profiled_method(), x->profiled_bci());
 }
 
 
@@ -1089,12 +1098,12 @@
   // add safepoint before generating condition code so it can be recomputed
   if (x->is_safepoint()) {
     // increment backedge counter if needed
-    increment_backedge_counter(state_for(x, x->state_before()));
-
+    increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
     __ safepoint(new_register(T_INT), state_for(x, x->state_before()));
   }
 
   __ cmp(lir_cond(cond), left, right);
+  // Generate branch profiling. Profiling code doesn't kill flags.
   profile_branch(x, cond);
   move_to_phi(x->state());
   if (x->x()->type()->is_float_kind()) {
--- a/src/cpu/sparc/vm/c1_Runtime1_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/c1_Runtime1_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -465,12 +465,10 @@
 
       break;
 
-#ifdef TIERED
     case counter_overflow_id:
-        // G4 contains bci
-      oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, counter_overflow), G4);
+        // G4 contains bci, G5 contains method
+      oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, counter_overflow), G4, G5);
       break;
-#endif // TIERED
 
     case new_type_array_id:
     case new_object_array_id:
--- a/src/cpu/sparc/vm/c1_globals_sparc.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/c1_globals_sparc.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2007, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -34,14 +34,7 @@
 define_pd_global(bool, UseOnStackReplacement,        true );
 define_pd_global(bool, TieredCompilation,            false);
 define_pd_global(intx, CompileThreshold,             1000 ); // Design center runs on 1.3.1
-define_pd_global(intx, Tier2CompileThreshold,        1500 );
-define_pd_global(intx, Tier3CompileThreshold,        2000 );
-define_pd_global(intx, Tier4CompileThreshold,        2500 );
-
 define_pd_global(intx, BackEdgeThreshold,            100000);
-define_pd_global(intx, Tier2BackEdgeThreshold,       100000);
-define_pd_global(intx, Tier3BackEdgeThreshold,       100000);
-define_pd_global(intx, Tier4BackEdgeThreshold,       100000);
 
 define_pd_global(intx, OnStackReplacePercentage,     1400 );
 define_pd_global(bool, UseTLAB,                      true );
--- a/src/cpu/sparc/vm/c2_globals_sparc.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/c2_globals_sparc.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2007, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -37,21 +37,8 @@
 define_pd_global(bool, ProfileInterpreter,           true);
 #endif // CC_INTERP
 define_pd_global(bool, TieredCompilation,            false);
-#ifdef TIERED
-define_pd_global(intx, CompileThreshold,             1000);
-define_pd_global(intx, BackEdgeThreshold,            14000);
-#else
 define_pd_global(intx, CompileThreshold,             10000);
 define_pd_global(intx, BackEdgeThreshold,            140000);
-#endif // TIERED
-
-define_pd_global(intx, Tier2CompileThreshold,        10000); // unused level
-define_pd_global(intx, Tier3CompileThreshold,        10000);
-define_pd_global(intx, Tier4CompileThreshold,        40000);
-
-define_pd_global(intx, Tier2BackEdgeThreshold,       100000);
-define_pd_global(intx, Tier3BackEdgeThreshold,       100000);
-define_pd_global(intx, Tier4BackEdgeThreshold,       100000);
 
 define_pd_global(intx, OnStackReplacePercentage,     140);
 define_pd_global(intx, ConditionalMoveLimit,         4);
--- a/src/cpu/sparc/vm/codeBuffer_sparc.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/codeBuffer_sparc.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2002, 2005, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -30,5 +30,5 @@
 
   // Heuristic for pre-packing the pt/pn bit of a predicted branch.
   bool is_backward_branch(Label& L) {
-    return L.is_bound() && code_end() <= locator_address(L.loc());
+    return L.is_bound() && insts_end() <= locator_address(L.loc());
   }
--- a/src/cpu/sparc/vm/frame_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/frame_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -253,11 +253,12 @@
     }
 
     // Could just be some random pointer within the codeBlob
-    if (!sender.cb()->instructions_contains(sender_pc)) return false;
+    if (!sender.cb()->code_contains(sender_pc)) {
+      return false;
+    }
 
     // We should never be able to see an adapter if the current frame is something from code cache
-
-    if ( sender_blob->is_adapter_blob()) {
+    if (sender_blob->is_adapter_blob()) {
       return false;
     }
 
--- a/src/cpu/sparc/vm/frame_sparc.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/frame_sparc.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1997, 2006, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -263,8 +263,7 @@
   };
 
  private:
-
-  constantPoolCacheOop* frame::interpreter_frame_cpoolcache_addr() const;
+  constantPoolCacheOop* interpreter_frame_cpoolcache_addr() const;
 
 #ifndef CC_INTERP
 
--- a/src/cpu/sparc/vm/interp_masm_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/interp_masm_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -2431,3 +2431,20 @@
   }
 #endif // CC_INTERP
 }
+
+// Jump if ((*counter_addr += increment) & mask) satisfies the condition.
+void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
+                                                        int increment, int mask,
+                                                        Register scratch1, Register scratch2,
+                                                        Condition cond, Label *where) {
+  ld(counter_addr, scratch1);
+  add(scratch1, increment, scratch1);
+  if (is_simm13(mask)) {
+    andcc(scratch1, mask, G0);
+  } else {
+    set(mask, scratch2);
+    andcc(scratch1, scratch2,  G0);
+  }
+  br(cond, false, Assembler::pn, *where);
+  delayed()->st(scratch1, counter_addr);
+}
--- a/src/cpu/sparc/vm/interp_masm_sparc.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/interp_masm_sparc.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -278,6 +278,10 @@
   void increment_mdp_data_at(Register reg, int constant,
                              Register bumped_count, Register scratch2,
                              bool decrement = false);
+  void increment_mask_and_jump(Address counter_addr,
+                               int increment, int mask,
+                               Register scratch1, Register scratch2,
+                               Condition cond, Label *where);
   void set_mdp_flag_at(int flag_constant, Register scratch);
   void test_mdp_data_at(int offset, Register value, Label& not_equal_continue,
                         Register scratch);
@@ -321,4 +325,5 @@
 
   void save_return_value(TosState state, bool is_native_call);
   void restore_return_value(TosState state, bool is_native_call);
+
 };
--- a/src/cpu/sparc/vm/jniFastGetField_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/jniFastGetField_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2004, 2009, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -50,10 +50,10 @@
     default:        ShouldNotReachHere();
   }
   ResourceMark rm;
-  BufferBlob* b = BufferBlob::create(name, BUFFER_SIZE*wordSize);
-  address fast_entry = b->instructions_begin();
-  CodeBuffer cbuf(fast_entry, b->instructions_size());
+  BufferBlob* blob = BufferBlob::create(name, BUFFER_SIZE*wordSize);
+  CodeBuffer cbuf(blob);
   MacroAssembler* masm = new MacroAssembler(&cbuf);
+  address fast_entry = __ pc();
 
   Label label1, label2;
 
@@ -129,10 +129,10 @@
 address JNI_FastGetField::generate_fast_get_long_field() {
   const char *name = "jni_fast_GetLongField";
   ResourceMark rm;
-  BufferBlob* b = BufferBlob::create(name, BUFFER_SIZE*wordSize);
-  address fast_entry = b->instructions_begin();
-  CodeBuffer cbuf(fast_entry, b->instructions_size());
+  BufferBlob* blob = BufferBlob::create(name, BUFFER_SIZE*wordSize);
+  CodeBuffer cbuf(blob);
   MacroAssembler* masm = new MacroAssembler(&cbuf);
+  address fast_entry = __ pc();
 
   Label label1, label2;
 
@@ -201,10 +201,10 @@
     default:       ShouldNotReachHere();
   }
   ResourceMark rm;
-  BufferBlob* b = BufferBlob::create(name, BUFFER_SIZE*wordSize);
-  address fast_entry = b->instructions_begin();
-  CodeBuffer cbuf(fast_entry, b->instructions_size());
+  BufferBlob* blob = BufferBlob::create(name, BUFFER_SIZE*wordSize);
+  CodeBuffer cbuf(blob);
   MacroAssembler* masm = new MacroAssembler(&cbuf);
+  address fast_entry = __ pc();
 
   Label label1, label2;
 
--- a/src/cpu/sparc/vm/nativeInst_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/nativeInst_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -193,17 +193,17 @@
 
   a->call( a->pc(), relocInfo::none );
   a->delayed()->nop();
-  nc = nativeCall_at( cb.code_begin() );
+  nc = nativeCall_at( cb.insts_begin() );
   nc->print();
 
   nc = nativeCall_overwriting_at( nc->next_instruction_address() );
   for (idx = 0; idx < ARRAY_SIZE(offsets); idx++) {
-    nc->set_destination( cb.code_begin() + offsets[idx] );
-    assert(nc->destination() == (cb.code_begin() + offsets[idx]), "check unit test");
+    nc->set_destination( cb.insts_begin() + offsets[idx] );
+    assert(nc->destination() == (cb.insts_begin() + offsets[idx]), "check unit test");
     nc->print();
   }
 
-  nc = nativeCall_before( cb.code_begin() + 8 );
+  nc = nativeCall_before( cb.insts_begin() + 8 );
   nc->print();
 
   VM_Version::revert();
@@ -368,7 +368,7 @@
   a->sethi(al2, O2);
   a->add(O2, al2.low10(), O2);
 
-  nm = nativeMovConstReg_at( cb.code_begin() );
+  nm = nativeMovConstReg_at( cb.insts_begin() );
   nm->print();
 
   nm = nativeMovConstReg_at( nm->next_instruction_address() );
@@ -480,7 +480,7 @@
   a->nop();
   a->add(O2, al2.low10(), O2);
 
-  nm = nativeMovConstRegPatching_at( cb.code_begin() );
+  nm = nativeMovConstRegPatching_at( cb.insts_begin() );
   nm->print();
 
   nm = nativeMovConstRegPatching_at( nm->next_instruction_address() );
@@ -616,7 +616,7 @@
   a->sethi(al2, I3); a->add(I3, al2.low10(), I3);
   a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++;
 
-  nm = nativeMovRegMem_at( cb.code_begin() );
+  nm = nativeMovRegMem_at( cb.insts_begin() );
   nm->print();
   nm->set_offset( low10(0) );
   nm->print();
@@ -760,7 +760,7 @@
   a->sethi(al, I3); a->nop(); a->add(I3, al.low10(), I3);
   a->stf( FloatRegisterImpl::S, F15, O0, I3 ); idx++;
 
-  nm = nativeMovRegMemPatching_at( cb.code_begin() );
+  nm = nativeMovRegMemPatching_at( cb.insts_begin() );
   nm->print();
   nm->set_offset( low10(0) );
   nm->print();
@@ -849,7 +849,7 @@
   a->jmpl(I3, al.low10(), L3, RelocationHolder::none);
   a->delayed()->nop();
 
-  nj = nativeJump_at( cb.code_begin() );
+  nj = nativeJump_at( cb.insts_begin() );
   nj->print();
 
   nj = nativeJump_at( nj->next_instruction_address() );
--- a/src/cpu/sparc/vm/sharedRuntime_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/sharedRuntime_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -3331,10 +3331,8 @@
   __ stf(FloatRegisterImpl::D, Freturn0, saved_Freturn0_addr);
 #if !defined(_LP64)
 #if defined(COMPILER2)
-  if (!TieredCompilation) {
-    // 32-bit 1-register longs return longs in G1
-    __ stx(Greturn1, saved_Greturn1_addr);
-  }
+  // 32-bit 1-register longs return longs in G1
+  __ stx(Greturn1, saved_Greturn1_addr);
 #endif
   __ set_last_Java_frame(SP, noreg);
   __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames), G2_thread, G4deopt_mode);
@@ -3347,24 +3345,15 @@
   __ reset_last_Java_frame();
   __ ldf(FloatRegisterImpl::D, saved_Freturn0_addr, Freturn0);
 
-  // In tiered we never use C2 to compile methods returning longs so
-  // the result is where we expect it already.
-
 #if !defined(_LP64) && defined(COMPILER2)
   // In 32 bit, C2 returns longs in G1 so restore the saved G1 into
-  // I0/I1 if the return value is long.  In the tiered world there is
-  // a mismatch between how C1 and C2 return longs compiles and so
-  // currently compilation of methods which return longs is disabled
-  // for C2 and so is this code.  Eventually C1 and C2 will do the
-  // same thing for longs in the tiered world.
-  if (!TieredCompilation) {
-    Label not_long;
-    __ cmp(O0,T_LONG);
-    __ br(Assembler::notEqual, false, Assembler::pt, not_long);
-    __ delayed()->nop();
-    __ ldd(saved_Greturn1_addr,I0);
-    __ bind(not_long);
-  }
+  // I0/I1 if the return value is long.
+  Label not_long;
+  __ cmp(O0,T_LONG);
+  __ br(Assembler::notEqual, false, Assembler::pt, not_long);
+  __ delayed()->nop();
+  __ ldd(saved_Greturn1_addr,I0);
+  __ bind(not_long);
 #endif
   __ ret();
   __ delayed()->restore();
--- a/src/cpu/sparc/vm/sparc.ad	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/sparc.ad	Fri Sep 24 00:51:15 2010 -0700
@@ -677,8 +677,7 @@
            (f20 << 20) |
            (f19 << 19) |
            (f0  <<  0);
-  *((int*)(cbuf.code_end())) = op;
-  cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+  cbuf.insts()->emit_int32(op);
 }
 
 // Standard Sparc opcode form2 field breakdown
@@ -689,8 +688,7 @@
            (f25 << 25) |
            (f22 << 22) |
            (f0  <<  0);
-  *((int*)(cbuf.code_end())) = op;
-  cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+  cbuf.insts()->emit_int32(op);
 }
 
 // Standard Sparc opcode form3 field breakdown
@@ -701,8 +699,7 @@
            (f14 << 14) |
            (f5  <<  5) |
            (f0  <<  0);
-  *((int*)(cbuf.code_end())) = op;
-  cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+  cbuf.insts()->emit_int32(op);
 }
 
 // Standard Sparc opcode form3 field breakdown
@@ -714,8 +711,7 @@
            (f14 << 14) |
            (1   << 13) | // bit to indicate immediate-mode
            (simm13<<0);
-  *((int*)(cbuf.code_end())) = op;
-  cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+  cbuf.insts()->emit_int32(op);
 }
 
 static inline void emit3_simm10(CodeBuffer &cbuf, int f30, int f25, int f19, int f14, int simm10 ) {
@@ -910,9 +906,7 @@
     instr |= disp & 0x1FFF;
   }
 
-  uint *code = (uint*)cbuf.code_end();
-  *code = instr;
-  cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+  cbuf.insts()->emit_int32(instr);
 
 #ifdef ASSERT
   {
@@ -1532,7 +1526,7 @@
   // set (empty), G5
   // jmp -1
 
-  address mark = cbuf.inst_mark();  // get mark within main instrs section
+  address mark = cbuf.insts_mark();  // get mark within main instrs section
 
   MacroAssembler _masm(&cbuf);
 
@@ -1632,7 +1626,7 @@
 // Emit exception handler code.
 int emit_exception_handler(CodeBuffer& cbuf) {
   Register temp_reg = G3;
-  AddressLiteral exception_blob(OptoRuntime::exception_blob()->instructions_begin());
+  AddressLiteral exception_blob(OptoRuntime::exception_blob()->entry_point());
   MacroAssembler _masm(&cbuf);
 
   address base =
@@ -2292,8 +2286,7 @@
              (0 << 13) |                    // select register move
              ($pcc$$constant << 11) |       // cc1, cc0 bits for 'icc' or 'xcc'
              ($src$$reg << 0);
-    *((int*)(cbuf.code_end())) = op;
-    cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+    cbuf.insts()->emit_int32(op);
   %}
 
   enc_class enc_cmov_imm( cmpOp cmp, iRegI dst, immI11 src, immI pcc ) %{
@@ -2306,8 +2299,7 @@
              (1 << 13) |                    // select immediate move
              ($pcc$$constant << 11) |       // cc1, cc0 bits for 'icc'
              (simm11 << 0);
-    *((int*)(cbuf.code_end())) = op;
-    cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+    cbuf.insts()->emit_int32(op);
   %}
 
   enc_class enc_cmov_reg_f( cmpOpF cmp, iRegI dst, iRegI src, flagsRegF fcc ) %{
@@ -2319,8 +2311,7 @@
              (0 << 13) |                    // select register move
              ($fcc$$reg << 11) |            // cc1, cc0 bits for fcc0-fcc3
              ($src$$reg << 0);
-    *((int*)(cbuf.code_end())) = op;
-    cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+    cbuf.insts()->emit_int32(op);
   %}
 
   enc_class enc_cmov_imm_f( cmpOp cmp, iRegI dst, immI11 src, flagsRegF fcc ) %{
@@ -2333,8 +2324,7 @@
              (1 << 13) |                    // select immediate move
              ($fcc$$reg << 11) |            // cc1, cc0 bits for fcc0-fcc3
              (simm11 << 0);
-    *((int*)(cbuf.code_end())) = op;
-    cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+    cbuf.insts()->emit_int32(op);
   %}
 
   enc_class enc_cmovf_reg( cmpOp cmp, regD dst, regD src, immI pcc ) %{
@@ -2347,8 +2337,7 @@
              ($pcc$$constant << 11) |       // cc1-cc0 bits for 'icc' or 'xcc'
              ($primary << 5) |              // select single, double or quad
              ($src$$reg << 0);
-    *((int*)(cbuf.code_end())) = op;
-    cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+    cbuf.insts()->emit_int32(op);
   %}
 
   enc_class enc_cmovff_reg( cmpOpF cmp, flagsRegF fcc, regD dst, regD src ) %{
@@ -2360,8 +2349,7 @@
              ($fcc$$reg << 11) |            // cc2-cc0 bits for 'fccX'
              ($primary << 5) |              // select single, double or quad
              ($src$$reg << 0);
-    *((int*)(cbuf.code_end())) = op;
-    cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+    cbuf.insts()->emit_int32(op);
   %}
 
   // Used by the MIN/MAX encodings.  Same as a CMOV, but
@@ -2375,8 +2363,7 @@
              (0 << 13) |                    // select register move
              (0 << 11) |                    // cc1, cc0 bits for 'icc'
              ($src$$reg << 0);
-    *((int*)(cbuf.code_end())) = op;
-    cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+    cbuf.insts()->emit_int32(op);
   %}
 
   enc_class enc_cmov_reg_minmax_long( iRegL dst, iRegL src ) %{
@@ -2388,8 +2375,7 @@
              (0 << 13) |                    // select register move
              (0 << 11) |                    // cc1, cc0 bits for 'icc'
              ($src$$reg << 0);
-    *((int*)(cbuf.code_end())) = op;
-    cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+    cbuf.insts()->emit_int32(op);
   %}
 
   // Utility encoding for loading a 64 bit Pointer into a register
@@ -3055,7 +3041,7 @@
   %}
 
   enc_class enc_rethrow() %{
-    cbuf.set_inst_mark();
+    cbuf.set_insts_mark();
     Register temp_reg = G3;
     AddressLiteral rethrow_stub(OptoRuntime::rethrow_stub());
     assert(temp_reg != reg_to_register_object(R_I0_num), "temp must not break oop_reg");
@@ -3076,23 +3062,17 @@
 
   enc_class emit_mem_nop() %{
     // Generates the instruction LDUXA [o6,g0],#0x82,g0
-    unsigned int *code = (unsigned int*)cbuf.code_end();
-    *code = (unsigned int)0xc0839040;
-    cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+    cbuf.insts()->emit_int32((unsigned int) 0xc0839040);
   %}
 
   enc_class emit_fadd_nop() %{
     // Generates the instruction FMOVS f31,f31
-    unsigned int *code = (unsigned int*)cbuf.code_end();
-    *code = (unsigned int)0xbfa0003f;
-    cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+    cbuf.insts()->emit_int32((unsigned int) 0xbfa0003f);
   %}
 
   enc_class emit_br_nop() %{
     // Generates the instruction BPN,PN .
-    unsigned int *code = (unsigned int*)cbuf.code_end();
-    *code = (unsigned int)0x00400000;
-    cbuf.set_code_end(cbuf.code_end() + BytesPerInstWord);
+    cbuf.insts()->emit_int32((unsigned int) 0x00400000);
   %}
 
   enc_class enc_membar_acquire %{
--- a/src/cpu/sparc/vm/stubGenerator_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/stubGenerator_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1588,6 +1588,229 @@
   }
 
   //
+  //  Generate stub for disjoint short fill.  If "aligned" is true, the
+  //  "to" address is assumed to be heapword aligned.
+  //
+  // Arguments for generated stub:
+  //      to:    O0
+  //      value: O1
+  //      count: O2 treated as signed
+  //
+  address generate_fill(BasicType t, bool aligned, const char* name) {
+    __ align(CodeEntryAlignment);
+    StubCodeMark mark(this, "StubRoutines", name);
+    address start = __ pc();
+
+    const Register to        = O0;   // source array address
+    const Register value     = O1;   // fill value
+    const Register count     = O2;   // elements count
+    // O3 is used as a temp register
+
+    assert_clean_int(count, O3);     // Make sure 'count' is clean int.
+
+    Label L_exit, L_skip_align1, L_skip_align2, L_fill_byte;
+    Label L_fill_2_bytes, L_fill_elements, L_fill_32_bytes;
+
+    int shift = -1;
+    switch (t) {
+       case T_BYTE:
+        shift = 2;
+        break;
+       case T_SHORT:
+        shift = 1;
+        break;
+      case T_INT:
+         shift = 0;
+        break;
+      default: ShouldNotReachHere();
+    }
+
+    BLOCK_COMMENT("Entry:");
+
+    if (t == T_BYTE) {
+      // Zero extend value
+      __ and3(value, 0xff, value);
+      __ sllx(value, 8, O3);
+      __ or3(value, O3, value);
+    }
+    if (t == T_SHORT) {
+      // Zero extend value
+      __ sllx(value, 48, value);
+      __ srlx(value, 48, value);
+    }
+    if (t == T_BYTE || t == T_SHORT) {
+      __ sllx(value, 16, O3);
+      __ or3(value, O3, value);
+    }
+
+    __ cmp(count, 2<<shift); // Short arrays (< 8 bytes) fill by element
+    __ brx(Assembler::lessUnsigned, false, Assembler::pn, L_fill_elements); // use unsigned cmp
+    __ delayed()->andcc(count, 1, G0);
+
+    if (!aligned && (t == T_BYTE || t == T_SHORT)) {
+      // align source address at 4 bytes address boundary
+      if (t == T_BYTE) {
+        // One byte misalignment happens only for byte arrays
+        __ andcc(to, 1, G0);
+        __ br(Assembler::zero, false, Assembler::pt, L_skip_align1);
+        __ delayed()->nop();
+        __ stb(value, to, 0);
+        __ inc(to, 1);
+        __ dec(count, 1);
+        __ BIND(L_skip_align1);
+      }
+      // Two bytes misalignment happens only for byte and short (char) arrays
+      __ andcc(to, 2, G0);
+      __ br(Assembler::zero, false, Assembler::pt, L_skip_align2);
+      __ delayed()->nop();
+      __ sth(value, to, 0);
+      __ inc(to, 2);
+      __ dec(count, 1 << (shift - 1));
+      __ BIND(L_skip_align2);
+    }
+#ifdef _LP64
+    if (!aligned) {
+#endif
+    // align to 8 bytes, we know we are 4 byte aligned to start
+    __ andcc(to, 7, G0);
+    __ br(Assembler::zero, false, Assembler::pt, L_fill_32_bytes);
+    __ delayed()->nop();
+    __ stw(value, to, 0);
+    __ inc(to, 4);
+    __ dec(count, 1 << shift);
+    __ BIND(L_fill_32_bytes);
+#ifdef _LP64
+    }
+#endif
+
+    if (t == T_INT) {
+      // Zero extend value
+      __ srl(value, 0, value);
+    }
+    if (t == T_BYTE || t == T_SHORT || t == T_INT) {
+      __ sllx(value, 32, O3);
+      __ or3(value, O3, value);
+    }
+
+    Label L_check_fill_8_bytes;
+    // Fill 32-byte chunks
+    __ subcc(count, 8 << shift, count);
+    __ brx(Assembler::less, false, Assembler::pt, L_check_fill_8_bytes);
+    __ delayed()->nop();
+
+    Label L_fill_32_bytes_loop, L_fill_4_bytes;
+    __ align(16);
+    __ BIND(L_fill_32_bytes_loop);
+
+    __ stx(value, to, 0);
+    __ stx(value, to, 8);
+    __ stx(value, to, 16);
+    __ stx(value, to, 24);
+
+    __ subcc(count, 8 << shift, count);
+    __ brx(Assembler::greaterEqual, false, Assembler::pt, L_fill_32_bytes_loop);
+    __ delayed()->add(to, 32, to);
+
+    __ BIND(L_check_fill_8_bytes);
+    __ addcc(count, 8 << shift, count);
+    __ brx(Assembler::zero, false, Assembler::pn, L_exit);
+    __ delayed()->subcc(count, 1 << (shift + 1), count);
+    __ brx(Assembler::less, false, Assembler::pn, L_fill_4_bytes);
+    __ delayed()->andcc(count, 1<<shift, G0);
+
+    //
+    // length is too short, just fill 8 bytes at a time
+    //
+    Label L_fill_8_bytes_loop;
+    __ BIND(L_fill_8_bytes_loop);
+    __ stx(value, to, 0);
+    __ subcc(count, 1 << (shift + 1), count);
+    __ brx(Assembler::greaterEqual, false, Assembler::pn, L_fill_8_bytes_loop);
+    __ delayed()->add(to, 8, to);
+
+    // fill trailing 4 bytes
+    __ andcc(count, 1<<shift, G0);  // in delay slot of branches
+    if (t == T_INT) {
+      __ BIND(L_fill_elements);
+    }
+    __ BIND(L_fill_4_bytes);
+    __ brx(Assembler::zero, false, Assembler::pt, L_fill_2_bytes);
+    if (t == T_BYTE || t == T_SHORT) {
+      __ delayed()->andcc(count, 1<<(shift-1), G0);
+    } else {
+      __ delayed()->nop();
+    }
+    __ stw(value, to, 0);
+    if (t == T_BYTE || t == T_SHORT) {
+      __ inc(to, 4);
+      // fill trailing 2 bytes
+      __ andcc(count, 1<<(shift-1), G0); // in delay slot of branches
+      __ BIND(L_fill_2_bytes);
+      __ brx(Assembler::zero, false, Assembler::pt, L_fill_byte);
+      __ delayed()->andcc(count, 1, count);
+      __ sth(value, to, 0);
+      if (t == T_BYTE) {
+        __ inc(to, 2);
+        // fill trailing byte
+        __ andcc(count, 1, count);  // in delay slot of branches
+        __ BIND(L_fill_byte);
+        __ brx(Assembler::zero, false, Assembler::pt, L_exit);
+        __ delayed()->nop();
+        __ stb(value, to, 0);
+      } else {
+        __ BIND(L_fill_byte);
+      }
+    } else {
+      __ BIND(L_fill_2_bytes);
+    }
+    __ BIND(L_exit);
+    __ retl();
+    __ delayed()->nop();
+
+    // Handle copies less than 8 bytes.  Int is handled elsewhere.
+    if (t == T_BYTE) {
+      __ BIND(L_fill_elements);
+      Label L_fill_2, L_fill_4;
+      // in delay slot __ andcc(count, 1, G0);
+      __ brx(Assembler::zero, false, Assembler::pt, L_fill_2);
+      __ delayed()->andcc(count, 2, G0);
+      __ stb(value, to, 0);
+      __ inc(to, 1);
+      __ BIND(L_fill_2);
+      __ brx(Assembler::zero, false, Assembler::pt, L_fill_4);
+      __ delayed()->andcc(count, 4, G0);
+      __ stb(value, to, 0);
+      __ stb(value, to, 1);
+      __ inc(to, 2);
+      __ BIND(L_fill_4);
+      __ brx(Assembler::zero, false, Assembler::pt, L_exit);
+      __ delayed()->nop();
+      __ stb(value, to, 0);
+      __ stb(value, to, 1);
+      __ stb(value, to, 2);
+      __ retl();
+      __ delayed()->stb(value, to, 3);
+    }
+
+    if (t == T_SHORT) {
+      Label L_fill_2;
+      __ BIND(L_fill_elements);
+      // in delay slot __ andcc(count, 1, G0);
+      __ brx(Assembler::zero, false, Assembler::pt, L_fill_2);
+      __ delayed()->andcc(count, 2, G0);
+      __ sth(value, to, 0);
+      __ inc(to, 2);
+      __ BIND(L_fill_2);
+      __ brx(Assembler::zero, false, Assembler::pt, L_exit);
+      __ delayed()->nop();
+      __ sth(value, to, 0);
+      __ retl();
+      __ delayed()->sth(value, to, 2);
+    }
+    return start;
+  }
+
+  //
   //  Generate stub for conjoint short copy.  If "aligned" is true, the
   //  "from" and "to" addresses are assumed to be heapword aligned.
   //
@@ -2855,6 +3078,13 @@
     StubRoutines::_checkcast_arraycopy = generate_checkcast_copy("checkcast_arraycopy");
     StubRoutines::_unsafe_arraycopy    = generate_unsafe_copy("unsafe_arraycopy");
     StubRoutines::_generic_arraycopy   = generate_generic_copy("generic_arraycopy");
+
+    StubRoutines::_jbyte_fill = generate_fill(T_BYTE, false, "jbyte_fill");
+    StubRoutines::_jshort_fill = generate_fill(T_SHORT, false, "jshort_fill");
+    StubRoutines::_jint_fill = generate_fill(T_INT, false, "jint_fill");
+    StubRoutines::_arrayof_jbyte_fill = generate_fill(T_BYTE, true, "arrayof_jbyte_fill");
+    StubRoutines::_arrayof_jshort_fill = generate_fill(T_SHORT, true, "arrayof_jshort_fill");
+    StubRoutines::_arrayof_jint_fill = generate_fill(T_INT, true, "arrayof_jint_fill");
   }
 
   void generate_initial() {
--- a/src/cpu/sparc/vm/stubRoutines_sparc.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/stubRoutines_sparc.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -43,7 +43,7 @@
 
 // MethodHandles adapters
 enum method_handles_platform_dependent_constants {
-  method_handles_adapters_code_size = 6000
+  method_handles_adapters_code_size = 12000
 };
 
 class Sparc {
--- a/src/cpu/sparc/vm/templateInterpreter_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/templateInterpreter_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -294,35 +294,65 @@
 // ??: invocation counter
 //
 void InterpreterGenerator::generate_counter_incr(Label* overflow, Label* profile_method, Label* profile_method_continue) {
-  // Update standard invocation counters
-  __ increment_invocation_counter(O0, G3_scratch);
-  if (ProfileInterpreter) {  // %%% Merge this into methodDataOop
-    Address interpreter_invocation_counter(Lmethod, methodOopDesc::interpreter_invocation_counter_offset());
-    __ ld(interpreter_invocation_counter, G3_scratch);
-    __ inc(G3_scratch);
-    __ st(G3_scratch, interpreter_invocation_counter);
+  // Note: In tiered we increment either counters in methodOop or in MDO depending if we're profiling or not.
+  if (TieredCompilation) {
+    const int increment = InvocationCounter::count_increment;
+    const int mask = ((1 << Tier0InvokeNotifyFreqLog) - 1) << InvocationCounter::count_shift;
+    Label no_mdo, done;
+    if (ProfileInterpreter) {
+      // If no method data exists, go to profile_continue.
+      __ ld_ptr(Lmethod, methodOopDesc::method_data_offset(), G4_scratch);
+      __ br_null(G4_scratch, false, Assembler::pn, no_mdo);
+      __ delayed()->nop();
+      // Increment counter
+      Address mdo_invocation_counter(G4_scratch,
+                                     in_bytes(methodDataOopDesc::invocation_counter_offset()) +
+                                     in_bytes(InvocationCounter::counter_offset()));
+      __ increment_mask_and_jump(mdo_invocation_counter, increment, mask,
+                                 G3_scratch, Lscratch,
+                                 Assembler::zero, overflow);
+      __ ba(false, done);
+      __ delayed()->nop();
+    }
+
+    // Increment counter in methodOop
+    __ bind(no_mdo);
+    Address invocation_counter(Lmethod,
+                               in_bytes(methodOopDesc::invocation_counter_offset()) +
+                               in_bytes(InvocationCounter::counter_offset()));
+    __ increment_mask_and_jump(invocation_counter, increment, mask,
+                               G3_scratch, Lscratch,
+                               Assembler::zero, overflow);
+    __ bind(done);
+  } else {
+    // Update standard invocation counters
+    __ increment_invocation_counter(O0, G3_scratch);
+    if (ProfileInterpreter) {  // %%% Merge this into methodDataOop
+      Address interpreter_invocation_counter(Lmethod,in_bytes(methodOopDesc::interpreter_invocation_counter_offset()));
+      __ ld(interpreter_invocation_counter, G3_scratch);
+      __ inc(G3_scratch);
+      __ st(G3_scratch, interpreter_invocation_counter);
+    }
+
+    if (ProfileInterpreter && profile_method != NULL) {
+      // Test to see if we should create a method data oop
+      AddressLiteral profile_limit((address)&InvocationCounter::InterpreterProfileLimit);
+      __ load_contents(profile_limit, G3_scratch);
+      __ cmp(O0, G3_scratch);
+      __ br(Assembler::lessUnsigned, false, Assembler::pn, *profile_method_continue);
+      __ delayed()->nop();
+
+      // if no method data exists, go to profile_method
+      __ test_method_data_pointer(*profile_method);
+    }
+
+    AddressLiteral invocation_limit((address)&InvocationCounter::InterpreterInvocationLimit);
+    __ load_contents(invocation_limit, G3_scratch);
+    __ cmp(O0, G3_scratch);
+    __ br(Assembler::greaterEqualUnsigned, false, Assembler::pn, *overflow);
+    __ delayed()->nop();
   }
 
-  if (ProfileInterpreter && profile_method != NULL) {
-    // Test to see if we should create a method data oop
-    AddressLiteral profile_limit(&InvocationCounter::InterpreterProfileLimit);
-    __ sethi(profile_limit, G3_scratch);
-    __ ld(G3_scratch, profile_limit.low10(), G3_scratch);
-    __ cmp(O0, G3_scratch);
-    __ br(Assembler::lessUnsigned, false, Assembler::pn, *profile_method_continue);
-    __ delayed()->nop();
-
-    // if no method data exists, go to profile_method
-    __ test_method_data_pointer(*profile_method);
-  }
-
-  AddressLiteral invocation_limit(&InvocationCounter::InterpreterInvocationLimit);
-  __ sethi(invocation_limit, G3_scratch);
-  __ ld(G3_scratch, invocation_limit.low10(), G3_scratch);
-  __ cmp(O0, G3_scratch);
-  __ br(Assembler::greaterEqualUnsigned, false, Assembler::pn, *overflow);
-  __ delayed()->nop();
-
 }
 
 // Allocate monitor and lock method (asm interpreter)
--- a/src/cpu/sparc/vm/templateTable_sparc.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/sparc/vm/templateTable_sparc.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1580,6 +1580,7 @@
   const Register O0_cur_bcp = O0;
   __ mov( Lbcp, O0_cur_bcp );
 
+
   bool increment_invocation_counter_for_backward_branches = UseCompiler && UseLoopCounter;
   if ( increment_invocation_counter_for_backward_branches ) {
     Label Lforward;
@@ -1588,17 +1589,84 @@
     // Bump bytecode pointer by displacement (take the branch)
     __ delayed()->add( O1_disp, Lbcp, Lbcp );     // add to bc addr
 
-    // Update Backedge branch separately from invocations
-    const Register G4_invoke_ctr = G4;
-    __ increment_backedge_counter(G4_invoke_ctr, G1_scratch);
-    if (ProfileInterpreter) {
-      __ test_invocation_counter_for_mdp(G4_invoke_ctr, Lbcp, G3_scratch, Lforward);
-      if (UseOnStackReplacement) {
-        __ test_backedge_count_for_osr(O2_bumped_count, O0_cur_bcp, G3_scratch);
+    if (TieredCompilation) {
+      Label Lno_mdo, Loverflow;
+      int increment = InvocationCounter::count_increment;
+      int mask = ((1 << Tier0BackedgeNotifyFreqLog) - 1) << InvocationCounter::count_shift;
+      if (ProfileInterpreter) {
+        // If no method data exists, go to profile_continue.
+        __ ld_ptr(Lmethod, methodOopDesc::method_data_offset(), G4_scratch);
+        __ br_null(G4_scratch, false, Assembler::pn, Lno_mdo);
+        __ delayed()->nop();
+
+        // Increment backedge counter in the MDO
+        Address mdo_backedge_counter(G4_scratch, in_bytes(methodDataOopDesc::backedge_counter_offset()) +
+                                                 in_bytes(InvocationCounter::counter_offset()));
+        __ increment_mask_and_jump(mdo_backedge_counter, increment, mask, G3_scratch, Lscratch,
+                                   Assembler::notZero, &Lforward);
+        __ ba(false, Loverflow);
+        __ delayed()->nop();
       }
+
+      // If there's no MDO, increment counter in methodOop
+      __ bind(Lno_mdo);
+      Address backedge_counter(Lmethod, in_bytes(methodOopDesc::backedge_counter_offset()) +
+                                        in_bytes(InvocationCounter::counter_offset()));
+      __ increment_mask_and_jump(backedge_counter, increment, mask, G3_scratch, Lscratch,
+                                 Assembler::notZero, &Lforward);
+      __ bind(Loverflow);
+
+      // notify point for loop, pass branch bytecode
+      __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), O0_cur_bcp);
+
+      // Was an OSR adapter generated?
+      // O0 = osr nmethod
+      __ br_null(O0, false, Assembler::pn, Lforward);
+      __ delayed()->nop();
+
+      // Has the nmethod been invalidated already?
+      __ ld(O0, nmethod::entry_bci_offset(), O2);
+      __ cmp(O2, InvalidOSREntryBci);
+      __ br(Assembler::equal, false, Assembler::pn, Lforward);
+      __ delayed()->nop();
+
+      // migrate the interpreter frame off of the stack
+
+      __ mov(G2_thread, L7);
+      // save nmethod
+      __ mov(O0, L6);
+      __ set_last_Java_frame(SP, noreg);
+      __ call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::OSR_migration_begin), L7);
+      __ reset_last_Java_frame();
+      __ mov(L7, G2_thread);
+
+      // move OSR nmethod to I1
+      __ mov(L6, I1);
+
+      // OSR buffer to I0
+      __ mov(O0, I0);
+
+      // remove the interpreter frame
+      __ restore(I5_savedSP, 0, SP);
+
+      // Jump to the osr code.
+      __ ld_ptr(O1, nmethod::osr_entry_point_offset(), O2);
+      __ jmp(O2, G0);
+      __ delayed()->nop();
+
     } else {
-      if (UseOnStackReplacement) {
-        __ test_backedge_count_for_osr(G4_invoke_ctr, O0_cur_bcp, G3_scratch);
+      // Update Backedge branch separately from invocations
+      const Register G4_invoke_ctr = G4;
+      __ increment_backedge_counter(G4_invoke_ctr, G1_scratch);
+      if (ProfileInterpreter) {
+        __ test_invocation_counter_for_mdp(G4_invoke_ctr, Lbcp, G3_scratch, Lforward);
+        if (UseOnStackReplacement) {
+          __ test_backedge_count_for_osr(O2_bumped_count, O0_cur_bcp, G3_scratch);
+        }
+      } else {
+        if (UseOnStackReplacement) {
+          __ test_backedge_count_for_osr(G4_invoke_ctr, O0_cur_bcp, G3_scratch);
+        }
       }
     }
 
--- a/src/cpu/x86/vm/assembler_x86.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/assembler_x86.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -4993,19 +4993,22 @@
       ttyLocker ttyl;
       tty->print_cr("eip = 0x%08x", eip);
 #ifndef PRODUCT
-      tty->cr();
-      findpc(eip);
-      tty->cr();
+      if ((WizardMode || Verbose) && PrintMiscellaneous) {
+        tty->cr();
+        findpc(eip);
+        tty->cr();
+      }
 #endif
-      tty->print_cr("rax, = 0x%08x", rax);
-      tty->print_cr("rbx, = 0x%08x", rbx);
+      tty->print_cr("rax = 0x%08x", rax);
+      tty->print_cr("rbx = 0x%08x", rbx);
       tty->print_cr("rcx = 0x%08x", rcx);
       tty->print_cr("rdx = 0x%08x", rdx);
       tty->print_cr("rdi = 0x%08x", rdi);
       tty->print_cr("rsi = 0x%08x", rsi);
-      tty->print_cr("rbp, = 0x%08x", rbp);
+      tty->print_cr("rbp = 0x%08x", rbp);
       tty->print_cr("rsp = 0x%08x", rsp);
       BREAKPOINT;
+      assert(false, "start up GDB");
     }
   } else {
     ttyLocker ttyl;
@@ -7677,11 +7680,19 @@
   movptr(tmp, ExternalAddress((address) delayed_value_addr));
 
 #ifdef ASSERT
-  Label L;
-  testptr(tmp, tmp);
-  jccb(Assembler::notZero, L);
-  hlt();
-  bind(L);
+  { Label L;
+    testptr(tmp, tmp);
+    if (WizardMode) {
+      jcc(Assembler::notZero, L);
+      char* buf = new char[40];
+      sprintf(buf, "DelayedValue="INTPTR_FORMAT, delayed_value_addr[1]);
+      stop(buf);
+    } else {
+      jccb(Assembler::notZero, L);
+      hlt();
+    }
+    bind(L);
+  }
 #endif
 
   if (offset != 0)
@@ -8767,6 +8778,186 @@
   bind(DONE);
 }
 
+#ifdef PRODUCT
+#define BLOCK_COMMENT(str) /* nothing */
+#else
+#define BLOCK_COMMENT(str) block_comment(str)
+#endif
+
+#define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
+void MacroAssembler::generate_fill(BasicType t, bool aligned,
+                                   Register to, Register value, Register count,
+                                   Register rtmp, XMMRegister xtmp) {
+  assert_different_registers(to, value, count, rtmp);
+  Label L_exit, L_skip_align1, L_skip_align2, L_fill_byte;
+  Label L_fill_2_bytes, L_fill_4_bytes;
+
+  int shift = -1;
+  switch (t) {
+    case T_BYTE:
+      shift = 2;
+      break;
+    case T_SHORT:
+      shift = 1;
+      break;
+    case T_INT:
+      shift = 0;
+      break;
+    default: ShouldNotReachHere();
+  }
+
+  if (t == T_BYTE) {
+    andl(value, 0xff);
+    movl(rtmp, value);
+    shll(rtmp, 8);
+    orl(value, rtmp);
+  }
+  if (t == T_SHORT) {
+    andl(value, 0xffff);
+  }
+  if (t == T_BYTE || t == T_SHORT) {
+    movl(rtmp, value);
+    shll(rtmp, 16);
+    orl(value, rtmp);
+  }
+
+  cmpl(count, 2<<shift); // Short arrays (< 8 bytes) fill by element
+  jcc(Assembler::below, L_fill_4_bytes); // use unsigned cmp
+  if (!UseUnalignedLoadStores && !aligned && (t == T_BYTE || t == T_SHORT)) {
+    // align source address at 4 bytes address boundary
+    if (t == T_BYTE) {
+      // One byte misalignment happens only for byte arrays
+      testptr(to, 1);
+      jccb(Assembler::zero, L_skip_align1);
+      movb(Address(to, 0), value);
+      increment(to);
+      decrement(count);
+      BIND(L_skip_align1);
+    }
+    // Two bytes misalignment happens only for byte and short (char) arrays
+    testptr(to, 2);
+    jccb(Assembler::zero, L_skip_align2);
+    movw(Address(to, 0), value);
+    addptr(to, 2);
+    subl(count, 1<<(shift-1));
+    BIND(L_skip_align2);
+  }
+  if (UseSSE < 2) {
+    Label L_fill_32_bytes_loop, L_check_fill_8_bytes, L_fill_8_bytes_loop, L_fill_8_bytes;
+    // Fill 32-byte chunks
+    subl(count, 8 << shift);
+    jcc(Assembler::less, L_check_fill_8_bytes);
+    align(16);
+
+    BIND(L_fill_32_bytes_loop);
+
+    for (int i = 0; i < 32; i += 4) {
+      movl(Address(to, i), value);
+    }
+
+    addptr(to, 32);
+    subl(count, 8 << shift);
+    jcc(Assembler::greaterEqual, L_fill_32_bytes_loop);
+    BIND(L_check_fill_8_bytes);
+    addl(count, 8 << shift);
+    jccb(Assembler::zero, L_exit);
+    jmpb(L_fill_8_bytes);
+
+    //
+    // length is too short, just fill qwords
+    //
+    BIND(L_fill_8_bytes_loop);
+    movl(Address(to, 0), value);
+    movl(Address(to, 4), value);
+    addptr(to, 8);
+    BIND(L_fill_8_bytes);
+    subl(count, 1 << (shift + 1));
+    jcc(Assembler::greaterEqual, L_fill_8_bytes_loop);
+    // fall through to fill 4 bytes
+  } else {
+    Label L_fill_32_bytes;
+    if (!UseUnalignedLoadStores) {
+      // align to 8 bytes, we know we are 4 byte aligned to start
+      testptr(to, 4);
+      jccb(Assembler::zero, L_fill_32_bytes);
+      movl(Address(to, 0), value);
+      addptr(to, 4);
+      subl(count, 1<<shift);
+    }
+    BIND(L_fill_32_bytes);
+    {
+      assert( UseSSE >= 2, "supported cpu only" );
+      Label L_fill_32_bytes_loop, L_check_fill_8_bytes, L_fill_8_bytes_loop, L_fill_8_bytes;
+      // Fill 32-byte chunks
+      movdl(xtmp, value);
+      pshufd(xtmp, xtmp, 0);
+
+      subl(count, 8 << shift);
+      jcc(Assembler::less, L_check_fill_8_bytes);
+      align(16);
+
+      BIND(L_fill_32_bytes_loop);
+
+      if (UseUnalignedLoadStores) {
+        movdqu(Address(to, 0), xtmp);
+        movdqu(Address(to, 16), xtmp);
+      } else {
+        movq(Address(to, 0), xtmp);
+        movq(Address(to, 8), xtmp);
+        movq(Address(to, 16), xtmp);
+        movq(Address(to, 24), xtmp);
+      }
+
+      addptr(to, 32);
+      subl(count, 8 << shift);
+      jcc(Assembler::greaterEqual, L_fill_32_bytes_loop);
+      BIND(L_check_fill_8_bytes);
+      addl(count, 8 << shift);
+      jccb(Assembler::zero, L_exit);
+      jmpb(L_fill_8_bytes);
+
+      //
+      // length is too short, just fill qwords
+      //
+      BIND(L_fill_8_bytes_loop);
+      movq(Address(to, 0), xtmp);
+      addptr(to, 8);
+      BIND(L_fill_8_bytes);
+      subl(count, 1 << (shift + 1));
+      jcc(Assembler::greaterEqual, L_fill_8_bytes_loop);
+    }
+  }
+  // fill trailing 4 bytes
+  BIND(L_fill_4_bytes);
+  testl(count, 1<<shift);
+  jccb(Assembler::zero, L_fill_2_bytes);
+  movl(Address(to, 0), value);
+  if (t == T_BYTE || t == T_SHORT) {
+    addptr(to, 4);
+    BIND(L_fill_2_bytes);
+    // fill trailing 2 bytes
+    testl(count, 1<<(shift-1));
+    jccb(Assembler::zero, L_fill_byte);
+    movw(Address(to, 0), value);
+    if (t == T_BYTE) {
+      addptr(to, 2);
+      BIND(L_fill_byte);
+      // fill trailing byte
+      testl(count, 1);
+      jccb(Assembler::zero, L_exit);
+      movb(Address(to, 0), value);
+    } else {
+      BIND(L_fill_byte);
+    }
+  } else {
+    BIND(L_fill_2_bytes);
+  }
+  BIND(L_exit);
+}
+#undef BIND
+#undef BLOCK_COMMENT
+
+
 Assembler::Condition MacroAssembler::negate_condition(Assembler::Condition cond) {
   switch (cond) {
     // Note some conditions are synonyms for others
--- a/src/cpu/x86/vm/assembler_x86.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/assembler_x86.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -2242,6 +2242,11 @@
                           Register limit, Register result, Register chr,
                           XMMRegister vec1, XMMRegister vec2);
 
+  // Fill primitive arrays
+  void generate_fill(BasicType t, bool aligned,
+                     Register to, Register value, Register count,
+                     Register rtmp, XMMRegister xtmp);
+
 #undef VIRTUAL
 
 };
--- a/src/cpu/x86/vm/c1_CodeStubs_x86.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/c1_CodeStubs_x86.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -68,19 +68,15 @@
   __ jmp(_continuation);
 }
 
-#ifdef TIERED
 void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
   __ bind(_entry);
+  ce->store_parameter(_method->as_register(), 1);
   ce->store_parameter(_bci, 0);
   __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id)));
   ce->add_call_info_here(_info);
   ce->verify_oop_map(_info);
-
   __ jmp(_continuation);
 }
-#endif // TIERED
-
-
 
 RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index,
                                bool throw_index_out_of_bounds_exception)
--- a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1613,6 +1613,189 @@
   __ bind(*op->stub()->continuation());
 }
 
+void LIR_Assembler::type_profile_helper(Register mdo,
+                                        ciMethodData *md, ciProfileData *data,
+                                        Register recv, Label* update_done) {
+  uint i;
+  for (i = 0; i < ReceiverTypeData::row_limit(); i++) {
+    Label next_test;
+    // See if the receiver is receiver[n].
+    __ cmpptr(recv, Address(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_offset(i))));
+    __ jccb(Assembler::notEqual, next_test);
+    Address data_addr(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i)));
+    __ addptr(data_addr, DataLayout::counter_increment);
+    __ jmp(*update_done);
+    __ bind(next_test);
+  }
+
+  // Didn't find receiver; find next empty slot and fill it in
+  for (i = 0; i < ReceiverTypeData::row_limit(); i++) {
+    Label next_test;
+    Address recv_addr(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_offset(i)));
+    __ cmpptr(recv_addr, (intptr_t)NULL_WORD);
+    __ jccb(Assembler::notEqual, next_test);
+    __ movptr(recv_addr, recv);
+    __ movptr(Address(mdo, md->byte_offset_of_slot(data, ReceiverTypeData::receiver_count_offset(i))), DataLayout::counter_increment);
+    __ jmp(*update_done);
+    __ bind(next_test);
+  }
+}
+
+void LIR_Assembler::emit_typecheck_helper(LIR_OpTypeCheck *op, Label* success, Label* failure, Label* obj_is_null) {
+  // we always need a stub for the failure case.
+  CodeStub* stub = op->stub();
+  Register obj = op->object()->as_register();
+  Register k_RInfo = op->tmp1()->as_register();
+  Register klass_RInfo = op->tmp2()->as_register();
+  Register dst = op->result_opr()->as_register();
+  ciKlass* k = op->klass();
+  Register Rtmp1 = noreg;
+
+  // check if it needs to be profiled
+  ciMethodData* md;
+  ciProfileData* data;
+
+  if (op->should_profile()) {
+    ciMethod* method = op->profiled_method();
+    assert(method != NULL, "Should have method");
+    int bci = op->profiled_bci();
+    md = method->method_data();
+    if (md == NULL) {
+      bailout("out of memory building methodDataOop");
+      return;
+    }
+    data = md->bci_to_data(bci);
+    assert(data != NULL,                "need data for type check");
+    assert(data->is_ReceiverTypeData(), "need ReceiverTypeData for type check");
+  }
+  Label profile_cast_success, profile_cast_failure;
+  Label *success_target = op->should_profile() ? &profile_cast_success : success;
+  Label *failure_target = op->should_profile() ? &profile_cast_failure : failure;
+
+  if (obj == k_RInfo) {
+    k_RInfo = dst;
+  } else if (obj == klass_RInfo) {
+    klass_RInfo = dst;
+  }
+  if (k->is_loaded()) {
+    select_different_registers(obj, dst, k_RInfo, klass_RInfo);
+  } else {
+    Rtmp1 = op->tmp3()->as_register();
+    select_different_registers(obj, dst, k_RInfo, klass_RInfo, Rtmp1);
+  }
+
+  assert_different_registers(obj, k_RInfo, klass_RInfo);
+  if (!k->is_loaded()) {
+    jobject2reg_with_patching(k_RInfo, op->info_for_patch());
+  } else {
+#ifdef _LP64
+    __ movoop(k_RInfo, k->constant_encoding());
+#endif // _LP64
+  }
+  assert(obj != k_RInfo, "must be different");
+
+  __ cmpptr(obj, (int32_t)NULL_WORD);
+  if (op->should_profile()) {
+    Label not_null;
+    __ jccb(Assembler::notEqual, not_null);
+    // Object is null; update MDO and exit
+    Register mdo  = klass_RInfo;
+    __ movoop(mdo, md->constant_encoding());
+    Address data_addr(mdo, md->byte_offset_of_slot(data, DataLayout::header_offset()));
+    int header_bits = DataLayout::flag_mask_to_header_mask(BitData::null_seen_byte_constant());
+    __ orl(data_addr, header_bits);
+    __ jmp(*obj_is_null);
+    __ bind(not_null);
+  } else {
+    __ jcc(Assembler::equal, *obj_is_null);
+  }
+  __ verify_oop(obj);
+
+  if (op->fast_check()) {
+    // get object class
+    // not a safepoint as obj null check happens earlier
+    if (k->is_loaded()) {
+#ifdef _LP64
+      __ cmpptr(k_RInfo, Address(obj, oopDesc::klass_offset_in_bytes()));
+#else
+      __ cmpoop(Address(obj, oopDesc::klass_offset_in_bytes()), k->constant_encoding());
+#endif // _LP64
+    } else {
+      __ cmpptr(k_RInfo, Address(obj, oopDesc::klass_offset_in_bytes()));
+    }
+    __ jcc(Assembler::notEqual, *failure_target);
+    // successful cast, fall through to profile or jump
+  } else {
+    // get object class
+    // not a safepoint as obj null check happens earlier
+    __ movptr(klass_RInfo, Address(obj, oopDesc::klass_offset_in_bytes()));
+    if (k->is_loaded()) {
+      // See if we get an immediate positive hit
+#ifdef _LP64
+      __ cmpptr(k_RInfo, Address(klass_RInfo, k->super_check_offset()));
+#else
+      __ cmpoop(Address(klass_RInfo, k->super_check_offset()), k->constant_encoding());
+#endif // _LP64
+      if (sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes() != k->super_check_offset()) {
+        __ jcc(Assembler::notEqual, *failure_target);
+        // successful cast, fall through to profile or jump
+      } else {
+        // See if we get an immediate positive hit
+        __ jcc(Assembler::equal, *success_target);
+        // check for self
+#ifdef _LP64
+        __ cmpptr(klass_RInfo, k_RInfo);
+#else
+        __ cmpoop(klass_RInfo, k->constant_encoding());
+#endif // _LP64
+        __ jcc(Assembler::equal, *success_target);
+
+        __ push(klass_RInfo);
+#ifdef _LP64
+        __ push(k_RInfo);
+#else
+        __ pushoop(k->constant_encoding());
+#endif // _LP64
+        __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::slow_subtype_check_id)));
+        __ pop(klass_RInfo);
+        __ pop(klass_RInfo);
+        // result is a boolean
+        __ cmpl(klass_RInfo, 0);
+        __ jcc(Assembler::equal, *failure_target);
+        // successful cast, fall through to profile or jump
+      }
+    } else {
+      // perform the fast part of the checking logic
+      __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, success_target, failure_target, NULL);
+      // call out-of-line instance of __ check_klass_subtype_slow_path(...):
+      __ push(klass_RInfo);
+      __ push(k_RInfo);
+      __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::slow_subtype_check_id)));
+      __ pop(klass_RInfo);
+      __ pop(k_RInfo);
+      // result is a boolean
+      __ cmpl(k_RInfo, 0);
+      __ jcc(Assembler::equal, *failure_target);
+      // successful cast, fall through to profile or jump
+    }
+  }
+  if (op->should_profile()) {
+    Register mdo  = klass_RInfo, recv = k_RInfo;
+    __ bind(profile_cast_success);
+    __ movoop(mdo, md->constant_encoding());
+    __ movptr(recv, Address(obj, oopDesc::klass_offset_in_bytes()));
+    Label update_done;
+    type_profile_helper(mdo, md, data, recv, success);
+    __ jmp(*success);
+
+    __ bind(profile_cast_failure);
+    __ movoop(mdo, md->constant_encoding());
+    Address counter_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset()));
+    __ subptr(counter_addr, DataLayout::counter_increment);
+    __ jmp(*failure);
+  }
+  __ jmp(*success);
+}
 
 
 void LIR_Assembler::emit_opTypeCheck(LIR_OpTypeCheck* op) {
@@ -1625,9 +1808,44 @@
     Register Rtmp1 = op->tmp3()->as_register();
 
     CodeStub* stub = op->stub();
-    Label done;
+
+    // check if it needs to be profiled
+    ciMethodData* md;
+    ciProfileData* data;
+
+    if (op->should_profile()) {
+      ciMethod* method = op->profiled_method();
+      assert(method != NULL, "Should have method");
+      int bci = op->profiled_bci();
+      md = method->method_data();
+      if (md == NULL) {
+        bailout("out of memory building methodDataOop");
+        return;
+      }
+      data = md->bci_to_data(bci);
+      assert(data != NULL,                "need data for type check");
+      assert(data->is_ReceiverTypeData(), "need ReceiverTypeData for type check");
+    }
+    Label profile_cast_success, profile_cast_failure, done;
+    Label *success_target = op->should_profile() ? &profile_cast_success : &done;
+    Label *failure_target = op->should_profile() ? &profile_cast_failure : stub->entry();
+
     __ cmpptr(value, (int32_t)NULL_WORD);
-    __ jcc(Assembler::equal, done);
+    if (op->should_profile()) {
+      Label not_null;
+      __ jccb(Assembler::notEqual, not_null);
+      // Object is null; update MDO and exit
+      Register mdo  = klass_RInfo;
+      __ movoop(mdo, md->constant_encoding());
+      Address data_addr(mdo, md->byte_offset_of_slot(data, DataLayout::header_offset()));
+      int header_bits = DataLayout::flag_mask_to_header_mask(BitData::null_seen_byte_constant());
+      __ orl(data_addr, header_bits);
+      __ jmp(done);
+      __ bind(not_null);
+    } else {
+      __ jcc(Assembler::equal, done);
+    }
+
     add_debug_info_for_null_check_here(op->info_for_exception());
     __ movptr(k_RInfo, Address(array, oopDesc::klass_offset_in_bytes()));
     __ movptr(klass_RInfo, Address(value, oopDesc::klass_offset_in_bytes()));
@@ -1635,7 +1853,7 @@
     // get instance klass
     __ movptr(k_RInfo, Address(k_RInfo, objArrayKlass::element_klass_offset_in_bytes() + sizeof(oopDesc)));
     // perform the fast part of the checking logic
-    __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, &done, stub->entry(), NULL);
+    __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, success_target, failure_target, NULL);
     // call out-of-line instance of __ check_klass_subtype_slow_path(...):
     __ push(klass_RInfo);
     __ push(k_RInfo);
@@ -1644,229 +1862,52 @@
     __ pop(k_RInfo);
     // result is a boolean
     __ cmpl(k_RInfo, 0);
-    __ jcc(Assembler::equal, *stub->entry());
+    __ jcc(Assembler::equal, *failure_target);
+    // fall through to the success case
+
+    if (op->should_profile()) {
+      Register mdo  = klass_RInfo, recv = k_RInfo;
+      __ bind(profile_cast_success);
+      __ movoop(mdo, md->constant_encoding());
+      __ movptr(recv, Address(value, oopDesc::klass_offset_in_bytes()));
+      Label update_done;
+      type_profile_helper(mdo, md, data, recv, &done);
+      __ jmpb(done);
+
+      __ bind(profile_cast_failure);
+      __ movoop(mdo, md->constant_encoding());
+      Address counter_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset()));
+      __ subptr(counter_addr, DataLayout::counter_increment);
+      __ jmp(*stub->entry());
+    }
+
     __ bind(done);
-  } else if (op->code() == lir_checkcast) {
-    // we always need a stub for the failure case.
-    CodeStub* stub = op->stub();
-    Register obj = op->object()->as_register();
-    Register k_RInfo = op->tmp1()->as_register();
-    Register klass_RInfo = op->tmp2()->as_register();
-    Register dst = op->result_opr()->as_register();
-    ciKlass* k = op->klass();
-    Register Rtmp1 = noreg;
-
-    Label done;
-    if (obj == k_RInfo) {
-      k_RInfo = dst;
-    } else if (obj == klass_RInfo) {
-      klass_RInfo = dst;
-    }
-    if (k->is_loaded()) {
-      select_different_registers(obj, dst, k_RInfo, klass_RInfo);
-    } else {
-      Rtmp1 = op->tmp3()->as_register();
-      select_different_registers(obj, dst, k_RInfo, klass_RInfo, Rtmp1);
-    }
-
-    assert_different_registers(obj, k_RInfo, klass_RInfo);
-    if (!k->is_loaded()) {
-      jobject2reg_with_patching(k_RInfo, op->info_for_patch());
-    } else {
-#ifdef _LP64
-      __ movoop(k_RInfo, k->constant_encoding());
-#else
-      k_RInfo = noreg;
-#endif // _LP64
-    }
-    assert(obj != k_RInfo, "must be different");
-    __ cmpptr(obj, (int32_t)NULL_WORD);
-    if (op->profiled_method() != NULL) {
-      ciMethod* method = op->profiled_method();
-      int bci          = op->profiled_bci();
-
-      Label profile_done;
-      __ jcc(Assembler::notEqual, profile_done);
-      // Object is null; update methodDataOop
-      ciMethodData* md = method->method_data();
-      if (md == NULL) {
-        bailout("out of memory building methodDataOop");
-        return;
+  } else
+    if (code == lir_checkcast) {
+      Register obj = op->object()->as_register();
+      Register dst = op->result_opr()->as_register();
+      Label success;
+      emit_typecheck_helper(op, &success, op->stub()->entry(), &success);
+      __ bind(success);
+      if (dst != obj) {
+        __ mov(dst, obj);
       }
-      ciProfileData* data = md->bci_to_data(bci);
-      assert(data != NULL,       "need data for checkcast");
-      assert(data->is_BitData(), "need BitData for checkcast");
-      Register mdo  = klass_RInfo;
-      __ movoop(mdo, md->constant_encoding());
-      Address data_addr(mdo, md->byte_offset_of_slot(data, DataLayout::header_offset()));
-      int header_bits = DataLayout::flag_mask_to_header_mask(BitData::null_seen_byte_constant());
-      __ orl(data_addr, header_bits);
-      __ jmp(done);
-      __ bind(profile_done);
-    } else {
-      __ jcc(Assembler::equal, done);
-    }
-    __ verify_oop(obj);
-
-    if (op->fast_check()) {
-      // get object classo
-      // not a safepoint as obj null check happens earlier
-      if (k->is_loaded()) {
-#ifdef _LP64
-        __ cmpptr(k_RInfo, Address(obj, oopDesc::klass_offset_in_bytes()));
-#else
-        __ cmpoop(Address(obj, oopDesc::klass_offset_in_bytes()), k->constant_encoding());
-#endif // _LP64
-      } else {
-        __ cmpptr(k_RInfo, Address(obj, oopDesc::klass_offset_in_bytes()));
-
-      }
-      __ jcc(Assembler::notEqual, *stub->entry());
-      __ bind(done);
-    } else {
-      // get object class
-      // not a safepoint as obj null check happens earlier
-      __ movptr(klass_RInfo, Address(obj, oopDesc::klass_offset_in_bytes()));
-      if (k->is_loaded()) {
-        // See if we get an immediate positive hit
-#ifdef _LP64
-        __ cmpptr(k_RInfo, Address(klass_RInfo, k->super_check_offset()));
-#else
-        __ cmpoop(Address(klass_RInfo, k->super_check_offset()), k->constant_encoding());
-#endif // _LP64
-        if (sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes() != k->super_check_offset()) {
-          __ jcc(Assembler::notEqual, *stub->entry());
-        } else {
-          // See if we get an immediate positive hit
-          __ jcc(Assembler::equal, done);
-          // check for self
-#ifdef _LP64
-          __ cmpptr(klass_RInfo, k_RInfo);
-#else
-          __ cmpoop(klass_RInfo, k->constant_encoding());
-#endif // _LP64
-          __ jcc(Assembler::equal, done);
-
-          __ push(klass_RInfo);
-#ifdef _LP64
-          __ push(k_RInfo);
-#else
-          __ pushoop(k->constant_encoding());
-#endif // _LP64
-          __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::slow_subtype_check_id)));
-          __ pop(klass_RInfo);
-          __ pop(klass_RInfo);
-          // result is a boolean
-          __ cmpl(klass_RInfo, 0);
-          __ jcc(Assembler::equal, *stub->entry());
-        }
+    } else
+      if (code == lir_instanceof) {
+        Register obj = op->object()->as_register();
+        Register dst = op->result_opr()->as_register();
+        Label success, failure, done;
+        emit_typecheck_helper(op, &success, &failure, &failure);
+        __ bind(failure);
+        __ xorptr(dst, dst);
+        __ jmpb(done);
+        __ bind(success);
+        __ movptr(dst, 1);
         __ bind(done);
       } else {
-        // perform the fast part of the checking logic
-        __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, &done, stub->entry(), NULL);
-        // call out-of-line instance of __ check_klass_subtype_slow_path(...):
-        __ push(klass_RInfo);
-        __ push(k_RInfo);
-        __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::slow_subtype_check_id)));
-        __ pop(klass_RInfo);
-        __ pop(k_RInfo);
-        // result is a boolean
-        __ cmpl(k_RInfo, 0);
-        __ jcc(Assembler::equal, *stub->entry());
-        __ bind(done);
+        ShouldNotReachHere();
       }
 
-    }
-    if (dst != obj) {
-      __ mov(dst, obj);
-    }
-  } else if (code == lir_instanceof) {
-    Register obj = op->object()->as_register();
-    Register k_RInfo = op->tmp1()->as_register();
-    Register klass_RInfo = op->tmp2()->as_register();
-    Register dst = op->result_opr()->as_register();
-    ciKlass* k = op->klass();
-
-    Label done;
-    Label zero;
-    Label one;
-    if (obj == k_RInfo) {
-      k_RInfo = klass_RInfo;
-      klass_RInfo = obj;
-    }
-    // patching may screw with our temporaries on sparc,
-    // so let's do it before loading the class
-    if (!k->is_loaded()) {
-      jobject2reg_with_patching(k_RInfo, op->info_for_patch());
-    } else {
-      LP64_ONLY(__ movoop(k_RInfo, k->constant_encoding()));
-    }
-    assert(obj != k_RInfo, "must be different");
-
-    __ verify_oop(obj);
-    if (op->fast_check()) {
-      __ cmpptr(obj, (int32_t)NULL_WORD);
-      __ jcc(Assembler::equal, zero);
-      // get object class
-      // not a safepoint as obj null check happens earlier
-      if (LP64_ONLY(false &&) k->is_loaded()) {
-        NOT_LP64(__ cmpoop(Address(obj, oopDesc::klass_offset_in_bytes()), k->constant_encoding()));
-        k_RInfo = noreg;
-      } else {
-        __ cmpptr(k_RInfo, Address(obj, oopDesc::klass_offset_in_bytes()));
-
-      }
-      __ jcc(Assembler::equal, one);
-    } else {
-      // get object class
-      // not a safepoint as obj null check happens earlier
-      __ cmpptr(obj, (int32_t)NULL_WORD);
-      __ jcc(Assembler::equal, zero);
-      __ movptr(klass_RInfo, Address(obj, oopDesc::klass_offset_in_bytes()));
-
-#ifndef _LP64
-      if (k->is_loaded()) {
-        // See if we get an immediate positive hit
-        __ cmpoop(Address(klass_RInfo, k->super_check_offset()), k->constant_encoding());
-        __ jcc(Assembler::equal, one);
-        if (sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes() == k->super_check_offset()) {
-          // check for self
-          __ cmpoop(klass_RInfo, k->constant_encoding());
-          __ jcc(Assembler::equal, one);
-          __ push(klass_RInfo);
-          __ pushoop(k->constant_encoding());
-          __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::slow_subtype_check_id)));
-          __ pop(klass_RInfo);
-          __ pop(dst);
-          __ jmp(done);
-        }
-      }
-        else // next block is unconditional if LP64:
-#endif // LP64
-      {
-        assert(dst != klass_RInfo && dst != k_RInfo, "need 3 registers");
-
-        // perform the fast part of the checking logic
-        __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, dst, &one, &zero, NULL);
-        // call out-of-line instance of __ check_klass_subtype_slow_path(...):
-        __ push(klass_RInfo);
-        __ push(k_RInfo);
-        __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::slow_subtype_check_id)));
-        __ pop(klass_RInfo);
-        __ pop(dst);
-        __ jmp(done);
-      }
-    }
-    __ bind(zero);
-    __ xorptr(dst, dst);
-    __ jmp(done);
-    __ bind(one);
-    __ movptr(dst, 1);
-    __ bind(done);
-  } else {
-    ShouldNotReachHere();
-  }
-
 }
 
 
@@ -1922,7 +1963,6 @@
   }
 }
 
-
 void LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result) {
   Assembler::Condition acond, ncond;
   switch (condition) {
@@ -2014,11 +2054,11 @@
       jint c = right->as_constant_ptr()->as_jint();
       switch (code) {
         case lir_add: {
-          __ increment(lreg, c);
+          __ incrementl(lreg, c);
           break;
         }
         case lir_sub: {
-          __ decrement(lreg, c);
+          __ decrementl(lreg, c);
           break;
         }
         default: ShouldNotReachHere();
@@ -3253,13 +3293,13 @@
   // Perform additional virtual call profiling for invokevirtual and
   // invokeinterface bytecodes
   if ((bc == Bytecodes::_invokevirtual || bc == Bytecodes::_invokeinterface) &&
-      Tier1ProfileVirtualCalls) {
+      C1ProfileVirtualCalls) {
     assert(op->recv()->is_single_cpu(), "recv must be allocated");
     Register recv = op->recv()->as_register();
     assert_different_registers(mdo, recv);
     assert(data->is_VirtualCallData(), "need VirtualCallData for virtual calls");
     ciKlass* known_klass = op->known_holder();
-    if (Tier1OptimizeVirtualCallProfiling && known_klass != NULL) {
+    if (C1OptimizeVirtualCallProfiling && known_klass != NULL) {
       // We know the type that will be seen at this call site; we can
       // statically update the methodDataOop rather than needing to do
       // dynamic tests on the receiver type
@@ -3272,7 +3312,7 @@
         ciKlass* receiver = vc_data->receiver(i);
         if (known_klass->equals(receiver)) {
           Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)));
-          __ addl(data_addr, DataLayout::counter_increment);
+          __ addptr(data_addr, DataLayout::counter_increment);
           return;
         }
       }
@@ -3288,49 +3328,26 @@
           Address recv_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)));
           __ movoop(recv_addr, known_klass->constant_encoding());
           Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)));
-          __ addl(data_addr, DataLayout::counter_increment);
+          __ addptr(data_addr, DataLayout::counter_increment);
           return;
         }
       }
     } else {
       __ movptr(recv, Address(recv, oopDesc::klass_offset_in_bytes()));
       Label update_done;
-      uint i;
-      for (i = 0; i < VirtualCallData::row_limit(); i++) {
-        Label next_test;
-        // See if the receiver is receiver[n].
-        __ cmpptr(recv, Address(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i))));
-        __ jcc(Assembler::notEqual, next_test);
-        Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)));
-        __ addl(data_addr, DataLayout::counter_increment);
-        __ jmp(update_done);
-        __ bind(next_test);
-      }
-
-      // Didn't find receiver; find next empty slot and fill it in
-      for (i = 0; i < VirtualCallData::row_limit(); i++) {
-        Label next_test;
-        Address recv_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)));
-        __ cmpptr(recv_addr, (int32_t)NULL_WORD);
-        __ jcc(Assembler::notEqual, next_test);
-        __ movptr(recv_addr, recv);
-        __ movl(Address(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i))), DataLayout::counter_increment);
-        __ jmp(update_done);
-        __ bind(next_test);
-      }
+      type_profile_helper(mdo, md, data, recv, &update_done);
       // Receiver did not match any saved receiver and there is no empty row for it.
       // Increment total counter to indicate polymorphic case.
-      __ addl(counter_addr, DataLayout::counter_increment);
+      __ addptr(counter_addr, DataLayout::counter_increment);
 
       __ bind(update_done);
     }
   } else {
     // Static call
-    __ addl(counter_addr, DataLayout::counter_increment);
+    __ addptr(counter_addr, DataLayout::counter_increment);
   }
 }
 
-
 void LIR_Assembler::emit_delay(LIR_OpDelay*) {
   Unimplemented();
 }
--- a/src/cpu/x86/vm/c1_LIRAssembler_x86.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -42,7 +42,10 @@
   // method.
   Address as_Address(LIR_Address* addr, Register tmp);
 
-
+  // Record the type of the receiver in ReceiverTypeData
+  void type_profile_helper(Register mdo,
+                           ciMethodData *md, ciProfileData *data,
+                           Register recv, Label* update_done);
 public:
 
   void store_parameter(Register r, int offset_from_esp_in_words);
--- a/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2005, 2009, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -182,10 +182,22 @@
 }
 
 
-void LIRGenerator::increment_counter(address counter, int step) {
+LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
+  LIR_Opr r;
+  if (type == T_LONG) {
+    r = LIR_OprFact::longConst(x);
+  } else if (type == T_INT) {
+    r = LIR_OprFact::intConst(x);
+  } else {
+    ShouldNotReachHere();
+  }
+  return r;
+}
+
+void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
   LIR_Opr pointer = new_pointer_register();
   __ move(LIR_OprFact::intptrConst(counter), pointer);
-  LIR_Address* addr = new LIR_Address(pointer, T_INT);
+  LIR_Address* addr = new LIR_Address(pointer, type);
   increment_counter(addr, step);
 }
 
@@ -194,7 +206,6 @@
   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 }
 
-
 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
   __ cmp_mem_int(condition, base, disp, c, info);
 }
@@ -1145,10 +1156,10 @@
     patching_info = state_for(x, x->state_before());
   }
   obj.load_item();
-  LIR_Opr tmp = new_register(objectType);
   __ instanceof(reg, obj.result(), x->klass(),
-                tmp, new_register(objectType), LIR_OprFact::illegalOpr,
-                x->direct_compare(), patching_info);
+                new_register(objectType), new_register(objectType),
+                !x->klass()->is_loaded() ? new_register(objectType) : LIR_OprFact::illegalOpr,
+                x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
 }
 
 
@@ -1188,8 +1199,7 @@
   // add safepoint before generating condition code so it can be recomputed
   if (x->is_safepoint()) {
     // increment backedge counter if needed
-    increment_backedge_counter(state_for(x, x->state_before()));
-
+    increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
     __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
   }
   set_no_result(x);
@@ -1197,6 +1207,7 @@
   LIR_Opr left = xin->result();
   LIR_Opr right = yin->result();
   __ cmp(lir_cond(cond), left, right);
+  // Generate branch profiling. Profiling code doesn't kill flags.
   profile_branch(x, cond);
   move_to_phi(x->state());
   if (x->x()->type()->is_float_kind()) {
--- a/src/cpu/x86/vm/c1_Runtime1_x86.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/c1_Runtime1_x86.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1068,15 +1068,16 @@
 
       break;
 
-#ifdef TIERED
     case counter_overflow_id:
       {
-        Register bci = rax;
+        Register bci = rax, method = rbx;
         __ enter();
-        OopMap* map = save_live_registers(sasm, 2);
+        OopMap* map = save_live_registers(sasm, 3);
         // Retrieve bci
         __ movl(bci, Address(rbp, 2*BytesPerWord));
-        int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci);
+        // And a pointer to the methodOop
+        __ movptr(method, Address(rbp, 3*BytesPerWord));
+        int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
         oop_maps = new OopMapSet();
         oop_maps->add_gc_map(call_offset, map);
         restore_live_registers(sasm);
@@ -1084,7 +1085,6 @@
         __ ret(0);
       }
       break;
-#endif // TIERED
 
     case new_type_array_id:
     case new_object_array_id:
--- a/src/cpu/x86/vm/c1_globals_x86.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/c1_globals_x86.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2007, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -35,14 +35,7 @@
 define_pd_global(bool, UseOnStackReplacement,        true );
 define_pd_global(bool, TieredCompilation,            false);
 define_pd_global(intx, CompileThreshold,             1500 );
-define_pd_global(intx, Tier2CompileThreshold,        1500 );
-define_pd_global(intx, Tier3CompileThreshold,        2500 );
-define_pd_global(intx, Tier4CompileThreshold,        4500 );
-
 define_pd_global(intx, BackEdgeThreshold,            100000);
-define_pd_global(intx, Tier2BackEdgeThreshold,       100000);
-define_pd_global(intx, Tier3BackEdgeThreshold,       100000);
-define_pd_global(intx, Tier4BackEdgeThreshold,       100000);
 
 define_pd_global(intx, OnStackReplacePercentage,     933  );
 define_pd_global(intx, FreqInlineSize,               325  );
--- a/src/cpu/x86/vm/c2_globals_x86.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/c2_globals_x86.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2007, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -39,19 +39,8 @@
 define_pd_global(bool, ProfileInterpreter,           true);
 #endif // CC_INTERP
 define_pd_global(bool, TieredCompilation,            false);
-#ifdef TIERED
-define_pd_global(intx, CompileThreshold,             1000);
-#else
 define_pd_global(intx, CompileThreshold,             10000);
-#endif // TIERED
-define_pd_global(intx, Tier2CompileThreshold,        10000);
-define_pd_global(intx, Tier3CompileThreshold,        20000);
-define_pd_global(intx, Tier4CompileThreshold,        40000);
-
 define_pd_global(intx, BackEdgeThreshold,            100000);
-define_pd_global(intx, Tier2BackEdgeThreshold,       100000);
-define_pd_global(intx, Tier3BackEdgeThreshold,       100000);
-define_pd_global(intx, Tier4BackEdgeThreshold,       100000);
 
 define_pd_global(intx, OnStackReplacePercentage,     140);
 define_pd_global(intx, ConditionalMoveLimit,         3);
--- a/src/cpu/x86/vm/frame_x86.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/frame_x86.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -141,12 +141,12 @@
     }
 
     // Could just be some random pointer within the codeBlob
-
-    if (!sender_blob->instructions_contains(sender_pc)) return false;
+    if (!sender_blob->code_contains(sender_pc)) {
+      return false;
+    }
 
     // We should never be able to see an adapter if the current frame is something from code cache
-
-    if ( sender_blob->is_adapter_blob()) {
+    if (sender_blob->is_adapter_blob()) {
       return false;
     }
 
@@ -340,7 +340,7 @@
   fr._unextended_sp = unextended_sp;
 
   address original_pc = nm->get_original_pc(&fr);
-  assert(nm->code_contains(original_pc), "original PC must be in nmethod");
+  assert(nm->insts_contains(original_pc), "original PC must be in nmethod");
   assert(nm->is_method_handle_return(original_pc) == is_method_handle_return, "must be");
 }
 #endif
--- a/src/cpu/x86/vm/frame_x86.inline.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/frame_x86.inline.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -63,7 +63,7 @@
   address original_pc = nmethod::get_deopt_original_pc(this);
   if (original_pc != NULL) {
     _pc = original_pc;
-    assert(((nmethod*)_cb)->code_contains(_pc), "original PC must be in nmethod");
+    assert(((nmethod*)_cb)->insts_contains(_pc), "original PC must be in nmethod");
     _deopt_state = is_deoptimized;
   } else {
     _deopt_state = not_deoptimized;
--- a/src/cpu/x86/vm/interp_masm_x86_32.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/interp_masm_x86_32.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1397,3 +1397,17 @@
     NOT_CC_INTERP(pop(state));
   }
 }
+
+// Jump if ((*counter_addr += increment) & mask) satisfies the condition.
+void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
+                                                        int increment, int mask,
+                                                        Register scratch, bool preloaded,
+                                                        Condition cond, Label* where) {
+  if (!preloaded) {
+    movl(scratch, counter_addr);
+  }
+  incrementl(scratch, increment);
+  movl(counter_addr, scratch);
+  andl(scratch, mask);
+  jcc(cond, *where);
+}
--- a/src/cpu/x86/vm/interp_masm_x86_32.hpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/interp_masm_x86_32.hpp	Fri Sep 24 00:51:15 2010 -0700
@@ -185,6 +185,10 @@
                              bool decrement = false);
   void increment_mdp_data_at(Register mdp_in, Register reg, int constant,
                              bool decrement = false);
+  void increment_mask_and_jump(Address counter_addr,
+                               int increment, int mask,
+                               Register scratch, bool preloaded,
+                               Condition cond, Label* where);
   void set_mdp_flag_at(Register mdp_in, int flag_constant);
   void test_mdp_data_at(Register mdp_in, int offset, Register value,
                         Register test_value_out,
--- a/src/cpu/x86/vm/interp_masm_x86_64.cpp	Thu Sep 23 17:33:27 2010 -0700
+++ b/src/cpu/x86/vm/interp_masm_x86_64.cpp	Fri Sep 24 00:51:15 2010 -0700
@@ -1480,3 +1480,17 @@
     NOT_CC_INTERP(pop(state));
   }
 }
+
+// Jump if ((*counter_addr += increment) & mask) satisfies the condition.
+void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
+                                                        int increment, int mask,
+                                                        Register scratch, bool preloaded,
+                                                        Condition cond, Label* where) {