changeset 2497:ccf072cdba91

7046893: LP64 problem with double_quadword in c1_LIRAssembler_x86.cpp Summary: Fixed invalid casts in address computation Reviewed-by: kvn, never Contributed-by: thomas.salter@unisys.com
author iveresov
date Tue, 24 May 2011 15:30:05 -0700
parents 7523488edce5
children 28a9fe9534ea
files src/cpu/x86/vm/c1_LIRAssembler_x86.cpp
diffstat 1 files changed, 1 insertions(+), 1 deletions(-) [+]
line wrap: on
line diff
--- a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Tue May 24 12:54:51 2011 -0700
+++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Tue May 24 15:30:05 2011 -0700
@@ -47,7 +47,7 @@
 static jlong* double_quadword(jlong *adr, jlong lo, jlong hi) {
   // Use the expression (adr)&(~0xF) to provide 128-bits aligned address
   // of 128-bits operands for SSE instructions.
-  jlong *operand = (jlong*)(((long)adr)&((long)(~0xF)));
+  jlong *operand = (jlong*)(((intptr_t)adr) & ((intptr_t)(~0xF)));
   // Store the value to a 128-bits operand.
   operand[0] = lo;
   operand[1] = hi;