annotate src/cpu/sparc/vm/c1_Runtime1_sparc.cpp @ 1601:126ea7725993

6953477: Increase portability and flexibility of building Hotspot Summary: A collection of portability improvements including shared code support for PPC, ARM platforms, software floating point, cross compilation support and improvements in error crash detail. Reviewed-by: phh, never, coleenp, dholmes
author bobv
date Tue, 03 Aug 2010 08:13:38 -0400
parents e9ff18c4ace7
children d5d065957597
rev   line source
duke@0 1 /*
trims@1472 2 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
duke@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@0 4 *
duke@0 5 * This code is free software; you can redistribute it and/or modify it
duke@0 6 * under the terms of the GNU General Public License version 2 only, as
duke@0 7 * published by the Free Software Foundation.
duke@0 8 *
duke@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@0 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@0 13 * accompanied this code).
duke@0 14 *
duke@0 15 * You should have received a copy of the GNU General Public License version
duke@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@0 18 *
trims@1472 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1472 20 * or visit www.oracle.com if you need additional information or have any
trims@1472 21 * questions.
duke@0 22 *
duke@0 23 */
duke@0 24
duke@0 25 #include "incls/_precompiled.incl"
duke@0 26 #include "incls/_c1_Runtime1_sparc.cpp.incl"
duke@0 27
duke@0 28 // Implementation of StubAssembler
duke@0 29
duke@0 30 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry_point, int number_of_arguments) {
duke@0 31 // for sparc changing the number of arguments doesn't change
duke@0 32 // anything about the frame size so we'll always lie and claim that
duke@0 33 // we are only passing 1 argument.
duke@0 34 set_num_rt_args(1);
duke@0 35
duke@0 36 assert_not_delayed();
duke@0 37 // bang stack before going to runtime
duke@0 38 set(-os::vm_page_size() + STACK_BIAS, G3_scratch);
duke@0 39 st(G0, SP, G3_scratch);
duke@0 40
duke@0 41 // debugging support
duke@0 42 assert(number_of_arguments >= 0 , "cannot have negative number of arguments");
duke@0 43
duke@0 44 set_last_Java_frame(SP, noreg);
duke@0 45 if (VerifyThread) mov(G2_thread, O0); // about to be smashed; pass early
duke@0 46 save_thread(L7_thread_cache);
duke@0 47 // do the call
duke@0 48 call(entry_point, relocInfo::runtime_call_type);
duke@0 49 if (!VerifyThread) {
duke@0 50 delayed()->mov(G2_thread, O0); // pass thread as first argument
duke@0 51 } else {
duke@0 52 delayed()->nop(); // (thread already passed)
duke@0 53 }
duke@0 54 int call_offset = offset(); // offset of return address
duke@0 55 restore_thread(L7_thread_cache);
duke@0 56 reset_last_Java_frame();
duke@0 57
duke@0 58 // check for pending exceptions
duke@0 59 { Label L;
twisti@727 60 Address exception_addr(G2_thread, Thread::pending_exception_offset());
duke@0 61 ld_ptr(exception_addr, Gtemp);
duke@0 62 br_null(Gtemp, false, pt, L);
duke@0 63 delayed()->nop();
twisti@727 64 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
duke@0 65 st_ptr(G0, vm_result_addr);
twisti@727 66 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
duke@0 67 st_ptr(G0, vm_result_addr_2);
duke@0 68
duke@0 69 if (frame_size() == no_frame_size) {
duke@0 70 // we use O7 linkage so that forward_exception_entry has the issuing PC
duke@0 71 call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
duke@0 72 delayed()->restore();
duke@0 73 } else if (_stub_id == Runtime1::forward_exception_id) {
duke@0 74 should_not_reach_here();
duke@0 75 } else {
twisti@727 76 AddressLiteral exc(Runtime1::entry_for(Runtime1::forward_exception_id));
twisti@727 77 jump_to(exc, G4);
duke@0 78 delayed()->nop();
duke@0 79 }
duke@0 80 bind(L);
duke@0 81 }
duke@0 82
duke@0 83 // get oop result if there is one and reset the value in the thread
duke@0 84 if (oop_result1->is_valid()) { // get oop result if there is one and reset it in the thread
duke@0 85 get_vm_result (oop_result1);
duke@0 86 } else {
duke@0 87 // be a little paranoid and clear the result
twisti@727 88 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
duke@0 89 st_ptr(G0, vm_result_addr);
duke@0 90 }
duke@0 91
duke@0 92 if (oop_result2->is_valid()) {
duke@0 93 get_vm_result_2(oop_result2);
duke@0 94 } else {
duke@0 95 // be a little paranoid and clear the result
twisti@727 96 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
duke@0 97 st_ptr(G0, vm_result_addr_2);
duke@0 98 }
duke@0 99
duke@0 100 return call_offset;
duke@0 101 }
duke@0 102
duke@0 103
duke@0 104 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) {
duke@0 105 // O0 is reserved for the thread
duke@0 106 mov(arg1, O1);
duke@0 107 return call_RT(oop_result1, oop_result2, entry, 1);
duke@0 108 }
duke@0 109
duke@0 110
duke@0 111 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) {
duke@0 112 // O0 is reserved for the thread
duke@0 113 mov(arg1, O1);
duke@0 114 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
duke@0 115 return call_RT(oop_result1, oop_result2, entry, 2);
duke@0 116 }
duke@0 117
duke@0 118
duke@0 119 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) {
duke@0 120 // O0 is reserved for the thread
duke@0 121 mov(arg1, O1);
duke@0 122 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
duke@0 123 mov(arg3, O3); assert(arg3 != O1 && arg3 != O2, "smashed argument");
duke@0 124 return call_RT(oop_result1, oop_result2, entry, 3);
duke@0 125 }
duke@0 126
duke@0 127
duke@0 128 // Implementation of Runtime1
duke@0 129
duke@0 130 #define __ sasm->
duke@0 131
duke@0 132 static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
duke@0 133 static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
duke@0 134 static int reg_save_size_in_words;
duke@0 135 static int frame_size_in_bytes = -1;
duke@0 136
duke@0 137 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
duke@0 138 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
duke@0 139 " mismatch in calculation");
duke@0 140 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
duke@0 141 int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
duke@0 142 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
duke@0 143
duke@0 144 int i;
duke@0 145 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
duke@0 146 Register r = as_Register(i);
duke@0 147 if (r == G1 || r == G3 || r == G4 || r == G5) {
duke@0 148 int sp_offset = cpu_reg_save_offsets[i];
duke@0 149 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
duke@0 150 r->as_VMReg());
duke@0 151 }
duke@0 152 }
duke@0 153
duke@0 154 if (save_fpu_registers) {
duke@0 155 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
duke@0 156 FloatRegister r = as_FloatRegister(i);
duke@0 157 int sp_offset = fpu_reg_save_offsets[i];
duke@0 158 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
duke@0 159 r->as_VMReg());
duke@0 160 }
duke@0 161 }
duke@0 162 return oop_map;
duke@0 163 }
duke@0 164
duke@0 165 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true) {
duke@0 166 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
duke@0 167 " mismatch in calculation");
duke@0 168 __ save_frame_c1(frame_size_in_bytes);
duke@0 169 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
duke@0 170
duke@0 171 // Record volatile registers as callee-save values in an OopMap so their save locations will be
duke@0 172 // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for
duke@0 173 // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers
duke@0 174 // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame
duke@0 175 // (as the stub's I's) when the runtime routine called by the stub creates its frame.
duke@0 176 // OopMap frame sizes are in c2 stack slot sizes (sizeof(jint))
duke@0 177
duke@0 178 int i;
duke@0 179 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
duke@0 180 Register r = as_Register(i);
duke@0 181 if (r == G1 || r == G3 || r == G4 || r == G5) {
duke@0 182 int sp_offset = cpu_reg_save_offsets[i];
duke@0 183 __ st_ptr(r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
duke@0 184 }
duke@0 185 }
duke@0 186
duke@0 187 if (save_fpu_registers) {
duke@0 188 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
duke@0 189 FloatRegister r = as_FloatRegister(i);
duke@0 190 int sp_offset = fpu_reg_save_offsets[i];
duke@0 191 __ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
duke@0 192 }
duke@0 193 }
duke@0 194
duke@0 195 return generate_oop_map(sasm, save_fpu_registers);
duke@0 196 }
duke@0 197
duke@0 198 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
duke@0 199 for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
duke@0 200 Register r = as_Register(i);
duke@0 201 if (r == G1 || r == G3 || r == G4 || r == G5) {
duke@0 202 __ ld_ptr(SP, (cpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
duke@0 203 }
duke@0 204 }
duke@0 205
duke@0 206 if (restore_fpu_registers) {
duke@0 207 for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
duke@0 208 FloatRegister r = as_FloatRegister(i);
duke@0 209 __ ldf(FloatRegisterImpl::S, SP, (fpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
duke@0 210 }
duke@0 211 }
duke@0 212 }
duke@0 213
duke@0 214
duke@0 215 void Runtime1::initialize_pd() {
duke@0 216 // compute word offsets from SP at which live (non-windowed) registers are captured by stub routines
duke@0 217 //
duke@0 218 // A stub routine will have a frame that is at least large enough to hold
duke@0 219 // a register window save area (obviously) and the volatile g registers
duke@0 220 // and floating registers. A user of save_live_registers can have a frame
duke@0 221 // that has more scratch area in it (although typically they will use L-regs).
duke@0 222 // in that case the frame will look like this (stack growing down)
duke@0 223 //
duke@0 224 // FP -> | |
duke@0 225 // | scratch mem |
duke@0 226 // | " " |
duke@0 227 // --------------
duke@0 228 // | float regs |
duke@0 229 // | " " |
duke@0 230 // ---------------
duke@0 231 // | G regs |
duke@0 232 // | " " |
duke@0 233 // ---------------
duke@0 234 // | abi reg. |
duke@0 235 // | window save |
duke@0 236 // | area |
duke@0 237 // SP -> ---------------
duke@0 238 //
duke@0 239 int i;
duke@0 240 int sp_offset = round_to(frame::register_save_words, 2); // start doubleword aligned
duke@0 241
duke@0 242 // only G int registers are saved explicitly; others are found in register windows
duke@0 243 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
duke@0 244 Register r = as_Register(i);
duke@0 245 if (r == G1 || r == G3 || r == G4 || r == G5) {
duke@0 246 cpu_reg_save_offsets[i] = sp_offset;
duke@0 247 sp_offset++;
duke@0 248 }
duke@0 249 }
duke@0 250
duke@0 251 // all float registers are saved explicitly
duke@0 252 assert(FrameMap::nof_fpu_regs == 32, "double registers not handled here");
duke@0 253 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
duke@0 254 fpu_reg_save_offsets[i] = sp_offset;
duke@0 255 sp_offset++;
duke@0 256 }
duke@0 257 reg_save_size_in_words = sp_offset - frame::memory_parameter_word_sp_offset;
duke@0 258 // this should match assembler::total_frame_size_in_bytes, which
duke@0 259 // isn't callable from this context. It's checked by an assert when
duke@0 260 // it's used though.
duke@0 261 frame_size_in_bytes = align_size_up(sp_offset * wordSize, 8);
duke@0 262 }
duke@0 263
duke@0 264
duke@0 265 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
duke@0 266 // make a frame and preserve the caller's caller-save registers
duke@0 267 OopMap* oop_map = save_live_registers(sasm);
duke@0 268 int call_offset;
duke@0 269 if (!has_argument) {
duke@0 270 call_offset = __ call_RT(noreg, noreg, target);
duke@0 271 } else {
duke@0 272 call_offset = __ call_RT(noreg, noreg, target, G4);
duke@0 273 }
duke@0 274 OopMapSet* oop_maps = new OopMapSet();
duke@0 275 oop_maps->add_gc_map(call_offset, oop_map);
duke@0 276
duke@0 277 __ should_not_reach_here();
duke@0 278 return oop_maps;
duke@0 279 }
duke@0 280
duke@0 281
duke@0 282 OopMapSet* Runtime1::generate_stub_call(StubAssembler* sasm, Register result, address target,
duke@0 283 Register arg1, Register arg2, Register arg3) {
duke@0 284 // make a frame and preserve the caller's caller-save registers
duke@0 285 OopMap* oop_map = save_live_registers(sasm);
duke@0 286
duke@0 287 int call_offset;
duke@0 288 if (arg1 == noreg) {
duke@0 289 call_offset = __ call_RT(result, noreg, target);
duke@0 290 } else if (arg2 == noreg) {
duke@0 291 call_offset = __ call_RT(result, noreg, target, arg1);
duke@0 292 } else if (arg3 == noreg) {
duke@0 293 call_offset = __ call_RT(result, noreg, target, arg1, arg2);
duke@0 294 } else {
duke@0 295 call_offset = __ call_RT(result, noreg, target, arg1, arg2, arg3);
duke@0 296 }
duke@0 297 OopMapSet* oop_maps = NULL;
duke@0 298
duke@0 299 oop_maps = new OopMapSet();
duke@0 300 oop_maps->add_gc_map(call_offset, oop_map);
duke@0 301 restore_live_registers(sasm);
duke@0 302
duke@0 303 __ ret();
duke@0 304 __ delayed()->restore();
duke@0 305
duke@0 306 return oop_maps;
duke@0 307 }
duke@0 308
duke@0 309
duke@0 310 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
duke@0 311 // make a frame and preserve the caller's caller-save registers
duke@0 312 OopMap* oop_map = save_live_registers(sasm);
duke@0 313
duke@0 314 // call the runtime patching routine, returns non-zero if nmethod got deopted.
duke@0 315 int call_offset = __ call_RT(noreg, noreg, target);
duke@0 316 OopMapSet* oop_maps = new OopMapSet();
duke@0 317 oop_maps->add_gc_map(call_offset, oop_map);
duke@0 318
duke@0 319 // re-execute the patched instruction or, if the nmethod was deoptmized, return to the
duke@0 320 // deoptimization handler entry that will cause re-execution of the current bytecode
duke@0 321 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
duke@0 322 assert(deopt_blob != NULL, "deoptimization blob must have been created");
duke@0 323
duke@0 324 Label no_deopt;
duke@0 325 __ tst(O0);
duke@0 326 __ brx(Assembler::equal, false, Assembler::pt, no_deopt);
duke@0 327 __ delayed()->nop();
duke@0 328
duke@0 329 // return to the deoptimization handler entry for unpacking and rexecute
duke@0 330 // if we simply returned the we'd deopt as if any call we patched had just
duke@0 331 // returned.
duke@0 332
duke@0 333 restore_live_registers(sasm);
duke@0 334 __ restore();
duke@0 335 __ br(Assembler::always, false, Assembler::pt, deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type);
duke@0 336 __ delayed()->nop();
duke@0 337
duke@0 338 __ bind(no_deopt);
duke@0 339 restore_live_registers(sasm);
duke@0 340 __ ret();
duke@0 341 __ delayed()->restore();
duke@0 342
duke@0 343 return oop_maps;
duke@0 344 }
duke@0 345
duke@0 346 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
duke@0 347
duke@0 348 OopMapSet* oop_maps = NULL;
duke@0 349 // for better readability
duke@0 350 const bool must_gc_arguments = true;
duke@0 351 const bool dont_gc_arguments = false;
duke@0 352
duke@0 353 // stub code & info for the different stubs
duke@0 354 switch (id) {
duke@0 355 case forward_exception_id:
duke@0 356 {
duke@0 357 // we're handling an exception in the context of a compiled
duke@0 358 // frame. The registers have been saved in the standard
duke@0 359 // places. Perform an exception lookup in the caller and
duke@0 360 // dispatch to the handler if found. Otherwise unwind and
duke@0 361 // dispatch to the callers exception handler.
duke@0 362
duke@0 363 oop_maps = new OopMapSet();
duke@0 364 OopMap* oop_map = generate_oop_map(sasm, true);
duke@0 365
duke@0 366 // transfer the pending exception to the exception_oop
duke@0 367 __ ld_ptr(G2_thread, in_bytes(JavaThread::pending_exception_offset()), Oexception);
duke@0 368 __ ld_ptr(Oexception, 0, G0);
duke@0 369 __ st_ptr(G0, G2_thread, in_bytes(JavaThread::pending_exception_offset()));
duke@0 370 __ add(I7, frame::pc_return_offset, Oissuing_pc);
duke@0 371
duke@0 372 generate_handle_exception(sasm, oop_maps, oop_map);
duke@0 373 __ should_not_reach_here();
duke@0 374 }
duke@0 375 break;
duke@0 376
duke@0 377 case new_instance_id:
duke@0 378 case fast_new_instance_id:
duke@0 379 case fast_new_instance_init_check_id:
duke@0 380 {
duke@0 381 Register G5_klass = G5; // Incoming
duke@0 382 Register O0_obj = O0; // Outgoing
duke@0 383
duke@0 384 if (id == new_instance_id) {
duke@0 385 __ set_info("new_instance", dont_gc_arguments);
duke@0 386 } else if (id == fast_new_instance_id) {
duke@0 387 __ set_info("fast new_instance", dont_gc_arguments);
duke@0 388 } else {
duke@0 389 assert(id == fast_new_instance_init_check_id, "bad StubID");
duke@0 390 __ set_info("fast new_instance init check", dont_gc_arguments);
duke@0 391 }
duke@0 392
duke@0 393 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
duke@0 394 UseTLAB && FastTLABRefill) {
duke@0 395 Label slow_path;
duke@0 396 Register G1_obj_size = G1;
duke@0 397 Register G3_t1 = G3;
duke@0 398 Register G4_t2 = G4;
duke@0 399 assert_different_registers(G5_klass, G1_obj_size, G3_t1, G4_t2);
duke@0 400
duke@0 401 // Push a frame since we may do dtrace notification for the
duke@0 402 // allocation which requires calling out and we don't want
duke@0 403 // to stomp the real return address.
duke@0 404 __ save_frame(0);
duke@0 405
duke@0 406 if (id == fast_new_instance_init_check_id) {
duke@0 407 // make sure the klass is initialized
duke@0 408 __ ld(G5_klass, instanceKlass::init_state_offset_in_bytes() + sizeof(oopDesc), G3_t1);
duke@0 409 __ cmp(G3_t1, instanceKlass::fully_initialized);
duke@0 410 __ br(Assembler::notEqual, false, Assembler::pn, slow_path);
duke@0 411 __ delayed()->nop();
duke@0 412 }
duke@0 413 #ifdef ASSERT
duke@0 414 // assert object can be fast path allocated
duke@0 415 {
duke@0 416 Label ok, not_ok;
duke@0 417 __ ld(G5_klass, Klass::layout_helper_offset_in_bytes() + sizeof(oopDesc), G1_obj_size);
duke@0 418 __ cmp(G1_obj_size, 0); // make sure it's an instance (LH > 0)
duke@0 419 __ br(Assembler::lessEqual, false, Assembler::pn, not_ok);
duke@0 420 __ delayed()->nop();
duke@0 421 __ btst(Klass::_lh_instance_slow_path_bit, G1_obj_size);
duke@0 422 __ br(Assembler::zero, false, Assembler::pn, ok);
duke@0 423 __ delayed()->nop();
duke@0 424 __ bind(not_ok);
duke@0 425 __ stop("assert(can be fast path allocated)");
duke@0 426 __ should_not_reach_here();
duke@0 427 __ bind(ok);
duke@0 428 }
duke@0 429 #endif // ASSERT
duke@0 430 // if we got here then the TLAB allocation failed, so try
duke@0 431 // refilling the TLAB or allocating directly from eden.
duke@0 432 Label retry_tlab, try_eden;
duke@0 433 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G5_klass
duke@0 434
duke@0 435 __ bind(retry_tlab);
duke@0 436
duke@0 437 // get the instance size
duke@0 438 __ ld(G5_klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), G1_obj_size);
duke@0 439 __ tlab_allocate(O0_obj, G1_obj_size, 0, G3_t1, slow_path);
duke@0 440 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
duke@0 441 __ verify_oop(O0_obj);
duke@0 442 __ mov(O0, I0);
duke@0 443 __ ret();
duke@0 444 __ delayed()->restore();
duke@0 445
duke@0 446 __ bind(try_eden);
duke@0 447 // get the instance size
duke@0 448 __ ld(G5_klass, klassOopDesc::header_size() * HeapWordSize + Klass::layout_helper_offset_in_bytes(), G1_obj_size);
duke@0 449 __ eden_allocate(O0_obj, G1_obj_size, 0, G3_t1, G4_t2, slow_path);
duke@0 450 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2);
duke@0 451 __ verify_oop(O0_obj);
duke@0 452 __ mov(O0, I0);
duke@0 453 __ ret();
duke@0 454 __ delayed()->restore();
duke@0 455
duke@0 456 __ bind(slow_path);
duke@0 457
duke@0 458 // pop this frame so generate_stub_call can push it's own
duke@0 459 __ restore();
duke@0 460 }
duke@0 461
duke@0 462 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_instance), G5_klass);
duke@0 463 // I0->O0: new instance
duke@0 464 }
duke@0 465
duke@0 466 break;
duke@0 467
duke@0 468 #ifdef TIERED
duke@0 469 case counter_overflow_id:
duke@0 470 // G4 contains bci
duke@0 471 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, counter_overflow), G4);
duke@0 472 break;
duke@0 473 #endif // TIERED
duke@0 474
duke@0 475 case new_type_array_id:
duke@0 476 case new_object_array_id:
duke@0 477 {
duke@0 478 Register G5_klass = G5; // Incoming
duke@0 479 Register G4_length = G4; // Incoming
duke@0 480 Register O0_obj = O0; // Outgoing
duke@0 481
twisti@727 482 Address klass_lh(G5_klass, ((klassOopDesc::header_size() * HeapWordSize)
twisti@727 483 + Klass::layout_helper_offset_in_bytes()));
duke@0 484 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
duke@0 485 assert(Klass::_lh_header_size_mask == 0xFF, "bytewise");
duke@0 486 // Use this offset to pick out an individual byte of the layout_helper:
duke@0 487 const int klass_lh_header_size_offset = ((BytesPerInt - 1) // 3 - 2 selects byte {0,1,0,0}
duke@0 488 - Klass::_lh_header_size_shift / BitsPerByte);
duke@0 489
duke@0 490 if (id == new_type_array_id) {
duke@0 491 __ set_info("new_type_array", dont_gc_arguments);
duke@0 492 } else {
duke@0 493 __ set_info("new_object_array", dont_gc_arguments);
duke@0 494 }
duke@0 495
duke@0 496 #ifdef ASSERT
duke@0 497 // assert object type is really an array of the proper kind
duke@0 498 {
duke@0 499 Label ok;
duke@0 500 Register G3_t1 = G3;
duke@0 501 __ ld(klass_lh, G3_t1);
duke@0 502 __ sra(G3_t1, Klass::_lh_array_tag_shift, G3_t1);
duke@0 503 int tag = ((id == new_type_array_id)
duke@0 504 ? Klass::_lh_array_tag_type_value
duke@0 505 : Klass::_lh_array_tag_obj_value);
duke@0 506 __ cmp(G3_t1, tag);
duke@0 507 __ brx(Assembler::equal, false, Assembler::pt, ok);
duke@0 508 __ delayed()->nop();
duke@0 509 __ stop("assert(is an array klass)");
duke@0 510 __ should_not_reach_here();
duke@0 511 __ bind(ok);
duke@0 512 }
duke@0 513 #endif // ASSERT
duke@0 514
duke@0 515 if (UseTLAB && FastTLABRefill) {
duke@0 516 Label slow_path;
duke@0 517 Register G1_arr_size = G1;
duke@0 518 Register G3_t1 = G3;
duke@0 519 Register O1_t2 = O1;
duke@0 520 assert_different_registers(G5_klass, G4_length, G1_arr_size, G3_t1, O1_t2);
duke@0 521
duke@0 522 // check that array length is small enough for fast path
duke@0 523 __ set(C1_MacroAssembler::max_array_allocation_length, G3_t1);
duke@0 524 __ cmp(G4_length, G3_t1);
duke@0 525 __ br(Assembler::greaterUnsigned, false, Assembler::pn, slow_path);
duke@0 526 __ delayed()->nop();
duke@0 527
duke@0 528 // if we got here then the TLAB allocation failed, so try
duke@0 529 // refilling the TLAB or allocating directly from eden.
duke@0 530 Label retry_tlab, try_eden;
duke@0 531 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G4_length and G5_klass
duke@0 532
duke@0 533 __ bind(retry_tlab);
duke@0 534
duke@0 535 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
duke@0 536 __ ld(klass_lh, G3_t1);
duke@0 537 __ sll(G4_length, G3_t1, G1_arr_size);
duke@0 538 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
duke@0 539 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
duke@0 540 __ add(G1_arr_size, G3_t1, G1_arr_size);
duke@0 541 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size); // align up
duke@0 542 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
duke@0 543
duke@0 544 __ tlab_allocate(O0_obj, G1_arr_size, 0, G3_t1, slow_path); // preserves G1_arr_size
duke@0 545
duke@0 546 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
duke@0 547 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
duke@0 548 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
duke@0 549 __ add(O0_obj, G3_t1, G3_t1); // body start
duke@0 550 __ initialize_body(G3_t1, O1_t2);
duke@0 551 __ verify_oop(O0_obj);
duke@0 552 __ retl();
duke@0 553 __ delayed()->nop();
duke@0 554
duke@0 555 __ bind(try_eden);
duke@0 556 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
duke@0 557 __ ld(klass_lh, G3_t1);
duke@0 558 __ sll(G4_length, G3_t1, G1_arr_size);
duke@0 559 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
duke@0 560 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
duke@0 561 __ add(G1_arr_size, G3_t1, G1_arr_size);
duke@0 562 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size);
duke@0 563 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
duke@0 564
duke@0 565 __ eden_allocate(O0_obj, G1_arr_size, 0, G3_t1, O1_t2, slow_path); // preserves G1_arr_size
duke@0 566
duke@0 567 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
duke@0 568 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
duke@0 569 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
duke@0 570 __ add(O0_obj, G3_t1, G3_t1); // body start
duke@0 571 __ initialize_body(G3_t1, O1_t2);
duke@0 572 __ verify_oop(O0_obj);
duke@0 573 __ retl();
duke@0 574 __ delayed()->nop();
duke@0 575
duke@0 576 __ bind(slow_path);
duke@0 577 }
duke@0 578
duke@0 579 if (id == new_type_array_id) {
duke@0 580 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_type_array), G5_klass, G4_length);
duke@0 581 } else {
duke@0 582 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_object_array), G5_klass, G4_length);
duke@0 583 }
duke@0 584 // I0 -> O0: new array
duke@0 585 }
duke@0 586 break;
duke@0 587
duke@0 588 case new_multi_array_id:
duke@0 589 { // O0: klass
duke@0 590 // O1: rank
duke@0 591 // O2: address of 1st dimension
duke@0 592 __ set_info("new_multi_array", dont_gc_arguments);
duke@0 593 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_multi_array), I0, I1, I2);
duke@0 594 // I0 -> O0: new multi array
duke@0 595 }
duke@0 596 break;
duke@0 597
duke@0 598 case register_finalizer_id:
duke@0 599 {
duke@0 600 __ set_info("register_finalizer", dont_gc_arguments);
duke@0 601
duke@0 602 // load the klass and check the has finalizer flag
duke@0 603 Label register_finalizer;
duke@0 604 Register t = O1;
duke@0 605 __ ld_ptr(O0, oopDesc::klass_offset_in_bytes(), t);
duke@0 606 __ ld(t, Klass::access_flags_offset_in_bytes() + sizeof(oopDesc), t);
duke@0 607 __ set(JVM_ACC_HAS_FINALIZER, G3);
duke@0 608 __ andcc(G3, t, G0);
duke@0 609 __ br(Assembler::notZero, false, Assembler::pt, register_finalizer);
duke@0 610 __ delayed()->nop();
duke@0 611
duke@0 612 // do a leaf return
duke@0 613 __ retl();
duke@0 614 __ delayed()->nop();
duke@0 615
duke@0 616 __ bind(register_finalizer);
duke@0 617 OopMap* oop_map = save_live_registers(sasm);
duke@0 618 int call_offset = __ call_RT(noreg, noreg,
duke@0 619 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), I0);
duke@0 620 oop_maps = new OopMapSet();
duke@0 621 oop_maps->add_gc_map(call_offset, oop_map);
duke@0 622
duke@0 623 // Now restore all the live registers
duke@0 624 restore_live_registers(sasm);
duke@0 625
duke@0 626 __ ret();
duke@0 627 __ delayed()->restore();
duke@0 628 }
duke@0 629 break;
duke@0 630
duke@0 631 case throw_range_check_failed_id:
duke@0 632 { __ set_info("range_check_failed", dont_gc_arguments); // arguments will be discarded
duke@0 633 // G4: index
duke@0 634 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
duke@0 635 }
duke@0 636 break;
duke@0 637
duke@0 638 case throw_index_exception_id:
duke@0 639 { __ set_info("index_range_check_failed", dont_gc_arguments); // arguments will be discarded
duke@0 640 // G4: index
duke@0 641 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
duke@0 642 }
duke@0 643 break;
duke@0 644
duke@0 645 case throw_div0_exception_id:
duke@0 646 { __ set_info("throw_div0_exception", dont_gc_arguments);
duke@0 647 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
duke@0 648 }
duke@0 649 break;
duke@0 650
duke@0 651 case throw_null_pointer_exception_id:
duke@0 652 { __ set_info("throw_null_pointer_exception", dont_gc_arguments);
duke@0 653 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
duke@0 654 }
duke@0 655 break;
duke@0 656
duke@0 657 case handle_exception_id:
duke@0 658 {
duke@0 659 __ set_info("handle_exception", dont_gc_arguments);
duke@0 660 // make a frame and preserve the caller's caller-save registers
duke@0 661
duke@0 662 oop_maps = new OopMapSet();
duke@0 663 OopMap* oop_map = save_live_registers(sasm);
duke@0 664 __ mov(Oexception->after_save(), Oexception);
duke@0 665 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
duke@0 666 generate_handle_exception(sasm, oop_maps, oop_map);
duke@0 667 }
duke@0 668 break;
duke@0 669
duke@0 670 case unwind_exception_id:
duke@0 671 {
duke@0 672 // O0: exception
duke@0 673 // I7: address of call to this method
duke@0 674
duke@0 675 __ set_info("unwind_exception", dont_gc_arguments);
duke@0 676 __ mov(Oexception, Oexception->after_save());
duke@0 677 __ add(I7, frame::pc_return_offset, Oissuing_pc->after_save());
duke@0 678
duke@0 679 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address),
twisti@1295 680 G2_thread, Oissuing_pc->after_save());
duke@0 681 __ verify_not_null_oop(Oexception->after_save());
twisti@1484 682
twisti@1484 683 // Restore SP from L7 if the exception PC is a MethodHandle call site.
twisti@1484 684 __ mov(O0, G5); // Save the target address.
twisti@1484 685 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
twisti@1484 686 __ tst(L0); // Condition codes are preserved over the restore.
twisti@1484 687 __ restore();
twisti@1484 688
twisti@1484 689 __ jmp(G5, 0);
twisti@1484 690 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
duke@0 691 }
duke@0 692 break;
duke@0 693
duke@0 694 case throw_array_store_exception_id:
duke@0 695 {
duke@0 696 __ set_info("throw_array_store_exception", dont_gc_arguments);
duke@0 697 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), false);
duke@0 698 }
duke@0 699 break;
duke@0 700
duke@0 701 case throw_class_cast_exception_id:
duke@0 702 {
duke@0 703 // G4: object
duke@0 704 __ set_info("throw_class_cast_exception", dont_gc_arguments);
duke@0 705 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
duke@0 706 }
duke@0 707 break;
duke@0 708
duke@0 709 case throw_incompatible_class_change_error_id:
duke@0 710 {
duke@0 711 __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
duke@0 712 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
duke@0 713 }
duke@0 714 break;
duke@0 715
duke@0 716 case slow_subtype_check_id:
duke@0 717 { // Support for uint StubRoutine::partial_subtype_check( Klass sub, Klass super );
duke@0 718 // Arguments :
duke@0 719 //
duke@0 720 // ret : G3
duke@0 721 // sub : G3, argument, destroyed
duke@0 722 // super: G1, argument, not changed
duke@0 723 // raddr: O7, blown by call
jrose@644 724 Label miss;
duke@0 725
duke@0 726 __ save_frame(0); // Blow no registers!
duke@0 727
jrose@644 728 __ check_klass_subtype_slow_path(G3, G1, L0, L1, L2, L4, NULL, &miss);
duke@0 729
duke@0 730 __ mov(1, G3);
jrose@644 731 __ ret(); // Result in G5 is 'true'
duke@0 732 __ delayed()->restore(); // free copy or add can go here
duke@0 733
duke@0 734 __ bind(miss);
duke@0 735 __ mov(0, G3);
jrose@644 736 __ ret(); // Result in G5 is 'false'
duke@0 737 __ delayed()->restore(); // free copy or add can go here
duke@0 738 }
duke@0 739
duke@0 740 case monitorenter_nofpu_id:
duke@0 741 case monitorenter_id:
duke@0 742 { // G4: object
duke@0 743 // G5: lock address
duke@0 744 __ set_info("monitorenter", dont_gc_arguments);
duke@0 745
duke@0 746 int save_fpu_registers = (id == monitorenter_id);
duke@0 747 // make a frame and preserve the caller's caller-save registers
duke@0 748 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
duke@0 749
duke@0 750 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), G4, G5);
duke@0 751
duke@0 752 oop_maps = new OopMapSet();
duke@0 753 oop_maps->add_gc_map(call_offset, oop_map);
duke@0 754 restore_live_registers(sasm, save_fpu_registers);
duke@0 755
duke@0 756 __ ret();
duke@0 757 __ delayed()->restore();
duke@0 758 }
duke@0 759 break;
duke@0 760
duke@0 761 case monitorexit_nofpu_id:
duke@0 762 case monitorexit_id:
duke@0 763 { // G4: lock address
duke@0 764 // note: really a leaf routine but must setup last java sp
duke@0 765 // => use call_RT for now (speed can be improved by
duke@0 766 // doing last java sp setup manually)
duke@0 767 __ set_info("monitorexit", dont_gc_arguments);
duke@0 768
duke@0 769 int save_fpu_registers = (id == monitorexit_id);
duke@0 770 // make a frame and preserve the caller's caller-save registers
duke@0 771 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
duke@0 772
duke@0 773 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), G4);
duke@0 774
duke@0 775 oop_maps = new OopMapSet();
duke@0 776 oop_maps->add_gc_map(call_offset, oop_map);
duke@0 777 restore_live_registers(sasm, save_fpu_registers);
duke@0 778
duke@0 779 __ ret();
duke@0 780 __ delayed()->restore();
duke@0 781
duke@0 782 }
duke@0 783 break;
duke@0 784
duke@0 785 case access_field_patching_id:
duke@0 786 { __ set_info("access_field_patching", dont_gc_arguments);
duke@0 787 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
duke@0 788 }
duke@0 789 break;
duke@0 790
duke@0 791 case load_klass_patching_id:
duke@0 792 { __ set_info("load_klass_patching", dont_gc_arguments);
duke@0 793 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
duke@0 794 }
duke@0 795 break;
duke@0 796
duke@0 797 case jvmti_exception_throw_id:
duke@0 798 { // Oexception : exception
duke@0 799 __ set_info("jvmti_exception_throw", dont_gc_arguments);
duke@0 800 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, Runtime1::post_jvmti_exception_throw), I0);
duke@0 801 }
duke@0 802 break;
duke@0 803
duke@0 804 case dtrace_object_alloc_id:
duke@0 805 { // O0: object
duke@0 806 __ set_info("dtrace_object_alloc", dont_gc_arguments);
duke@0 807 // we can't gc here so skip the oopmap but make sure that all
duke@0 808 // the live registers get saved.
duke@0 809 save_live_registers(sasm);
duke@0 810
duke@0 811 __ save_thread(L7_thread_cache);
duke@0 812 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
duke@0 813 relocInfo::runtime_call_type);
duke@0 814 __ delayed()->mov(I0, O0);
duke@0 815 __ restore_thread(L7_thread_cache);
duke@0 816
duke@0 817 restore_live_registers(sasm);
duke@0 818 __ ret();
duke@0 819 __ delayed()->restore();
duke@0 820 }
duke@0 821 break;
duke@0 822
ysr@342 823 #ifndef SERIALGC
ysr@342 824 case g1_pre_barrier_slow_id:
ysr@342 825 { // G4: previous value of memory
ysr@342 826 BarrierSet* bs = Universe::heap()->barrier_set();
ysr@342 827 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
ysr@342 828 __ save_frame(0);
ysr@342 829 __ set((int)id, O1);
ysr@342 830 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
ysr@342 831 __ should_not_reach_here();
ysr@342 832 break;
ysr@342 833 }
ysr@342 834
ysr@342 835 __ set_info("g1_pre_barrier_slow_id", dont_gc_arguments);
ysr@342 836
ysr@342 837 Register pre_val = G4;
ysr@342 838 Register tmp = G1_scratch;
ysr@342 839 Register tmp2 = G3_scratch;
ysr@342 840
ysr@342 841 Label refill, restart;
ysr@342 842 bool with_frame = false; // I don't know if we can do with-frame.
ysr@342 843 int satb_q_index_byte_offset =
ysr@342 844 in_bytes(JavaThread::satb_mark_queue_offset() +
ysr@342 845 PtrQueue::byte_offset_of_index());
ysr@342 846 int satb_q_buf_byte_offset =
ysr@342 847 in_bytes(JavaThread::satb_mark_queue_offset() +
ysr@342 848 PtrQueue::byte_offset_of_buf());
ysr@342 849 __ bind(restart);
ysr@342 850 __ ld_ptr(G2_thread, satb_q_index_byte_offset, tmp);
ysr@342 851
ysr@342 852 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false,
ysr@342 853 Assembler::pn, tmp, refill);
ysr@342 854
ysr@342 855 // If the branch is taken, no harm in executing this in the delay slot.
ysr@342 856 __ delayed()->ld_ptr(G2_thread, satb_q_buf_byte_offset, tmp2);
ysr@342 857 __ sub(tmp, oopSize, tmp);
ysr@342 858
ysr@342 859 __ st_ptr(pre_val, tmp2, tmp); // [_buf + index] := <address_of_card>
ysr@342 860 // Use return-from-leaf
ysr@342 861 __ retl();
ysr@342 862 __ delayed()->st_ptr(tmp, G2_thread, satb_q_index_byte_offset);
ysr@342 863
ysr@342 864 __ bind(refill);
ysr@342 865 __ save_frame(0);
ysr@342 866
ysr@342 867 __ mov(pre_val, L0);
ysr@342 868 __ mov(tmp, L1);
ysr@342 869 __ mov(tmp2, L2);
ysr@342 870
ysr@342 871 __ call_VM_leaf(L7_thread_cache,
ysr@342 872 CAST_FROM_FN_PTR(address,
ysr@342 873 SATBMarkQueueSet::handle_zero_index_for_thread),
ysr@342 874 G2_thread);
ysr@342 875
ysr@342 876 __ mov(L0, pre_val);
ysr@342 877 __ mov(L1, tmp);
ysr@342 878 __ mov(L2, tmp2);
ysr@342 879
ysr@342 880 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
ysr@342 881 __ delayed()->restore();
ysr@342 882 }
ysr@342 883 break;
ysr@342 884
ysr@342 885 case g1_post_barrier_slow_id:
ysr@342 886 {
ysr@342 887 BarrierSet* bs = Universe::heap()->barrier_set();
ysr@342 888 if (bs->kind() != BarrierSet::G1SATBCTLogging) {
ysr@342 889 __ save_frame(0);
ysr@342 890 __ set((int)id, O1);
ysr@342 891 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), I0);
ysr@342 892 __ should_not_reach_here();
ysr@342 893 break;
ysr@342 894 }
ysr@342 895
ysr@342 896 __ set_info("g1_post_barrier_slow_id", dont_gc_arguments);
ysr@342 897
ysr@342 898 Register addr = G4;
ysr@342 899 Register cardtable = G5;
ysr@342 900 Register tmp = G1_scratch;
ysr@342 901 Register tmp2 = G3_scratch;
ysr@342 902 jbyte* byte_map_base = ((CardTableModRefBS*)bs)->byte_map_base;
ysr@342 903
ysr@342 904 Label not_already_dirty, restart, refill;
ysr@342 905
ysr@342 906 #ifdef _LP64
ysr@342 907 __ srlx(addr, CardTableModRefBS::card_shift, addr);
ysr@342 908 #else
ysr@342 909 __ srl(addr, CardTableModRefBS::card_shift, addr);
ysr@342 910 #endif
ysr@342 911
twisti@727 912 AddressLiteral rs(byte_map_base);
twisti@727 913 __ set(rs, cardtable); // cardtable := <card table base>
ysr@342 914 __ ldub(addr, cardtable, tmp); // tmp := [addr + cardtable]
ysr@342 915
ysr@342 916 __ br_on_reg_cond(Assembler::rc_nz, /*annul*/false, Assembler::pt,
ysr@342 917 tmp, not_already_dirty);
ysr@342 918 // Get cardtable + tmp into a reg by itself -- useful in the take-the-branch
ysr@342 919 // case, harmless if not.
ysr@342 920 __ delayed()->add(addr, cardtable, tmp2);
ysr@342 921
ysr@342 922 // We didn't take the branch, so we're already dirty: return.
ysr@342 923 // Use return-from-leaf
ysr@342 924 __ retl();
ysr@342 925 __ delayed()->nop();
ysr@342 926
ysr@342 927 // Not dirty.
ysr@342 928 __ bind(not_already_dirty);
ysr@342 929 // First, dirty it.
ysr@342 930 __ stb(G0, tmp2, 0); // [cardPtr] := 0 (i.e., dirty).
ysr@342 931
ysr@342 932 Register tmp3 = cardtable;
ysr@342 933 Register tmp4 = tmp;
ysr@342 934
ysr@342 935 // these registers are now dead
ysr@342 936 addr = cardtable = tmp = noreg;
ysr@342 937
ysr@342 938 int dirty_card_q_index_byte_offset =
ysr@342 939 in_bytes(JavaThread::dirty_card_queue_offset() +
ysr@342 940 PtrQueue::byte_offset_of_index());
ysr@342 941 int dirty_card_q_buf_byte_offset =
ysr@342 942 in_bytes(JavaThread::dirty_card_queue_offset() +
ysr@342 943 PtrQueue::byte_offset_of_buf());
ysr@342 944 __ bind(restart);
ysr@342 945 __ ld_ptr(G2_thread, dirty_card_q_index_byte_offset, tmp3);
ysr@342 946
ysr@342 947 __ br_on_reg_cond(Assembler::rc_z, /*annul*/false, Assembler::pn,
ysr@342 948 tmp3, refill);
ysr@342 949 // If the branch is taken, no harm in executing this in the delay slot.
ysr@342 950 __ delayed()->ld_ptr(G2_thread, dirty_card_q_buf_byte_offset, tmp4);
ysr@342 951 __ sub(tmp3, oopSize, tmp3);
ysr@342 952
ysr@342 953 __ st_ptr(tmp2, tmp4, tmp3); // [_buf + index] := <address_of_card>
ysr@342 954 // Use return-from-leaf
ysr@342 955 __ retl();
ysr@342 956 __ delayed()->st_ptr(tmp3, G2_thread, dirty_card_q_index_byte_offset);
ysr@342 957
ysr@342 958 __ bind(refill);
ysr@342 959 __ save_frame(0);
ysr@342 960
ysr@342 961 __ mov(tmp2, L0);
ysr@342 962 __ mov(tmp3, L1);
ysr@342 963 __ mov(tmp4, L2);
ysr@342 964
ysr@342 965 __ call_VM_leaf(L7_thread_cache,
ysr@342 966 CAST_FROM_FN_PTR(address,
ysr@342 967 DirtyCardQueueSet::handle_zero_index_for_thread),
ysr@342 968 G2_thread);
ysr@342 969
ysr@342 970 __ mov(L0, tmp2);
ysr@342 971 __ mov(L1, tmp3);
ysr@342 972 __ mov(L2, tmp4);
ysr@342 973
ysr@342 974 __ br(Assembler::always, /*annul*/false, Assembler::pt, restart);
ysr@342 975 __ delayed()->restore();
ysr@342 976 }
ysr@342 977 break;
ysr@342 978 #endif // !SERIALGC
ysr@342 979
duke@0 980 default:
duke@0 981 { __ set_info("unimplemented entry", dont_gc_arguments);
duke@0 982 __ save_frame(0);
duke@0 983 __ set((int)id, O1);
duke@0 984 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), O1);
duke@0 985 __ should_not_reach_here();
duke@0 986 }
duke@0 987 break;
duke@0 988 }
duke@0 989 return oop_maps;
duke@0 990 }
duke@0 991
duke@0 992
duke@0 993 void Runtime1::generate_handle_exception(StubAssembler* sasm, OopMapSet* oop_maps, OopMap* oop_map, bool) {
duke@0 994 Label no_deopt;
duke@0 995
duke@0 996 __ verify_not_null_oop(Oexception);
duke@0 997
duke@0 998 // save the exception and issuing pc in the thread
duke@0 999 __ st_ptr(Oexception, G2_thread, in_bytes(JavaThread::exception_oop_offset()));
duke@0 1000 __ st_ptr(Oissuing_pc, G2_thread, in_bytes(JavaThread::exception_pc_offset()));
duke@0 1001
duke@0 1002 // save the real return address and use the throwing pc as the return address to lookup (has bci & oop map)
duke@0 1003 __ mov(I7, L0);
duke@0 1004 __ mov(Oissuing_pc, I7);
duke@0 1005 __ sub(I7, frame::pc_return_offset, I7);
duke@0 1006 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
duke@0 1007
duke@0 1008 // Note: if nmethod has been deoptimized then regardless of
duke@0 1009 // whether it had a handler or not we will deoptimize
duke@0 1010 // by entering the deopt blob with a pending exception.
duke@0 1011
twisti@1295 1012 #ifdef ASSERT
twisti@1295 1013 Label done;
duke@0 1014 __ tst(O0);
twisti@1295 1015 __ br(Assembler::notZero, false, Assembler::pn, done);
duke@0 1016 __ delayed()->nop();
twisti@1295 1017 __ stop("should have found address");
twisti@1295 1018 __ bind(done);
twisti@1295 1019 #endif
duke@0 1020
duke@0 1021 // restore the registers that were saved at the beginning and jump to the exception handler.
duke@0 1022 restore_live_registers(sasm);
duke@0 1023
duke@0 1024 __ jmp(O0, 0);
duke@0 1025 __ delayed()->restore();
duke@0 1026
duke@0 1027 oop_maps->add_gc_map(call_offset, oop_map);
duke@0 1028 }
duke@0 1029
duke@0 1030
duke@0 1031 #undef __
duke@0 1032
duke@0 1033 #define __ masm->
bobv@1601 1034
bobv@1601 1035 const char *Runtime1::pd_name_for_address(address entry) {
bobv@1601 1036 return "<unknown function>";
bobv@1601 1037 }