annotate src/share/vm/opto/lcm.cpp @ 9596:825cee2cd7a6

8139040: Fix initializations before ShouldNotReachHere() etc. and enable -Wuninitialized on linux. Reviewed-by: stuefe, coleenp, roland
author goetz
date Thu, 22 Oct 2015 13:07:10 -0400
parents 10e79692c25e
children a20807e48002
rev   line source
duke@0 1 /*
stefank@7996 2 * Copyright (c) 1998, 2015, Oracle and/or its affiliates. All rights reserved.
duke@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@0 4 *
duke@0 5 * This code is free software; you can redistribute it and/or modify it
duke@0 6 * under the terms of the GNU General Public License version 2 only, as
duke@0 7 * published by the Free Software Foundation.
duke@0 8 *
duke@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@0 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@0 13 * accompanied this code).
duke@0 14 *
duke@0 15 * You should have received a copy of the GNU General Public License version
duke@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@0 18 *
trims@1472 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1472 20 * or visit www.oracle.com if you need additional information or have any
trims@1472 21 * questions.
duke@0 22 *
duke@0 23 */
duke@0 24
stefank@1879 25 #include "precompiled.hpp"
stefank@1879 26 #include "memory/allocation.inline.hpp"
goetz@6789 27 #include "opto/ad.hpp"
stefank@1879 28 #include "opto/block.hpp"
stefank@1879 29 #include "opto/c2compiler.hpp"
stefank@1879 30 #include "opto/callnode.hpp"
stefank@1879 31 #include "opto/cfgnode.hpp"
stefank@1879 32 #include "opto/machnode.hpp"
stefank@1879 33 #include "opto/runtime.hpp"
mcberg@9354 34 #include "opto/chaitin.hpp"
stefank@7996 35 #include "runtime/sharedRuntime.hpp"
stefank@1879 36
duke@0 37 // Optimization - Graph Style
duke@0 38
goetz@6004 39 // Check whether val is not-null-decoded compressed oop,
goetz@6004 40 // i.e. will grab into the base of the heap if it represents NULL.
goetz@6004 41 static bool accesses_heap_base_zone(Node *val) {
goetz@6004 42 if (Universe::narrow_oop_base() > 0) { // Implies UseCompressedOops.
goetz@6004 43 if (val && val->is_Mach()) {
goetz@6004 44 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
goetz@6004 45 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
goetz@6004 46 // decode NULL to point to the heap base (Decode_NN).
goetz@6004 47 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
goetz@6004 48 return true;
goetz@6004 49 }
goetz@6004 50 }
goetz@6004 51 // Must recognize load operation with Decode matched in memory operand.
goetz@6004 52 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
goetz@6004 53 // returns true everywhere else. On PPC, no such memory operands
goetz@6004 54 // exist, therefore we did not yet implement a check for such operands.
goetz@6004 55 NOT_AIX(Unimplemented());
goetz@6004 56 }
goetz@6004 57 }
goetz@6004 58 return false;
goetz@6004 59 }
goetz@6004 60
goetz@6004 61 static bool needs_explicit_null_check_for_read(Node *val) {
goetz@6004 62 // On some OSes (AIX) the page at address 0 is only write protected.
goetz@6004 63 // If so, only Store operations will trap.
goetz@6004 64 if (os::zero_page_read_protected()) {
goetz@6004 65 return false; // Implicit null check will work.
goetz@6004 66 }
goetz@6004 67 // Also a read accessing the base of a heap-based compressed heap will trap.
goetz@6004 68 if (accesses_heap_base_zone(val) && // Hits the base zone page.
goetz@6004 69 Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected.
goetz@6004 70 return false;
goetz@6004 71 }
goetz@6004 72
goetz@6004 73 return true;
goetz@6004 74 }
goetz@6004 75
duke@0 76 //------------------------------implicit_null_check----------------------------
duke@0 77 // Detect implicit-null-check opportunities. Basically, find NULL checks
duke@0 78 // with suitable memory ops nearby. Use the memory op to do the NULL check.
duke@0 79 // I can generate a memory op if there is not one nearby.
duke@0 80 // The proj is the control projection for the not-null case.
kvn@1495 81 // The val is the pointer being checked for nullness or
kvn@1495 82 // decodeHeapOop_not_null node if it did not fold into address.
adlertz@5210 83 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
duke@0 84 // Assume if null check need for 0 offset then always needed
duke@0 85 // Intel solaris doesn't support any null checks yet and no
duke@0 86 // mechanism exists (yet) to set the switches at an os_cpu level
duke@0 87 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
duke@0 88
duke@0 89 // Make sure the ptr-is-null path appears to be uncommon!
adlertz@5210 90 float f = block->end()->as_MachIf()->_prob;
duke@0 91 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
duke@0 92 if( f > PROB_UNLIKELY_MAG(4) ) return;
duke@0 93
duke@0 94 uint bidx = 0; // Capture index of value into memop
duke@0 95 bool was_store; // Memory op is a store op
duke@0 96
duke@0 97 // Get the successor block for if the test ptr is non-null
duke@0 98 Block* not_null_block; // this one goes with the proj
duke@0 99 Block* null_block;
adlertz@5210 100 if (block->get_node(block->number_of_nodes()-1) == proj) {
adlertz@5210 101 null_block = block->_succs[0];
adlertz@5210 102 not_null_block = block->_succs[1];
duke@0 103 } else {
adlertz@5210 104 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
adlertz@5210 105 not_null_block = block->_succs[0];
adlertz@5210 106 null_block = block->_succs[1];
duke@0 107 }
kvn@332 108 while (null_block->is_Empty() == Block::empty_with_goto) {
kvn@332 109 null_block = null_block->_succs[0];
kvn@332 110 }
duke@0 111
duke@0 112 // Search the exception block for an uncommon trap.
duke@0 113 // (See Parse::do_if and Parse::do_ifnull for the reason
duke@0 114 // we need an uncommon trap. Briefly, we need a way to
duke@0 115 // detect failure of this optimization, as in 6366351.)
duke@0 116 {
duke@0 117 bool found_trap = false;
adlertz@5210 118 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
adlertz@5206 119 Node* nn = null_block->get_node(i1);
duke@0 120 if (nn->is_MachCall() &&
twisti@1668 121 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
duke@0 122 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
duke@0 123 if (trtype->isa_int() && trtype->is_int()->is_con()) {
duke@0 124 jint tr_con = trtype->is_int()->get_con();
duke@0 125 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
duke@0 126 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
duke@0 127 assert((int)reason < (int)BitsPerInt, "recode bit map");
duke@0 128 if (is_set_nth_bit(allowed_reasons, (int) reason)
duke@0 129 && action != Deoptimization::Action_none) {
duke@0 130 // This uncommon trap is sure to recompile, eventually.
duke@0 131 // When that happens, C->too_many_traps will prevent
duke@0 132 // this transformation from happening again.
duke@0 133 found_trap = true;
duke@0 134 }
duke@0 135 }
duke@0 136 break;
duke@0 137 }
duke@0 138 }
duke@0 139 if (!found_trap) {
duke@0 140 // We did not find an uncommon trap.
duke@0 141 return;
duke@0 142 }
duke@0 143 }
duke@0 144
kvn@1495 145 // Check for decodeHeapOop_not_null node which did not fold into address
kvn@1495 146 bool is_decoden = ((intptr_t)val) & 1;
kvn@1495 147 val = (Node*)(((intptr_t)val) & ~1);
kvn@1495 148
kvn@1495 149 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
kvn@1495 150 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
kvn@1495 151
duke@0 152 // Search the successor block for a load or store who's base value is also
duke@0 153 // the tested value. There may be several.
duke@0 154 Node_List *out = new Node_List(Thread::current()->resource_area());
duke@0 155 MachNode *best = NULL; // Best found so far
duke@0 156 for (DUIterator i = val->outs(); val->has_out(i); i++) {
duke@0 157 Node *m = val->out(i);
duke@0 158 if( !m->is_Mach() ) continue;
duke@0 159 MachNode *mach = m->as_Mach();
duke@0 160 was_store = false;
kvn@1613 161 int iop = mach->ideal_Opcode();
kvn@1613 162 switch( iop ) {
duke@0 163 case Op_LoadB:
kvn@3447 164 case Op_LoadUB:
twisti@558 165 case Op_LoadUS:
duke@0 166 case Op_LoadD:
duke@0 167 case Op_LoadF:
duke@0 168 case Op_LoadI:
duke@0 169 case Op_LoadL:
duke@0 170 case Op_LoadP:
coleenp@113 171 case Op_LoadN:
duke@0 172 case Op_LoadS:
duke@0 173 case Op_LoadKlass:
kvn@164 174 case Op_LoadNKlass:
duke@0 175 case Op_LoadRange:
duke@0 176 case Op_LoadD_unaligned:
duke@0 177 case Op_LoadL_unaligned:
kvn@1151 178 assert(mach->in(2) == val, "should be address");
duke@0 179 break;
duke@0 180 case Op_StoreB:
duke@0 181 case Op_StoreC:
duke@0 182 case Op_StoreCM:
duke@0 183 case Op_StoreD:
duke@0 184 case Op_StoreF:
duke@0 185 case Op_StoreI:
duke@0 186 case Op_StoreL:
duke@0 187 case Op_StoreP:
coleenp@113 188 case Op_StoreN:
roland@3724 189 case Op_StoreNKlass:
duke@0 190 was_store = true; // Memory op is a store op
duke@0 191 // Stores will have their address in slot 2 (memory in slot 1).
duke@0 192 // If the value being nul-checked is in another slot, it means we
duke@0 193 // are storing the checked value, which does NOT check the value!
duke@0 194 if( mach->in(2) != val ) continue;
duke@0 195 break; // Found a memory op?
duke@0 196 case Op_StrComp:
cfang@681 197 case Op_StrEquals:
cfang@681 198 case Op_StrIndexOf:
rasbold@169 199 case Op_AryEq:
kvn@4044 200 case Op_EncodeISOArray:
duke@0 201 // Not a legit memory op for implicit null check regardless of
duke@0 202 // embedded loads
duke@0 203 continue;
duke@0 204 default: // Also check for embedded loads
duke@0 205 if( !mach->needs_anti_dependence_check() )
duke@0 206 continue; // Not an memory op; skip it
kvn@1613 207 if( must_clone[iop] ) {
kvn@1613 208 // Do not move nodes which produce flags because
kvn@1613 209 // RA will try to clone it to place near branch and
kvn@1613 210 // it will cause recompilation, see clone_node().
kvn@1613 211 continue;
kvn@1613 212 }
kvn@1151 213 {
kvn@1495 214 // Check that value is used in memory address in
kvn@1495 215 // instructions with embedded load (CmpP val1,(val2+off)).
kvn@1151 216 Node* base;
kvn@1151 217 Node* index;
kvn@1151 218 const MachOper* oper = mach->memory_inputs(base, index);
kvn@1151 219 if (oper == NULL || oper == (MachOper*)-1) {
kvn@1151 220 continue; // Not an memory op; skip it
kvn@1151 221 }
kvn@1151 222 if (val == base ||
kvn@1151 223 val == index && val->bottom_type()->isa_narrowoop()) {
kvn@1151 224 break; // Found it
kvn@1151 225 } else {
kvn@1151 226 continue; // Skip it
kvn@1151 227 }
kvn@1151 228 }
duke@0 229 break;
duke@0 230 }
goetz@6004 231
goetz@6004 232 // On some OSes (AIX) the page at address 0 is only write protected.
goetz@6004 233 // If so, only Store operations will trap.
goetz@6004 234 // But a read accessing the base of a heap-based compressed heap will trap.
goetz@6004 235 if (!was_store && needs_explicit_null_check_for_read(val)) {
goetz@6004 236 continue;
goetz@6004 237 }
goetz@6004 238
duke@0 239 // check if the offset is not too high for implicit exception
duke@0 240 {
duke@0 241 intptr_t offset = 0;
duke@0 242 const TypePtr *adr_type = NULL; // Do not need this return value here
duke@0 243 const Node* base = mach->get_base_and_disp(offset, adr_type);
duke@0 244 if (base == NULL || base == NodeSentinel) {
kvn@332 245 // Narrow oop address doesn't have base, only index
kvn@332 246 if( val->bottom_type()->isa_narrowoop() &&
kvn@332 247 MacroAssembler::needs_explicit_null_check(offset) )
kvn@332 248 continue; // Give up if offset is beyond page size
duke@0 249 // cannot reason about it; is probably not implicit null exception
duke@0 250 } else {
kvn@642 251 const TypePtr* tptr;
kvn@4676 252 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 ||
kvn@4676 253 Universe::narrow_klass_shift() == 0)) {
kvn@642 254 // 32-bits narrow oop can be the base of address expressions
kvn@4676 255 tptr = base->get_ptr_type();
kvn@642 256 } else {
kvn@642 257 // only regular oops are expected here
kvn@642 258 tptr = base->bottom_type()->is_ptr();
kvn@642 259 }
duke@0 260 // Give up if offset is not a compile-time constant
duke@0 261 if( offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot )
duke@0 262 continue;
duke@0 263 offset += tptr->_offset; // correct if base is offseted
duke@0 264 if( MacroAssembler::needs_explicit_null_check(offset) )
duke@0 265 continue; // Give up is reference is beyond 4K page size
duke@0 266 }
duke@0 267 }
duke@0 268
duke@0 269 // Check ctrl input to see if the null-check dominates the memory op
adlertz@5210 270 Block *cb = get_block_for_node(mach);
duke@0 271 cb = cb->_idom; // Always hoist at least 1 block
duke@0 272 if( !was_store ) { // Stores can be hoisted only one block
adlertz@5210 273 while( cb->_dom_depth > (block->_dom_depth + 1))
duke@0 274 cb = cb->_idom; // Hoist loads as far as we want
duke@0 275 // The non-null-block should dominate the memory op, too. Live
duke@0 276 // range spilling will insert a spill in the non-null-block if it is
duke@0 277 // needs to spill the memory op for an implicit null check.
adlertz@5210 278 if (cb->_dom_depth == (block->_dom_depth + 1)) {
duke@0 279 if (cb != not_null_block) continue;
duke@0 280 cb = cb->_idom;
duke@0 281 }
duke@0 282 }
adlertz@5210 283 if( cb != block ) continue;
duke@0 284
duke@0 285 // Found a memory user; see if it can be hoisted to check-block
duke@0 286 uint vidx = 0; // Capture index of value into memop
duke@0 287 uint j;
duke@0 288 for( j = mach->req()-1; j > 0; j-- ) {
kvn@1495 289 if( mach->in(j) == val ) {
kvn@1495 290 vidx = j;
kvn@1495 291 // Ignore DecodeN val which could be hoisted to where needed.
kvn@1495 292 if( is_decoden ) continue;
kvn@1495 293 }
duke@0 294 // Block of memory-op input
adlertz@5210 295 Block *inb = get_block_for_node(mach->in(j));
adlertz@5210 296 Block *b = block; // Start from nul check
duke@0 297 while( b != inb && b->_dom_depth > inb->_dom_depth )
duke@0 298 b = b->_idom; // search upwards for input
duke@0 299 // See if input dominates null check
duke@0 300 if( b != inb )
duke@0 301 break;
duke@0 302 }
duke@0 303 if( j > 0 )
duke@0 304 continue;
adlertz@5210 305 Block *mb = get_block_for_node(mach);
duke@0 306 // Hoisting stores requires more checks for the anti-dependence case.
duke@0 307 // Give up hoisting if we have to move the store past any load.
duke@0 308 if( was_store ) {
duke@0 309 Block *b = mb; // Start searching here for a local load
duke@0 310 // mach use (faulting) trying to hoist
duke@0 311 // n might be blocker to hoisting
adlertz@5210 312 while( b != block ) {
duke@0 313 uint k;
adlertz@5210 314 for( k = 1; k < b->number_of_nodes(); k++ ) {
adlertz@5206 315 Node *n = b->get_node(k);
duke@0 316 if( n->needs_anti_dependence_check() &&
duke@0 317 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
duke@0 318 break; // Found anti-dependent load
duke@0 319 }
adlertz@5210 320 if( k < b->number_of_nodes() )
duke@0 321 break; // Found anti-dependent load
duke@0 322 // Make sure control does not do a merge (would have to check allpaths)
duke@0 323 if( b->num_preds() != 2 ) break;
adlertz@5210 324 b = get_block_for_node(b->pred(1)); // Move up to predecessor block
duke@0 325 }
adlertz@5210 326 if( b != block ) continue;
duke@0 327 }
duke@0 328
duke@0 329 // Make sure this memory op is not already being used for a NullCheck
duke@0 330 Node *e = mb->end();
duke@0 331 if( e->is_MachNullCheck() && e->in(1) == mach )
duke@0 332 continue; // Already being used as a NULL check
duke@0 333
duke@0 334 // Found a candidate! Pick one with least dom depth - the highest
duke@0 335 // in the dom tree should be closest to the null check.
adlertz@5210 336 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
duke@0 337 best = mach;
duke@0 338 bidx = vidx;
duke@0 339 }
duke@0 340 }
duke@0 341 // No candidate!
adlertz@5074 342 if (best == NULL) {
adlertz@5074 343 return;
adlertz@5074 344 }
duke@0 345
duke@0 346 // ---- Found an implicit null check
duke@0 347 extern int implicit_null_checks;
duke@0 348 implicit_null_checks++;
duke@0 349
kvn@1495 350 if( is_decoden ) {
kvn@1495 351 // Check if we need to hoist decodeHeapOop_not_null first.
adlertz@5210 352 Block *valb = get_block_for_node(val);
adlertz@5210 353 if( block != valb && block->_dom_depth < valb->_dom_depth ) {
kvn@1495 354 // Hoist it up to the end of the test block.
kvn@1495 355 valb->find_remove(val);
adlertz@5210 356 block->add_inst(val);
adlertz@5210 357 map_node_to_block(val, block);
kvn@1495 358 // DecodeN on x86 may kill flags. Check for flag-killing projections
kvn@1495 359 // that also need to be hoisted.
kvn@1495 360 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
kvn@1495 361 Node* n = val->fast_out(j);
kvn@2605 362 if( n->is_MachProj() ) {
adlertz@5210 363 get_block_for_node(n)->find_remove(n);
adlertz@5210 364 block->add_inst(n);
adlertz@5210 365 map_node_to_block(n, block);
kvn@1495 366 }
kvn@1495 367 }
kvn@1495 368 }
kvn@1495 369 }
duke@0 370 // Hoist the memory candidate up to the end of the test block.
adlertz@5210 371 Block *old_block = get_block_for_node(best);
duke@0 372 old_block->find_remove(best);
adlertz@5210 373 block->add_inst(best);
adlertz@5210 374 map_node_to_block(best, block);
duke@0 375
duke@0 376 // Move the control dependence
adlertz@5206 377 if (best->in(0) && best->in(0) == old_block->head())
adlertz@5210 378 best->set_req(0, block->head());
duke@0 379
duke@0 380 // Check for flag-killing projections that also need to be hoisted
duke@0 381 // Should be DU safe because no edge updates.
duke@0 382 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
duke@0 383 Node* n = best->fast_out(j);
kvn@2605 384 if( n->is_MachProj() ) {
adlertz@5210 385 get_block_for_node(n)->find_remove(n);
adlertz@5210 386 block->add_inst(n);
adlertz@5210 387 map_node_to_block(n, block);
duke@0 388 }
duke@0 389 }
duke@0 390
duke@0 391 // proj==Op_True --> ne test; proj==Op_False --> eq test.
duke@0 392 // One of two graph shapes got matched:
duke@0 393 // (IfTrue (If (Bool NE (CmpP ptr NULL))))
duke@0 394 // (IfFalse (If (Bool EQ (CmpP ptr NULL))))
duke@0 395 // NULL checks are always branch-if-eq. If we see a IfTrue projection
duke@0 396 // then we are replacing a 'ne' test with a 'eq' NULL check test.
duke@0 397 // We need to flip the projections to keep the same semantics.
duke@0 398 if( proj->Opcode() == Op_IfTrue ) {
duke@0 399 // Swap order of projections in basic block to swap branch targets
adlertz@5210 400 Node *tmp1 = block->get_node(block->end_idx()+1);
adlertz@5210 401 Node *tmp2 = block->get_node(block->end_idx()+2);
adlertz@5210 402 block->map_node(tmp2, block->end_idx()+1);
adlertz@5210 403 block->map_node(tmp1, block->end_idx()+2);
thartmann@6575 404 Node *tmp = new Node(C->top()); // Use not NULL input
duke@0 405 tmp1->replace_by(tmp);
duke@0 406 tmp2->replace_by(tmp1);
duke@0 407 tmp->replace_by(tmp2);
duke@0 408 tmp->destruct();
duke@0 409 }
duke@0 410
duke@0 411 // Remove the existing null check; use a new implicit null check instead.
duke@0 412 // Since schedule-local needs precise def-use info, we need to correct
duke@0 413 // it as well.
duke@0 414 Node *old_tst = proj->in(0);
thartmann@6575 415 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
adlertz@5210 416 block->map_node(nul_chk, block->end_idx());
adlertz@5210 417 map_node_to_block(nul_chk, block);
duke@0 418 // Redirect users of old_test to nul_chk
duke@0 419 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
duke@0 420 old_tst->last_out(i2)->set_req(0, nul_chk);
duke@0 421 // Clean-up any dead code
thartmann@7667 422 for (uint i3 = 0; i3 < old_tst->req(); i3++) {
thartmann@7667 423 Node* in = old_tst->in(i3);
duke@0 424 old_tst->set_req(i3, NULL);
thartmann@7667 425 if (in->outcnt() == 0) {
thartmann@7667 426 // Remove dead input node
thartmann@7667 427 in->disconnect_inputs(NULL, C);
thartmann@7667 428 block->find_remove(in);
thartmann@7667 429 }
thartmann@7667 430 }
duke@0 431
adlertz@5210 432 latency_from_uses(nul_chk);
adlertz@5210 433 latency_from_uses(best);
duke@0 434 }
duke@0 435
duke@0 436
duke@0 437 //------------------------------select-----------------------------------------
duke@0 438 // Select a nice fellow from the worklist to schedule next. If there is only
duke@0 439 // one choice, then use it. Projections take top priority for correctness
duke@0 440 // reasons - if I see a projection, then it is next. There are a number of
duke@0 441 // other special cases, for instructions that consume condition codes, et al.
duke@0 442 // These are chosen immediately. Some instructions are required to immediately
duke@0 443 // precede the last instruction in the block, and these are taken last. Of the
duke@0 444 // remaining cases (most), choose the instruction with the greatest latency
duke@0 445 // (that is, the most number of pseudo-cycles required to the end of the
duke@0 446 // routine). If there is a tie, choose the instruction with the most inputs.
mcberg@9354 447 Node* PhaseCFG::select(
mcberg@9354 448 Block* block,
mcberg@9354 449 Node_List &worklist,
mcberg@9354 450 GrowableArray<int> &ready_cnt,
mcberg@9354 451 VectorSet &next_call,
mcberg@9354 452 uint sched_slot,
mcberg@9354 453 intptr_t* recalc_pressure_nodes) {
duke@0 454
duke@0 455 // If only a single entry on the stack, use it
duke@0 456 uint cnt = worklist.size();
duke@0 457 if (cnt == 1) {
duke@0 458 Node *n = worklist[0];
duke@0 459 worklist.map(0,worklist.pop());
duke@0 460 return n;
duke@0 461 }
duke@0 462
duke@0 463 uint choice = 0; // Bigger is most important
duke@0 464 uint latency = 0; // Bigger is scheduled first
duke@0 465 uint score = 0; // Bigger is better
kvn@253 466 int idx = -1; // Index in worklist
shade@4256 467 int cand_cnt = 0; // Candidate count
mcberg@9354 468 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
duke@0 469
duke@0 470 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
duke@0 471 // Order in worklist is used to break ties.
duke@0 472 // See caller for how this is used to delay scheduling
duke@0 473 // of induction variable increments to after the other
duke@0 474 // uses of the phi are scheduled.
duke@0 475 Node *n = worklist[i]; // Get Node on worklist
duke@0 476
duke@0 477 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
duke@0 478 if( n->is_Proj() || // Projections always win
duke@0 479 n->Opcode()== Op_Con || // So does constant 'Top'
duke@0 480 iop == Op_CreateEx || // Create-exception must start block
duke@0 481 iop == Op_CheckCastPP
duke@0 482 ) {
kvn@7372 483 worklist.map(i,worklist.pop());
duke@0 484 return n;
duke@0 485 }
duke@0 486
duke@0 487 // Final call in a block must be adjacent to 'catch'
adlertz@5210 488 Node *e = block->end();
duke@0 489 if( e->is_Catch() && e->in(0)->in(0) == n )
duke@0 490 continue;
duke@0 491
duke@0 492 // Memory op for an implicit null check has to be at the end of the block
duke@0 493 if( e->is_MachNullCheck() && e->in(1) == n )
duke@0 494 continue;
duke@0 495
kvn@3447 496 // Schedule IV increment last.
kvn@3447 497 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd &&
kvn@3447 498 e->in(1)->in(1) == n && n->is_iteratively_computed())
kvn@3447 499 continue;
kvn@3447 500
duke@0 501 uint n_choice = 2;
duke@0 502
duke@0 503 // See if this instruction is consumed by a branch. If so, then (as the
duke@0 504 // branch is the last instruction in the basic block) force it to the
duke@0 505 // end of the basic block
duke@0 506 if ( must_clone[iop] ) {
duke@0 507 // See if any use is a branch
duke@0 508 bool found_machif = false;
duke@0 509
duke@0 510 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
duke@0 511 Node* use = n->fast_out(j);
duke@0 512
duke@0 513 // The use is a conditional branch, make them adjacent
adlertz@5210 514 if (use->is_MachIf() && get_block_for_node(use) == block) {
duke@0 515 found_machif = true;
duke@0 516 break;
duke@0 517 }
duke@0 518
duke@0 519 // More than this instruction pending for successor to be ready,
duke@0 520 // don't choose this if other opportunities are ready
roland@3012 521 if (ready_cnt.at(use->_idx) > 1)
duke@0 522 n_choice = 1;
duke@0 523 }
duke@0 524
duke@0 525 // loop terminated, prefer not to use this instruction
duke@0 526 if (found_machif)
duke@0 527 continue;
duke@0 528 }
duke@0 529
duke@0 530 // See if this has a predecessor that is "must_clone", i.e. sets the
duke@0 531 // condition code. If so, choose this first
duke@0 532 for (uint j = 0; j < n->req() ; j++) {
duke@0 533 Node *inn = n->in(j);
duke@0 534 if (inn) {
duke@0 535 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
duke@0 536 n_choice = 3;
duke@0 537 break;
duke@0 538 }
duke@0 539 }
duke@0 540 }
duke@0 541
duke@0 542 // MachTemps should be scheduled last so they are near their uses
duke@0 543 if (n->is_MachTemp()) {
duke@0 544 n_choice = 1;
duke@0 545 }
duke@0 546
adlertz@5210 547 uint n_latency = get_latency_for_node(n);
mcberg@9354 548 uint n_score = n->req(); // Many inputs get high score to break ties
mcberg@9354 549
mcberg@9354 550 if (OptoRegScheduling && block_size_threshold_ok) {
mcberg@9354 551 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
mcberg@9354 552 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
mcberg@9354 553 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
mcberg@9354 554 // simulate the notion that we just picked this node to schedule
mcberg@9354 555 n->add_flag(Node::Flag_is_scheduled);
mcberg@9354 556 // now caculate its effect upon the graph if we did
mcberg@9354 557 adjust_register_pressure(n, block, recalc_pressure_nodes, false);
mcberg@9354 558 // return its state for finalize in case somebody else wins
mcberg@9354 559 n->remove_flag(Node::Flag_is_scheduled);
mcberg@9354 560 // now save the two final pressure components of register pressure, limiting pressure calcs to short size
mcberg@9354 561 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
mcberg@9354 562 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
mcberg@9354 563 recalc_pressure_nodes[n->_idx] = int_pressure;
mcberg@9354 564 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
mcberg@9354 565 }
mcberg@9354 566
mcberg@9354 567 if (_scheduling_for_pressure) {
mcberg@9354 568 latency = n_latency;
mcberg@9354 569 if (n_choice != 3) {
mcberg@9354 570 // Now evaluate each register pressure component based on threshold in the score.
mcberg@9354 571 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
mcberg@9354 572 // on a single instruction, but we might see it shrink on both banks.
mcberg@9354 573 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
mcberg@9354 574 // live ranges that terminate on this instruction.
mcberg@9354 575 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
mcberg@9354 576 short int_pressure = (short)recalc_pressure_nodes[n->_idx];
mcberg@9354 577 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
mcberg@9354 578 }
mcberg@9354 579 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
mcberg@9354 580 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
mcberg@9354 581 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
mcberg@9354 582 }
mcberg@9354 583 } else {
mcberg@9354 584 // make sure we choose these candidates
mcberg@9354 585 score = 0;
mcberg@9354 586 }
mcberg@9354 587 }
mcberg@9354 588 }
duke@0 589
duke@0 590 // Keep best latency found
shade@4256 591 cand_cnt++;
shade@4256 592 if (choice < n_choice ||
shade@4256 593 (choice == n_choice &&
shade@4256 594 ((StressLCM && Compile::randomized_select(cand_cnt)) ||
shade@4256 595 (!StressLCM &&
shade@4256 596 (latency < n_latency ||
shade@4256 597 (latency == n_latency &&
shade@4256 598 (score < n_score))))))) {
duke@0 599 choice = n_choice;
duke@0 600 latency = n_latency;
duke@0 601 score = n_score;
duke@0 602 idx = i; // Also keep index in worklist
duke@0 603 }
duke@0 604 } // End of for all ready nodes in worklist
duke@0 605
kvn@253 606 assert(idx >= 0, "index should be set");
kvn@253 607 Node *n = worklist[(uint)idx]; // Get the winner
duke@0 608
kvn@7372 609 worklist.map((uint)idx, worklist.pop()); // Compress worklist
duke@0 610 return n;
duke@0 611 }
duke@0 612
mcberg@9354 613 //-------------------------adjust_register_pressure----------------------------
mcberg@9354 614 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
mcberg@9354 615 PhaseLive* liveinfo = _regalloc->get_live();
mcberg@9354 616 IndexSet* liveout = liveinfo->live(block);
mcberg@9354 617 // first adjust the register pressure for the sources
mcberg@9354 618 for (uint i = 1; i < n->req(); i++) {
mcberg@9354 619 bool lrg_ends = false;
mcberg@9354 620 Node *src_n = n->in(i);
mcberg@9354 621 if (src_n == NULL) continue;
mcberg@9354 622 if (!src_n->is_Mach()) continue;
mcberg@9354 623 uint src = _regalloc->_lrg_map.find(src_n);
mcberg@9354 624 if (src == 0) continue;
mcberg@9354 625 LRG& lrg_src = _regalloc->lrgs(src);
mcberg@9354 626 // detect if the live range ends or not
mcberg@9354 627 if (liveout->member(src) == false) {
mcberg@9354 628 lrg_ends = true;
mcberg@9354 629 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
mcberg@9354 630 Node* m = src_n->fast_out(j); // Get user
mcberg@9354 631 if (m == n) continue;
mcberg@9354 632 if (!m->is_Mach()) continue;
mcberg@9354 633 MachNode *mach = m->as_Mach();
mcberg@9354 634 bool src_matches = false;
mcberg@9354 635 int iop = mach->ideal_Opcode();
mcberg@9354 636
mcberg@9354 637 switch (iop) {
mcberg@9354 638 case Op_StoreB:
mcberg@9354 639 case Op_StoreC:
mcberg@9354 640 case Op_StoreCM:
mcberg@9354 641 case Op_StoreD:
mcberg@9354 642 case Op_StoreF:
mcberg@9354 643 case Op_StoreI:
mcberg@9354 644 case Op_StoreL:
mcberg@9354 645 case Op_StoreP:
mcberg@9354 646 case Op_StoreN:
mcberg@9354 647 case Op_StoreVector:
mcberg@9354 648 case Op_StoreNKlass:
mcberg@9354 649 for (uint k = 1; k < m->req(); k++) {
mcberg@9354 650 Node *in = m->in(k);
mcberg@9354 651 if (in == src_n) {
mcberg@9354 652 src_matches = true;
mcberg@9354 653 break;
mcberg@9354 654 }
mcberg@9354 655 }
mcberg@9354 656 break;
mcberg@9354 657
mcberg@9354 658 default:
mcberg@9354 659 src_matches = true;
mcberg@9354 660 break;
mcberg@9354 661 }
mcberg@9354 662
mcberg@9354 663 // If we have a store as our use, ignore the non source operands
mcberg@9354 664 if (src_matches == false) continue;
mcberg@9354 665
mcberg@9354 666 // Mark every unscheduled use which is not n with a recalculation
mcberg@9354 667 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
mcberg@9354 668 if (finalize_mode && !m->is_Phi()) {
mcberg@9354 669 recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
mcberg@9354 670 }
mcberg@9354 671 lrg_ends = false;
mcberg@9354 672 }
mcberg@9354 673 }
mcberg@9354 674 }
mcberg@9354 675 // if none, this live range ends and we can adjust register pressure
mcberg@9354 676 if (lrg_ends) {
mcberg@9354 677 if (finalize_mode) {
mcberg@9354 678 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
mcberg@9354 679 } else {
mcberg@9354 680 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
mcberg@9354 681 }
mcberg@9354 682 }
mcberg@9354 683 }
mcberg@9354 684
mcberg@9354 685 // now add the register pressure from the dest and evaluate which heuristic we should use:
mcberg@9354 686 // 1.) The default, latency scheduling
mcberg@9354 687 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
mcberg@9354 688 uint dst = _regalloc->_lrg_map.find(n);
mcberg@9354 689 if (dst != 0) {
mcberg@9354 690 LRG& lrg_dst = _regalloc->lrgs(dst);
mcberg@9354 691 if (finalize_mode) {
mcberg@9354 692 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
mcberg@9354 693 // check to see if we fall over the register pressure cliff here
mcberg@9354 694 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
mcberg@9354 695 _scheduling_for_pressure = true;
mcberg@9354 696 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
mcberg@9354 697 _scheduling_for_pressure = true;
mcberg@9354 698 } else {
mcberg@9354 699 // restore latency scheduling mode
mcberg@9354 700 _scheduling_for_pressure = false;
mcberg@9354 701 }
mcberg@9354 702 } else {
mcberg@9354 703 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
mcberg@9354 704 }
mcberg@9354 705 }
mcberg@9354 706 }
duke@0 707
duke@0 708 //------------------------------set_next_call----------------------------------
adlertz@5210 709 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
duke@0 710 if( next_call.test_set(n->_idx) ) return;
duke@0 711 for( uint i=0; i<n->len(); i++ ) {
duke@0 712 Node *m = n->in(i);
duke@0 713 if( !m ) continue; // must see all nodes in block that precede call
adlertz@5210 714 if (get_block_for_node(m) == block) {
adlertz@5210 715 set_next_call(block, m, next_call);
adlertz@5074 716 }
duke@0 717 }
duke@0 718 }
duke@0 719
duke@0 720 //------------------------------needed_for_next_call---------------------------
duke@0 721 // Set the flag 'next_call' for each Node that is needed for the next call to
duke@0 722 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
duke@0 723 // next subroutine call get priority - basically it moves things NOT needed
duke@0 724 // for the next call till after the call. This prevents me from trying to
duke@0 725 // carry lots of stuff live across a call.
adlertz@5210 726 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
duke@0 727 // Find the next control-defining Node in this block
duke@0 728 Node* call = NULL;
duke@0 729 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
duke@0 730 Node* m = this_call->fast_out(i);
adlertz@5213 731 if (get_block_for_node(m) == block && // Local-block user
duke@0 732 m != this_call && // Not self-start node
adlertz@5213 733 m->is_MachCall()) {
duke@0 734 call = m;
duke@0 735 break;
adlertz@5213 736 }
duke@0 737 }
duke@0 738 if (call == NULL) return; // No next call (e.g., block end is near)
duke@0 739 // Set next-call for all inputs to this call
adlertz@5210 740 set_next_call(block, call, next_call);
duke@0 741 }
duke@0 742
roland@2881 743 //------------------------------add_call_kills-------------------------------------
adlertz@5210 744 // helper function that adds caller save registers to MachProjNode
adlertz@5210 745 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
roland@2881 746 // Fill in the kill mask for the call
roland@2881 747 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
roland@2881 748 if( !regs.Member(r) ) { // Not already defined by the call
roland@2881 749 // Save-on-call register?
roland@2881 750 if ((save_policy[r] == 'C') ||
roland@2881 751 (save_policy[r] == 'A') ||
roland@2881 752 ((save_policy[r] == 'E') && exclude_soe)) {
roland@2881 753 proj->_rout.Insert(r);
roland@2881 754 }
roland@2881 755 }
roland@2881 756 }
roland@2881 757 }
roland@2881 758
roland@2881 759
duke@0 760 //------------------------------sched_call-------------------------------------
adlertz@5210 761 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
duke@0 762 RegMask regs;
duke@0 763
duke@0 764 // Schedule all the users of the call right now. All the users are
duke@0 765 // projection Nodes, so they must be scheduled next to the call.
duke@0 766 // Collect all the defined registers.
duke@0 767 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
duke@0 768 Node* n = mcall->fast_out(i);
kvn@2605 769 assert( n->is_MachProj(), "" );
roland@3012 770 int n_cnt = ready_cnt.at(n->_idx)-1;
roland@3012 771 ready_cnt.at_put(n->_idx, n_cnt);
roland@3012 772 assert( n_cnt == 0, "" );
duke@0 773 // Schedule next to call
adlertz@5210 774 block->map_node(n, node_cnt++);
duke@0 775 // Collect defined registers
duke@0 776 regs.OR(n->out_RegMask());
duke@0 777 // Check for scheduling the next control-definer
duke@0 778 if( n->bottom_type() == Type::CONTROL )
duke@0 779 // Warm up next pile of heuristic bits
adlertz@5210 780 needed_for_next_call(block, n, next_call);
duke@0 781
duke@0 782 // Children of projections are now all ready
duke@0 783 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
duke@0 784 Node* m = n->fast_out(j); // Get user
adlertz@5210 785 if(get_block_for_node(m) != block) {
adlertz@5074 786 continue;
adlertz@5074 787 }
duke@0 788 if( m->is_Phi() ) continue;
mcberg@9354 789 int m_cnt = ready_cnt.at(m->_idx) - 1;
roland@3012 790 ready_cnt.at_put(m->_idx, m_cnt);
roland@3012 791 if( m_cnt == 0 )
duke@0 792 worklist.push(m);
duke@0 793 }
duke@0 794
duke@0 795 }
duke@0 796
duke@0 797 // Act as if the call defines the Frame Pointer.
duke@0 798 // Certainly the FP is alive and well after the call.
adlertz@5210 799 regs.Insert(_matcher.c_frame_pointer());
duke@0 800
duke@0 801 // Set all registers killed and not already defined by the call.
duke@0 802 uint r_cnt = mcall->tf()->range()->cnt();
duke@0 803 int op = mcall->ideal_Opcode();
thartmann@6575 804 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
adlertz@5210 805 map_node_to_block(proj, block);
adlertz@5210 806 block->insert_node(proj, node_cnt++);
duke@0 807
duke@0 808 // Select the right register save policy.
goetz@9596 809 const char *save_policy = NULL;
duke@0 810 switch (op) {
duke@0 811 case Op_CallRuntime:
duke@0 812 case Op_CallLeaf:
duke@0 813 case Op_CallLeafNoFP:
duke@0 814 // Calling C code so use C calling convention
adlertz@5210 815 save_policy = _matcher._c_reg_save_policy;
duke@0 816 break;
duke@0 817
duke@0 818 case Op_CallStaticJava:
duke@0 819 case Op_CallDynamicJava:
duke@0 820 // Calling Java code so use Java calling convention
adlertz@5210 821 save_policy = _matcher._register_save_policy;
duke@0 822 break;
duke@0 823
duke@0 824 default:
duke@0 825 ShouldNotReachHere();
duke@0 826 }
duke@0 827
duke@0 828 // When using CallRuntime mark SOE registers as killed by the call
duke@0 829 // so values that could show up in the RegisterMap aren't live in a
duke@0 830 // callee saved register since the register wouldn't know where to
duke@0 831 // find them. CallLeaf and CallLeafNoFP are ok because they can't
duke@0 832 // have debug info on them. Strictly speaking this only needs to be
duke@0 833 // done for oops since idealreg2debugmask takes care of debug info
duke@0 834 // references but there no way to handle oops differently than other
duke@0 835 // pointers as far as the kill mask goes.
duke@0 836 bool exclude_soe = op == Op_CallRuntime;
duke@0 837
twisti@1137 838 // If the call is a MethodHandle invoke, we need to exclude the
twisti@1137 839 // register which is used to save the SP value over MH invokes from
twisti@1137 840 // the mask. Otherwise this register could be used for
twisti@1137 841 // deoptimization information.
twisti@1137 842 if (op == Op_CallStaticJava) {
twisti@1137 843 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
twisti@1137 844 if (mcallstaticjava->_method_handle_invoke)
twisti@1137 845 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
twisti@1137 846 }
twisti@1137 847
roland@2881 848 add_call_kills(proj, regs, save_policy, exclude_soe);
duke@0 849
duke@0 850 return node_cnt;
duke@0 851 }
duke@0 852
duke@0 853
duke@0 854 //------------------------------schedule_local---------------------------------
duke@0 855 // Topological sort within a block. Someday become a real scheduler.
mcberg@9354 856 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
duke@0 857 // Already "sorted" are the block start Node (as the first entry), and
duke@0 858 // the block-ending Node and any trailing control projections. We leave
duke@0 859 // these alone. PhiNodes and ParmNodes are made to follow the block start
duke@0 860 // Node. Everything else gets topo-sorted.
duke@0 861
duke@0 862 #ifndef PRODUCT
adlertz@5210 863 if (trace_opto_pipelining()) {
adlertz@5210 864 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
adlertz@5210 865 for (uint i = 0;i < block->number_of_nodes(); i++) {
duke@0 866 tty->print("# ");
adlertz@5210 867 block->get_node(i)->fast_dump();
duke@0 868 }
duke@0 869 tty->print_cr("#");
duke@0 870 }
duke@0 871 #endif
duke@0 872
duke@0 873 // RootNode is already sorted
adlertz@5210 874 if (block->number_of_nodes() == 1) {
adlertz@5210 875 return true;
adlertz@5210 876 }
duke@0 877
mcberg@9354 878 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
mcberg@9354 879
mcberg@9354 880 // We track the uses of local definitions as input dependences so that
mcberg@9354 881 // we know when a given instruction is avialable to be scheduled.
mcberg@9354 882 uint i;
mcberg@9354 883 if (OptoRegScheduling && block_size_threshold_ok) {
mcberg@9354 884 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
mcberg@9354 885 Node *n = block->get_node(i);
mcberg@9354 886 n->remove_flag(Node::Flag_is_scheduled);
mcberg@9354 887 if (!n->is_Phi()) {
mcberg@9354 888 recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
mcberg@9354 889 }
mcberg@9354 890 }
mcberg@9354 891 }
mcberg@9354 892
duke@0 893 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
adlertz@5210 894 uint node_cnt = block->end_idx();
duke@0 895 uint phi_cnt = 1;
duke@0 896 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
adlertz@5210 897 Node *n = block->get_node(i);
duke@0 898 if( n->is_Phi() || // Found a PhiNode or ParmNode
adlertz@5210 899 (n->is_Proj() && n->in(0) == block->head()) ) {
duke@0 900 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
adlertz@5210 901 block->map_node(block->get_node(phi_cnt), i);
adlertz@5210 902 block->map_node(n, phi_cnt++); // swap Phi/Parm up front
mcberg@9354 903 if (OptoRegScheduling && block_size_threshold_ok) {
mcberg@9354 904 // mark n as scheduled
mcberg@9354 905 n->add_flag(Node::Flag_is_scheduled);
mcberg@9354 906 }
duke@0 907 } else { // All others
duke@0 908 // Count block-local inputs to 'n'
duke@0 909 uint cnt = n->len(); // Input count
duke@0 910 uint local = 0;
duke@0 911 for( uint j=0; j<cnt; j++ ) {
duke@0 912 Node *m = n->in(j);
adlertz@5210 913 if( m && get_block_for_node(m) == block && !m->is_top() )
duke@0 914 local++; // One more block-local input
duke@0 915 }
roland@3012 916 ready_cnt.at_put(n->_idx, local); // Count em up
duke@0 917
never@2345 918 #ifdef ASSERT
never@2345 919 if( UseConcMarkSweepGC || UseG1GC ) {
never@2345 920 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
never@2345 921 // Check the precedence edges
never@2345 922 for (uint prec = n->req(); prec < n->len(); prec++) {
never@2345 923 Node* oop_store = n->in(prec);
never@2345 924 if (oop_store != NULL) {
adlertz@5210 925 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
never@2345 926 }
never@2345 927 }
never@2345 928 }
never@2345 929 }
never@2345 930 #endif
never@2345 931
duke@0 932 // A few node types require changing a required edge to a precedence edge
duke@0 933 // before allocation.
kvn@1100 934 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
kvn@1100 935 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
kvn@1100 936 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
kvn@253 937 // MemBarAcquire could be created without Precedent edge.
kvn@253 938 // del_req() replaces the specified edge with the last input edge
kvn@253 939 // and then removes the last edge. If the specified edge > number of
kvn@253 940 // edges the last edge will be moved outside of the input edges array
kvn@253 941 // and the edge will be lost. This is why this code should be
kvn@253 942 // executed only when Precedent (== TypeFunc::Parms) edge is present.
duke@0 943 Node *x = n->in(TypeFunc::Parms);
duke@0 944 n->del_req(TypeFunc::Parms);
duke@0 945 n->add_prec(x);
duke@0 946 }
duke@0 947 }
duke@0 948 }
adlertz@5210 949 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
adlertz@5210 950 ready_cnt.at_put(block->get_node(i2)->_idx, 0);
duke@0 951
duke@0 952 // All the prescheduled guys do not hold back internal nodes
duke@0 953 uint i3;
mcberg@9354 954 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
adlertz@5210 955 Node *n = block->get_node(i3); // Get pre-scheduled
duke@0 956 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
duke@0 957 Node* m = n->fast_out(j);
adlertz@5210 958 if (get_block_for_node(m) == block) { // Local-block user
roland@3012 959 int m_cnt = ready_cnt.at(m->_idx)-1;
mcberg@9354 960 if (OptoRegScheduling && block_size_threshold_ok) {
mcberg@9354 961 // mark m as scheduled
mcberg@9354 962 if (m_cnt < 0) {
mcberg@9354 963 m->add_flag(Node::Flag_is_scheduled);
mcberg@9354 964 }
mcberg@9354 965 }
roland@3012 966 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
roland@3012 967 }
duke@0 968 }
duke@0 969 }
duke@0 970
duke@0 971 Node_List delay;
duke@0 972 // Make a worklist
duke@0 973 Node_List worklist;
duke@0 974 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
adlertz@5210 975 Node *m = block->get_node(i4);
roland@3012 976 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
duke@0 977 if (m->is_iteratively_computed()) {
duke@0 978 // Push induction variable increments last to allow other uses
duke@0 979 // of the phi to be scheduled first. The select() method breaks
duke@0 980 // ties in scheduling by worklist order.
duke@0 981 delay.push(m);
never@125 982 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
never@125 983 // Force the CreateEx to the top of the list so it's processed
never@125 984 // first and ends up at the start of the block.
never@125 985 worklist.insert(0, m);
duke@0 986 } else {
duke@0 987 worklist.push(m); // Then on to worklist!
duke@0 988 }
duke@0 989 }
duke@0 990 }
duke@0 991 while (delay.size()) {
duke@0 992 Node* d = delay.pop();
duke@0 993 worklist.push(d);
duke@0 994 }
duke@0 995
mcberg@9354 996 if (OptoRegScheduling && block_size_threshold_ok) {
mcberg@9354 997 // To stage register pressure calculations we need to examine the live set variables
mcberg@9354 998 // breaking them up by register class to compartmentalize the calculations.
mcberg@9354 999 uint float_pressure = Matcher::float_pressure(FLOATPRESSURE);
mcberg@9354 1000 _regalloc->_sched_int_pressure.init(INTPRESSURE);
mcberg@9354 1001 _regalloc->_sched_float_pressure.init(float_pressure);
mcberg@9354 1002 _regalloc->_scratch_int_pressure.init(INTPRESSURE);
mcberg@9354 1003 _regalloc->_scratch_float_pressure.init(float_pressure);
mcberg@9354 1004
mcberg@9354 1005 _regalloc->compute_entry_block_pressure(block);
mcberg@9354 1006 }
mcberg@9354 1007
duke@0 1008 // Warm up the 'next_call' heuristic bits
adlertz@5210 1009 needed_for_next_call(block, block->head(), next_call);
duke@0 1010
duke@0 1011 #ifndef PRODUCT
adlertz@5210 1012 if (trace_opto_pipelining()) {
adlertz@5210 1013 for (uint j=0; j< block->number_of_nodes(); j++) {
adlertz@5210 1014 Node *n = block->get_node(j);
duke@0 1015 int idx = n->_idx;
roland@3012 1016 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
adlertz@5210 1017 tty->print("latency:%3d ", get_latency_for_node(n));
duke@0 1018 tty->print("%4d: %s\n", idx, n->Name());
duke@0 1019 }
duke@0 1020 }
duke@0 1021 #endif
duke@0 1022
roland@3012 1023 uint max_idx = (uint)ready_cnt.length();
duke@0 1024 // Pull from worklist and schedule
duke@0 1025 while( worklist.size() ) { // Worklist is not ready
duke@0 1026
duke@0 1027 #ifndef PRODUCT
adlertz@5210 1028 if (trace_opto_pipelining()) {
duke@0 1029 tty->print("# ready list:");
duke@0 1030 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
duke@0 1031 Node *n = worklist[i]; // Get Node on worklist
duke@0 1032 tty->print(" %d", n->_idx);
duke@0 1033 }
duke@0 1034 tty->cr();
duke@0 1035 }
duke@0 1036 #endif
duke@0 1037
duke@0 1038 // Select and pop a ready guy from worklist
mcberg@9354 1039 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
adlertz@5210 1040 block->map_node(n, phi_cnt++); // Schedule him next
duke@0 1041
mcberg@9354 1042 if (OptoRegScheduling && block_size_threshold_ok) {
mcberg@9354 1043 n->add_flag(Node::Flag_is_scheduled);
mcberg@9354 1044
mcberg@9354 1045 // Now adjust the resister pressure with the node we selected
mcberg@9354 1046 if (!n->is_Phi()) {
mcberg@9354 1047 adjust_register_pressure(n, block, recalc_pressure_nodes, true);
mcberg@9354 1048 }
mcberg@9354 1049 }
mcberg@9354 1050
duke@0 1051 #ifndef PRODUCT
adlertz@5210 1052 if (trace_opto_pipelining()) {
duke@0 1053 tty->print("# select %d: %s", n->_idx, n->Name());
adlertz@5210 1054 tty->print(", latency:%d", get_latency_for_node(n));
duke@0 1055 n->dump();
duke@0 1056 if (Verbose) {
duke@0 1057 tty->print("# ready list:");
duke@0 1058 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
duke@0 1059 Node *n = worklist[i]; // Get Node on worklist
duke@0 1060 tty->print(" %d", n->_idx);
duke@0 1061 }
duke@0 1062 tty->cr();
duke@0 1063 }
duke@0 1064 }
duke@0 1065
duke@0 1066 #endif
duke@0 1067 if( n->is_MachCall() ) {
duke@0 1068 MachCallNode *mcall = n->as_MachCall();
adlertz@5210 1069 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
duke@0 1070 continue;
duke@0 1071 }
roland@2881 1072
roland@2881 1073 if (n->is_Mach() && n->as_Mach()->has_call()) {
roland@2881 1074 RegMask regs;
adlertz@5210 1075 regs.Insert(_matcher.c_frame_pointer());
roland@2881 1076 regs.OR(n->out_RegMask());
roland@2881 1077
thartmann@6575 1078 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
adlertz@5210 1079 map_node_to_block(proj, block);
adlertz@5210 1080 block->insert_node(proj, phi_cnt++);
roland@2881 1081
adlertz@5210 1082 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
roland@2881 1083 }
roland@2881 1084
duke@0 1085 // Children are now all ready
duke@0 1086 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
duke@0 1087 Node* m = n->fast_out(i5); // Get user
adlertz@5210 1088 if (get_block_for_node(m) != block) {
adlertz@5074 1089 continue;
adlertz@5074 1090 }
duke@0 1091 if( m->is_Phi() ) continue;
roland@3012 1092 if (m->_idx >= max_idx) { // new node, skip it
roland@2881 1093 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
roland@2881 1094 continue;
roland@2881 1095 }
mcberg@9354 1096 int m_cnt = ready_cnt.at(m->_idx) - 1;
roland@3012 1097 ready_cnt.at_put(m->_idx, m_cnt);
roland@3012 1098 if( m_cnt == 0 )
duke@0 1099 worklist.push(m);
duke@0 1100 }
duke@0 1101 }
duke@0 1102
adlertz@5210 1103 if( phi_cnt != block->end_idx() ) {
duke@0 1104 // did not schedule all. Retry, Bailout, or Die
duke@0 1105 if (C->subsume_loads() == true && !C->failing()) {
duke@0 1106 // Retry with subsume_loads == false
duke@0 1107 // If this is the first failure, the sentinel string will "stick"
duke@0 1108 // to the Compile object, and the C2Compiler will see it and retry.
duke@0 1109 C->record_failure(C2Compiler::retry_no_subsuming_loads());
duke@0 1110 }
duke@0 1111 // assert( phi_cnt == end_idx(), "did not schedule all" );
duke@0 1112 return false;
duke@0 1113 }
duke@0 1114
mcberg@9354 1115 if (OptoRegScheduling && block_size_threshold_ok) {
mcberg@9354 1116 _regalloc->compute_exit_block_pressure(block);
mcberg@9354 1117 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
mcberg@9354 1118 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
mcberg@9354 1119 }
mcberg@9354 1120
duke@0 1121 #ifndef PRODUCT
adlertz@5210 1122 if (trace_opto_pipelining()) {
duke@0 1123 tty->print_cr("#");
duke@0 1124 tty->print_cr("# after schedule_local");
adlertz@5210 1125 for (uint i = 0;i < block->number_of_nodes();i++) {
duke@0 1126 tty->print("# ");
adlertz@5210 1127 block->get_node(i)->fast_dump();
duke@0 1128 }
mcberg@9354 1129 tty->print_cr("# ");
mcberg@9354 1130
mcberg@9354 1131 if (OptoRegScheduling && block_size_threshold_ok) {
mcberg@9354 1132 tty->print_cr("# pressure info : %d", block->_pre_order);
mcberg@9354 1133 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
mcberg@9354 1134 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
mcberg@9354 1135 }
duke@0 1136 tty->cr();
duke@0 1137 }
duke@0 1138 #endif
duke@0 1139
duke@0 1140 return true;
duke@0 1141 }
duke@0 1142
duke@0 1143 //--------------------------catch_cleanup_fix_all_inputs-----------------------
duke@0 1144 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
duke@0 1145 for (uint l = 0; l < use->len(); l++) {
duke@0 1146 if (use->in(l) == old_def) {
duke@0 1147 if (l < use->req()) {
duke@0 1148 use->set_req(l, new_def);
duke@0 1149 } else {
duke@0 1150 use->rm_prec(l);
duke@0 1151 use->add_prec(new_def);
duke@0 1152 l--;
duke@0 1153 }
duke@0 1154 }
duke@0 1155 }
duke@0 1156 }
duke@0 1157
duke@0 1158 //------------------------------catch_cleanup_find_cloned_def------------------
adlertz@5210 1159 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
duke@0 1160 assert( use_blk != def_blk, "Inter-block cleanup only");
duke@0 1161
duke@0 1162 // The use is some block below the Catch. Find and return the clone of the def
duke@0 1163 // that dominates the use. If there is no clone in a dominating block, then
duke@0 1164 // create a phi for the def in a dominating block.
duke@0 1165
duke@0 1166 // Find which successor block dominates this use. The successor
duke@0 1167 // blocks must all be single-entry (from the Catch only; I will have
duke@0 1168 // split blocks to make this so), hence they all dominate.
duke@0 1169 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
duke@0 1170 use_blk = use_blk->_idom;
duke@0 1171
duke@0 1172 // Find the successor
duke@0 1173 Node *fixup = NULL;
duke@0 1174
duke@0 1175 uint j;
duke@0 1176 for( j = 0; j < def_blk->_num_succs; j++ )
duke@0 1177 if( use_blk == def_blk->_succs[j] )
duke@0 1178 break;
duke@0 1179
duke@0 1180 if( j == def_blk->_num_succs ) {
duke@0 1181 // Block at same level in dom-tree is not a successor. It needs a
duke@0 1182 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
duke@0 1183 Node_Array inputs = new Node_List(Thread::current()->resource_area());
duke@0 1184 for(uint k = 1; k < use_blk->num_preds(); k++) {
adlertz@5210 1185 Block* block = get_block_for_node(use_blk->pred(k));
adlertz@5210 1186 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
duke@0 1187 }
duke@0 1188
duke@0 1189 // Check to see if the use_blk already has an identical phi inserted.
duke@0 1190 // If it exists, it will be at the first position since all uses of a
duke@0 1191 // def are processed together.
adlertz@5206 1192 Node *phi = use_blk->get_node(1);
duke@0 1193 if( phi->is_Phi() ) {
duke@0 1194 fixup = phi;
duke@0 1195 for (uint k = 1; k < use_blk->num_preds(); k++) {
duke@0 1196 if (phi->in(k) != inputs[k]) {
duke@0 1197 // Not a match
duke@0 1198 fixup = NULL;
duke@0 1199 break;
duke@0 1200 }
duke@0 1201 }
duke@0 1202 }
duke@0 1203
duke@0 1204 // If an existing PhiNode was not found, make a new one.
duke@0 1205 if (fixup == NULL) {
duke@0 1206 Node *new_phi = PhiNode::make(use_blk->head(), def);
adlertz@5206 1207 use_blk->insert_node(new_phi, 1);
adlertz@5210 1208 map_node_to_block(new_phi, use_blk);
duke@0 1209 for (uint k = 1; k < use_blk->num_preds(); k++) {
duke@0 1210 new_phi->set_req(k, inputs[k]);
duke@0 1211 }
duke@0 1212 fixup = new_phi;
duke@0 1213 }
duke@0 1214
duke@0 1215 } else {
duke@0 1216 // Found the use just below the Catch. Make it use the clone.
adlertz@5206 1217 fixup = use_blk->get_node(n_clone_idx);
duke@0 1218 }
duke@0 1219
duke@0 1220 return fixup;
duke@0 1221 }
duke@0 1222
duke@0 1223 //--------------------------catch_cleanup_intra_block--------------------------
duke@0 1224 // Fix all input edges in use that reference "def". The use is in the same
duke@0 1225 // block as the def and both have been cloned in each successor block.
duke@0 1226 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
duke@0 1227
duke@0 1228 // Both the use and def have been cloned. For each successor block,
duke@0 1229 // get the clone of the use, and make its input the clone of the def
duke@0 1230 // found in that block.
duke@0 1231
duke@0 1232 uint use_idx = blk->find_node(use);
duke@0 1233 uint offset_idx = use_idx - beg;
duke@0 1234 for( uint k = 0; k < blk->_num_succs; k++ ) {
duke@0 1235 // Get clone in each successor block
duke@0 1236 Block *sb = blk->_succs[k];
adlertz@5206 1237 Node *clone = sb->get_node(offset_idx+1);
duke@0 1238 assert( clone->Opcode() == use->Opcode(), "" );
duke@0 1239
duke@0 1240 // Make use-clone reference the def-clone
adlertz@5206 1241 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
duke@0 1242 }
duke@0 1243 }
duke@0 1244
duke@0 1245 //------------------------------catch_cleanup_inter_block---------------------
duke@0 1246 // Fix all input edges in use that reference "def". The use is in a different
duke@0 1247 // block than the def.
adlertz@5210 1248 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
duke@0 1249 if( !use_blk ) return; // Can happen if the use is a precedence edge
duke@0 1250
adlertz@5210 1251 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
duke@0 1252 catch_cleanup_fix_all_inputs(use, def, new_def);
duke@0 1253 }
duke@0 1254
duke@0 1255 //------------------------------call_catch_cleanup-----------------------------
duke@0 1256 // If we inserted any instructions between a Call and his CatchNode,
duke@0 1257 // clone the instructions on all paths below the Catch.
adlertz@5210 1258 void PhaseCFG::call_catch_cleanup(Block* block) {
duke@0 1259
duke@0 1260 // End of region to clone
adlertz@5210 1261 uint end = block->end_idx();
adlertz@5210 1262 if( !block->get_node(end)->is_Catch() ) return;
duke@0 1263 // Start of region to clone
duke@0 1264 uint beg = end;
adlertz@5210 1265 while(!block->get_node(beg-1)->is_MachProj() ||
adlertz@5210 1266 !block->get_node(beg-1)->in(0)->is_MachCall() ) {
duke@0 1267 beg--;
duke@0 1268 assert(beg > 0,"Catch cleanup walking beyond block boundary");
duke@0 1269 }
duke@0 1270 // Range of inserted instructions is [beg, end)
duke@0 1271 if( beg == end ) return;
duke@0 1272
duke@0 1273 // Clone along all Catch output paths. Clone area between the 'beg' and
duke@0 1274 // 'end' indices.
adlertz@5210 1275 for( uint i = 0; i < block->_num_succs; i++ ) {
adlertz@5210 1276 Block *sb = block->_succs[i];
duke@0 1277 // Clone the entire area; ignoring the edge fixup for now.
duke@0 1278 for( uint j = end; j > beg; j-- ) {
kvn@1613 1279 // It is safe here to clone a node with anti_dependence
kvn@1613 1280 // since clones dominate on each path.
adlertz@5210 1281 Node *clone = block->get_node(j-1)->clone();
adlertz@5206 1282 sb->insert_node(clone, 1);
adlertz@5210 1283 map_node_to_block(clone, sb);
duke@0 1284 }
duke@0 1285 }
duke@0 1286
duke@0 1287
duke@0 1288 // Fixup edges. Check the def-use info per cloned Node
duke@0 1289 for(uint i2 = beg; i2 < end; i2++ ) {
duke@0 1290 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
adlertz@5210 1291 Node *n = block->get_node(i2); // Node that got cloned
duke@0 1292 // Need DU safe iterator because of edge manipulation in calls.
duke@0 1293 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area());
duke@0 1294 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
duke@0 1295 out->push(n->fast_out(j1));
duke@0 1296 }
duke@0 1297 uint max = out->size();
duke@0 1298 for (uint j = 0; j < max; j++) {// For all users
duke@0 1299 Node *use = out->pop();
adlertz@5210 1300 Block *buse = get_block_for_node(use);
duke@0 1301 if( use->is_Phi() ) {
duke@0 1302 for( uint k = 1; k < use->req(); k++ )
duke@0 1303 if( use->in(k) == n ) {
adlertz@5210 1304 Block* b = get_block_for_node(buse->pred(k));
adlertz@5210 1305 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
duke@0 1306 use->set_req(k, fixup);
duke@0 1307 }
duke@0 1308 } else {
adlertz@5210 1309 if (block == buse) {
adlertz@5210 1310 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
duke@0 1311 } else {
adlertz@5210 1312 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
duke@0 1313 }
duke@0 1314 }
duke@0 1315 } // End for all users
duke@0 1316
duke@0 1317 } // End of for all Nodes in cloned area
duke@0 1318
duke@0 1319 // Remove the now-dead cloned ops
duke@0 1320 for(uint i3 = beg; i3 < end; i3++ ) {
adlertz@5210 1321 block->get_node(beg)->disconnect_inputs(NULL, C);
adlertz@5210 1322 block->remove_node(beg);
duke@0 1323 }
duke@0 1324
duke@0 1325 // If the successor blocks have a CreateEx node, move it back to the top
adlertz@5210 1326 for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
adlertz@5210 1327 Block *sb = block->_succs[i4];
duke@0 1328 uint new_cnt = end - beg;
duke@0 1329 // Remove any newly created, but dead, nodes.
duke@0 1330 for( uint j = new_cnt; j > 0; j-- ) {
adlertz@5206 1331 Node *n = sb->get_node(j);
duke@0 1332 if (n->outcnt() == 0 &&
duke@0 1333 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
bharadwaj@3880 1334 n->disconnect_inputs(NULL, C);
adlertz@5206 1335 sb->remove_node(j);
duke@0 1336 new_cnt--;
duke@0 1337 }
duke@0 1338 }
duke@0 1339 // If any newly created nodes remain, move the CreateEx node to the top
duke@0 1340 if (new_cnt > 0) {
adlertz@5206 1341 Node *cex = sb->get_node(1+new_cnt);
duke@0 1342 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
adlertz@5206 1343 sb->remove_node(1+new_cnt);
adlertz@5206 1344 sb->insert_node(cex, 1);
duke@0 1345 }
duke@0 1346 }
duke@0 1347 }
duke@0 1348 }