changeset 9729:11486a585ba2

8140584: nmethod::oops_do_marking_epilogue always runs verification code Reviewed-by: tschatzl, kvn
author stefank
date Tue, 27 Oct 2015 12:25:08 +0100
parents 7f575c73e45e
children 862e71c47a07
files src/cpu/ppc/vm/relocInfo_ppc.cpp src/cpu/sparc/vm/nativeInst_sparc.cpp src/cpu/sparc/vm/relocInfo_sparc.cpp src/cpu/x86/vm/relocInfo_x86.cpp src/share/vm/code/nmethod.cpp src/share/vm/code/relocInfo.cpp
diffstat 6 files changed, 15 insertions(+), 15 deletions(-) [+]
line wrap: on
line diff
--- a/src/cpu/ppc/vm/relocInfo_ppc.cpp	Mon Nov 09 11:50:15 2015 -0500
+++ b/src/cpu/ppc/vm/relocInfo_ppc.cpp	Tue Oct 27 12:25:08 2015 +0100
@@ -61,7 +61,7 @@
       nativeMovConstReg_at(addr())->set_narrow_oop(no, code());
     }
   } else {
-    assert((address) (nativeMovConstReg_at(addr())->data()) == x, "data must match");
+    guarantee((address) (nativeMovConstReg_at(addr())->data()) == x, "data must match");
   }
 }
 
--- a/src/cpu/sparc/vm/nativeInst_sparc.cpp	Mon Nov 09 11:50:15 2015 -0500
+++ b/src/cpu/sparc/vm/nativeInst_sparc.cpp	Tue Oct 27 12:25:08 2015 +0100
@@ -60,7 +60,7 @@
   masm.patchable_sethi(x, destreg);
   int len = buffer - masm.pc();
   for (int i = 0; i < len; i++) {
-    assert(instaddr[i] == buffer[i], "instructions must match");
+    guarantee(instaddr[i] == buffer[i], "instructions must match");
   }
 }
 
--- a/src/cpu/sparc/vm/relocInfo_sparc.cpp	Mon Nov 09 11:50:15 2015 -0500
+++ b/src/cpu/sparc/vm/relocInfo_sparc.cpp	Tue Oct 27 12:25:08 2015 +0100
@@ -84,7 +84,7 @@
     inst &= ~Assembler::simm(    -1, 13);
     inst |=  Assembler::simm(simm13, 13);
     if (verify_only) {
-      assert(ip->long_at(0) == inst, "instructions must match");
+      guarantee(ip->long_at(0) == inst, "instructions must match");
     } else {
       ip->set_long_at(0, inst);
     }
@@ -102,15 +102,15 @@
       inst &= ~Assembler::hi22(-1);
       inst |=  Assembler::hi22((intptr_t)np);
       if (verify_only) {
-        assert(ip->long_at(0) == inst, "instructions must match");
+        guarantee(ip->long_at(0) == inst, "instructions must match");
       } else {
         ip->set_long_at(0, inst);
       }
       inst2 = ip->long_at( NativeInstruction::nop_instruction_size );
       guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op");
       if (verify_only) {
-        assert(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np),
-               "instructions must match");
+        guarantee(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np),
+                  "instructions must match");
       } else {
         ip->set_long_at(NativeInstruction::nop_instruction_size, NativeInstruction::set_data32_simm13( inst2, (intptr_t)np));
       }
@@ -127,7 +127,7 @@
     inst |=  Assembler::hi22((intptr_t)x);
     // (ignore offset; it doesn't play into the sethi)
     if (verify_only) {
-      assert(ip->long_at(0) == inst, "instructions must match");
+      guarantee(ip->long_at(0) == inst, "instructions must match");
     } else {
       ip->set_long_at(0, inst);
     }
--- a/src/cpu/x86/vm/relocInfo_x86.cpp	Mon Nov 09 11:50:15 2015 -0500
+++ b/src/cpu/x86/vm/relocInfo_x86.cpp	Tue Oct 27 12:25:08 2015 +0100
@@ -41,7 +41,7 @@
          which == Assembler::imm_operand, "format unpacks ok");
   if (which == Assembler::imm_operand) {
     if (verify_only) {
-      assert(*pd_address_in_code() == x, "instructions must match");
+      guarantee(*pd_address_in_code() == x, "instructions must match");
     } else {
       *pd_address_in_code() = x;
     }
@@ -50,13 +50,13 @@
     // both compressed oops and compressed classes look the same
     if (Universe::heap()->is_in_reserved((oop)x)) {
     if (verify_only) {
-      assert(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match");
+      guarantee(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match");
     } else {
       *(int32_t*) disp = oopDesc::encode_heap_oop((oop)x);
     }
   } else {
       if (verify_only) {
-        assert(*(uint32_t*) disp == Klass::encode_klass((Klass*)x), "instructions must match");
+        guarantee(*(uint32_t*) disp == Klass::encode_klass((Klass*)x), "instructions must match");
       } else {
         *(int32_t*) disp = Klass::encode_klass((Klass*)x);
       }
@@ -67,14 +67,14 @@
     address disp = Assembler::locate_operand(ip, which);
     address next_ip = Assembler::locate_next_instruction(ip);
     if (verify_only) {
-      assert(*(int32_t*) disp == (x - next_ip), "instructions must match");
+      guarantee(*(int32_t*) disp == (x - next_ip), "instructions must match");
     } else {
       *(int32_t*) disp = x - next_ip;
     }
   }
 #else
   if (verify_only) {
-    assert(*pd_address_in_code() == (x + o), "instructions must match");
+    guarantee(*pd_address_in_code() == (x + o), "instructions must match");
   } else {
     *pd_address_in_code() = x + o;
   }
--- a/src/share/vm/code/nmethod.cpp	Mon Nov 09 11:50:15 2015 -0500
+++ b/src/share/vm/code/nmethod.cpp	Tue Oct 27 12:25:08 2015 +0100
@@ -2315,7 +2315,7 @@
     assert(cur != NULL, "not NULL-terminated");
     nmethod* next = cur->_oops_do_mark_link;
     cur->_oops_do_mark_link = NULL;
-    cur->verify_oop_relocations();
+    DEBUG_ONLY(cur->verify_oop_relocations());
     NOT_PRODUCT(if (TraceScavenge)  cur->print_on(tty, "oops_do, unmark"));
     cur = next;
   }
--- a/src/share/vm/code/relocInfo.cpp	Mon Nov 09 11:50:15 2015 -0500
+++ b/src/share/vm/code/relocInfo.cpp	Tue Oct 27 12:25:08 2015 +0100
@@ -438,10 +438,10 @@
 void Relocation::const_verify_data_value(address x) {
 #ifdef _LP64
   if (format() == relocInfo::narrow_oop_in_const) {
-    assert(*(narrowOop*)addr() == oopDesc::encode_heap_oop((oop) x), "must agree");
+    guarantee(*(narrowOop*)addr() == oopDesc::encode_heap_oop((oop) x), "must agree");
   } else {
 #endif
-    assert(*(address*)addr() == x, "must agree");
+    guarantee(*(address*)addr() == x, "must agree");
 #ifdef _LP64
   }
 #endif