changeset 39255:c7281e9142ef

8149418: AArch64: replace tst+br with tbz instruction when tst's constant operand is 2 power Summary: replace tst+br with tbz instruction when tst's constant operand is 2 power Reviewed-by: aph
author fyang
date Thu, 02 Jun 2016 21:12:46 +0800
parents fb4492288b01
children e98e9a2d696b
files hotspot/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.cpp hotspot/src/cpu/aarch64/vm/templateInterpreterGenerator_aarch64.cpp hotspot/src/cpu/aarch64/vm/templateTable_aarch64.cpp
diffstat 4 files changed, 9 insertions(+), 16 deletions(-) [+]
line wrap: on
line diff
--- a/hotspot/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp	Thu Jun 02 08:46:52 2016 +0200
+++ b/hotspot/src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp	Thu Jun 02 21:12:46 2016 +0800
@@ -944,8 +944,7 @@
         Register t = r5;
         __ load_klass(t, r0);
         __ ldrw(t, Address(t, Klass::access_flags_offset()));
-        __ tst(t, JVM_ACC_HAS_FINALIZER);
-        __ br(Assembler::NE, register_finalizer);
+        __ tbnz(t, exact_log2(JVM_ACC_HAS_FINALIZER), register_finalizer);
         __ ret(lr);
 
         __ bind(register_finalizer);
--- a/hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.cpp	Thu Jun 02 08:46:52 2016 +0200
+++ b/hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.cpp	Thu Jun 02 21:12:46 2016 +0800
@@ -93,10 +93,8 @@
     // This method is only called just after the call into the vm in
     // call_VM_base, so the arg registers are available.
     ldrw(rscratch1, Address(rthread, JavaThread::popframe_condition_offset()));
-    tstw(rscratch1, JavaThread::popframe_pending_bit);
-    br(Assembler::EQ, L);
-    tstw(rscratch1, JavaThread::popframe_processing_bit);
-    br(Assembler::NE, L);
+    tbz(rscratch1, exact_log2(JavaThread::popframe_pending_bit), L);
+    tbnz(rscratch1, exact_log2(JavaThread::popframe_processing_bit), L);
     // Call Interpreter::remove_activation_preserving_args_entry() to get the
     // address of the same-named entrypoint in the generated interpreter code.
     call_VM_leaf(CAST_FROM_FN_PTR(address, Interpreter::remove_activation_preserving_args_entry));
@@ -505,8 +503,7 @@
  // get method access flags
   ldr(r1, Address(rfp, frame::interpreter_frame_method_offset * wordSize));
   ldr(r2, Address(r1, Method::access_flags_offset()));
-  tst(r2, JVM_ACC_SYNCHRONIZED);
-  br(Assembler::EQ, unlocked);
+  tbz(r2, exact_log2(JVM_ACC_SYNCHRONIZED), unlocked);
 
   // Don't unlock anything if the _do_not_unlock_if_synchronized flag
   // is set.
@@ -1582,8 +1579,8 @@
                            // do. The unknown bit may have been
                            // set already but no need to check.
 
-  tst(obj, TypeEntries::type_unknown);
-  br(Assembler::NE, next); // already unknown. Nothing to do anymore.
+  tbnz(obj, exact_log2(TypeEntries::type_unknown), next);
+  // already unknown. Nothing to do anymore.
 
   ldr(rscratch1, mdo_addr);
   cbz(rscratch1, none);
--- a/hotspot/src/cpu/aarch64/vm/templateInterpreterGenerator_aarch64.cpp	Thu Jun 02 08:46:52 2016 +0200
+++ b/hotspot/src/cpu/aarch64/vm/templateInterpreterGenerator_aarch64.cpp	Thu Jun 02 21:12:46 2016 +0800
@@ -1242,8 +1242,7 @@
   {
     Label L;
     __ ldrw(t, Address(rmethod, Method::access_flags_offset()));
-    __ tst(t, JVM_ACC_STATIC);
-    __ br(Assembler::EQ, L);
+    __ tbz(t, exact_log2(JVM_ACC_STATIC), L);
     // get mirror
     __ load_mirror(t, rmethod);
     // copy mirror into activation frame
@@ -1435,8 +1434,7 @@
   {
     Label L;
     __ ldrw(t, Address(rmethod, Method::access_flags_offset()));
-    __ tst(t, JVM_ACC_SYNCHRONIZED);
-    __ br(Assembler::EQ, L);
+    __ tbz(t, exact_log2(JVM_ACC_SYNCHRONIZED), L);
     // the code below should be shared with interpreter macro
     // assembler implementation
     {
--- a/hotspot/src/cpu/aarch64/vm/templateTable_aarch64.cpp	Thu Jun 02 08:46:52 2016 +0200
+++ b/hotspot/src/cpu/aarch64/vm/templateTable_aarch64.cpp	Thu Jun 02 21:12:46 2016 +0800
@@ -2190,9 +2190,8 @@
     __ ldr(c_rarg1, aaddress(0));
     __ load_klass(r3, c_rarg1);
     __ ldrw(r3, Address(r3, Klass::access_flags_offset()));
-    __ tst(r3, JVM_ACC_HAS_FINALIZER);
     Label skip_register_finalizer;
-    __ br(Assembler::EQ, skip_register_finalizer);
+    __ tbz(r3, exact_log2(JVM_ACC_HAS_FINALIZER), skip_register_finalizer);
 
     __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::register_finalizer), c_rarg1);