--- a/anonk.patch Sat Sep 06 19:40:47 2008 -0700
+++ b/anonk.patch Sun Sep 07 00:42:43 2008 -0700
@@ -1052,7 +1052,7 @@ diff --git a/src/share/vm/runtime/global
diff --git a/src/share/vm/runtime/globals.hpp b/src/share/vm/runtime/globals.hpp
--- a/src/share/vm/runtime/globals.hpp
+++ b/src/share/vm/runtime/globals.hpp
-@@ -3181,6 +3181,9 @@
+@@ -3187,6 +3187,9 @@
"Skip assert() and verify() which page-in unwanted shared " \
"objects. ") \
\
--- a/indy.patch Sat Sep 06 19:40:47 2008 -0700
+++ b/indy.patch Sun Sep 07 00:42:43 2008 -0700
@@ -177,7 +177,7 @@ diff --git a/src/cpu/x86/vm/interp_masm_
diff --git a/src/cpu/x86/vm/interp_masm_x86_32.cpp b/src/cpu/x86/vm/interp_masm_x86_32.cpp
--- a/src/cpu/x86/vm/interp_masm_x86_32.cpp
+++ b/src/cpu/x86/vm/interp_masm_x86_32.cpp
-@@ -188,20 +188,33 @@
+@@ -189,20 +189,33 @@
}
@@ -200,9 +200,9 @@ diff --git a/src/cpu/x86/vm/interp_masm_
assert(cache != index, "must use different registers");
- load_unsigned_word(index, Address(rsi, bcp_offset));
+ get_cache_index_at_bcp(index, bcp_offset, giant_index);
- movl(cache, Address(rbp, frame::interpreter_frame_cache_offset * wordSize));
+ movptr(cache, Address(rbp, frame::interpreter_frame_cache_offset * wordSize));
assert(sizeof(ConstantPoolCacheEntry) == 4*wordSize, "adjust code below");
- shll(index, 2); // convert from field index to ConstantPoolCacheEntry index
+ shlptr(index, 2); // convert from field index to ConstantPoolCacheEntry index
}
@@ -216,7 +216,7 @@ diff --git a/src/cpu/x86/vm/interp_masm_
assert(sizeof(ConstantPoolCacheEntry) == 4*wordSize, "adjust code below");
// convert from field index to ConstantPoolCacheEntry index
// and from word offset to byte offset
-@@ -1241,7 +1254,9 @@
+@@ -1245,7 +1258,9 @@
}
@@ -227,7 +227,7 @@ diff --git a/src/cpu/x86/vm/interp_masm_
if (ProfileInterpreter) {
Label profile_continue;
-@@ -1251,8 +1266,15 @@
+@@ -1255,8 +1270,15 @@
// We are making a call. Increment the count.
increment_mdp_data_at(mdp, in_bytes(CounterData::count_offset()));
@@ -247,7 +247,7 @@ diff --git a/src/cpu/x86/vm/interp_masm_
--- a/src/cpu/x86/vm/interp_masm_x86_32.hpp
+++ b/src/cpu/x86/vm/interp_masm_x86_32.hpp
@@ -76,8 +76,9 @@
- void get_cpool_and_tags(Register cpool, Register tags) { get_constant_pool(cpool); movl(tags, Address(cpool, constantPoolOopDesc::tags_offset_in_bytes()));
+ void get_cpool_and_tags(Register cpool, Register tags) { get_constant_pool(cpool); movptr(tags, Address(cpool, constantPoolOopDesc::tags_offset_in_bytes()));
}
void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset);
- void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset);
@@ -271,7 +271,7 @@ diff --git a/src/cpu/x86/vm/interp_masm_
diff --git a/src/cpu/x86/vm/interp_masm_x86_64.cpp b/src/cpu/x86/vm/interp_masm_x86_64.cpp
--- a/src/cpu/x86/vm/interp_masm_x86_64.cpp
+++ b/src/cpu/x86/vm/interp_masm_x86_64.cpp
-@@ -186,12 +186,27 @@
+@@ -195,12 +195,27 @@
}
@@ -299,10 +299,10 @@ diff --git a/src/cpu/x86/vm/interp_masm_
assert(cache != index, "must use different registers");
- load_unsigned_word(index, Address(r13, bcp_offset));
+ get_cache_index_at_bcp(index, bcp_offset, giant_index);
- movq(cache, Address(rbp, frame::interpreter_frame_cache_offset * wordSize));
+ movptr(cache, Address(rbp, frame::interpreter_frame_cache_offset * wordSize));
assert(sizeof(ConstantPoolCacheEntry) == 4 * wordSize, "adjust code below");
// convert from field index to ConstantPoolCacheEntry index
-@@ -201,10 +216,10 @@
+@@ -210,10 +225,10 @@
void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache,
Register tmp,
@@ -316,7 +316,7 @@ diff --git a/src/cpu/x86/vm/interp_masm_
assert(sizeof(ConstantPoolCacheEntry) == 4 * wordSize, "adjust code below");
// convert from field index to ConstantPoolCacheEntry index
// and from word offset to byte offset
-@@ -1281,7 +1296,8 @@
+@@ -1298,7 +1313,8 @@
void InterpreterMacroAssembler::profile_virtual_call(Register receiver,
Register mdp,
@@ -326,7 +326,7 @@ diff --git a/src/cpu/x86/vm/interp_masm_
if (ProfileInterpreter) {
Label profile_continue;
-@@ -1291,8 +1307,15 @@
+@@ -1308,8 +1324,15 @@
// We are making a call. Increment the count.
increment_mdp_data_at(mdp, in_bytes(CounterData::count_offset()));
@@ -345,7 +345,7 @@ diff --git a/src/cpu/x86/vm/interp_masm_
diff --git a/src/cpu/x86/vm/interp_masm_x86_64.hpp b/src/cpu/x86/vm/interp_masm_x86_64.hpp
--- a/src/cpu/x86/vm/interp_masm_x86_64.hpp
+++ b/src/cpu/x86/vm/interp_masm_x86_64.hpp
-@@ -94,9 +94,10 @@
+@@ -95,9 +95,10 @@
void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset);
void get_cache_and_index_at_bcp(Register cache, Register index,
@@ -356,9 +356,9 @@ diff --git a/src/cpu/x86/vm/interp_masm_
+ int bcp_offset, bool giant_index = false);
+ void get_cache_index_at_bcp(Register index, int bcp_offset, bool giant_index = false);
+
void pop_ptr(Register r = rax);
- void pop_i(Register r = rax);
-@@ -232,7 +233,8 @@
+@@ -236,7 +237,8 @@
void profile_call(Register mdp);
void profile_final_call(Register mdp);
void profile_virtual_call(Register receiver, Register mdp,
@@ -411,13 +411,13 @@ diff --git a/src/cpu/x86/vm/templateInte
// to end up back on the FPU so it can operate on them.
- if (state == ftos && UseSSE >= 1) {
+ if (incoming_state == ftos && UseSSE >= 1) {
- __ subl(rsp, wordSize);
+ __ subptr(rsp, wordSize);
__ movflt(Address(rsp, 0), xmm0);
__ fld_s(Address(rsp, 0));
- __ addl(rsp, wordSize);
+ __ addptr(rsp, wordSize);
- } else if (state == dtos && UseSSE >= 2) {
+ } else if (incoming_state == dtos && UseSSE >= 2) {
- __ subl(rsp, 2*wordSize);
+ __ subptr(rsp, 2*wordSize);
__ movdbl(Address(rsp, 0), xmm0);
__ fld_d(Address(rsp, 0));
@@ -217,13 +226,116 @@
@@ -514,10 +514,10 @@ diff --git a/src/cpu/x86/vm/templateInte
+ __ bind(L_ok);
+ }
__ movl(rbx, Address(rbx, rcx,
- Address::times_4, constantPoolCacheOopDesc::base_offset() +
+ Address::times_ptr, constantPoolCacheOopDesc::base_offset() +
ConstantPoolCacheEntry::flags_offset()));
- __ andl(rbx, 0xFF);
- __ leal(rsp, Address(rsp, rbx, Interpreter::stackElementScale()));
+ __ andptr(rbx, 0xFF);
+ __ lea(rsp, Address(rsp, rbx, Interpreter::stackElementScale()));
__ dispatch_next(state, step);
+
+ // out of the main line of code...
@@ -541,7 +541,7 @@ diff --git a/src/cpu/x86/vm/templateInte
diff --git a/src/cpu/x86/vm/templateInterpreter_x86_64.cpp b/src/cpu/x86/vm/templateInterpreter_x86_64.cpp
--- a/src/cpu/x86/vm/templateInterpreter_x86_64.cpp
+++ b/src/cpu/x86/vm/templateInterpreter_x86_64.cpp
-@@ -174,7 +174,17 @@
+@@ -176,7 +176,17 @@
address TemplateInterpreterGenerator::generate_return_entry_for(TosState state,
@@ -560,11 +560,12 @@ diff --git a/src/cpu/x86/vm/templateInte
// amd64 doesn't need to do anything special about compiled returns
// to the interpreter so the code that exists on x86 to place a sentinel
-@@ -189,7 +199,13 @@
+@@ -191,7 +201,14 @@
__ restore_bcp();
__ restore_locals();
- __ get_cache_and_index_at_bcp(rbx, rcx, 1);
++
+ Label L_got_cache, L_giant_index;
+ if (InvokeDynamic) {
+ __ cmpb(Address(r13, 0), Bytecodes::_invokedynamic);
@@ -575,9 +576,9 @@ diff --git a/src/cpu/x86/vm/templateInte
__ movl(rbx, Address(rbx, rcx,
Address::times_8,
in_bytes(constantPoolCacheOopDesc::base_offset()) +
-@@ -198,6 +214,12 @@
+@@ -200,6 +217,12 @@
if (TaggedStackInterpreter) __ shll(rbx, 1); // 2 slots per parameter.
- __ leaq(rsp, Address(rsp, rbx, Address::times_8));
+ __ lea(rsp, Address(rsp, rbx, Address::times_8));
__ dispatch_next(state, step);
+
+ if (InvokeDynamic) {
@@ -591,7 +592,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
diff --git a/src/cpu/x86/vm/templateTable_x86_32.cpp b/src/cpu/x86/vm/templateTable_x86_32.cpp
--- a/src/cpu/x86/vm/templateTable_x86_32.cpp
+++ b/src/cpu/x86/vm/templateTable_x86_32.cpp
-@@ -132,12 +132,12 @@
+@@ -134,12 +134,12 @@
__ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::set_original_bytecode_at), scratch, rsi, bc);
#ifndef ASSERT
__ jmpb(patch_done);
@@ -608,7 +609,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
Label okay;
__ load_unsigned_byte(scratch, at_bcp(0));
__ cmpl(scratch, (int)Bytecodes::java_code(bytecode));
-@@ -2015,6 +2015,7 @@
+@@ -2026,6 +2026,7 @@
void TemplateTable::resolve_cache_and_index(int byte_no, Register Rcache, Register index) {
assert(byte_no == 1 || byte_no == 2, "byte_no out of range");
@@ -616,7 +617,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
Register temp = rbx;
-@@ -2022,13 +2023,19 @@
+@@ -2033,13 +2034,19 @@
const int shift_count = (1 + byte_no)*BitsPerByte;
Label resolved;
@@ -643,7 +644,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// resolve first time through
address entry;
-@@ -2041,12 +2048,13 @@
+@@ -2052,12 +2059,13 @@
case Bytecodes::_invokespecial : // fall through
case Bytecodes::_invokestatic : // fall through
case Bytecodes::_invokeinterface: entry = CAST_FROM_FN_PTR(address, InterpreterRuntime::resolve_invoke); break;
@@ -658,7 +659,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
__ bind(resolved);
}
-@@ -2761,9 +2769,14 @@
+@@ -2794,9 +2802,14 @@
}
@@ -674,7 +675,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
const bool is_invokevirtual = code == Bytecodes::_invokevirtual;
const bool is_invokespecial = code == Bytecodes::_invokespecial;
const bool load_receiver = code != Bytecodes::_invokestatic;
-@@ -2773,6 +2786,9 @@
+@@ -2806,6 +2819,9 @@
const Register recv = rcx;
const Register flags = rdx;
assert_different_registers(method, index, recv, flags);
@@ -684,7 +685,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// save 'interpreter return address'
__ save_bcp();
-@@ -2784,8 +2800,13 @@
+@@ -2817,8 +2833,13 @@
__ movl(recv, flags);
__ andl(recv, 0xFF);
// recv count is 0 based?
@@ -700,7 +701,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
}
// do null check if needed
-@@ -2802,11 +2823,14 @@
+@@ -2835,11 +2856,15 @@
// Make sure we don't need to mask flags for tosBits after the above shift
ConstantPoolCacheEntry::verify_tosBits();
// load return address
@@ -710,17 +711,18 @@ diff --git a/src/cpu/x86/vm/templateTabl
- : (int)Interpreter::return_3_addrs_by_index_table();
- __ movl(flags, Address(noreg, flags, Address::times_4, table));
+ {
-+ address table =
++ address table_addr =
+ (is_invdyn_bootstrap)
+ ? (address)Interpreter::return_5_unbox_addrs_by_index_table()
+ : (is_invokeinterface || is_invokedynamic)
+ ? (address)Interpreter::return_5_addrs_by_index_table()
+ : (address)Interpreter::return_3_addrs_by_index_table();
-+ __ movl(flags, Address(noreg, flags, Address::times_4, (int)table));
++ ExternalAddress table(table_addr);
++ __ movptr(flags, ArrayAddress(table, Address(noreg, flags, Address::times_ptr)));
}
// push return address
-@@ -2868,7 +2892,7 @@
+@@ -2901,7 +2926,7 @@
void TemplateTable::invokevirtual(int byte_no) {
transition(vtos, vtos);
@@ -729,7 +731,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// rbx,: index
// rcx: receiver
-@@ -2880,7 +2904,7 @@
+@@ -2913,7 +2938,7 @@
void TemplateTable::invokespecial(int byte_no) {
transition(vtos, vtos);
@@ -738,7 +740,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// do the call
__ verify_oop(rbx);
__ profile_call(rax);
-@@ -2890,7 +2914,7 @@
+@@ -2923,7 +2948,7 @@
void TemplateTable::invokestatic(int byte_no) {
transition(vtos, vtos);
@@ -747,7 +749,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// do the call
__ verify_oop(rbx);
__ profile_call(rax);
-@@ -2906,7 +2930,7 @@
+@@ -2939,7 +2964,7 @@
void TemplateTable::invokeinterface(int byte_no) {
transition(vtos, vtos);
@@ -756,7 +758,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// rax,: Interface
// rbx,: index
-@@ -3056,6 +3080,79 @@
+@@ -3089,6 +3114,79 @@
// rcx: receiver
// rbx,: methodOop
__ jump_from_interpreted(rbx, rdx);
@@ -848,11 +850,11 @@ diff --git a/src/cpu/x86/vm/templateTabl
+ static void prepare_invoke(Register method, Register index, int byte_no);
static void invokevirtual_helper(Register index, Register recv,
Register flags);
- static void volatile_barrier( );
+ static void volatile_barrier(Assembler::Membar_mask_bits order_constraint );
diff --git a/src/cpu/x86/vm/templateTable_x86_64.cpp b/src/cpu/x86/vm/templateTable_x86_64.cpp
--- a/src/cpu/x86/vm/templateTable_x86_64.cpp
+++ b/src/cpu/x86/vm/templateTable_x86_64.cpp
-@@ -144,12 +144,12 @@
+@@ -146,12 +146,12 @@
scratch, r13, bc);
#ifndef ASSERT
__ jmpb(patch_done);
@@ -869,7 +871,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
Label okay;
__ load_unsigned_byte(scratch, at_bcp(0));
__ cmpl(scratch, (int) Bytecodes::java_code(bytecode));
-@@ -1989,6 +1989,7 @@
+@@ -1991,6 +1991,7 @@
Register Rcache,
Register index) {
assert(byte_no == 1 || byte_no == 2, "byte_no out of range");
@@ -877,7 +879,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
const Register temp = rbx;
assert_different_registers(Rcache, index, temp);
-@@ -1996,15 +1997,24 @@
+@@ -1998,15 +1999,24 @@
const int shift_count = (1 + byte_no) * BitsPerByte;
Label resolved;
__ get_cache_and_index_at_bcp(Rcache, index, 1);
@@ -911,7 +913,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// resolve first time through
address entry;
-@@ -2021,6 +2031,9 @@
+@@ -2023,6 +2033,9 @@
case Bytecodes::_invokeinterface:
entry = CAST_FROM_FN_PTR(address, InterpreterRuntime::resolve_invoke);
break;
@@ -921,7 +923,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
default:
ShouldNotReachHere();
break;
-@@ -2029,7 +2042,7 @@
+@@ -2031,7 +2044,7 @@
__ call_VM(noreg, entry, temp);
// Update registers with resolved info
@@ -930,7 +932,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
__ bind(resolved);
}
-@@ -2764,10 +2777,14 @@
+@@ -2766,10 +2779,14 @@
void TemplateTable::prepare_invoke(Register method,
Register index,
@@ -947,7 +949,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
const bool is_invokevirtual = code == Bytecodes::_invokevirtual;
const bool is_invokespecial = code == Bytecodes::_invokespecial;
const bool load_receiver = code != Bytecodes::_invokestatic;
-@@ -2777,6 +2794,9 @@
+@@ -2779,6 +2796,9 @@
const Register recv = rcx;
const Register flags = rdx;
assert_different_registers(method, index, recv, flags);
@@ -957,7 +959,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// save 'interpreter return address'
__ save_bcp();
-@@ -2788,9 +2808,14 @@
+@@ -2790,9 +2810,14 @@
__ movl(recv, flags);
__ andl(recv, 0xFF);
if (TaggedStackInterpreter) __ shll(recv, 1); // index*2
@@ -975,7 +977,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
}
// do null check if needed
-@@ -2808,10 +2833,15 @@
+@@ -2810,10 +2835,15 @@
ConstantPoolCacheEntry::verify_tosBits();
// load return address
{
@@ -995,7 +997,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
}
// push return address
-@@ -2877,7 +2907,7 @@
+@@ -2879,7 +2909,7 @@
void TemplateTable::invokevirtual(int byte_no) {
transition(vtos, vtos);
@@ -1004,7 +1006,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// rbx: index
// rcx: receiver
-@@ -2889,7 +2919,7 @@
+@@ -2891,7 +2921,7 @@
void TemplateTable::invokespecial(int byte_no) {
transition(vtos, vtos);
@@ -1013,7 +1015,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// do the call
__ verify_oop(rbx);
__ profile_call(rax);
-@@ -2899,7 +2929,7 @@
+@@ -2901,7 +2931,7 @@
void TemplateTable::invokestatic(int byte_no) {
transition(vtos, vtos);
@@ -1022,7 +1024,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// do the call
__ verify_oop(rbx);
__ profile_call(rax);
-@@ -2913,7 +2943,7 @@
+@@ -2915,7 +2945,7 @@
void TemplateTable::invokeinterface(int byte_no) {
transition(vtos, vtos);
@@ -1031,7 +1033,7 @@ diff --git a/src/cpu/x86/vm/templateTabl
// rax: Interface
// rbx: index
-@@ -3080,6 +3110,79 @@
+@@ -3082,6 +3112,79 @@
// rcx: receiver
// rbx: methodOop
__ jump_from_interpreted(rbx, rdx);
@@ -1649,7 +1651,7 @@ diff --git a/src/share/vm/includeDB_core
diff --git a/src/share/vm/includeDB_core b/src/share/vm/includeDB_core
--- a/src/share/vm/includeDB_core
+++ b/src/share/vm/includeDB_core
-@@ -4060,6 +4060,7 @@
+@@ -4071,6 +4071,7 @@
templateTable_<arch_model>.cpp interpreterRuntime.hpp
templateTable_<arch_model>.cpp interpreter.hpp
templateTable_<arch_model>.cpp methodDataOop.hpp
@@ -1660,7 +1662,7 @@ diff --git a/src/share/vm/includeDB_gc_p
diff --git a/src/share/vm/includeDB_gc_parallel b/src/share/vm/includeDB_gc_parallel
--- a/src/share/vm/includeDB_gc_parallel
+++ b/src/share/vm/includeDB_gc_parallel
-@@ -31,6 +31,12 @@
+@@ -37,6 +37,12 @@
constantPoolKlass.cpp psPromotionManager.inline.hpp
constantPoolKlass.cpp psScavenge.inline.hpp
constantPoolKlass.cpp parOopClosures.inline.hpp
@@ -1687,7 +1689,7 @@ diff --git a/src/share/vm/interpreter/ab
diff --git a/src/share/vm/interpreter/abstractInterpreter.hpp b/src/share/vm/interpreter/abstractInterpreter.hpp
--- a/src/share/vm/interpreter/abstractInterpreter.hpp
+++ b/src/share/vm/interpreter/abstractInterpreter.hpp
-@@ -219,6 +219,77 @@
+@@ -217,6 +217,77 @@
stackElementSize()) + tag_offset_in_bytes();
}
@@ -3722,7 +3724,7 @@ diff --git a/src/share/vm/runtime/argume
diff --git a/src/share/vm/runtime/arguments.cpp b/src/share/vm/runtime/arguments.cpp
--- a/src/share/vm/runtime/arguments.cpp
+++ b/src/share/vm/runtime/arguments.cpp
-@@ -2508,6 +2508,12 @@
+@@ -2535,6 +2535,12 @@
}
#endif // PRODUCT
@@ -3738,7 +3740,7 @@ diff --git a/src/share/vm/runtime/global
diff --git a/src/share/vm/runtime/globals.hpp b/src/share/vm/runtime/globals.hpp
--- a/src/share/vm/runtime/globals.hpp
+++ b/src/share/vm/runtime/globals.hpp
-@@ -3190,6 +3190,12 @@
+@@ -3196,6 +3196,12 @@
develop(bool, TraceMethodHandles, false, \
"trace internal method handle operations") \
\
@@ -3765,7 +3767,7 @@ diff --git a/src/share/vm/utilities/glob
diff --git a/src/share/vm/utilities/globalDefinitions.hpp b/src/share/vm/utilities/globalDefinitions.hpp
--- a/src/share/vm/utilities/globalDefinitions.hpp
+++ b/src/share/vm/utilities/globalDefinitions.hpp
-@@ -574,7 +574,7 @@
+@@ -578,7 +578,7 @@
inline TosState as_TosState(BasicType type) {
switch (type) {
case T_BYTE : return btos;
@@ -3774,7 +3776,7 @@ diff --git a/src/share/vm/utilities/glob
case T_CHAR : return ctos;
case T_SHORT : return stos;
case T_INT : return itos;
-@@ -586,6 +586,22 @@
+@@ -590,6 +590,22 @@
case T_OBJECT : return atos;
}
return ilgl;
--- a/meth.patch Sat Sep 06 19:40:47 2008 -0700
+++ b/meth.patch Sun Sep 07 00:42:43 2008 -0700
@@ -367,7 +367,7 @@ diff --git a/src/cpu/sparc/vm/cppInterpr
__ st_ptr(O2, XXX_STATE(_stack)); // PREPUSH
__ lduh(max_stack, O3); // Full size expression stack
-+ if (MethodHandles)
++ if (MethodHandle)
+ __ inc(O3, methodOopDesc::extra_stack());
__ sll(O3, LogBytesPerWord, O3);
__ sub(O2, O3, O3);
@@ -917,7 +917,7 @@ diff --git a/src/cpu/sparc/vm/sharedRunt
diff --git a/src/cpu/sparc/vm/sharedRuntime_sparc.cpp b/src/cpu/sparc/vm/sharedRuntime_sparc.cpp
--- a/src/cpu/sparc/vm/sharedRuntime_sparc.cpp
+++ b/src/cpu/sparc/vm/sharedRuntime_sparc.cpp
-@@ -938,12 +938,12 @@
+@@ -937,12 +937,12 @@
// Inputs:
// G2_thread - TLS
// G5_method - Method oop
@@ -934,7 +934,7 @@ diff --git a/src/cpu/sparc/vm/sharedRunt
// Outputs:
// G2_thread - TLS
-@@ -955,7 +955,7 @@
+@@ -954,7 +954,7 @@
// F0-F7 - more outgoing args
@@ -999,22 +999,16 @@ diff --git a/src/cpu/sparc/vm/templateIn
return (round_to((max_stack_words
+ rounded_vm_local_words
+ frame::memory_parameter_word_sp_offset), WordsPerLong)
-diff --git a/src/cpu/x86/vm/assembler_x86_32.cpp b/src/cpu/x86/vm/assembler_x86_32.cpp
---- a/src/cpu/x86/vm/assembler_x86_32.cpp
-+++ b/src/cpu/x86/vm/assembler_x86_32.cpp
-@@ -1898,7 +1898,7 @@
- // 0111 tttn #8-bit disp
- emit_byte(0x70 | cc);
- emit_byte((offs - short_size) & 0xFF);
-- jcc(cc, L);
-+ // same code in this case as jcc(cc, L)
- } else {
- InstructionMark im(this);
- L.add_patch_at(code(), locator());
-@@ -3969,6 +3969,223 @@
- }
-
-
+diff --git a/src/cpu/x86/vm/assembler_x86.cpp b/src/cpu/x86/vm/assembler_x86.cpp
+--- a/src/cpu/x86/vm/assembler_x86.cpp
++++ b/src/cpu/x86/vm/assembler_x86.cpp
+@@ -6878,6 +6878,223 @@
+ // call indirectly to solve generation ordering problem
+ movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address()));
+ call(rax);
++}
++
++
+RegisterConstant MacroAssembler::delayed_value(intptr_t* delayed_value_addr, Register tmp) {
+ intptr_t value = *delayed_value_addr;
+ if (value != 0)
@@ -1229,16 +1223,13 @@ diff --git a/src/cpu/x86/vm/assembler_x8
+ }
+ offset += wordSize; // return PC is on stack
+ return Address(rsp, scale_reg, scale_factor, offset);
-+}
-+
-+
- void MacroAssembler::verify_oop_addr(Address addr, const char* s) {
- if (!VerifyOops) return;
- // QQQ fix this
-diff --git a/src/cpu/x86/vm/assembler_x86_32.hpp b/src/cpu/x86/vm/assembler_x86_32.hpp
---- a/src/cpu/x86/vm/assembler_x86_32.hpp
-+++ b/src/cpu/x86/vm/assembler_x86_32.hpp
-@@ -128,6 +128,27 @@
+ }
+
+
+diff --git a/src/cpu/x86/vm/assembler_x86.hpp b/src/cpu/x86/vm/assembler_x86.hpp
+--- a/src/cpu/x86/vm/assembler_x86.hpp
++++ b/src/cpu/x86/vm/assembler_x86.hpp
+@@ -135,6 +135,27 @@
#endif // _LP64
@@ -1266,13 +1257,9 @@ diff --git a/src/cpu/x86/vm/assembler_x8
// Address is an abstraction used to represent a memory location
// using any of the amd64 addressing modes with one object.
//
-@@ -143,8 +164,17 @@
- times_1 = 0,
- times_2 = 1,
- times_4 = 2,
-- times_8 = 3
-+ times_8 = 3,
-+ times_ptr = LP64_ONLY(times_8) NOT_LP64(times_4)
+@@ -153,6 +174,14 @@
+ times_8 = 3,
+ times_ptr = LP64_ONLY(times_8) NOT_LP64(times_4)
};
+
+ static ScaleFactor times(int size) {
@@ -1285,7 +1272,7 @@ diff --git a/src/cpu/x86/vm/assembler_x8
private:
Register _base;
-@@ -186,6 +216,16 @@
+@@ -197,6 +226,16 @@
"inconsistent address");
}
@@ -1302,7 +1289,7 @@ diff --git a/src/cpu/x86/vm/assembler_x8
// The following two overloads are used in connection with the
// ByteSize type (see sizes.hpp). They simplify the use of
// ByteSize'd arguments in assembly code. Note that their equivalent
-@@ -213,6 +253,17 @@
+@@ -224,6 +263,17 @@
assert(!index->is_valid() == (scale == Address::no_scale),
"inconsistent address");
}
@@ -1320,7 +1307,7 @@ diff --git a/src/cpu/x86/vm/assembler_x8
#endif // ASSERT
// accessors
-@@ -227,6 +278,14 @@
+@@ -238,6 +288,14 @@
static Address make_array(ArrayAddress);
@@ -1335,7 +1322,7 @@ diff --git a/src/cpu/x86/vm/assembler_x8
private:
bool base_needs_rex() const {
-@@ -1287,6 +1346,37 @@
+@@ -1696,6 +1754,37 @@
);
void tlab_refill(Label& retry_tlab, Label& try_eden, Label& slow_case);
@@ -1373,418 +1360,6 @@ diff --git a/src/cpu/x86/vm/assembler_x8
//----
void set_word_if_not_zero(Register reg); // sets reg to 1 if not zero, otherwise 0
-@@ -1481,6 +1571,22 @@
-
- #undef VIRTUAL
-
-+ //%%% temporary until x86 assembler unification hits the baseline
-+ void lea(Register d, Address a) { leal(d, a); }
-+ void pop(Register d) { popl(d); }
-+ void push(Register d) { pushl(d); }
-+ void push(intptr_t d) { pushl(d); }
-+ void mov(Register a, Register b) { movl(a, b); }
-+ void movptr(Register d, Register s) { movl(d, s); }
-+ void movptr(Register d, Address s) { movl(d, s); }
-+ void movptr(Address d, Register s) { movl(d, s); }
-+ void movptr(Address d, intptr_t s) { movl(d, s); }
-+ void addptr(Register a, Register b) { addl(a, b); }
-+ void addptr(Register a, intptr_t b) { addl(a, b); }
-+ void testptr(Register a, Register b) { testl(a, b); }
-+ void cmpptr(Register a, Register b) { cmpl(a, b); }
-+ void cmpptr(Register a, Address b) { cmpl(a, b); }
-+ void cmpptr(Address a, intptr_t b) { cmpl(a, b); }
- };
-
- /**
-diff --git a/src/cpu/x86/vm/assembler_x86_64.cpp b/src/cpu/x86/vm/assembler_x86_64.cpp
---- a/src/cpu/x86/vm/assembler_x86_64.cpp
-+++ b/src/cpu/x86/vm/assembler_x86_64.cpp
-@@ -4666,6 +4666,223 @@
- }
-
-
-+RegisterConstant MacroAssembler::delayed_value(intptr_t* delayed_value_addr, Register tmp) {
-+ intptr_t value = *delayed_value_addr;
-+ if (value != 0)
-+ return value;
-+ movptr(tmp, ExternalAddress((address) delayed_value_addr));
-+#ifdef ASSERT
-+ Label L;
-+ testl(tmp, tmp);
-+ jccb(Assembler::notZero, L);
-+ hlt();
-+ bind(L);
-+#endif
-+ return tmp;
-+}
-+
-+
-+void MacroAssembler::lookup_interface_method(Register recv_klass,
-+ Register intf_klass,
-+ RegisterConstant itable_index,
-+ Register method_result,
-+ Register scan_temp,
-+ Label& L_no_such_interface) {
-+ assert_different_registers(recv_klass, intf_klass, method_result, scan_temp);
-+ assert(itable_index.is_constant() || itable_index.as_register() == method_result,
-+ "caller must use same register for non-constant itable index as for method");
-+
-+ // Compute start of first itableOffsetEntry (which is at the end of the vtable)
-+ int vtable_base = instanceKlass::vtable_start_offset() * wordSize;
-+ int scan_step = itableOffsetEntry::size() * wordSize;
-+ int vte_size = vtableEntry::size() * wordSize;
-+ Address::ScaleFactor times_vte_scale = Address::times_ptr;
-+ assert(vte_size == wordSize, "else adjust times_vte_scale");
-+
-+ movl(scan_temp, Address(recv_klass, instanceKlass::vtable_length_offset() * wordSize));
-+ lea( scan_temp, Address(recv_klass, scan_temp, times_vte_scale, vtable_base));
-+ if (HeapWordsPerLong > 1) {
-+ // Round up to align_object_offset boundary
-+ round_to(scan_temp, BytesPerLong);
-+ }
-+
-+ // Adjust recv_klass by scaled itable_index, so we can free itable_index.
-+ assert(itableMethodEntry::size() * wordSize == wordSize, "adjust the scaling in the code below");
-+ lea(recv_klass, Address(recv_klass, itable_index, Address::times_ptr));
-+
-+ // for (scan = klass->itable(); scan->interface() != NULL; scan += scan_step) {
-+ // if (scan->interface() == intf) {
-+ // result = (klass + scan->offset() + itable_index);
-+ // }
-+ // }
-+ Label search, found_method;
-+
-+ for (int peel = 1; peel >= 0; peel--) {
-+ movptr(method_result, Address(scan_temp, itableOffsetEntry::interface_offset_in_bytes()));
-+ cmpptr(intf_klass, method_result);
-+ jccb(Assembler::notEqual, search);
-+
-+ // Got a hit.
-+ movl(method_result, Address(scan_temp, itableOffsetEntry::offset_offset_in_bytes()));
-+ movptr(method_result, Address(recv_klass, method_result, Address::times_1));
-+
-+ if (!peel) break;
-+ jmp(found_method);
-+
-+ bind(search);
-+ // Check that the previous entry is non-null. A null entry means that
-+ // the reciever class doesn't implement the interface, and wasn't the
-+ // same as when the caller was compiled.
-+ testptr(method_result, method_result);
-+ jcc(Assembler::zero, L_no_such_interface);
-+ addptr(scan_temp, scan_step);
-+ }
-+
-+ bind(found_method);
-+}
-+
-+
-+// Test sub_klass against super_klass.
-+// Fall through on failure, but branch to L_success if there is a match.
-+// Use up the given temp_reg, but don't kill any other register.
-+// Update the sub's secondary super cache if necesary.
-+void MacroAssembler::check_klass_subtype(Register sub_klass,
-+ Register super_klass,
-+ Register temp_reg,
-+ Label& L_success) {
-+ Label L_failure; // fallthrough label
-+
-+ assert_different_registers(sub_klass, super_klass, temp_reg);
-+
-+ // a couple of useful fields in sub_klass:
-+ int ss_offset = (klassOopDesc::header_size() * HeapWordSize +
-+ Klass::secondary_supers_offset_in_bytes());
-+ int sc_offset = (klassOopDesc::header_size() * HeapWordSize +
-+ Klass::secondary_super_cache_offset_in_bytes());
-+ Address secondary_supers_addr(sub_klass, ss_offset);
-+ Address super_cache_addr( sub_klass, sc_offset);
-+
-+ int sco_offset = (klassOopDesc::header_size() * HeapWordSize +
-+ Klass::super_check_offset_offset_in_bytes());
-+ Address super_check_offset_addr(super_klass, sco_offset);
-+
-+ // if the pointers are equal, we are done (e.g., String[] elements)
-+ cmpptr(sub_klass, super_klass);
-+ jcc(Assembler::equal, L_success);
-+
-+ // check the supertype display:
-+ movl(temp_reg, super_check_offset_addr);
-+ Address super_check_addr(sub_klass, temp_reg, Address::times_1, 0);
-+ cmpptr(super_klass, super_check_addr); // load displayed supertype
-+ jcc(Assembler::equal, L_success);
-+
-+ // if it was a primary super, we can just fail immediately
-+ cmpl(temp_reg, sc_offset);
-+ jcc(Assembler::notEqual, L_failure);
-+
-+ // Now do a linear scan of the secondary super-klass chain.
-+ // This code is rarely used, so simplicity is a virtue here.
-+ {
-+ // The repne_scan instruction uses fixed registers, which we must spill.
-+ // Don't bother to figure out pre-existing connections with the input regs.
-+ push(rax);
-+ push(rcx);
-+ push(rdi);
-+ push(super_klass);
-+
-+ movptr(rdi, secondary_supers_addr);
-+ // Load the array length.
-+ movl(rcx, Address(rdi, arrayOopDesc::length_offset_in_bytes()));
-+ // Skip to start of data.
-+ addptr(rdi, arrayOopDesc::base_offset_in_bytes(T_OBJECT));
-+ // Scan rcx words at [edi] for occurance of rax,
-+ // Set NZ/Z based on last compare
-+ pop(rax); // super_klass value, even if it was in rdi or rcx
-+
-+
-+#ifdef _LP64
-+ // This part is tricky, as values in supers array could be 32 or 64 bit wide
-+ // and we store values in objArrays always encoded, thus we need to encode
-+ // the value of rax before repne. Note that rax is dead after the repne.
-+ if (UseCompressedOops) {
-+ encode_heap_oop_not_null(rax);
-+ repne_scanl();
-+ } else
-+#endif // _LP64
-+ repne_scan();
-+
-+ // Unspill the temp. registers:
-+ pop(rdi);
-+ pop(rcx);
-+ pop(rax);
-+ }
-+ jcc(Assembler::notEqual, L_failure);
-+
-+ // Success. Cache the super we found and proceed in triumph.
-+ movptr(super_cache_addr, super_klass);
-+
-+ jmp(L_success);
-+
-+ // Fall through on failure!
-+ bind(L_failure);
-+}
-+
-+
-+// registers on entry:
-+// - rax ('check' register): required MethodType
-+// - rcx: method handle
-+// - rdx, rsi, or ?: killable temp
-+void MacroAssembler::check_method_handle_type(Register mtype_reg, Register mh_reg,
-+ Register temp_reg,
-+ Label& wrong_method_type) {
-+ if (UseCompressedOops) unimplemented(); // field accesses must decode
-+ // compare method type against that of the receiver
-+ cmpptr(mtype_reg, Address(mh_reg, delayed_value(java_dyn_MethodHandle::type_offset_in_bytes, temp_reg)));
-+ jcc(Assembler::notEqual, wrong_method_type);
-+}
-+
-+
-+// registers on entry:
-+// - rcx: method handle
-+// - rdx: killable temp (interpreted only)
-+// - rax: killable temp (compiled only)
-+void MacroAssembler::jump_to_method_handle_entry(Register mh_reg, Register temp_reg) {
-+ assert(mh_reg == rcx, "caller must put MH object in rcx");
-+ assert_different_registers(mh_reg, temp_reg);
-+
-+ if (UseCompressedOops) unimplemented(); // field accesses must decode
-+
-+ // pick out the interpreted side of the handler
-+ movptr(temp_reg, Address(mh_reg, delayed_value(java_dyn_MethodHandle::entry_offset_in_bytes, temp_reg)));
-+
-+ // off we go...
-+ jmp(Address(temp_reg, MethodEntry::from_interpreted_entry_offset_in_bytes()));
-+
-+ // for the various stubs which take control at this point,
-+ // see MethodHandle::generate_method_handle_stub
-+}
-+
-+
-+Address MacroAssembler::argument_address(RegisterConstant arg_slot,
-+ int extra_slot_offset) {
-+ // cf. TemplateTable::prepare_invoke(), if (load_receiver).
-+ int stackElementSize = Interpreter::stackElementWords() * wordSize;
-+ int offset = Interpreter::expr_offset_in_bytes(extra_slot_offset+0);
-+ int offset1 = Interpreter::expr_offset_in_bytes(extra_slot_offset+1);
-+ assert(offset1 - offset == stackElementSize, "correct arithmetic");
-+ Register scale_reg = noreg;
-+ Address::ScaleFactor scale_factor = Address::no_scale;
-+ if (arg_slot.is_constant()) {
-+ offset += arg_slot.as_constant() * stackElementSize;
-+ } else {
-+ scale_reg = arg_slot.as_register();
-+ scale_factor = Address::times(stackElementSize);
-+ }
-+ offset += wordSize; // return PC is on stack
-+ return Address(rsp, scale_reg, scale_factor, offset);
-+}
-+
-+
- void MacroAssembler::stop(const char* msg) {
- address rip = pc();
- pushaq(); // get regs on stack
-diff --git a/src/cpu/x86/vm/assembler_x86_64.hpp b/src/cpu/x86/vm/assembler_x86_64.hpp
---- a/src/cpu/x86/vm/assembler_x86_64.hpp
-+++ b/src/cpu/x86/vm/assembler_x86_64.hpp
-@@ -125,6 +125,27 @@
-
- #endif // _LP64
-
-+// A union type for code which has to assemble both constant and non-constant operands.
-+class RegisterConstant VALUE_OBJ_CLASS_SPEC {
-+ private:
-+ Register _r;
-+ intptr_t _c;
-+
-+ public:
-+ RegisterConstant(): _r(noreg), _c(0) {}
-+ RegisterConstant(Register r): _r(r), _c(0) {}
-+ RegisterConstant(intptr_t c): _r(noreg), _c(c) {}
-+
-+ Register as_register() const { assert(is_register(),""); return _r; }
-+ intptr_t as_constant() const { assert(is_constant(),""); return _c; }
-+
-+ Register register_or_noreg() const { return _r; }
-+ intptr_t constant_or_zero() const { return _c; }
-+
-+ bool is_register() const { return _r != noreg; }
-+ bool is_constant() const { return _r == noreg; }
-+};
-+
- // Address is an abstraction used to represent a memory location
- // using any of the amd64 addressing modes with one object.
- //
-@@ -140,8 +161,17 @@
- times_1 = 0,
- times_2 = 1,
- times_4 = 2,
-- times_8 = 3
-+ times_8 = 3,
-+ times_ptr = LP64_ONLY(times_8) NOT_LP64(times_4)
- };
-+
-+ static ScaleFactor times(int size) {
-+ assert(size >= 1 && size <= 8 && is_power_of_2(size), "bad scale size");
-+ if (size == 8) return times_8;
-+ if (size == 4) return times_4;
-+ if (size == 2) return times_2;
-+ return times_1;
-+ }
-
- private:
- Register _base;
-@@ -182,6 +212,16 @@
- "inconsistent address");
- }
-
-+ Address(Register base, RegisterConstant index, ScaleFactor scale = times_1, int disp = 0)
-+ : _base (base),
-+ _index(index.register_or_noreg()),
-+ _scale(scale),
-+ _disp (disp + (index.constant_or_zero() * scale_size(scale))) {
-+ if (!index.is_register()) scale = Address::no_scale;
-+ assert(!_index->is_valid() == (scale == Address::no_scale),
-+ "inconsistent address");
-+ }
-+
- // The following two overloads are used in connection with the
- // ByteSize type (see sizes.hpp). They simplify the use of
- // ByteSize'd arguments in assembly code. Note that their equivalent
-@@ -209,6 +249,17 @@
- assert(!index->is_valid() == (scale == Address::no_scale),
- "inconsistent address");
- }
-+
-+ Address(Register base, RegisterConstant index, ScaleFactor scale, ByteSize disp)
-+ : _base (base),
-+ _index(index.register_or_noreg()),
-+ _scale(scale),
-+ _disp (in_bytes(disp) + (index.constant_or_zero() * scale_size(scale))) {
-+ if (!index.is_register()) scale = Address::no_scale;
-+ assert(!_index->is_valid() == (scale == Address::no_scale),
-+ "inconsistent address");
-+ }
-+
- #endif // ASSERT
-
- // accessors
-@@ -222,6 +273,15 @@
- static Address make_raw(int base, int index, int scale, int disp);
-
- static Address make_array(ArrayAddress);
-+
-+ static int scale_size(ScaleFactor scale) {
-+ assert(scale != no_scale, "");
-+ assert(((1 << (int)times_1) == 1 &&
-+ (1 << (int)times_2) == 2 &&
-+ (1 << (int)times_4) == 4 &&
-+ (1 << (int)times_8) == 8), "");
-+ return (1 << (int)scale);
-+ }
-
- private:
- bool base_needs_rex() const {
-@@ -1267,6 +1327,37 @@
- );
- void tlab_refill(Label& retry_tlab, Label& try_eden, Label& slow_case);
-
-+ // small bootstrap problems
-+ RegisterConstant delayed_value(intptr_t* delayed_value_addr, Register tmp);
-+ RegisterConstant delayed_value(int(*value_fn)(), Register tmp) {
-+ return delayed_value(delayed_value_addr(value_fn), tmp);
-+ }
-+ RegisterConstant delayed_value(address(*value_fn)(), Register tmp) {
-+ return delayed_value((intptr_t*) delayed_value_addr(value_fn), tmp);
-+ }
-+
-+ // interface method calling
-+ void lookup_interface_method(Register recv_klass,
-+ Register intf_klass,
-+ RegisterConstant itable_index,
-+ Register method_result,
-+ Register scan_temp,
-+ Label& no_such_interface);
-+
-+ // method handles (JSR 292)
-+ void check_method_handle_type(Register mtype_reg, Register mh_reg,
-+ Register temp_reg,
-+ Label& wrong_method_type);
-+ void jump_to_method_handle_entry(Register mh_reg, Register temp_reg);
-+ Address argument_address(RegisterConstant arg_slot, int extra_slot_offset = 0);
-+
-+
-+ // klass type checking (falls through on failure)
-+ void check_klass_subtype(Register sub_klass,
-+ Register super_klass,
-+ Register temp_reg,
-+ Label& L_success);
-+
- //----
-
- // Debugging
-@@ -1451,6 +1542,22 @@
- // Can push value or effective address
- void pushptr(AddressLiteral src);
-
-+ //%%% temporary until x86 assembler unification hits the baseline
-+ void lea(Register d, Address a) { leaq(d, a); }
-+ void pop(Register d) { popq(d); }
-+ void push(Register d) { pushq(d); }
-+ void push(intptr_t d) { pushq(d); }
-+ void mov(Register a, Register b) { movq(a, b); }
-+ void movptr(Register d, Register s) { movq(d, s); }
-+ void movptr(Register d, Address s) { movq(d, s); }
-+ void movptr(Address d, Register s) { movq(d, s); }
-+ void movptr(Address d, intptr_t s) { movq(d, s); }
-+ void addptr(Register a, Register b) { addq(a, b); }
-+ void addptr(Register a, intptr_t b) { addq(a, b); }
-+ void testptr(Register a, Register b) { testq(a, b); }
-+ void cmpptr(Register a, Register b) { cmpq(a, b); }
-+ void cmpptr(Register a, Address b) { cmpq(a, b); }
-+ void cmpptr(Address a, intptr_t b) { cmpq(a, b); }
- };
-
- /**
diff --git a/src/cpu/x86/vm/cppInterpreterGenerator_x86.hpp b/src/cpu/x86/vm/cppInterpreterGenerator_x86.hpp
--- a/src/cpu/x86/vm/cppInterpreterGenerator_x86.hpp
+++ b/src/cpu/x86/vm/cppInterpreterGenerator_x86.hpp
@@ -1799,31 +1374,31 @@ diff --git a/src/cpu/x86/vm/cppInterpret
diff --git a/src/cpu/x86/vm/cppInterpreter_x86.cpp b/src/cpu/x86/vm/cppInterpreter_x86.cpp
--- a/src/cpu/x86/vm/cppInterpreter_x86.cpp
+++ b/src/cpu/x86/vm/cppInterpreter_x86.cpp
-@@ -502,10 +502,11 @@
+@@ -513,10 +513,11 @@
// compute full expression stack limit
const Address size_of_stack (rbx, methodOopDesc::max_stack_offset());
+ const int extra_stack = methodOopDesc::extra_stack() * Interpreter::stackElementSize;
__ load_unsigned_word(rdx, size_of_stack); // get size of expression stack in words
- __ negl(rdx); // so we can subtract in next step
+ __ negptr(rdx); // so we can subtract in next step
// Allocate expression stack
-- __ leal(rsp, Address(rsp, rdx, Address::times_4));
-+ __ leal(rsp, Address(rsp, rdx, Address::times_4, -extra_stack));
- __ movl(STATE(_stack_limit), rsp);
+- __ lea(rsp, Address(rsp, rdx, Address::times_ptr));
++ __ lea(rsp, Address(rsp, rdx, Address::times_ptr, -extra_stack));
+ __ movptr(STATE(_stack_limit), rsp);
}
-@@ -642,8 +643,9 @@
+@@ -659,8 +660,9 @@
// Always give one monitor to allow us to start interp if sync method.
// Any additional monitors need a check when moving the expression stack
const one_monitor = frame::interpreter_frame_monitor_size() * wordSize;
+ const int extra_stack = methodOopDesc::extra_stack() * Interpreter::stackElementSize;
__ load_unsigned_word(rax, size_of_stack); // get size of expression stack in words
-- __ leal(rax, Address(noreg, rax, Interpreter::stackElementScale(), one_monitor));
-+ __ leal(rax, Address(noreg, rax, Interpreter::stackElementScale(), extra_stack + one_monitor));
- __ leal(rax, Address(rax, rdx, Interpreter::stackElementScale(), overhead_size));
+- __ lea(rax, Address(noreg, rax, Interpreter::stackElementScale(), one_monitor));
++ __ lea(rax, Address(noreg, rax, Interpreter::stackElementScale(), extra_stack + one_monitor));
+ __ lea(rax, Address(rax, rdx, Interpreter::stackElementScale(), overhead_size));
#ifdef ASSERT
-@@ -2104,6 +2106,7 @@
+@@ -2185,6 +2187,7 @@
case Interpreter::empty : entry_point = ((InterpreterGenerator*)this)->generate_empty_entry(); break;
case Interpreter::accessor : entry_point = ((InterpreterGenerator*)this)->generate_accessor_entry(); break;
case Interpreter::abstract : entry_point = ((InterpreterGenerator*)this)->generate_abstract_entry(); break;
@@ -1831,7 +1406,7 @@ diff --git a/src/cpu/x86/vm/cppInterpret
case Interpreter::java_lang_math_sin : // fall thru
case Interpreter::java_lang_math_cos : // fall thru
-@@ -2143,7 +2146,8 @@
+@@ -2224,7 +2227,8 @@
const int overhead_size = sizeof(BytecodeInterpreter)/wordSize +
( frame::sender_sp_offset - frame::link_offset) + 2;
@@ -1841,7 +1416,7 @@ diff --git a/src/cpu/x86/vm/cppInterpret
Interpreter::stackElementWords();
return overhead_size + method_stack + stub_code;
}
-@@ -2208,7 +2212,8 @@
+@@ -2289,7 +2293,8 @@
// Need +1 here because stack_base points to the word just above the first expr stack entry
// and stack_limit is supposed to point to the word just below the last expr stack entry.
// See generate_compute_interpreter_state.
@@ -1851,7 +1426,7 @@ diff --git a/src/cpu/x86/vm/cppInterpret
to_fill->_monitor_base = (BasicObjectLock*) monitor_base;
to_fill->_self_link = to_fill;
-@@ -2254,7 +2259,8 @@
+@@ -2335,7 +2340,8 @@
monitor_size);
// Now with full size expression stack
@@ -1864,7 +1439,7 @@ diff --git a/src/cpu/x86/vm/interp_masm_
diff --git a/src/cpu/x86/vm/interp_masm_x86_32.cpp b/src/cpu/x86/vm/interp_masm_x86_32.cpp
--- a/src/cpu/x86/vm/interp_masm_x86_32.cpp
+++ b/src/cpu/x86/vm/interp_masm_x86_32.cpp
-@@ -587,13 +587,18 @@
+@@ -586,13 +586,18 @@
}
@@ -1873,9 +1448,9 @@ diff --git a/src/cpu/x86/vm/interp_masm_
-void InterpreterMacroAssembler::jump_from_interpreted(Register method, Register temp) {
+void InterpreterMacroAssembler::prepare_to_jump_from_interpreted() {
// set sender sp
- leal(rsi, Address(rsp, wordSize));
+ lea(rsi, Address(rsp, wordSize));
// record last_sp
- movl(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), rsi);
+ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), rsi);
+}
+
+
@@ -1889,23 +1464,7 @@ diff --git a/src/cpu/x86/vm/interp_masm_
diff --git a/src/cpu/x86/vm/interp_masm_x86_32.hpp b/src/cpu/x86/vm/interp_masm_x86_32.hpp
--- a/src/cpu/x86/vm/interp_masm_x86_32.hpp
+++ b/src/cpu/x86/vm/interp_masm_x86_32.hpp
-@@ -104,6 +104,15 @@
- void pop(TosState state); // transition vtos -> state
- void push(TosState state); // transition state -> vtos
-
-+ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); }
-+
-+ void push(Register r ) { ((MacroAssembler*)this)->push(r); }
-+ void push(int32_t imm ) { ((MacroAssembler*)this)->push(imm); }
-+
-+ // These are dummies to prevent surprise implicit conversions to Register
-+ void pop(void* v ); // Add unimplemented ambiguous method
-+ void push(void* v ); // Add unimplemented ambiguous method
-+
- DEBUG_ONLY(void verify_stack_tag(frame::Tag t);)
-
- #ifndef CC_INTERP
-@@ -152,6 +161,7 @@
+@@ -161,6 +161,7 @@
// jump to an invoked target
@@ -1916,25 +1475,24 @@ diff --git a/src/cpu/x86/vm/interp_masm_
diff --git a/src/cpu/x86/vm/interp_masm_x86_64.cpp b/src/cpu/x86/vm/interp_masm_x86_64.cpp
--- a/src/cpu/x86/vm/interp_masm_x86_64.cpp
+++ b/src/cpu/x86/vm/interp_masm_x86_64.cpp
-@@ -601,13 +601,18 @@
+@@ -613,13 +613,18 @@
MacroAssembler::call_VM_leaf_base(entry_point, 3);
}
+-// Jump to from_interpreted entry of a call unless single stepping is possible
+-// in this thread in which case we must call the i2i entry
+-void InterpreterMacroAssembler::jump_from_interpreted(Register method, Register temp) {
+void InterpreterMacroAssembler::prepare_to_jump_from_interpreted() {
-+ // set sender sp
-+ lea(r13, Address(rsp, wordSize));
-+ // record last_sp
-+ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), r13);
-+}
-+
-+
- // Jump to from_interpreted entry of a call unless single stepping is possible
- // in this thread in which case we must call the i2i entry
- void InterpreterMacroAssembler::jump_from_interpreted(Register method, Register temp) {
-- // set sender sp
-- leaq(r13, Address(rsp, wordSize));
-- // record last_sp
-- movq(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), r13);
+ // set sender sp
+ lea(r13, Address(rsp, wordSize));
+ // record last_sp
+ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), r13);
++}
++
++
++// Jump to from_interpreted entry of a call unless single stepping is possible
++// in this thread in which case we must call the i2i entry
++void InterpreterMacroAssembler::jump_from_interpreted(Register method, Register temp) {
+ prepare_to_jump_from_interpreted();
if (JvmtiExport::can_post_interpreter_events()) {
@@ -1942,23 +1500,7 @@ diff --git a/src/cpu/x86/vm/interp_masm_
diff --git a/src/cpu/x86/vm/interp_masm_x86_64.hpp b/src/cpu/x86/vm/interp_masm_x86_64.hpp
--- a/src/cpu/x86/vm/interp_masm_x86_64.hpp
+++ b/src/cpu/x86/vm/interp_masm_x86_64.hpp
-@@ -112,6 +112,15 @@
- void pop(TosState state); // transition vtos -> state
- void push(TosState state); // transition state -> vtos
-
-+ void pop(Register r ) { ((MacroAssembler*)this)->pop(r); }
-+
-+ void push(Register r ) { ((MacroAssembler*)this)->push(r); }
-+ void push(int32_t imm ) { ((MacroAssembler*)this)->push(imm); }
-+
-+ // These are dummies to prevent surprise implicit conversions to Register
-+ void pop(void* v ); // Add unimplemented ambiguous method
-+ void push(void* v ); // Add unimplemented ambiguous method
-+
- // Tagged stack support, pop and push both tag and value.
- void pop_ptr(Register r, Register tag);
- void push_ptr(Register r, Register tag);
-@@ -166,6 +175,7 @@
+@@ -176,6 +176,7 @@
void dispatch_via (TosState state, address* table);
// jump to an invoked target
@@ -1985,10 +1527,10 @@ diff --git a/src/cpu/x86/vm/interpreter_
// abstract method entry
- // remove return address. Not really needed, since exception handling throws away expression stack
-- __ popl(rbx);
+- __ pop(rbx);
- // adjust stack to what a normal return would do
-- __ movl(rsp, rsi);
+- __ mov(rsp, rsi);
+ // pop return address, reset last_sp to NULL
+ __ empty_expression_stack();
+ __ restore_bcp(); // rsi must be correct for exception handler (was destroyed)
@@ -2032,14 +1574,10 @@ diff --git a/src/cpu/x86/vm/interpreter_
diff --git a/src/cpu/x86/vm/interpreter_x86_64.cpp b/src/cpu/x86/vm/interpreter_x86_64.cpp
--- a/src/cpu/x86/vm/interpreter_x86_64.cpp
+++ b/src/cpu/x86/vm/interpreter_x86_64.cpp
-@@ -250,6 +250,19 @@
- // the call_VM checks for exception, so we should never return here.
- __ should_not_reach_here();
-
-+ return entry_point;
-+}
-+
-+
+@@ -294,6 +294,19 @@
+ }
+
+
+// Method handle invoker
+// Dispatch a method of the form java.dyn.MethodHandle::invoke(...)
+address InterpreterGenerator::generate_method_handle_entry(void) {
@@ -2049,9 +1587,13 @@ diff --git a/src/cpu/x86/vm/interpreter_
+
+ address entry_point = __ pc();
+ __ unimplemented();
- return entry_point;
- }
-
++ return entry_point;
++}
++
++
+ // Empty method, generate a very fast return.
+
+ address InterpreterGenerator::generate_empty_entry(void) {
diff --git a/src/cpu/x86/vm/methodHandles_x86.cpp b/src/cpu/x86/vm/methodHandles_x86.cpp
new file mode 100644
--- /dev/null
@@ -2501,7 +2043,7 @@ diff --git a/src/cpu/x86/vm/stubGenerato
diff --git a/src/cpu/x86/vm/stubGenerator_x86_32.cpp b/src/cpu/x86/vm/stubGenerator_x86_32.cpp
--- a/src/cpu/x86/vm/stubGenerator_x86_32.cpp
+++ b/src/cpu/x86/vm/stubGenerator_x86_32.cpp
-@@ -2087,6 +2087,9 @@
+@@ -2088,6 +2088,9 @@
return stub->entry_point();
}
@@ -2511,7 +2053,7 @@ diff --git a/src/cpu/x86/vm/stubGenerato
void create_control_words() {
// Round to nearest, 53-bit mode, exceptions masked
-@@ -2166,6 +2169,16 @@
+@@ -2167,6 +2170,16 @@
// arraycopy stubs used by compilers
generate_arraycopy_stubs();
@@ -2575,7 +2117,7 @@ diff --git a/src/cpu/x86/vm/templateInte
address TemplateInterpreterGenerator::generate_exception_handler_common(const char* name, const char* message, bool pass_oop) {
assert(!pass_oop || message == NULL, "either oop or message but not both");
-@@ -1364,6 +1401,7 @@
+@@ -1370,6 +1407,7 @@
case Interpreter::empty : entry_point = ((InterpreterGenerator*)this)->generate_empty_entry(); break;
case Interpreter::accessor : entry_point = ((InterpreterGenerator*)this)->generate_accessor_entry(); break;
case Interpreter::abstract : entry_point = ((InterpreterGenerator*)this)->generate_abstract_entry(); break;
@@ -2583,7 +2125,7 @@ diff --git a/src/cpu/x86/vm/templateInte
case Interpreter::java_lang_math_sin : // fall thru
case Interpreter::java_lang_math_cos : // fall thru
-@@ -1394,9 +1432,10 @@
+@@ -1400,9 +1438,10 @@
// be sure to change this if you add/subtract anything to/from the overhead area
const int overhead_size = -frame::interpreter_frame_initial_sp_offset;
@@ -2599,13 +2141,10 @@ diff --git a/src/cpu/x86/vm/templateInte
diff --git a/src/cpu/x86/vm/templateInterpreter_x86_64.cpp b/src/cpu/x86/vm/templateInterpreter_x86_64.cpp
--- a/src/cpu/x86/vm/templateInterpreter_x86_64.cpp
+++ b/src/cpu/x86/vm/templateInterpreter_x86_64.cpp
-@@ -95,6 +95,36 @@
- InterpreterRuntime::
- throw_ClassCastException),
- c_rarg1);
-+ return entry;
-+}
-+
+@@ -100,6 +100,36 @@
+ return entry;
+ }
+
+#ifdef ASSERT
+address last_WrongMethodType_caller;
+#endif //ASSERT
@@ -2633,10 +2172,21 @@ diff --git a/src/cpu/x86/vm/templateInte
+ throw_WrongMethodTypeException),
+ // pass required type, failing object (or NULL)
+ c_rarg1, c_rarg2);
- return entry;
- }
-
-@@ -1243,6 +1273,7 @@
++ return entry;
++}
++
+ address TemplateInterpreterGenerator::generate_exception_handler_common(
+ const char* name, const char* message, bool pass_oop) {
+ assert(!pass_oop || message == NULL, "either oop or message but not both");
+@@ -161,7 +191,6 @@
+
+ __ restore_bcp();
+ __ restore_locals();
+-
+ __ get_cache_and_index_at_bcp(rbx, rcx, 1);
+ __ movl(rbx, Address(rbx, rcx,
+ Address::times_8,
+@@ -1393,6 +1422,7 @@
case Interpreter::empty : entry_point = ((InterpreterGenerator*) this)->generate_empty_entry(); break;
case Interpreter::accessor : entry_point = ((InterpreterGenerator*) this)->generate_accessor_entry(); break;
case Interpreter::abstract : entry_point = ((InterpreterGenerator*) this)->generate_abstract_entry(); break;
@@ -2644,7 +2194,7 @@ diff --git a/src/cpu/x86/vm/templateInte
case Interpreter::java_lang_math_sin : break;
case Interpreter::java_lang_math_cos : break;
case Interpreter::java_lang_math_tan : break;
-@@ -1272,7 +1303,8 @@
+@@ -1422,7 +1452,8 @@
-(frame::interpreter_frame_initial_sp_offset) + entry_size;
const int stub_code = frame::entry_frame_after_call_words;
@@ -2657,7 +2207,48 @@ diff --git a/src/cpu/x86/vm/templateTabl
diff --git a/src/cpu/x86/vm/templateTable_x86_32.cpp b/src/cpu/x86/vm/templateTable_x86_32.cpp
--- a/src/cpu/x86/vm/templateTable_x86_32.cpp
+++ b/src/cpu/x86/vm/templateTable_x86_32.cpp
-@@ -2932,6 +2932,57 @@
+@@ -2034,13 +2034,10 @@
+ const int shift_count = (1 + byte_no)*BitsPerByte;
+ Label resolved;
+ __ get_cache_and_index_at_bcp(Rcache, index, 1);
+- __ movl(temp, Address(Rcache,
+- index,
+- Address::times_ptr,
+- constantPoolCacheOopDesc::base_offset() + ConstantPoolCacheEntry::indices_offset()));
++ __ movl(temp, Address(Rcache, index, Address::times_4, constantPoolCacheOopDesc::base_offset() + ConstantPoolCacheEntry::indices_offset()));
+ __ shrl(temp, shift_count);
+ // have we resolved this bytecode?
+- __ andptr(temp, 0xFF);
++ __ andl(temp, 0xFF);
+ __ cmpl(temp, (int)bytecode());
+ __ jcc(Assembler::equal, resolved);
+
+@@ -2820,7 +2817,7 @@
+ __ movl(recv, flags);
+ __ andl(recv, 0xFF);
+ // recv count is 0 based?
+- __ movptr(recv, Address(rsp, recv, Interpreter::stackElementScale(), -Interpreter::expr_offset_in_bytes(1)));
++ __ movl(recv, Address(rsp, recv, Interpreter::stackElementScale(), -Interpreter::expr_offset_in_bytes(1)));
+ __ verify_oop(recv);
+ }
+
+@@ -2838,10 +2835,11 @@
+ // Make sure we don't need to mask flags for tosBits after the above shift
+ ConstantPoolCacheEntry::verify_tosBits();
+ // load return address
+- {
+- ExternalAddress table(is_invokeinterface ? (address)Interpreter::return_5_addrs_by_index_table() :
+- (address)Interpreter::return_3_addrs_by_index_table());
+- __ movptr(flags, ArrayAddress(table, Address(noreg, flags, Address::times_ptr)));
++ { const int table =
++ is_invokeinterface
++ ? (int)Interpreter::return_5_addrs_by_index_table()
++ : (int)Interpreter::return_3_addrs_by_index_table();
++ __ movl(flags, Address(noreg, flags, Address::times_4, table));
+ }
+
+ // push return address
+@@ -2967,6 +2965,57 @@
// profile this call
__ profile_virtual_call(rdx, rsi, rdi);
@@ -2713,15 +2304,34 @@ diff --git a/src/cpu/x86/vm/templateTabl
+
+ // %%% remove this old code, in favor of the previous block:
- __ movl(rdi, rdx); // Save klassOop in rdi
+ __ mov(rdi, rdx); // Save klassOop in rdi
diff --git a/src/cpu/x86/vm/templateTable_x86_64.cpp b/src/cpu/x86/vm/templateTable_x86_64.cpp
--- a/src/cpu/x86/vm/templateTable_x86_64.cpp
+++ b/src/cpu/x86/vm/templateTable_x86_64.cpp
-@@ -2940,6 +2940,57 @@
+@@ -2790,7 +2790,7 @@
+ __ movl(recv, flags);
+ __ andl(recv, 0xFF);
+ if (TaggedStackInterpreter) __ shll(recv, 1); // index*2
+- __ movptr(recv, Address(rsp, recv, Address::times_8,
++ __ movq(recv, Address(rsp, recv, Address::times_8,
+ -Interpreter::expr_offset_in_bytes(1)));
+ __ verify_oop(recv);
+ }
+@@ -2813,7 +2813,7 @@
+ ExternalAddress return_5((address)Interpreter::return_5_addrs_by_index_table());
+ ExternalAddress return_3((address)Interpreter::return_3_addrs_by_index_table());
+ __ lea(rscratch1, (is_invokeinterface ? return_5 : return_3));
+- __ movptr(flags, Address(rscratch1, flags, Address::times_8));
++ __ movq(flags, Address(rscratch1, flags, Address::times_8));
+ }
+
+ // push return address
+@@ -2941,6 +2941,57 @@
+
// profile this call
__ profile_virtual_call(rdx, r13, r14);
-
++
+ if (MethodHandles) { // %%% let's use this refactored code always
+ Label no_such_interface, no_such_method;
+
@@ -2772,10 +2382,9 @@ diff --git a/src/cpu/x86/vm/templateTabl
+ }
+
+ // %%% remove this old code, in favor of the previous block:
-+
- __ movq(r14, rdx); // Save klassOop in r14
-
- // Compute start of first itableOffsetEntry (which is at the end of
+
+ __ mov(r14, rdx); // Save klassOop in r14
+
diff --git a/src/cpu/x86/vm/vtableStubs_x86_32.cpp b/src/cpu/x86/vm/vtableStubs_x86_32.cpp
--- a/src/cpu/x86/vm/vtableStubs_x86_32.cpp
+++ b/src/cpu/x86/vm/vtableStubs_x86_32.cpp
@@ -2884,9 +2493,9 @@ diff --git a/src/cpu/x86/vm/vtableStubs_
// get receiver klass (also an implicit null-check)
- address npe_addr = __ pc();
+ npe_addr = __ pc();
- __ movl(rbx, Address(rcx, oopDesc::klass_offset_in_bytes()));
-
- __ movl(rsi, rbx); // Save klass in free register
+ __ movptr(rbx, Address(rcx, oopDesc::klass_offset_in_bytes()));
+
+ __ mov(rsi, rbx); // Save klass in free register
@@ -159,7 +223,7 @@
__ movl(rdx, Address(rbx, itableOffsetEntry::offset_offset_in_bytes()));
@@ -2906,7 +2515,7 @@ diff --git a/src/cpu/x86/vm/vtableStubs_
__ bind(throw_icce);
@@ -191,8 +255,15 @@
- __ popl(rdx);
+ __ pop(rdx);
__ jump(RuntimeAddress(StubRoutines::throw_IncompatibleClassChangeError_entry()));
+ } // %%% ...end of code to remove.
@@ -4052,15 +3661,15 @@ diff --git a/src/share/vm/includeDB_core
diff --git a/src/share/vm/includeDB_core b/src/share/vm/includeDB_core
--- a/src/share/vm/includeDB_core
+++ b/src/share/vm/includeDB_core
-@@ -253,6 +253,7 @@
- assembler_<arch_model>.cpp collectedHeap.inline.hpp
- assembler_<arch_model>.cpp interfaceSupport.hpp
- assembler_<arch_model>.cpp interpreter.hpp
-+assembler_<arch_model>.cpp methodHandles.hpp
- assembler_<arch_model>.cpp objectMonitor.hpp
- assembler_<arch_model>.cpp os.hpp
- assembler_<arch_model>.cpp resourceArea.hpp
-@@ -1268,6 +1269,7 @@
+@@ -254,6 +254,7 @@
+ assembler_<arch>.cpp collectedHeap.inline.hpp
+ assembler_<arch>.cpp interfaceSupport.hpp
+ assembler_<arch>.cpp interpreter.hpp
++assembler_<arch>.cpp methodHandles.hpp
+ assembler_<arch>.cpp objectMonitor.hpp
+ assembler_<arch>.cpp os.hpp
+ assembler_<arch>.cpp resourceArea.hpp
+@@ -1269,6 +1270,7 @@
cpCacheKlass.cpp collectedHeap.hpp
cpCacheKlass.cpp constantPoolOop.hpp
cpCacheKlass.cpp cpCacheKlass.hpp
@@ -4068,7 +3677,7 @@ diff --git a/src/share/vm/includeDB_core
cpCacheKlass.cpp handles.inline.hpp
cpCacheKlass.cpp javaClasses.hpp
cpCacheKlass.cpp markSweep.inline.hpp
-@@ -2190,6 +2192,7 @@
+@@ -2193,6 +2195,7 @@
interpreter_<arch_model>.cpp jvmtiExport.hpp
interpreter_<arch_model>.cpp jvmtiThreadState.hpp
interpreter_<arch_model>.cpp methodDataOop.hpp
@@ -4076,7 +3685,7 @@ diff --git a/src/share/vm/includeDB_core
interpreter_<arch_model>.cpp methodOop.hpp
interpreter_<arch_model>.cpp oop.inline.hpp
interpreter_<arch_model>.cpp sharedRuntime.hpp
-@@ -2794,6 +2797,22 @@
+@@ -2797,6 +2800,22 @@
methodDataOop.hpp orderAccess.hpp
methodDataOop.hpp universe.hpp
@@ -4099,7 +3708,7 @@ diff --git a/src/share/vm/includeDB_core
methodKlass.cpp collectedHeap.inline.hpp
methodKlass.cpp constMethodKlass.hpp
methodKlass.cpp gcLocker.hpp
-@@ -3037,6 +3056,7 @@
+@@ -3040,6 +3059,7 @@
oop.inline.hpp arrayOop.hpp
oop.inline.hpp atomic.hpp
oop.inline.hpp barrierSet.inline.hpp
@@ -4107,7 +3716,7 @@ diff --git a/src/share/vm/includeDB_core
oop.inline.hpp cardTableModRefBS.hpp
oop.inline.hpp collectedHeap.inline.hpp
oop.inline.hpp compactingPermGenGen.hpp
-@@ -3649,6 +3669,7 @@
+@@ -3652,6 +3672,7 @@
sharedRuntime.cpp interpreter.hpp
sharedRuntime.cpp javaCalls.hpp
sharedRuntime.cpp jvmtiExport.hpp
@@ -4115,7 +3724,7 @@ diff --git a/src/share/vm/includeDB_core
sharedRuntime.cpp nativeInst_<arch>.hpp
sharedRuntime.cpp nativeLookup.hpp
sharedRuntime.cpp oop.inline.hpp
-@@ -3824,6 +3845,7 @@
+@@ -3835,6 +3856,7 @@
stubGenerator_<arch_model>.cpp handles.inline.hpp
stubGenerator_<arch_model>.cpp instanceOop.hpp
stubGenerator_<arch_model>.cpp interpreter.hpp
@@ -4123,6 +3732,22 @@ diff --git a/src/share/vm/includeDB_core
stubGenerator_<arch_model>.cpp methodOop.hpp
stubGenerator_<arch_model>.cpp nativeInst_<arch>.hpp
stubGenerator_<arch_model>.cpp objArrayKlass.hpp
+diff --git a/src/share/vm/includeDB_gc_parallel b/src/share/vm/includeDB_gc_parallel
+--- a/src/share/vm/includeDB_gc_parallel
++++ b/src/share/vm/includeDB_gc_parallel
+@@ -25,6 +25,12 @@
+ collectorPolicy.cpp cmsGCAdaptivePolicyCounters.hpp
+
+ compiledICHolderKlass.cpp oop.pcgc.inline.hpp
++
++constantPoolKlass.cpp cardTableRS.hpp
++constantPoolKlass.cpp oop.pcgc.inline.hpp
++constantPoolKlass.cpp psPromotionManager.inline.hpp
++constantPoolKlass.cpp psScavenge.inline.hpp
++constantPoolKlass.cpp parOopClosures.inline.hpp
+
+ constantPoolKlass.cpp cardTableRS.hpp
+ constantPoolKlass.cpp oop.pcgc.inline.hpp
diff --git a/src/share/vm/interpreter/abstractInterpreter.hpp b/src/share/vm/interpreter/abstractInterpreter.hpp
--- a/src/share/vm/interpreter/abstractInterpreter.hpp
+++ b/src/share/vm/interpreter/abstractInterpreter.hpp
@@ -4134,6 +3759,15 @@ diff --git a/src/share/vm/interpreter/ab
java_lang_math_sin, // implementation of java.lang.Math.sin (x)
java_lang_math_cos, // implementation of java.lang.Math.cos (x)
java_lang_math_tan, // implementation of java.lang.Math.tan (x)
+@@ -90,8 +91,6 @@
+ static address _slow_signature_handler; // the native method generic (slow) signature handler
+
+ static address _rethrow_exception_entry; // rethrows an activation in previous frame
+-
+-
+
+ friend class AbstractInterpreterGenerator;
+ friend class InterpreterGenerator;
diff --git a/src/share/vm/interpreter/cppInterpreter.cpp b/src/share/vm/interpreter/cppInterpreter.cpp
--- a/src/share/vm/interpreter/cppInterpreter.cpp
+++ b/src/share/vm/interpreter/cppInterpreter.cpp
@@ -5514,7 +5148,7 @@ diff --git a/src/share/vm/runtime/argume
diff --git a/src/share/vm/runtime/arguments.cpp b/src/share/vm/runtime/arguments.cpp
--- a/src/share/vm/runtime/arguments.cpp
+++ b/src/share/vm/runtime/arguments.cpp
-@@ -2508,6 +2508,13 @@
+@@ -2535,6 +2535,13 @@
}
#endif // PRODUCT
@@ -5528,10 +5162,21 @@ diff --git a/src/share/vm/runtime/argume
if (PrintGCDetails) {
// Turn on -verbose:gc options as well
PrintGC = true;
+diff --git a/src/share/vm/runtime/frame.hpp b/src/share/vm/runtime/frame.hpp
+--- a/src/share/vm/runtime/frame.hpp
++++ b/src/share/vm/runtime/frame.hpp
+@@ -267,7 +267,6 @@
+ intptr_t* interpreter_frame_tos_at(jint offset) const;
+ intptr_t* interpreter_frame_tos_address() const;
+
+-
+ jint interpreter_frame_expression_stack_size() const;
+
+ intptr_t* interpreter_frame_sender_sp() const;
diff --git a/src/share/vm/runtime/globals.hpp b/src/share/vm/runtime/globals.hpp
--- a/src/share/vm/runtime/globals.hpp
+++ b/src/share/vm/runtime/globals.hpp
-@@ -3184,6 +3184,12 @@
+@@ -3190,6 +3190,12 @@
product(bool, AnonymousClasses, false, \
"support sun.misc.Unsafe.defineAnonymousClass") \
\
--- a/series Sat Sep 06 19:40:47 2008 -0700
+++ b/series Sun Sep 07 00:42:43 2008 -0700
@@ -1,6 +1,6 @@ anonk.patch #-/anonk #+jdk7-b
-anonk.patch #-/anonk #+jdk7-b30
-meth.patch #-/meth #+jdk7-b30
-indy.patch #-/indy #+jdk7-b30
+anonk.patch #-/anonk #+jdk7-b34
+meth.patch #-/meth #+jdk7-b34
+indy.patch #-/indy #+jdk7-b34
annot.patch #-/annot #+jdk7-b30 #-testable
#inti.patch #-/inti #+jdk7-b30 #-buildable
callcc.patch #-/callcc #+jdk7-b30 #-testable