changeset 53099:3ab3cb8a8d41

8215888: Register to register spill may use AVX 512 move instruction on unsupported platform. Reviewed-by: vlivanov, thartmann
author sviswanathan
date Thu, 03 Jan 2019 14:55:13 -0800
parents 6a25433b30ed
children 6bc1f8d41f4f
files src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp src/hotspot/cpu/x86/x86.ad
diffstat 2 files changed, 14 insertions(+), 14 deletions(-) [+]
line wrap: on
line diff
--- a/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp	Thu Jan 03 14:33:58 2019 -0800
+++ b/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp	Thu Jan 03 14:55:13 2019 -0800
@@ -649,7 +649,7 @@
 
     case T_FLOAT: {
       if (dest->is_single_xmm()) {
-        if (LP64_ONLY(UseAVX < 2 &&) c->is_zero_float()) {
+        if (LP64_ONLY(UseAVX <= 2 &&) c->is_zero_float()) {
           __ xorps(dest->as_xmm_float_reg(), dest->as_xmm_float_reg());
         } else {
           __ movflt(dest->as_xmm_float_reg(),
@@ -671,7 +671,7 @@
 
     case T_DOUBLE: {
       if (dest->is_double_xmm()) {
-        if (LP64_ONLY(UseAVX < 2 &&) c->is_zero_double()) {
+        if (LP64_ONLY(UseAVX <= 2 &&) c->is_zero_double()) {
           __ xorpd(dest->as_xmm_double_reg(), dest->as_xmm_double_reg());
         } else {
           __ movdbl(dest->as_xmm_double_reg(),
--- a/src/hotspot/cpu/x86/x86.ad	Thu Jan 03 14:33:58 2019 -0800
+++ b/src/hotspot/cpu/x86/x86.ad	Thu Jan 03 14:55:13 2019 -0800
@@ -2924,11 +2924,11 @@
   match(Set dst src);
   format %{ "movdqu $dst,$src\t! load vector (16 bytes)" %}
   ins_encode %{
-    if (UseAVX < 2 || VM_Version::supports_avx512vl()) {
-      __ movdqu($dst$$XMMRegister, $src$$XMMRegister);
-    } else {
+    if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
       int vector_len = 2;
       __ evmovdquq($dst$$XMMRegister, $src$$XMMRegister, vector_len);
+    } else {
+      __ movdqu($dst$$XMMRegister, $src$$XMMRegister);
     }
   %}
   ins_pipe( fpu_reg_reg );
@@ -2939,11 +2939,11 @@
   match(Set dst src);
   format %{ "movdqu $dst,$src\t! load vector (16 bytes)" %}
   ins_encode %{
-    if (UseAVX < 2 || VM_Version::supports_avx512vl()) {
-      __ movdqu($dst$$XMMRegister, $src$$XMMRegister);
-    } else {
+    if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
       int vector_len = 2;
       __ evmovdquq($dst$$XMMRegister, $src$$XMMRegister, vector_len);
+    } else {
+      __ movdqu($dst$$XMMRegister, $src$$XMMRegister);
     }
   %}
   ins_pipe( fpu_reg_reg );
@@ -2966,11 +2966,11 @@
   match(Set dst src);
   format %{ "vmovdqu $dst,$src\t! load vector (32 bytes)" %}
   ins_encode %{
-    if (UseAVX < 2 || VM_Version::supports_avx512vl()) {
-      __ vmovdqu($dst$$XMMRegister, $src$$XMMRegister);
-    } else {
+    if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
       int vector_len = 2;
       __ evmovdquq($dst$$XMMRegister, $src$$XMMRegister, vector_len);
+    } else {
+      __ vmovdqu($dst$$XMMRegister, $src$$XMMRegister);
     }
   %}
   ins_pipe( fpu_reg_reg );
@@ -2981,11 +2981,11 @@
   match(Set dst src);
   format %{ "vmovdqu $dst,$src\t! load vector (32 bytes)" %}
   ins_encode %{
-    if (UseAVX < 2 || VM_Version::supports_avx512vl()) {
-      __ vmovdqu($dst$$XMMRegister, $src$$XMMRegister);
-    } else {
+    if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
       int vector_len = 2;
       __ evmovdquq($dst$$XMMRegister, $src$$XMMRegister, vector_len);
+    } else {
+      __ vmovdqu($dst$$XMMRegister, $src$$XMMRegister);
     }
   %}
   ins_pipe( fpu_reg_reg );