changeset 8346:0b611970fa8b

8140584: nmethod::oops_do_marking_epilogue always runs verification code Reviewed-by: stefank
author poonam
date Sat, 29 Oct 2016 17:45:25 +0000
parents 88235cdca8d7
children 812ed44725b8
files src/cpu/ppc/vm/relocInfo_ppc.cpp src/cpu/sparc/vm/nativeInst_sparc.cpp src/cpu/sparc/vm/relocInfo_sparc.cpp src/cpu/x86/vm/relocInfo_x86.cpp src/share/vm/code/nmethod.cpp
diffstat 5 files changed, 13 insertions(+), 13 deletions(-) [+]
line wrap: on
line diff
--- a/src/cpu/ppc/vm/relocInfo_ppc.cpp	Fri Oct 28 22:36:23 2016 +0000
+++ b/src/cpu/ppc/vm/relocInfo_ppc.cpp	Sat Oct 29 17:45:25 2016 +0000
@@ -62,7 +62,7 @@
       nativeMovConstReg_at(addr())->set_narrow_oop(no, code());
     }
   } else {
-    assert((address) (nativeMovConstReg_at(addr())->data()) == x, "data must match");
+    guarantee((address) (nativeMovConstReg_at(addr())->data()) == x, "data must match");
   }
 }
 
--- a/src/cpu/sparc/vm/nativeInst_sparc.cpp	Fri Oct 28 22:36:23 2016 +0000
+++ b/src/cpu/sparc/vm/nativeInst_sparc.cpp	Sat Oct 29 17:45:25 2016 +0000
@@ -64,7 +64,7 @@
   masm.patchable_sethi(x, destreg);
   int len = buffer - masm.pc();
   for (int i = 0; i < len; i++) {
-    assert(instaddr[i] == buffer[i], "instructions must match");
+    guarantee(instaddr[i] == buffer[i], "instructions must match");
   }
 }
 
--- a/src/cpu/sparc/vm/relocInfo_sparc.cpp	Fri Oct 28 22:36:23 2016 +0000
+++ b/src/cpu/sparc/vm/relocInfo_sparc.cpp	Sat Oct 29 17:45:25 2016 +0000
@@ -83,7 +83,7 @@
     inst &= ~Assembler::simm(    -1, 13);
     inst |=  Assembler::simm(simm13, 13);
     if (verify_only) {
-      assert(ip->long_at(0) == inst, "instructions must match");
+      guarantee(ip->long_at(0) == inst, "instructions must match");
     } else {
       ip->set_long_at(0, inst);
     }
@@ -101,15 +101,15 @@
       inst &= ~Assembler::hi22(-1);
       inst |=  Assembler::hi22((intptr_t)np);
       if (verify_only) {
-        assert(ip->long_at(0) == inst, "instructions must match");
+        guarantee(ip->long_at(0) == inst, "instructions must match");
       } else {
         ip->set_long_at(0, inst);
       }
       inst2 = ip->long_at( NativeInstruction::nop_instruction_size );
       guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op");
       if (verify_only) {
-        assert(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np),
-               "instructions must match");
+        guarantee(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np),
+                  "instructions must match");
       } else {
         ip->set_long_at(NativeInstruction::nop_instruction_size, NativeInstruction::set_data32_simm13( inst2, (intptr_t)np));
       }
@@ -126,7 +126,7 @@
     inst |=  Assembler::hi22((intptr_t)x);
     // (ignore offset; it doesn't play into the sethi)
     if (verify_only) {
-      assert(ip->long_at(0) == inst, "instructions must match");
+      guarantee(ip->long_at(0) == inst, "instructions must match");
     } else {
       ip->set_long_at(0, inst);
     }
--- a/src/cpu/x86/vm/relocInfo_x86.cpp	Fri Oct 28 22:36:23 2016 +0000
+++ b/src/cpu/x86/vm/relocInfo_x86.cpp	Sat Oct 29 17:45:25 2016 +0000
@@ -40,7 +40,7 @@
          which == Assembler::imm_operand, "format unpacks ok");
   if (which == Assembler::imm_operand) {
     if (verify_only) {
-      assert(*pd_address_in_code() == x, "instructions must match");
+      guarantee(*pd_address_in_code() == x, "instructions must match");
     } else {
       *pd_address_in_code() = x;
     }
@@ -49,13 +49,13 @@
     // both compressed oops and compressed classes look the same
     if (Universe::heap()->is_in_reserved((oop)x)) {
     if (verify_only) {
-      assert(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match");
+      guarantee(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match");
     } else {
       *(int32_t*) disp = oopDesc::encode_heap_oop((oop)x);
     }
   } else {
       if (verify_only) {
-        assert(*(uint32_t*) disp == Klass::encode_klass((Klass*)x), "instructions must match");
+        guarantee(*(uint32_t*) disp == Klass::encode_klass((Klass*)x), "instructions must match");
       } else {
         *(int32_t*) disp = Klass::encode_klass((Klass*)x);
       }
@@ -66,14 +66,14 @@
     address disp = Assembler::locate_operand(ip, which);
     address next_ip = Assembler::locate_next_instruction(ip);
     if (verify_only) {
-      assert(*(int32_t*) disp == (x - next_ip), "instructions must match");
+      guarantee(*(int32_t*) disp == (x - next_ip), "instructions must match");
     } else {
       *(int32_t*) disp = x - next_ip;
     }
   }
 #else
   if (verify_only) {
-    assert(*pd_address_in_code() == (x + o), "instructions must match");
+    guarantee(*pd_address_in_code() == (x + o), "instructions must match");
   } else {
     *pd_address_in_code() = x + o;
   }
--- a/src/share/vm/code/nmethod.cpp	Fri Oct 28 22:36:23 2016 +0000
+++ b/src/share/vm/code/nmethod.cpp	Sat Oct 29 17:45:25 2016 +0000
@@ -2290,7 +2290,7 @@
     assert(cur != NULL, "not NULL-terminated");
     nmethod* next = cur->_oops_do_mark_link;
     cur->_oops_do_mark_link = NULL;
-    cur->verify_oop_relocations();
+    DEBUG_ONLY(cur->verify_oop_relocations());
     NOT_PRODUCT(if (TraceScavenge)  cur->print_on(tty, "oops_do, unmark"));
     cur = next;
   }