changeset 9155:2b93f4e029a4

fix for jtreg TestArrayCopy6769124 -Xcomp Contributed-by: Fedor Burdun <fedor.burdun@azul.com>
author snazarki
date Thu, 11 Jul 2019 17:56:07 +0300
parents 7e47438a4379
children afa1e1f469db
files src/cpu/aarch32/vm/c1_LIRAssembler_aarch32.cpp
diffstat 1 files changed, 4 insertions(+), 3 deletions(-) [+]
line wrap: on
line diff
--- a/src/cpu/aarch32/vm/c1_LIRAssembler_aarch32.cpp	Thu Jul 11 17:55:29 2019 +0300
+++ b/src/cpu/aarch32/vm/c1_LIRAssembler_aarch32.cpp	Thu Jul 11 17:56:07 2019 +0300
@@ -1664,13 +1664,13 @@
       // cpu register - constant
       jint c = right->as_constant_ptr()->as_jint();
 
-      assert(code == lir_add || code == lir_sub, "mismatched arithmetic op");
-      if (c == 0 && dreg == lreg) {
+      assert(code == lir_add || code == lir_sub || code == lir_mul, "mismatched arithmetic op");
+      if (dreg == lreg && ( code != lir_mul && c == 0 || code == lir_mul && c == 1 ) ) {
         COMMENT("effective nop elided");
         return;
       }
 
-      if (Assembler::operand_valid_for_add_sub_immediate(c)) {
+      if (code != lir_mul && Assembler::operand_valid_for_add_sub_immediate(c)) {
         switch (code) {
         case lir_add: __ add(dreg, lreg, c); break;
         case lir_sub: __ sub(dreg, lreg, c); break;
@@ -1681,6 +1681,7 @@
         switch (code) {
         case lir_add: __ add(dreg, lreg, rscratch1); break;
         case lir_sub: __ sub(dreg, lreg, rscratch1); break;
+        case lir_mul: __ mul(dreg, lreg, rscratch1); break;
         default: ShouldNotReachHere();
         }
       }