changeset 58865:9afab9bf3e6a

8233912: aarch64: minor improvements of atomic operations Reviewed-by: aph
author fyang
date Thu, 14 Nov 2019 15:07:37 +0800
parents 124164752fe4
children 4a09d4df104c
files src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.hpp
diffstat 1 files changed, 9 insertions(+), 2 deletions(-) [+]
line wrap: on
line diff
--- a/src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.hpp	Thu Nov 14 14:54:39 2019 -0800
+++ b/src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.hpp	Thu Nov 14 15:07:37 2019 +0800
@@ -29,6 +29,8 @@
 #include "vm_version_aarch64.hpp"
 
 // Implementation of class atomic
+// Note that memory_order_conservative requires a full barrier after atomic stores.
+// See https://patchwork.kernel.org/patch/3575821/
 
 #define FULL_MEM_BARRIER  __sync_synchronize()
 #define READ_MEM_BARRIER  __atomic_thread_fence(__ATOMIC_ACQUIRE);
@@ -52,7 +54,7 @@
                                                      T volatile* dest,
                                                      atomic_memory_order order) const {
   STATIC_ASSERT(byte_size == sizeof(T));
-  T res = __sync_lock_test_and_set(dest, exchange_value);
+  T res = __atomic_exchange_n(dest, exchange_value, __ATOMIC_RELEASE);
   FULL_MEM_BARRIER;
   return res;
 }
@@ -70,7 +72,12 @@
                               __ATOMIC_RELAXED, __ATOMIC_RELAXED);
     return value;
   } else {
-    return __sync_val_compare_and_swap(dest, compare_value, exchange_value);
+    T value = compare_value;
+    FULL_MEM_BARRIER;
+    __atomic_compare_exchange(dest, &value, &exchange_value, /*weak*/false,
+                              __ATOMIC_RELAXED, __ATOMIC_RELAXED);
+    FULL_MEM_BARRIER;
+    return value;
   }
 }