changeset 29869:f0f6ac2a350d

8076467: AARCH64: assertion fail with -XX:+UseG1GC Summary: Don't call encoding unless bool is true. Reviewed-by: kvn
author aph
date Tue, 14 Apr 2015 17:19:08 +0100
parents 38f98cb6b335
children ea8305ce32fa
files hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.hpp hotspot/src/cpu/aarch64/vm/register_aarch64.hpp
diffstat 2 files changed, 6 insertions(+), 1 deletions(-) [+]
line wrap: on
line diff
--- a/hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.hpp	Wed Jul 05 20:28:21 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/interp_masm_aarch64.hpp	Tue Apr 14 17:19:08 2015 +0100
@@ -39,6 +39,8 @@
  protected:
 
  protected:
+  using MacroAssembler::call_VM_leaf_base;
+
   // Interpreter specific version of call_VM_base
   virtual void call_VM_leaf_base(address entry_point,
                                  int number_of_arguments);
--- a/hotspot/src/cpu/aarch64/vm/register_aarch64.hpp	Wed Jul 05 20:28:21 2017 +0200
+++ b/hotspot/src/cpu/aarch64/vm/register_aarch64.hpp	Tue Apr 14 17:19:08 2015 +0100
@@ -60,7 +60,10 @@
   bool  has_byte_register() const                { return 0 <= (intptr_t)this && (intptr_t)this < number_of_byte_registers; }
   const char* name() const;
   int   encoding_nocheck() const                 { return (intptr_t)this; }
-  unsigned long bit(bool yes = true) const       { return yes << encoding(); }
+
+  // Return the bit which represents this register.  This is intended
+  // to be ORed into a bitmask: for usage see class RegSet below.
+  unsigned long bit(bool should_set = true) const { return should_set ? 1 << encoding() : 0; }
 };
 
 // The integer registers of the aarch64 architecture