changeset 38233:9f784c50b967

8155967: aarch64: fix register usage in block zeroing Summary: fix array fill stub to use r10 == base and r11 == count Reviewed-by: aph
author enevill
date Tue, 03 May 2016 20:36:17 +0000
parents b83afaf903f2
children 06263a71233c
files hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp hotspot/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp
diffstat 2 files changed, 7 insertions(+), 2 deletions(-) [+]
line wrap: on
line diff
--- a/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp	Tue May 03 21:28:46 2016 +0000
+++ b/hotspot/src/cpu/aarch64/vm/macroAssembler_aarch64.cpp	Tue May 03 20:36:17 2016 +0000
@@ -4790,6 +4790,7 @@
   Label base_aligned;
 
   assert_different_registers(base, cnt, rscratch1);
+  guarantee(base == r10 && cnt == r11, "fix register usage");
 
   Register tmp = rscratch1;
   Register tmp2 = rscratch2;
--- a/hotspot/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp	Tue May 03 21:28:46 2016 +0000
+++ b/hotspot/src/cpu/aarch64/vm/stubGenerator_aarch64.cpp	Tue May 03 20:36:17 2016 +0000
@@ -2082,7 +2082,9 @@
     const Register to        = c_rarg0;  // source array address
     const Register value     = c_rarg1;  // value
     const Register count     = c_rarg2;  // elements count
-    const Register cnt_words = c_rarg3; // temp register
+
+    const Register bz_base = r10;        // base for block_zero routine
+    const Register cnt_words = r11;      // temp register
 
     __ enter();
 
@@ -2152,7 +2154,9 @@
       __ cmp(cnt_words, BlockZeroingLowLimit >> 3);
       __ ccmp(value, 0 /* comparing value */, 0 /* NZCV */, Assembler::GE);
       __ br(Assembler::NE, non_block_zeroing);
-      __ block_zero(to, cnt_words, true);
+      __ mov(bz_base, to);
+      __ block_zero(bz_base, cnt_words, true);
+      __ mov(to, bz_base);
       __ b(rest);
       __ bind(non_block_zeroing);
       __ fill_words(to, cnt_words, value);